IDCODE: | LSB | |
---|---|---|
Package: | UNDEFINED | |
BS Register: | 444 bits | |
Instruction Register: | 5 bits | |
Instruction(s): | ISP_WRITE, SAMPLE, ISP_ENABLE, ISP_VERIFY, IDCODE, ISP_DISABLE, BYPASS, EXTEST, ISP_EOTF, ISP_ERASE, INTEST, ISP_READ, STRTEST, HIHZ, ISP_INIT, ISP_PROGRAM, TEST_MODE, CLAMP | |
Register(s): | IDCODE, USERCODE |
Name | Package | Date | Size | Down/l |
---|---|---|---|---|
XCR3128XL_CS144 | 19.02.18 | 41232 | 0 | |
XCR3128XL_TQ144 | 19.02.18 | 40736 | 0 | |
XCR3128XL_VQ100 | 19.02.18 | 37742 | 2 | |
XCR3128XL_CS144 | UNDEFINED | 19.02.18 | 40799 | 0 |
XCR3128XL_TQ144 | UNDEFINED | 19.02.18 | 40084 | 0 |