BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

General information

Name: LFEC2_70E_XXF672   ( LFEC2 70E XXF672 ) (newer version available!)
Vendor: Lattice Semi.
Family: ECP2/M FPGA
Downloads: 0
Size: 113433 bytes
Submitted on: 16.01.2011 14:27
Submitted by: bsdlinfo
Comment:
External links: BSDL is available on 1 external website(s):
Log in to see the external links.

Parsed information

IDCODE: LSB
 
Package: fpbga672
BS Register: 1459 bits
Instruction Register: 8 bits
Instruction(s): ISC_ERASE, SAMPLE, PRELOAD, ISC_DISABLE, ISC_PROGRAM_SECURITY, ISC_ERASE_DONE, PRIVATE, USERCODE, IDCODE, ISC_PROGRAM_USERCODE, BYPASS, EXTEST, LSC_RESET_ADDRESS, ISC_ENABLE, RESERVE, ISC_PROGRAM, ISC_READ, ISC_PROGRAM_DONE, HIHZ, ISC_ADDRESS_SHIFT, ISC_NOOP, LSC_REFRESH, CLAMP
Register(s): IDCODE, USERCODE

Syntax check

No syntax errors found