-- M O T O R O L A S S D T J T A G S O F T W A R E -- BSDL File Generated: Thu Jan 6 10:15:39 2000 -- -- Revision History: -- entity DSP56F826 is generic (PHYSICAL_PIN_MAP : string := "P100LQFP"); port ( TMS: in bit; TDI: in bit; TDO: out bit; TRST_B: in bit; POWER_I01: linkage bit; GROUND_IO1: linkage bit; A15: inout bit; A14: inout bit; A13: inout bit; A12: inout bit; A11: inout bit; A10: inout bit; A9: inout bit; A8: inout bit; A7: inout bit; A6: inout bit; A5: inout bit; A4: inout bit; GROUND_CORE4: linkage bit; POWER_CORE4: linkage bit; A3: inout bit; A2: inout bit; A1: inout bit; A0: inout bit; XBOOT: in bit; RD_B: inout bit; WR_B: inout bit; DS_B: inout bit; PS_B: inout bit; POWER_IO2: linkage bit; GROUND_IO2: linkage bit; IREQA_B: in bit; IREQB_B: in bit; D0: inout bit; D1: inout bit; D2: inout bit; D3: inout bit; D4: inout bit; D5: inout bit; D6: inout bit; D7: inout bit; D8: inout bit; D9: inout bit; D10: inout bit; RESET_B: in bit; D11: inout bit; D12: inout bit; D13: inout bit; D14: inout bit; D15: inout bit; SRD: inout bit; SRFS: inout bit; SRCK: inout bit; STD: inout bit; STFS: inout bit; STCK: inout bit; POWER_IO3: linkage bit; GROUND_IO3: linkage bit; VDDA_ANG: linkage bit; VSSA_ANG: linkage bit; XTAL: linkage bit; EXTAL: linkage bit; GROUND_CORE1: linkage bit; POWER_CORE1: linkage bit; CLKO: out bit; MPIOB0: inout bit; MPIOB1: inout bit; MPIOB2: inout bit; MPIOB3: inout bit; MPIOB4: inout bit; MPIOB5: inout bit; MPIOB6: inout bit; MPIOB7: inout bit; MPIOD0: inout bit; MPIOD1: inout bit; MPIOD2: inout bit; MPIOD3: inout bit; MPIOD4: inout bit; MPIOD5: inout bit; POWER_IO4: linkage bit; GROUND_IO4: linkage bit; MPIOD6: inout bit; MPIOD7: inout bit; SCLK: inout bit; MOSI: inout bit; MISO: inout bit; SS_B: inout bit; TA3: inout bit; TA2: inout bit; TA1: inout bit; TA0: inout bit; RXD1: in bit; TXD1: inout bit; POWER_CORE5: linkage bit; GROUND_CORE5: linkage bit; RXD0: inout bit; TXD0: inout bit; DE_B: out bit; TCS: linkage bit; TCK: in bit); use STD_1149_1_1994.all; attribute COMPONENT_CONFORMANCE of DSP56F826 : entity is "STD_1149_1_1993"; attribute PIN_MAP of DSP56F826 : entity is PHYSICAL_PIN_MAP; constant P100LQFP : PIN_MAP_STRING := "TMS: 1, " & "TDI: 2, " & "TDO: 3, " & "TRST_B: 4, " & "POWER_I01: 5, " & "GROUND_IO1: 6, " & "A15: 7, " & "A14: 8, " & "A13: 9, " & "A12: 10, " & "A11: 11, " & "A10: 12, " & "A9: 13, " & "A8: 14, " & "A7: 15, " & "A6: 16, " & "A5: 17, " & "A4: 18, " & "GROUND_CORE4: 19, " & "POWER_CORE4: 20, " & "A3: 21, " & "A2: 22, " & "A1: 23, " & "A0: 24, " & "XBOOT: 25, " & "RD_B: 26, " & "WR_B: 27, " & "DS_B: 28, " & "PS_B: 29, " & "POWER_IO2: 30, " & "GROUND_IO2: 31, " & "IREQA_B: 32, " & "IREQB_B: 33, " & "D0: 34, " & "D1: 35, " & "D2: 36, " & "D3: 37, " & "D4: 38, " & "D5: 39, " & "D6: 40, " & "D7: 41, " & "D8: 42, " & "D9: 43, " & "D10: 44, " & "RESET_B: 45, " & "D11: 46, " & "D12: 47, " & "D13: 48, " & "D14: 49, " & "D15: 50, " & "SRD: 51, " & "SRFS: 52, " & "SRCK: 53, " & "STD: 54, " & "STFS: 55, " & "STCK: 56, " & "POWER_IO3: 57, " & "GROUND_IO3: 58, " & "VDDA_ANG: 59, " & "VSSA_ANG: 60, " & "XTAL: 61, " & "EXTAL: 62, " & "GROUND_CORE1: 63, " & "POWER_CORE1: 64, " & "CLKO: 65, " & "MPIOB0: 66, " & "MPIOB1: 67, " & "MPIOB2: 68, " & "MPIOB3: 69, " & "MPIOB4: 70, " & "MPIOB5: 71, " & "MPIOB6: 72, " & "MPIOB7: 73, " & "MPIOD0: 74, " & "MPIOD1: 75, " & "MPIOD2: 76, " & "MPIOD3: 77, " & "MPIOD4: 78, " & "MPIOD5: 79, " & "POWER_IO4: 80, " & "GROUND_IO4: 81, " & "MPIOD6: 82, " & "MPIOD7: 83, " & "SCLK: 84, " & "MOSI: 85, " & "MISO: 86, " & "SS_B: 87, " & "TA3: 88, " & "TA2: 89, " & "TA1: 90, " & "TA0: 91, " & "RXD1: 92, " & "TXD1: 93, " & "POWER_CORE5: 94, " & "GROUND_CORE5: 95, " & "RXD0: 96, " & "TXD0: 97, " & "DE_B: 98, " & "TCS: 99, " & "TCK: 100 " ; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_RESET of TRST_B : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (20.0e6, BOTH); attribute INSTRUCTION_LENGTH of DSP56F826 : entity is 4; attribute INSTRUCTION_OPCODE of DSP56F826 : entity is "EXTEST (0000)," & "SAMPLE (0001)," & "IDCODE (0010)," & "CLAMP (0101)," & "HIGHZ (0100)," & "EXTEST_PULLUP (0011)," & "ENABLE_ONCE (0110)," & "DEBUG_REQUEST (0111)," & "BYPASS (1111)"; attribute INSTRUCTION_CAPTURE of DSP56F826 : entity is "XX01"; attribute INSTRUCTION_PRIVATE of DSP56F826 : entity is "ENABLE_ONCE, DEBUG_REQUEST "; attribute IDCODE_REGISTER of DSP56F826 : entity is "00000001111100111010000000011101"; attribute REGISTER_ACCESS of DSP56F826 : entity is "BOUNDARY (EXTEST_PULLUP)," & "BYPASS (ENABLE_ONCE, DEBUG_REQUEST)" ; attribute BOUNDARY_LENGTH of DSP56F826 : entity is 285; attribute BOUNDARY_REGISTER of DSP56F826 : entity is -- num cell port func safe [ccell dis rslt] "284 (BC_1, A15, input, X)," & "283 (BC_1, A15, output3, X, 282, 1, PULL1)," & "282 (BC_1, *, control, 1)," & "281 (BC_1, *, internal, 1)," & "280 (BC_1, A14, input, X)," & "279 (BC_1, A14, output3, X, 278, 1, PULL1)," & "278 (BC_1, *, control, 1)," & "277 (BC_1, *, internal, 1)," & "276 (BC_1, A13, input, X)," & "275 (BC_1, A13, output3, X, 274, 1, PULL1)," & "274 (BC_1, *, control, 1)," & "273 (BC_1, *, internal, 1)," & "272 (BC_1, A12, input, X)," & "271 (BC_1, A12, output3, X, 270, 1, PULL1)," & "270 (BC_1, *, control, 1)," & "269 (BC_1, *, internal, 1)," & "268 (BC_1, A11, input, X)," & "267 (BC_1, A11, output3, X, 266, 1, PULL1)," & "266 (BC_1, *, control, 1)," & "265 (BC_1, *, internal, 1)," & -- num cell port func safe [ccell dis rslt] "264 (BC_1, A10, input, X)," & "263 (BC_1, A10, output3, X, 262, 1, PULL1)," & "262 (BC_1, *, control, 1)," & "261 (BC_1, *, internal, 1)," & "260 (BC_1, A9, input, X)," & "259 (BC_1, A9, output3, X, 258, 1, PULL1)," & "258 (BC_1, *, control, 1)," & "257 (BC_1, *, internal, 1)," & "256 (BC_1, A8, input, X)," & "255 (BC_1, A8, output3, X, 254, 1, PULL1)," & "254 (BC_1, *, control, 1)," & "253 (BC_1, *, internal, 1)," & "252 (BC_1, A7, input, X)," & "251 (BC_1, A7, output3, X, 250, 1, PULL1)," & "250 (BC_1, *, control, 1)," & "249 (BC_1, *, internal, 1)," & "248 (BC_1, A6, input, X)," & "247 (BC_1, A6, output3, X, 246, 1, PULL1)," & "246 (BC_1, *, control, 1)," & "245 (BC_1, *, internal, 1)," & -- num cell port func safe [ccell dis rslt] "244 (BC_1, A5, input, X)," & "243 (BC_1, A5, output3, X, 242, 1, PULL1)," & "242 (BC_1, *, control, 1)," & "241 (BC_1, *, internal, 1)," & "240 (BC_1, A4, input, X)," & "239 (BC_1, A4, output3, X, 238, 1, PULL1)," & "238 (BC_1, *, control, 1)," & "237 (BC_1, *, internal, 1)," & "236 (BC_1, A3, input, X)," & "235 (BC_1, A3, output3, X, 234, 1, PULL1)," & "234 (BC_1, *, control, 1)," & "233 (BC_1, *, internal, 1)," & "232 (BC_1, A2, input, X)," & "231 (BC_1, A2, output3, X, 230, 1, PULL1)," & "230 (BC_1, *, control, 1)," & "229 (BC_1, *, internal, 1)," & "228 (BC_1, A1, input, X)," & "227 (BC_1, A1, output3, X, 226, 1, PULL1)," & "226 (BC_1, *, control, 1)," & "225 (BC_1, *, internal, 1)," & -- num cell port func safe [ccell dis rslt] "224 (BC_1, A0, input, X)," & "223 (BC_1, A0, output3, X, 222, 1, PULL1)," & "222 (BC_1, *, control, 1)," & "221 (BC_1, *, internal, 1)," & "220 (BC_1, XBOOT, input, X)," & "219 (BC_1, RD_B, input, X)," & "218 (BC_1, RD_B, output3, X, 217, 1, PULL1)," & "217 (BC_1, *, control, 1)," & "216 (BC_1, *, internal, 1)," & "215 (BC_1, WR_B, input, X)," & "214 (BC_1, WR_B, output3, X, 213, 1, PULL1)," & "213 (BC_1, *, control, 1)," & "212 (BC_1, *, internal, 1)," & "211 (BC_1, DS_B, input, X)," & "210 (BC_1, DS_B, output3, X, 209, 1, PULL1)," & "209 (BC_1, *, control, 1)," & "208 (BC_1, *, internal, 1)," & "207 (BC_1, PS_B, input, X)," & "206 (BC_1, PS_B, output3, X, 205, 1, PULL1)," & "205 (BC_1, *, control, 1)," & -- num cell port func safe [ccell dis rslt] "204 (BC_1, *, internal, 1)," & "203 (BC_1, IREQA_B, input, X)," & "202 (BC_1, IREQB_B, input, X)," & "201 (BC_1, D0, input, X)," & "200 (BC_1, D0, output3, X, 199, 1, PULL1)," & "199 (BC_1, *, control, 1)," & "198 (BC_1, *, internal, 1)," & "197 (BC_1, D1, input, X)," & "196 (BC_1, D1, output3, X, 195, 1, PULL1)," & "195 (BC_1, *, control, 1)," & "194 (BC_1, *, internal, 1)," & "193 (BC_1, D2, input, X)," & "192 (BC_1, D2, output3, X, 191, 1, PULL1)," & "191 (BC_1, *, control, 1)," & "190 (BC_1, *, internal, 1)," & "189 (BC_1, D3, input, X)," & "188 (BC_1, D3, output3, X, 187, 1, PULL1)," & "187 (BC_1, *, control, 1)," & "186 (BC_1, *, internal, 1)," & "185 (BC_1, D4, input, X)," & -- num cell port func safe [ccell dis rslt] "184 (BC_1, D4, output3, X, 183, 1, PULL1)," & "183 (BC_1, *, control, 1)," & "182 (BC_1, *, internal, 1)," & "181 (BC_1, D5, input, X)," & "180 (BC_1, D5, output3, X, 179, 1, PULL1)," & "179 (BC_1, *, control, 1)," & "178 (BC_1, *, internal, 1)," & "177 (BC_1, D6, input, X)," & "176 (BC_1, D6, output3, X, 175, 1, PULL1)," & "175 (BC_1, *, control, 1)," & "174 (BC_1, *, internal, 1)," & "173 (BC_1, D7, input, X)," & "172 (BC_1, D7, output3, X, 171, 1, PULL1)," & "171 (BC_1, *, control, 1)," & "170 (BC_1, *, internal, 1)," & "169 (BC_1, D8, input, X)," & "168 (BC_1, D8, output3, X, 167, 1, PULL1)," & "167 (BC_1, *, control, 1)," & "166 (BC_1, *, internal, 1)," & "165 (BC_1, D9, input, X)," & -- num cell port func safe [ccell dis rslt] "164 (BC_1, D9, output3, X, 163, 1, PULL1)," & "163 (BC_1, *, control, 1)," & "162 (BC_1, *, internal, 1)," & "161 (BC_1, D10, input, X)," & "160 (BC_1, D10, output3, X, 159, 1, PULL1)," & "159 (BC_1, *, control, 1)," & "158 (BC_1, *, internal, 1)," & "157 (BC_1, RESET_B, input, X)," & "156 (BC_1, D11, input, X)," & "155 (BC_1, D11, output3, X, 154, 1, PULL1)," & "154 (BC_1, *, control, 1)," & "153 (BC_1, *, internal, 1)," & "152 (BC_1, D12, input, X)," & "151 (BC_1, D12, output3, X, 150, 1, PULL1)," & "150 (BC_1, *, control, 1)," & "149 (BC_1, *, internal, 1)," & "148 (BC_1, D13, input, X)," & "147 (BC_1, D13, output3, X, 146, 1, PULL1)," & "146 (BC_1, *, control, 1)," & "145 (BC_1, *, internal, 1)," & -- num cell port func safe [ccell dis rslt] "144 (BC_1, D14, input, X)," & "143 (BC_1, D14, output3, X, 142, 1, PULL1)," & "142 (BC_1, *, control, 1)," & "141 (BC_1, *, internal, 1)," & "140 (BC_1, D15, input, X)," & "139 (BC_1, D15, output3, X, 138, 1, PULL1)," & "138 (BC_1, *, control, 1)," & "137 (BC_1, *, internal, 1)," & "136 (BC_1, SRD, input, X)," & "135 (BC_1, SRD, output3, X, 134, 1, PULL1)," & "134 (BC_1, *, control, 1)," & "133 (BC_1, *, internal, 1)," & "132 (BC_1, SRFS, input, X)," & "131 (BC_1, SRFS, output3, X, 130, 1, PULL1)," & "130 (BC_1, *, control, 1)," & "129 (BC_1, *, internal, 1)," & "128 (BC_1, SRCK, input, X)," & "127 (BC_1, SRCK, output3, X, 126, 1, PULL1)," & "126 (BC_1, *, control, 1)," & "125 (BC_1, *, internal, 1)," & -- num cell port func safe [ccell dis rslt] "124 (BC_1, STD, input, X)," & "123 (BC_1, STD, output3, X, 122, 1, PULL1)," & "122 (BC_1, *, control, 1)," & "121 (BC_1, *, internal, 1)," & "120 (BC_1, STFS, input, X)," & "119 (BC_1, STFS, output3, X, 118, 1, PULL1)," & "118 (BC_1, *, control, 1)," & "117 (BC_1, *, internal, 1)," & "116 (BC_1, STCK, input, X)," & "115 (BC_1, STCK, output3, X, 114, 1, PULL1)," & "114 (BC_1, *, control, 1)," & "113 (BC_1, *, internal, 1)," & "112 (BC_1, CLKO, output3, X, 111, 1, PULL1)," & "111 (BC_1, *, control, 1)," & "110 (BC_1, MPIOB0, input, X)," & "109 (BC_1, MPIOB0, output3, X, 108, 1, PULL1)," & "108 (BC_1, *, control, 1)," & "107 (BC_1, *, internal, 1)," & "106 (BC_1, MPIOB1, input, X)," & "105 (BC_1, MPIOB1, output3, X, 104, 1, PULL1)," & -- num cell port func safe [ccell dis rslt] "104 (BC_1, *, control, 1)," & "103 (BC_1, *, internal, 1)," & "102 (BC_1, MPIOB2, input, X)," & "101 (BC_1, MPIOB2, output3, X, 100, 1, PULL1)," & "100 (BC_1, *, control, 1)," & " 99 (BC_1, *, internal, 1)," & " 98 (BC_1, MPIOB3, input, X)," & " 97 (BC_1, MPIOB3, output3, X, 96, 1, PULL1)," & " 96 (BC_1, *, control, 1)," & " 95 (BC_1, *, internal, 0)," & " 94 (BC_1, MPIOB4, input, X)," & " 93 (BC_1, MPIOB4, output3, X, 92, 1, PULL1)," & " 92 (BC_1, *, control, 1)," & " 91 (BC_1, *, internal, 1)," & " 90 (BC_1, MPIOB5, input, X)," & " 89 (BC_1, MPIOB5, output3, X, 88, 1, PULL1)," & " 88 (BC_1, *, control, 1)," & " 87 (BC_1, *, internal, 1)," & " 86 (BC_1, MPIOB6, input, X)," & " 85 (BC_1, MPIOB6, output3, X, 84, 1, PULL1)," & -- num cell port func safe [ccell dis rslt] " 84 (BC_1, *, control, 1)," & " 83 (BC_1, *, internal, 1)," & " 82 (BC_1, MPIOB7, input, X)," & " 81 (BC_1, MPIOB7, output3, X, 80, 1, PULL1)," & " 80 (BC_1, *, control, 1)," & " 79 (BC_1, *, internal, 1)," & " 78 (BC_1, MPIOD0, input, X)," & " 77 (BC_1, MPIOD0, output3, X, 76, 1, PULL1)," & " 76 (BC_1, *, control, 1)," & " 75 (BC_1, *, internal, 1)," & " 74 (BC_1, MPIOD1, input, X)," & " 73 (BC_1, MPIOD1, output3, X, 72, 1, PULL1)," & " 72 (BC_1, *, control, 1)," & " 71 (BC_1, *, internal, 1)," & " 70 (BC_1, MPIOD2, input, X)," & " 69 (BC_1, MPIOD2, output3, X, 68, 1, PULL1)," & " 68 (BC_1, *, control, 1)," & " 67 (BC_1, *, internal, 1)," & " 66 (BC_1, MPIOD3, input, X)," & " 65 (BC_1, MPIOD3, output3, X, 64, 1, PULL1)," & -- num cell port func safe [ccell dis rslt] " 64 (BC_1, *, control, 1)," & " 63 (BC_1, *, internal, 1)," & " 62 (BC_1, MPIOD4, input, X)," & " 61 (BC_1, MPIOD4, output3, X, 60, 1, PULL1)," & " 60 (BC_1, *, control, 1)," & " 59 (BC_1, *, internal, 1)," & " 58 (BC_1, MPIOD5, input, X)," & " 57 (BC_1, MPIOD5, output3, X, 56, 1, PULL1)," & " 56 (BC_1, *, control, 1)," & " 55 (BC_1, *, internal, 1)," & " 54 (BC_1, MPIOD6, input, X)," & " 53 (BC_1, MPIOD6, output3, X, 52, 1, PULL1)," & " 52 (BC_1, *, control, 1)," & " 51 (BC_1, *, internal, 1)," & " 50 (BC_1, MPIOD7, input, X)," & " 49 (BC_1, MPIOD7, output3, X, 48, 1, PULL1)," & " 48 (BC_1, *, control, 1)," & " 47 (BC_1, *, internal, 1)," & " 46 (BC_1, SCLK, input, X)," & " 45 (BC_1, SCLK, output3, X, 44, 1, PULL1)," & -- num cell port func safe [ccell dis rslt] " 44 (BC_1, *, control, 1)," & " 43 (BC_1, *, internal, 1)," & " 42 (BC_1, MOSI, input, X)," & " 41 (BC_1, MOSI, output3, X, 40, 1, PULL1)," & " 40 (BC_1, *, control, 1)," & " 39 (BC_1, *, internal, 1)," & " 38 (BC_1, MISO, input, X)," & " 37 (BC_1, MISO, output3, X, 36, 1, PULL1)," & " 36 (BC_1, *, control, 1)," & " 35 (BC_1, *, internal, 1)," & " 34 (BC_1, SS_B, input, X)," & " 33 (BC_1, SS_B, output3, X, 32, 1, PULL1)," & " 32 (BC_1, *, control, 1)," & " 31 (BC_1, *, internal, 1)," & " 30 (BC_1, TA3, input, X)," & " 29 (BC_1, TA3, output3, X, 28, 1, PULL1)," & " 28 (BC_1, *, control, 1)," & " 27 (BC_1, *, internal, 1)," & " 26 (BC_1, TA2, input, X)," & " 25 (BC_1, TA2, output3, X, 24, 1, PULL1)," & -- num cell port func safe [ccell dis rslt] " 24 (BC_1, *, control, 1)," & " 23 (BC_1, *, internal, 1)," & " 22 (BC_1, TA1, input, X)," & " 21 (BC_1, TA1, output3, X, 20, 1, PULL1)," & " 20 (BC_1, *, control, 1)," & " 19 (BC_1, *, internal, 1)," & " 18 (BC_1, TA0, input, X)," & " 17 (BC_1, TA0, output3, X, 16, 1, PULL1)," & " 16 (BC_1, *, control, 1)," & " 15 (BC_1, *, internal, 1)," & " 14 (BC_1, RXD1, input, X)," & " 13 (BC_1, TXD1, input, X)," & " 12 (BC_1, TXD1, output3, X, 11, 1, PULL1)," & " 11 (BC_1, *, control, 1)," & " 10 (BC_1, *, internal, 1)," & " 9 (BC_1, RXD0, input, X)," & " 8 (BC_1, RXD0, output3, X, 7, 1, PULL1)," & " 7 (BC_1, *, control, 1)," & " 6 (BC_1, *, internal, 1)," & " 5 (BC_1, TXD0, input, X)," & -- num cell port func safe [ccell dis rslt] " 4 (BC_1, TXD0, output3, X, 3, 1, PULL1)," & " 3 (BC_1, *, control, 1)," & " 2 (BC_1, *, internal, 1)," & " 1 (BC_1, DE_B, output3, X, 0, 1, PULL1)," & " 0 (BC_1, *, control, 1)" ; end DSP56F826;