-- ********************************************************************** -- -- FILE : /projects/rt19/ima_prodev/master/srevA/prevA/mt90224.bsdl -- generated by ima on Tue Jul 16 11:44:57 EDT 2002 -- using p.jtag.bsd rev 1.0 May 3,2001 -- -- BSDL description for top level entity MT90224 -- Device : MT90224 Package : BGA -- -- Number of BSC cells: 292 -- -- ********************************************************************** -- -- IMPORTANT NOTICE -- -- This information is for modeling purposes only, and is not guaranteed. -- -- This information is provided "as is" without warranty of any kind. -- It may contain technical inaccuracies or typographical errors. -- -- ZARLINK and MT90224 are trademarks of ZARLINK Semiconductor. ZARLINK -- products, marketed under trademarks, are protected under numerous US -- and foreign patents and pending applications, maskwork rights, and -- copyrights. -- -- ZARLINK reserves the right to make changes to any products and -- services at any time without notice. ZARLINK assumes no -- responsibility or liability arising out of the application or use of -- any information, product, or service described herein except as -- expressly agreed to in writing by ZARLINK Corporation. ZARLINK -- customers are advised to obtain the latest version of device -- specifications before relying on any published information and before -- placing orders for products or services. -- -- ********************************************************************* -- ******************************************************************** -- Modification History: -- Initial release: Tue Jul 16 11:44:57 EDT 2002 -- Version Change : January 2004 -- ******************************************************************** -- ******************************************************************** -- -- SPECIAL NOTES -- -- 1. The following pins must be left not connected -- (NC, TEST2_NC, TEST4_NC): -- A02, A03, A06, B01, B03, B26, C04, C15, C25, D24, -- E25, J02, L23, M01, R24, Y01, AA02, AC02, AC03, AC08, -- AC20, AD02, AD21, AD22, AD23, AE01, AE17, AE23, AE24, AE26, -- AF04, AF22, AF23, AF24, AF25, D19, B4 -- -- 2. TEST1_VSS (pin AD01) must be tied to VSS for normal operation. -- -- 3. TEST3_UP3V (pin C07) must be pulled up to VDD33V (3.3v) for -- normal operation. This pin IS NOT 5v TOLERANT. -- -- 4. WARNING: -- By mistake, the following products within Zarlink's IMA family have all -- been coded the same Part-Number into the Device ID Register: MT90222, -- MT90223, MT90224, MT90225, MT902226, ZL30226, ZL30227, ZL30228. -- -- ******************************************************************** entity MT90224 is generic(PHYSICAL_PIN_MAP : string := "BGA_PACKAGE"); port ( CLK: in bit; DSTI: in bit_vector (0 to 15); DSTO: out bit_vector (0 to 15); LATCH_CLK: in bit; NC: linkage bit_vector (0 to 34); PLLREF0: out bit; PLLREF1: out bit; REFCK: in bit_vector (0 to 3); RESET_B: in bit; RXCKI: in bit_vector (0 to 15); RXRINGCLK: in bit; RXRINGDATA: in bit_vector (0 to 7); RXRINGSYNC: in bit; RXSYNCI: in bit_vector (0 to 15); SR_A: out bit_vector (0 to 18); SR_CS_B0: out bit; SR_CS_B1: out bit; SR_D: inout bit_vector (0 to 7); SR_WE_B: out bit; TCK: in bit; TDI: in bit; TDO: out bit; TEST1_VSS: linkage bit; TEST2_NC: out bit; TEST3_UP3V: linkage bit; TEST4_NC: linkage bit; TMS: in bit; TRST: in bit; TXCKIO: inout bit_vector (0 to 15); TXRINGCLK: out bit; TXRINGDATA: out bit_vector (0 to 7); TXRINGSYNC: out bit; TXSYNCIO: inout bit_vector (0 to 15); UP_A: in bit_vector (0 to 11); UP_CS_B: in bit; UP_D: inout bit_vector (0 to 15); UP_IRQ_B: out bit; UP_OE_B: in bit; UP_RW_B: in bit; URXADDR: in bit_vector (0 to 4); URXCLAV: out bit; URXCLK: in bit; URXDATA: out bit_vector (0 to 15); URXENB_B: in bit; URXPAR: out bit; URXSOC: out bit; UTXADDR: in bit_vector (0 to 4); UTXCLAV: out bit; UTXCLK: in bit; UTXDATA: in bit_vector (0 to 15); UTXENB_B: in bit; UTXPAR: in bit; UTXSOC: in bit; VDD25V: linkage bit_vector (0 to 7); VDD33V: linkage bit_vector (0 to 15); VDD5V: linkage bit_vector (0 to 24); VSS: linkage bit_vector (0 to 51) ); use STD_1149_1_1994.all; attribute COMPONENT_CONFORMANCE of MT90224 : entity is "STD_1149_1_1993"; attribute PIN_MAP of MT90224 : entity is PHYSICAL_PIN_MAP; constant BGA_PACKAGE : PIN_MAP_STRING := "CLK : AC01 , " & "DSTI :(B20 , " & -- DSTI[0] "B21 , " & -- DSTI[1] "A22 , " & -- DSTI[2] "B23 , " & -- DSTI[3] "A25 , " & -- DSTI[4] "C26 , " & -- DSTI[5] "E26 , " & -- DSTI[6] "F25 , " & -- DSTI[7] "G25 , " & -- DSTI[8] "H23 , " & -- DSTI[9] "J23 , " & -- DSTI[10] "K24 , " & -- DSTI[11] "L24 , " & -- DSTI[12] "M24 , " & -- DSTI[13] "M26 , " & -- DSTI[14] "P26 ), " & -- DSTI[15] "DSTO :(AD17 , " & -- DSTO[0] "AC18 , " & -- DSTO[1] "AE19 , " & -- DSTO[2] "AE20 , " & -- DSTO[3] "AE21 , " & -- DSTO[4] "AC24 , " & -- DSTO[5] "AC26 , " & -- DSTO[6] "AB26 , " & -- DSTO[7] "Y23 , " & -- DSTO[8] "Y26 , " & -- DSTO[9] "W25 , " & -- DSTO[10] "V24 , " & -- DSTO[11] "U25 , " & -- DSTO[12] "T23 , " & -- DSTO[13] "R23 , " & -- DSTO[14] "P24 ), " & -- DSTO[15] "LATCH_CLK : C19 , " & "NC :(A02 , " & -- NC[0] "A03 , " & -- NC[1] "A06 , " & -- NC[2] "B01 , " & -- NC[3] "B03 , " & -- NC[4] "B26 , " & -- NC[5] "C04 , " & -- NC[6] "C15 , " & -- NC[7] "C25 , " & -- NC[8] "D24 , " & -- NC[9] "E25 , " & -- NC[10] "J02 , " & -- NC[11] "L23 , " & -- NC[12] "M01 , " & -- NC[13] "R24 , " & -- NC[14] "Y01 , " & -- NC[15] "AA02 , " & -- NC[16] "AC02 , " & -- NC[17] "AC03 , " & -- NC[18] "AC08 , " & -- NC[19] "AC20 , " & -- NC[20] "AD02 , " & -- NC[21] "AD21 , " & -- NC[22] "AD22 , " & -- NC[23] "AD23 , " & -- NC[24] "AE01 , " & -- NC[25] "AE17 , " & -- NC[26] "AE23 , " & -- NC[27] "AE24 , " & -- NC[28] "AE26 , " & -- NC[29] "AF04 , " & -- NC[30] "AF22 , " & -- NC[31] "AF23 , " & -- NC[32] "AF24 , " & -- NC[33] "AF25 ), " & -- NC[34] "PLLREF0 : AB01 , " & "PLLREF1 : AB02 , " & "REFCK :(Y03 , " & -- REFCK[0] "AA01 , " & -- REFCK[1] "AA04 , " & -- REFCK[2] "AA03 ), " & -- REFCK[3] "RESET_B : A04 , " & "RXCKI :(C20 , " & -- RXCKI[0] "D21 , " & -- RXCKI[1] "B22 , " & -- RXCKI[2] "A24 , " & -- RXCKI[3] "C23 , " & -- RXCKI[4] "E24 , " & -- RXCKI[5] "F24 , " & -- RXCKI[6] "G24 , " & -- RXCKI[7] "G26 , " & -- RXCKI[8] "H25 , " & -- RXCKI[9] "J25 , " & -- RXCKI[10] "K25 , " & -- RXCKI[11] "L25 , " & -- RXCKI[12] "M23 , " & -- RXCKI[13] "N24 , " & -- RXCKI[14] "P25 ), " & -- RXCKI[15] "RXRINGCLK : AF13 , " & "RXRINGDATA :(AE14 , " & -- RXRINGDATA[0] "AD14 , " & -- RXRINGDATA[1] "AF15 , " & -- RXRINGDATA[2] "AE15 , " & -- RXRINGDATA[3] "AC15 , " & -- RXRINGDATA[4] "AF16 , " & -- RXRINGDATA[5] "AE16 , " & -- RXRINGDATA[6] "AC16 ), " & -- RXRINGDATA[7] "RXRINGSYNC : AF14 , " & "RXSYNCI :(A20 , " & -- RXSYNCI[0] "A21 , " & -- RXSYNCI[1] "C21 , " & -- RXSYNCI[2] "C22 , " & -- RXSYNCI[3] "B24 , " & -- RXSYNCI[4] "D25 , " & -- RXSYNCI[5] "D26 , " & -- RXSYNCI[6] "F23 , " & -- RXSYNCI[7] "G23 , " & -- RXSYNCI[8] "H24 , " & -- RXSYNCI[9] "J24 , " & -- RXSYNCI[10] "J26 , " & -- RXSYNCI[11] "K26 , " & -- RXSYNCI[12] "L26 , " & -- RXSYNCI[13] "M25 , " & -- RXSYNCI[14] "N26 ), " & -- RXSYNCI[15] "SR_A :(B15 , " & -- SR_A[0] "A15 , " & -- SR_A[1] "C14 , " & -- SR_A[2] "B14 , " & -- SR_A[3] "A14 , " & -- SR_A[4] "B13 , " & -- SR_A[5] "C13 , " & -- SR_A[6] "A12 , " & -- SR_A[7] "B12 , " & -- SR_A[8] "D12 , " & -- SR_A[9] "C12 , " & -- SR_A[10] "A11 , " & -- SR_A[11] "B11 , " & -- SR_A[12] "D11 , " & -- SR_A[13] "C11 , " & -- SR_A[14] "A10 , " & -- SR_A[15] "B10 , " & -- SR_A[16] "C10 , " & -- SR_A[17] "A09 ), " & -- SR_A[18] "SR_CS_B0 : B16 , " & "SR_CS_B1 : A16 , " & "SR_D :(B09 , " & -- SR_D[0] "C09 , " & -- SR_D[1] "D09 , " & -- SR_D[2] "B08 , " & -- SR_D[3] "C08 , " & -- SR_D[4] "D08 , " & -- SR_D[5] "A07 , " & -- SR_D[6] "B07 ), " & -- SR_D[7] "SR_WE_B : D15 , " & "TCK : D07 , " & "TDI : B06 , " & "TDO : C06 , " & "TEST1_VSS : AD01 , " & "TEST2_NC : D19 , " & "TEST3_UP3V : C07 , " & "TEST4_NC : B04 , " & "TMS : A05 , " & "TRST : B05 , " & "TXCKIO :(AF17 , " & -- TXCKIO[0] "AE18 , " & -- TXCKIO[1] "AF19 , " & -- TXCKIO[2] "AF20 , " & -- TXCKIO[3] "AF21 , " & -- TXCKIO[4] "AE22 , " & -- TXCKIO[5] "AC25 , " & -- TXCKIO[6] "AB25 , " & -- TXCKIO[7] "AA26 , " & -- TXCKIO[8] "Y25 , " & -- TXCKIO[9] "W24 , " & -- TXCKIO[10] "V23 , " & -- TXCKIO[11] "U24 , " & -- TXCKIO[12] "T24 , " & -- TXCKIO[13] "T26 , " & -- TXCKIO[14] "R26 ), " & -- TXCKIO[15] "TXRINGCLK : D16 , " & "TXRINGDATA :(B19 , " & -- TXRINGDATA[0] "A19 , " & -- TXRINGDATA[1] "C18 , " & -- TXRINGDATA[2] "D18 , " & -- TXRINGDATA[3] "B18 , " & -- TXRINGDATA[4] "A18 , " & -- TXRINGDATA[5] "C17 , " & -- TXRINGDATA[6] "B17 ), " & -- TXRINGDATA[7] "TXRINGSYNC : A17 , " & "TXSYNCIO :(AD16 , " & -- TXSYNCIO[0] "AF18 , " & -- TXSYNCIO[1] "AD18 , " & -- TXSYNCIO[2] "AD19 , " & -- TXSYNCIO[3] "AD20 , " & -- TXSYNCIO[4] "AC21 , " & -- TXSYNCIO[5] "AD26 , " & -- TXSYNCIO[6] "AB24 , " & -- TXSYNCIO[7] "AA24 , " & -- TXSYNCIO[8] "Y24 , " & -- TXSYNCIO[9] "W23 , " & -- TXSYNCIO[10] "W26 , " & -- TXSYNCIO[11] "V25 , " & -- TXSYNCIO[12] "U26 , " & -- TXSYNCIO[13] "T25 , " & -- TXSYNCIO[14] "R25 ), " & -- TXSYNCIO[15] "UP_A :(AD09 , " & -- UP_A[0] "AE09 , " & -- UP_A[1] "AF09 , " & -- UP_A[2] "AD10 , " & -- UP_A[3] "AE10 , " & -- UP_A[4] "AF10 , " & -- UP_A[5] "AD11 , " & -- UP_A[6] "AC11 , " & -- UP_A[7] "AE11 , " & -- UP_A[8] "AF11 , " & -- UP_A[9] "AC12 , " & -- UP_A[10] "AE12 ), " & -- UP_A[11] "UP_CS_B : AE13 , " & "UP_D :(AF02 , " & -- UP_D[0] "AE03 , " & -- UP_D[1] "AD04 , " & -- UP_D[2] "AF03 , " & -- UP_D[3] "AE04 , " & -- UP_D[4] "AD05 , " & -- UP_D[5] "AE05 , " & -- UP_D[6] "AF05 , " & -- UP_D[7] "AD06 , " & -- UP_D[8] "AF06 , " & -- UP_D[9] "AC07 , " & -- UP_D[10] "AD07 , " & -- UP_D[11] "AE07 , " & -- UP_D[12] "AF07 , " & -- UP_D[13] "AD08 , " & -- UP_D[14] "AE08 ), " & -- UP_D[15] "UP_IRQ_B : AC09 , " & "UP_OE_B : AD13 , " & "UP_RW_B : AF12 , " & "URXADDR :(K01 , " & -- URXADDR[0] "L03 , " & -- URXADDR[1] "L04 , " & -- URXADDR[2] "L02 , " & -- URXADDR[3] "L01 ), " & -- URXADDR[4] "URXCLAV : J03 , " & "URXCLK : K03 , " & "URXDATA :(C02 , " & -- URXDATA[0] "D03 , " & -- URXDATA[1] "C01 , " & -- URXDATA[2] "D02 , " & -- URXDATA[3] "D01 , " & -- URXDATA[4] "E03 , " & -- URXDATA[5] "E01 , " & -- URXDATA[6] "F03 , " & -- URXDATA[7] "F02 , " & -- URXDATA[8] "F01 , " & -- URXDATA[9] "G04 , " & -- URXDATA[10] "G03 , " & -- URXDATA[11] "G02 , " & -- URXDATA[12] "G01 , " & -- URXDATA[13] "H04 , " & -- URXDATA[14] "H03 ), " & -- URXDATA[15] "URXENB_B : K02 , " & "URXPAR : H02 , " & "URXSOC : J04 , " & "UTXADDR :(W01 , " & -- UTXADDR[0] "W02 , " & -- UTXADDR[1] "W04 , " & -- UTXADDR[2] "W03 , " & -- UTXADDR[3] "Y04 ), " & -- UTXADDR[4] "UTXCLAV : V02 , " & "UTXCLK : V04 , " & "UTXDATA :(M04 , " & -- UTXDATA[0] "M02 , " & -- UTXDATA[1] "N03 , " & -- UTXDATA[2] "N02 , " & -- UTXDATA[3] "N01 , " & -- UTXDATA[4] "P01 , " & -- UTXDATA[5] "P03 , " & -- UTXDATA[6] "R01 , " & -- UTXDATA[7] "R02 , " & -- UTXDATA[8] "R04 , " & -- UTXDATA[9] "R03 , " & -- UTXDATA[10] "T01 , " & -- UTXDATA[11] "T02 , " & -- UTXDATA[12] "T04 , " & -- UTXDATA[13] "U01 , " & -- UTXDATA[14] "U02 ), " & -- UTXDATA[15] "UTXENB_B : V03 , " & "UTXPAR : U03 , " & "UTXSOC : V01 , " & "VDD25V :(D17, D13, U23, N23, AC14, AC10, P04, K04)," & "VDD33V :(U04, P23, AC22, AC17, AC13, AC06, AB04, AA23, N04, K23, F04, E23," & "D22, D14, D10, D06)," & "VDD5V :(C05, A08, AA25, AD25, AC19, AD15, AD12, AF08, AE06, AB03, Y02, T03," & "A13, P02, M03, J01, H01, E02, C16, D20, A23, F26, H26, N25," & "V26)," & "VSS :(T16, T15, R12, R11, P16, P15, P14, P13, P12, P11, N16, N15," & "T14, N14, N13, N12, N11, M16, M15, M14, M13, M12, M11, T13," & "L16, L15, L14, L13, L12, L11, E04, D23, D05, D04, T12, C24," & "C03, B25, B02, AE25, AE02, AD24, AD03, AC23, AC05, T11, AC04, AB23," & "R16, R15, R14, R13)"; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6,BOTH); attribute TAP_SCAN_RESET of TRST : signal is true; attribute INSTRUCTION_LENGTH of MT90224 : entity is 21; attribute INSTRUCTION_OPCODE of MT90224 : entity is "bypass (111111111111111111111)," & "sample (111111111111111111000)," & "highz (111111111111111001111)," & "clamp (111111111111111101111)," & "idcode (111111111111111111110)," & "extest (000000000000000000000)," & "extest (111111111111111101000)"; attribute INSTRUCTION_CAPTURE of MT90224 : entity is "000000000000000000001"; attribute IDCODE_REGISTER of MT90224 : entity is "0001" & -- version "0000001000100010" & -- part number "00010100101" & -- manufacturer id "1"; attribute REGISTER_ACCESS of MT90224 : entity is "boundary (extest, sample)," & "bypass (bypass, highz, clamp)," & "device_id (idcode)" ; attribute BOUNDARY_LENGTH of MT90224 : entity is 292; attribute BOUNDARY_REGISTER of MT90224 : entity is -- num cell port function safe ccel disval rslt " 0 ( BC_2, *, control, 1) ," & " 1 ( BC_2, *, control, 1) ," & " 2 ( BC_2, *, control, 1) ," & " 3 ( BC_2, *, control, 1) ," & " 4 ( BC_2, *, control, 1) ," & " 5 ( BC_2, *, control, 1) ," & " 6 ( BC_2, *, control, 1) ," & " 7 ( BC_2, *, control, 1) ," & " 8 ( BC_2, *, control, 1) ," & " 9 ( BC_2, *, control, 1) ," & " 10 ( BC_2, *, control, 1) ," & " 11 ( BC_2, *, control, 1) ," & " 12 ( BC_2, *, control, 1) ," & " 13 ( BC_2, *, control, 1) ," & " 14 ( BC_2, *, control, 1) ," & " 15 ( BC_2, *, control, 1) ," & " 16 ( BC_2, *, control, 1) ," & " 17 ( BC_2, *, control, 1) ," & " 18 ( BC_2, *, control, 1) ," & " 19 ( BC_2, *, control, 1) ," & " 20 ( BC_2, *, control, 1) ," & " 21 ( BC_2, *, control, 1) ," & " 22 ( BC_2, *, control, 1) ," & " 23 ( BC_2, *, control, 1) ," & " 24 ( BC_2, *, control, 1) ," & " 25 ( BC_2, *, control, 1) ," & " 26 ( BC_2, *, control, 1) ," & " 27 ( BC_2, *, control, 1) ," & " 28 ( BC_2, *, control, 1) ," & " 29 ( BC_2, *, control, 1) ," & " 30 ( BC_2, *, control, 1) ," & " 31 ( BC_2, *, control, 1) ," & " 32 ( BC_2, *, control, 1) ," & " 33 ( BC_2, *, control, 1) ," & " 34 ( BC_2, *, control, 1) ," & " 35 ( BC_2, *, control, 1) ," & " 36 ( BC_2, *, control, 1) ," & " 37 ( BC_2, *, control, 1) ," & " 38 ( BC_2, *, control, 1) ," & " 39 ( BC_2, *, control, 1) ," & " 40 ( BC_2, *, control, 1) ," & " 41 ( BC_2, *, control, 1) ," & " 42 ( BC_2, UP_IRQ_B, output2, 1, 42, 1, weak1)," & " 43 ( BC_2, *, control, 1) ," & " 44 ( BC_2, *, control, 1) ," & " 45 ( BC_2, *, control, 1) ," & " 46 ( BC_2, *, control, 1) ," & " 47 ( BC_2, *, control, 1) ," & " 48 ( BC_2, *, control, 1) ," & " 49 ( BC_2, *, control, 1) ," & " 50 ( BC_2, *, control, 1) ," & " 51 ( BC_2, *, control, 1) ," & " 52 ( BC_2, *, control, 1) ," & " 53 ( BC_4, RESET_B, observe_only, X) ," & " 54 ( BC_7, SR_D(7), bidir, X, 0, 1, Z)," & " 55 ( BC_7, SR_D(6), bidir, X, 0, 1, Z)," & " 56 ( BC_7, SR_D(5), bidir, X, 0, 1, Z)," & " 57 ( BC_7, SR_D(4), bidir, X, 0, 1, Z)," & " 58 ( BC_7, SR_D(3), bidir, X, 0, 1, Z)," & " 59 ( BC_7, SR_D(2), bidir, X, 0, 1, Z)," & " 60 ( BC_7, SR_D(1), bidir, X, 1, 1, Z)," & " 61 ( BC_7, SR_D(0), bidir, X, 1, 1, Z)," & " 62 ( BC_2, SR_A(18), output3, X, 2, 1, Z)," & " 63 ( BC_2, SR_A(17), output3, X, 2, 1, Z)," & " 64 ( BC_2, SR_A(16), output3, X, 2, 1, Z)," & " 65 ( BC_2, SR_A(15), output3, X, 2, 1, Z)," & " 66 ( BC_2, SR_A(14), output3, X, 2, 1, Z)," & " 67 ( BC_2, SR_A(13), output3, X, 2, 1, Z)," & " 68 ( BC_2, SR_A(12), output3, X, 2, 1, Z)," & " 69 ( BC_2, SR_A(11), output3, X, 3, 1, Z)," & " 70 ( BC_2, SR_A(10), output3, X, 3, 1, Z)," & " 71 ( BC_2, SR_A(9), output3, X, 3, 1, Z)," & " 72 ( BC_2, SR_A(8), output3, X, 3, 1, Z)," & " 73 ( BC_2, SR_A(7), output3, X, 3, 1, Z)," & " 74 ( BC_2, SR_A(6), output3, X, 3, 1, Z)," & " 75 ( BC_2, SR_A(5), output3, X, 3, 1, Z)," & " 76 ( BC_2, SR_A(4), output3, X, 3, 1, Z)," & " 77 ( BC_2, SR_A(3), output3, X, 4, 1, Z)," & " 78 ( BC_2, SR_A(2), output3, X, 4, 1, Z)," & " 79 ( BC_2, SR_A(1), output3, X, 4, 1, Z)," & " 80 ( BC_2, SR_A(0), output3, X, 4, 1, Z)," & " 81 ( BC_2, SR_WE_B, output3, X, 4, 1, Z)," & " 82 ( BC_2, SR_CS_B1, output3, X, 4, 1, Z)," & " 83 ( BC_2, SR_CS_B0, output3, X, 4, 1, Z)," & " 84 ( BC_2, TXRINGCLK, output3, X, 5, 1, Z)," & " 85 ( BC_2, TXRINGSYNC, output3, X, 5, 1, Z)," & " 86 ( BC_2, TXRINGDATA(7), output3, X, 5, 1, Z)," & " 87 ( BC_2, TXRINGDATA(6), output3, X, 5, 1, Z)," & " 88 ( BC_2, TXRINGDATA(5), output3, X, 6, 1, Z)," & " 89 ( BC_2, TXRINGDATA(4), output3, X, 6, 1, Z)," & " 90 ( BC_2, TXRINGDATA(3), output3, X, 6, 1, Z)," & " 91 ( BC_2, TXRINGDATA(2), output3, X, 6, 1, Z)," & " 92 ( BC_2, TXRINGDATA(1), output3, X, 6, 1, Z)," & " 93 ( BC_2, TXRINGDATA(0), output3, X, 7, 1, Z)," & " 94 ( BC_2, TEST2_NC, output3, X, 8, 1, Z)," & " 95 ( BC_4, LATCH_CLK, input, X) ," & " 96 ( BC_2, RXSYNCI(0), input, X) ," & " 97 ( BC_2, DSTI(0), input, X) ," & " 98 ( BC_4, RXCKI(0), input, X) ," & " 99 ( BC_2, RXSYNCI(1), input, X) ," & " 100 ( BC_2, DSTI(1), input, X) ," & " 101 ( BC_4, RXCKI(1), input, X) ," & " 102 ( BC_2, RXSYNCI(2), input, X) ," & " 103 ( BC_2, DSTI(2), input, X) ," & " 104 ( BC_4, RXCKI(2), input, X) ," & " 105 ( BC_2, RXSYNCI(3), input, X) ," & " 106 ( BC_2, DSTI(3), input, X) ," & " 107 ( BC_4, RXCKI(3), input, X) ," & " 108 ( BC_2, RXSYNCI(4), input, X) ," & " 109 ( BC_2, DSTI(4), input, X) ," & " 110 ( BC_4, RXCKI(4), input, X) ," & " 111 ( BC_2, RXSYNCI(5), input, X) ," & " 112 ( BC_2, DSTI(5), input, X) ," & " 113 ( BC_4, RXCKI(5), input, X) ," & " 114 ( BC_2, RXSYNCI(6), input, X) ," & " 115 ( BC_2, DSTI(6), input, X) ," & " 116 ( BC_4, RXCKI(6), input, X) ," & " 117 ( BC_2, RXSYNCI(7), input, X) ," & " 118 ( BC_2, DSTI(7), input, X) ," & " 119 ( BC_4, RXCKI(7), input, X) ," & " 120 ( BC_2, RXSYNCI(8), input, X) ," & " 121 ( BC_2, DSTI(8), input, X) ," & " 122 ( BC_4, RXCKI(8), input, X) ," & " 123 ( BC_2, RXSYNCI(9), input, X) ," & " 124 ( BC_2, DSTI(9), input, X) ," & " 125 ( BC_4, RXCKI(9), input, X) ," & " 126 ( BC_2, RXSYNCI(10), input, X) ," & " 127 ( BC_2, DSTI(10), input, X) ," & " 128 ( BC_4, RXCKI(10), input, X) ," & " 129 ( BC_2, RXSYNCI(11), input, X) ," & " 130 ( BC_2, DSTI(11), input, X) ," & " 131 ( BC_4, RXCKI(11), input, X) ," & " 132 ( BC_2, RXSYNCI(12), input, X) ," & " 133 ( BC_2, DSTI(12), input, X) ," & " 134 ( BC_4, RXCKI(12), input, X) ," & " 135 ( BC_2, RXSYNCI(13), input, X) ," & " 136 ( BC_2, DSTI(13), input, X) ," & " 137 ( BC_4, RXCKI(13), input, X) ," & " 138 ( BC_2, RXSYNCI(14), input, X) ," & " 139 ( BC_2, DSTI(14), input, X) ," & " 140 ( BC_4, RXCKI(14), input, X) ," & " 141 ( BC_2, RXSYNCI(15), input, X) ," & " 142 ( BC_2, DSTI(15), input, X) ," & " 143 ( BC_4, RXCKI(15), input, X) ," & " 144 ( BC_2, DSTO(15), output3, X, 9, 1, Z)," & " 145 ( BC_7, TXCKIO(15), bidir, X, 10, 1, Z)," & " 146 ( BC_7, TXSYNCIO(15), bidir, X, 10, 1, Z)," & " 147 ( BC_2, DSTO(14), output3, X, 11, 1, Z)," & " 148 ( BC_7, TXCKIO(14), bidir, X, 12, 1, Z)," & " 149 ( BC_7, TXSYNCIO(14), bidir, X, 12, 1, Z)," & " 150 ( BC_2, DSTO(13), output3, X, 13, 1, Z)," & " 151 ( BC_7, TXCKIO(13), bidir, X, 14, 1, Z)," & " 152 ( BC_7, TXSYNCIO(13), bidir, X, 14, 1, Z)," & " 153 ( BC_2, DSTO(12), output3, X, 15, 1, Z)," & " 154 ( BC_7, TXCKIO(12), bidir, X, 16, 1, Z)," & " 155 ( BC_7, TXSYNCIO(12), bidir, X, 16, 1, Z)," & " 156 ( BC_2, DSTO(11), output3, X, 17, 1, Z)," & " 157 ( BC_7, TXCKIO(11), bidir, X, 18, 1, Z)," & " 158 ( BC_7, TXSYNCIO(11), bidir, X, 18, 1, Z)," & " 159 ( BC_2, DSTO(10), output3, X, 19, 1, Z)," & " 160 ( BC_7, TXCKIO(10), bidir, X, 20, 1, Z)," & " 161 ( BC_7, TXSYNCIO(10), bidir, X, 20, 1, Z)," & " 162 ( BC_2, DSTO(9), output3, X, 21, 1, Z)," & " 163 ( BC_7, TXCKIO(9), bidir, X, 22, 1, Z)," & " 164 ( BC_7, TXSYNCIO(9), bidir, X, 22, 1, Z)," & " 165 ( BC_2, DSTO(8), output3, X, 23, 1, Z)," & " 166 ( BC_7, TXCKIO(8), bidir, X, 24, 1, Z)," & " 167 ( BC_7, TXSYNCIO(8), bidir, X, 24, 1, Z)," & " 168 ( BC_2, DSTO(7), output3, X, 25, 1, Z)," & " 169 ( BC_7, TXCKIO(7), bidir, X, 26, 1, Z)," & " 170 ( BC_7, TXSYNCIO(7), bidir, X, 26, 1, Z)," & " 171 ( BC_2, DSTO(6), output3, X, 27, 1, Z)," & " 172 ( BC_7, TXCKIO(6), bidir, X, 28, 1, Z)," & " 173 ( BC_7, TXSYNCIO(6), bidir, X, 28, 1, Z)," & " 174 ( BC_2, DSTO(5), output3, X, 29, 1, Z)," & " 175 ( BC_7, TXCKIO(5), bidir, X, 30, 1, Z)," & " 176 ( BC_7, TXSYNCIO(5), bidir, X, 31, 1, Z)," & " 177 ( BC_2, DSTO(4), output3, X, 32, 1, Z)," & " 178 ( BC_7, TXCKIO(4), bidir, X, 33, 1, Z)," & " 179 ( BC_7, TXSYNCIO(4), bidir, X, 33, 1, Z)," & " 180 ( BC_2, DSTO(3), output3, X, 34, 1, Z)," & " 181 ( BC_7, TXCKIO(3), bidir, X, 35, 1, Z)," & " 182 ( BC_7, TXSYNCIO(3), bidir, X, 35, 1, Z)," & " 183 ( BC_2, DSTO(2), output3, X, 36, 1, Z)," & " 184 ( BC_7, TXCKIO(2), bidir, X, 37, 1, Z)," & " 185 ( BC_7, TXSYNCIO(2), bidir, X, 37, 1, Z)," & " 186 ( BC_2, DSTO(1), output3, X, 38, 1, Z)," & " 187 ( BC_7, TXCKIO(1), bidir, X, 39, 1, Z)," & " 188 ( BC_7, TXSYNCIO(1), bidir, X, 39, 1, Z)," & " 189 ( BC_2, DSTO(0), output3, X, 40, 1, Z)," & " 190 ( BC_7, TXCKIO(0), bidir, X, 41, 1, Z)," & " 191 ( BC_7, TXSYNCIO(0), bidir, X, 41, 1, Z)," & " 192 ( BC_2, RXRINGDATA(7), input, X) ," & " 193 ( BC_2, RXRINGDATA(6), input, X) ," & " 194 ( BC_2, RXRINGDATA(5), input, X) ," & " 195 ( BC_2, RXRINGDATA(4), input, X) ," & " 196 ( BC_2, RXRINGDATA(3), input, X) ," & " 197 ( BC_2, RXRINGDATA(2), input, X) ," & " 198 ( BC_2, RXRINGDATA(1), input, X) ," & " 199 ( BC_2, RXRINGDATA(0), input, X) ," & " 200 ( BC_2, RXRINGSYNC, input, X) ," & " 201 ( BC_4, RXRINGCLK, input, X) ," & " 202 ( BC_2, UP_CS_B, input, X) ," & " 203 ( BC_2, UP_OE_B, input, X) ," & " 204 ( BC_2, UP_RW_B, input, X) ," & " 205 ( BC_2, UP_A(11), input, X) ," & " 206 ( BC_2, UP_A(10), input, X) ," & " 207 ( BC_2, UP_A(9), input, X) ," & " 208 ( BC_2, UP_A(8), input, X) ," & " 209 ( BC_2, UP_A(7), input, X) ," & " 210 ( BC_2, UP_A(6), input, X) ," & " 211 ( BC_2, UP_A(5), input, X) ," & " 212 ( BC_2, UP_A(4), input, X) ," & " 213 ( BC_2, UP_A(3), input, X) ," & " 214 ( BC_2, UP_A(2), input, X) ," & " 215 ( BC_2, UP_A(1), input, X) ," & " 216 ( BC_2, UP_A(0), input, X) ," & " 217 ( BC_7, UP_D(15), bidir, X, 43, 1, Z)," & " 218 ( BC_7, UP_D(14), bidir, X, 44, 1, Z)," & " 219 ( BC_7, UP_D(13), bidir, X, 44, 1, Z)," & " 220 ( BC_7, UP_D(12), bidir, X, 44, 1, Z)," & " 221 ( BC_7, UP_D(11), bidir, X, 44, 1, Z)," & " 222 ( BC_7, UP_D(10), bidir, X, 44, 1, Z)," & " 223 ( BC_7, UP_D(9), bidir, X, 44, 1, Z)," & " 224 ( BC_7, UP_D(8), bidir, X, 44, 1, Z)," & " 225 ( BC_7, UP_D(7), bidir, X, 45, 1, Z)," & " 226 ( BC_7, UP_D(6), bidir, X, 45, 1, Z)," & " 227 ( BC_7, UP_D(5), bidir, X, 45, 1, Z)," & " 228 ( BC_7, UP_D(4), bidir, X, 45, 1, Z)," & " 229 ( BC_7, UP_D(3), bidir, X, 45, 1, Z)," & " 230 ( BC_7, UP_D(2), bidir, X, 45, 1, Z)," & " 231 ( BC_7, UP_D(1), bidir, X, 45, 1, Z)," & " 232 ( BC_7, UP_D(0), bidir, X, 45, 1, Z)," & " 233 ( BC_4, CLK, input, X) ," & " 234 ( BC_2, PLLREF1, output3, X, 46, 1, Z)," & " 235 ( BC_2, PLLREF0, output3, X, 46, 1, Z)," & " 236 ( BC_4, REFCK(3), input, X) ," & " 237 ( BC_4, REFCK(2), input, X) ," & " 238 ( BC_4, REFCK(1), input, X) ," & " 239 ( BC_4, REFCK(0), input, X) ," & " 240 ( BC_2, UTXADDR(4), input, X) ," & " 241 ( BC_2, UTXADDR(3), input, X) ," & " 242 ( BC_2, UTXADDR(2), input, X) ," & " 243 ( BC_2, UTXADDR(1), input, X) ," & " 244 ( BC_2, UTXADDR(0), input, X) ," & " 245 ( BC_2, UTXENB_B, input, X) ," & " 246 ( BC_4, UTXCLK, input, X) ," & " 247 ( BC_2, UTXCLAV, output3, X, 47, 1, Z)," & " 248 ( BC_2, UTXSOC, input, X) ," & " 249 ( BC_2, UTXPAR, input, X) ," & " 250 ( BC_2, UTXDATA(15), input, X) ," & " 251 ( BC_2, UTXDATA(14), input, X) ," & " 252 ( BC_2, UTXDATA(13), input, X) ," & " 253 ( BC_2, UTXDATA(12), input, X) ," & " 254 ( BC_2, UTXDATA(11), input, X) ," & " 255 ( BC_2, UTXDATA(10), input, X) ," & " 256 ( BC_2, UTXDATA(9), input, X) ," & " 257 ( BC_2, UTXDATA(8), input, X) ," & " 258 ( BC_2, UTXDATA(7), input, X) ," & " 259 ( BC_2, UTXDATA(6), input, X) ," & " 260 ( BC_2, UTXDATA(5), input, X) ," & " 261 ( BC_2, UTXDATA(4), input, X) ," & " 262 ( BC_2, UTXDATA(3), input, X) ," & " 263 ( BC_2, UTXDATA(2), input, X) ," & " 264 ( BC_2, UTXDATA(1), input, X) ," & " 265 ( BC_2, UTXDATA(0), input, X) ," & " 266 ( BC_2, URXADDR(4), input, X) ," & " 267 ( BC_2, URXADDR(3), input, X) ," & " 268 ( BC_2, URXADDR(2), input, X) ," & " 269 ( BC_2, URXADDR(1), input, X) ," & " 270 ( BC_2, URXADDR(0), input, X) ," & " 271 ( BC_2, URXENB_B, input, X) ," & " 272 ( BC_4, URXCLK, input, X) ," & " 273 ( BC_2, URXCLAV, output3, X, 48, 1, Z)," & " 274 ( BC_2, URXSOC, output3, X, 51, 1, Z)," & " 275 ( BC_2, URXPAR, output3, X, 49, 1, Z)," & " 276 ( BC_2, URXDATA(15), output3, X, 50, 1, Z)," & " 277 ( BC_2, URXDATA(14), output3, X, 50, 1, Z)," & " 278 ( BC_2, URXDATA(13), output3, X, 50, 1, Z)," & " 279 ( BC_2, URXDATA(12), output3, X, 50, 1, Z)," & " 280 ( BC_2, URXDATA(11), output3, X, 50, 1, Z)," & " 281 ( BC_2, URXDATA(10), output3, X, 50, 1, Z)," & " 282 ( BC_2, URXDATA(9), output3, X, 50, 1, Z)," & " 283 ( BC_2, URXDATA(8), output3, X, 50, 1, Z)," & " 284 ( BC_2, URXDATA(7), output3, X, 51, 1, Z)," & " 285 ( BC_2, URXDATA(6), output3, X, 51, 1, Z)," & " 286 ( BC_2, URXDATA(5), output3, X, 51, 1, Z)," & " 287 ( BC_2, URXDATA(4), output3, X, 52, 1, Z)," & " 288 ( BC_2, URXDATA(3), output3, X, 52, 1, Z)," & " 289 ( BC_2, URXDATA(2), output3, X, 52, 1, Z)," & " 290 ( BC_2, URXDATA(1), output3, X, 52, 1, Z)," & " 291 ( BC_2, URXDATA(0), output3, X, 52, 1, Z)"; end MT90224; ------------- end of BSDL description for the MT90224 ----------