------------------------------------------------------------------------ -- A T M E L A R M M I C R O C O N T R O L L E R S -- ------------------------------------------------------------------------ -- BSDL file -- -- File Name: AT91SAM7SE256_LQFP128.BSD -- File Revision: 1.0 -- Date: Fri July 20 2007 -- Created by: Atmel Corporation -- File Status: Released -- -- Device: AT91SAM7SE256 -- Package: LQFP128 -- -- Visit http://www.atmel.com for a updated list of BSDL files. -- ------------------------------------------------------------------------ -- Syntax and Semantics are checked against the IEEE 1149.1 standard. -- -- The logical functioning of the standard Boundary-Scan instructions -- -- and of the associated bypass, idcode and boundary-scan register -- -- described in this BSDL file has been verified against its related -- -- silicon by JTAG Technologies B.V. -- ------------------------------------------------------------------------ ------------------------------------------------------------------------ -- IMPORTANT NOTICE -- -- -- -- Copyright 2006 Atmel Corporation. All Rights Reserved. -- -- -- -- Atmel assumes no responsibility or liability arising out -- -- this application or use of any information described herein -- -- except as expressly agreed to in writing by Atmel Corporation. -- -- -- -- ------------------------------------------------------------------ -- -- This BSDL File has been verified on severals BSDL Syntax -- -- Checker/Compilers -- -- -- -- BSDL compilation of 735 lines completed without errors. -- -- -- -- -------------------------------------------------------------------------- entity AT91SAM7SE256 is -- This section identifies the default device package selected. generic (PHYSICAL_PIN_MAP: string:= "LQFP128"); -- This section declares all the ports in the design. port ( advref : linkage bit; ad7 : linkage bit; ad6 : linkage bit; ad5 : linkage bit; ad4 : linkage bit; vddout : linkage bit; vddin : linkage bit; pa20 : inout bit; pa19 : inout bit; pa18 : inout bit; pa17 : inout bit; pa16 : inout bit; pa15 : inout bit; pa14 : inout bit; pa13 : inout bit; pa12 : inout bit; pa11 : inout bit; pa10 : inout bit; pa9 : inout bit; pa8 : inout bit; pa7 : inout bit; pa6 : inout bit; pa5 : inout bit; pa4 : inout bit; pa3 : inout bit; pa2 : inout bit; pa1 : inout bit; pa0 : inout bit; pb31 : inout bit; pb30 : inout bit; pb29 : inout bit; pb28 : inout bit; pb27 : inout bit; pb26 : inout bit; pb25 : inout bit; pb24 : inout bit; pb23 : inout bit; pb22 : inout bit; pb21 : inout bit; pb20 : inout bit; pb19 : inout bit; pb18 : inout bit; pb17 : inout bit; pb16 : inout bit; pb15 : inout bit; pb14 : inout bit; pb13 : inout bit; pb12 : inout bit; pb11 : inout bit; pb10 : inout bit; pb9 : inout bit; pb8 : inout bit; pb7 : inout bit; pb6 : inout bit; pb5 : inout bit; pb4 : inout bit; pb3 : inout bit; icetdi : in bit; icetdo : out bit; pb2 : inout bit; pb1 : inout bit; pb0 : inout bit; nrst : in bit; test : in bit; erase : in bit; icetck : in bit; icetms : in bit; jtagsel : in bit; pc23 : inout bit; pc22 : inout bit; pc21 : inout bit; pc20 : inout bit; pc19 : inout bit; pc18 : inout bit; pc17 : inout bit; pc16 : inout bit; pc15 : inout bit; pc14 : inout bit; pc13 : inout bit; pc12 : inout bit; pc11 : inout bit; pc10 : inout bit; pc9 : inout bit; sdck : buffer bit; pc8 : inout bit; pc7 : inout bit; pc6 : inout bit; pc5 : inout bit; pc4 : inout bit; pc3 : inout bit; pc2 : inout bit; pc1 : inout bit; pc0 : inout bit; pa31 : inout bit; pa30 : inout bit; pa29 : inout bit; pa28 : inout bit; pa27 : inout bit; pa26 : inout bit; pa25 : inout bit; pa24 : inout bit; pa23 : inout bit; pa22 : inout bit; pa21 : inout bit; dm : linkage bit; dp : linkage bit; osc9m_xin : linkage bit; osc9m_xout : linkage bit; pll_rc : linkage bit; gnd : linkage bit_vector (1 to 7); vddio : linkage bit_vector (1 to 5); vddcore : linkage bit_vector (1 to 5); vddflash : linkage bit; vddpll : linkage bit ); use STD_1149_1_1994.all; attribute COMPONENT_CONFORMANCE of AT91SAM7SE256: entity is "STD_1149_1_1993"; attribute PIN_MAP of AT91SAM7SE256: entity is PHYSICAL_PIN_MAP; -- This section specifies the pin map for each port. This information -- is extracted from the port-to-pin map file that was read in using -- the "read_pin_map" command. constant LQFP128: PIN_MAP_STRING := "advref : 1," & "ad7 : 3," & "ad6 : 4," & "ad5 : 5," & "ad4 : 6," & "vddout : 7," & "vddin : 8," & "pa20 : 9," & "pa19 : 10," & "pa18 : 11," & "pa17 : 12," & "pa16 : 13," & "pa15 : 14," & "pa14 : 15," & "pa13 : 16," & "pa12 : 17," & "pa11 : 18," & "pa10 : 19," & "pa9 : 20," & "pa8 : 24," & "pa7 : 25," & "pa6 : 26," & "pa5 : 27," & "pa4 : 28," & "pa3 : 29," & "pa2 : 30," & "pa1 : 31," & "pa0 : 32," & "pb31 : 33," & "pb30 : 34," & "pb29 : 35," & "pb28 : 36," & "pb27 : 37," & "pb26 : 38," & "pb25 : 39," & "pb24 : 40," & "pb23 : 41," & "pb22 : 42," & "pb21 : 43," & "pb20 : 44," & "pb19 : 48," & "pb18 : 49," & "pb17 : 50," & "pb16 : 51," & "pb15 : 52," & "pb14 : 53," & "pb13 : 54," & "pb12 : 55," & "pb11 : 56," & "pb10 : 57," & "pb9 : 58," & "pb8 : 59," & "pb7 : 60," & "pb6 : 61," & "pb5 : 62," & "pb4 : 63," & "pb3 : 64," & "icetdi : 65," & "icetdo : 66," & "pb2 : 67," & "pb1 : 68," & "pb0 : 69," & "nrst : 73," & "test : 74," & "erase : 75," & "icetck : 76," & "icetms : 77," & "jtagsel : 78," & "pc23 : 79," & "pc22 : 80," & "pc21 : 81," & "pc20 : 82," & "pc19 : 83," & "pc18 : 84," & "pc17 : 85," & "pc16 : 86," & "pc15 : 87," & "pc14 : 88," & "pc13 : 89," & "pc12 : 90," & "pc11 : 91," & "pc10 : 92," & "pc9 : 93," & "sdck : 97," & "pc8 : 98," & "pc7 : 99," & "pc6 : 100," & "pc5 : 101," & "pc4 : 102," & "pc3 : 103," & "pc2 : 104," & "pc1 : 105," & "pc0 : 106," & "pa31 : 107," & "pa30 : 108," & "pa29 : 109," & "pa28 : 110," & "pa27 : 111," & "pa26 : 112," & "pa25 : 113," & "pa24 : 114," & "pa23 : 115," & "pa22 : 116," & "pa21 : 117," & "dm : 121," & "dp : 122," & "osc9m_xin : 125," & "osc9m_xout : 126," & "pll_rc : 127," & "gnd :(2, 22, 45, 70, 94, 119,124) ," & "vddio :(21, 46, 71, 95, 120) ," & "vddcore :(23, 47, 72, 96, 118) ," & "vddflash :123 ," & "vddpll :128 "; -- This section specifies the TAP ports. -- For the TAP TCK port, the parameters in the brackets are: -- First Field : Maximum TCK frequency. -- Second Field: Allowable states TCK may be stopped in. attribute TAP_SCAN_CLOCK of icetck: signal is (10.0e6, BOTH); attribute TAP_SCAN_IN of icetdi: signal is true; attribute TAP_SCAN_MODE of icetms: signal is true; attribute TAP_SCAN_OUT of icetdo: signal is true; attribute TAP_SCAN_RESET of nrst : signal is true; -- Specifies the compliance enable patterns for the design. -- It lists a set of design ports and the values that they -- should be set to, in order to enable compliance to IEEE -- Std 1149.1 attribute COMPLIANCE_PATTERNS of AT91SAM7SE256: entity is "(jtagsel, test) (10)"; -- Specifies the number of bits in the instruction register. attribute INSTRUCTION_LENGTH of AT91SAM7SE256: entity is 3; -- Specifies the boundary-scan instructions implemented in the -- design and their opcodes. attribute INSTRUCTION_OPCODE of AT91SAM7SE256: entity is "BYPASS (111, 100, 110)," & "EXTEST (000, 011)," & "SAMPLE (001)," & "IDCODE (010)"; -- Specifies the bit pattern that is loaded into the instruction -- register when the TAP controller passes through the Capture-IR -- state. The standard mandates that the two LSBs must be "01". -- The remaining bits are design specific. attribute INSTRUCTION_CAPTURE of AT91SAM7SE256: entity is "001"; -- Specifies the bit pattern that is loaded into the DEVICE_ID -- register during the IDCODE instruction when the TAP controller -- passes through the Capture-DR state. attribute IDCODE_REGISTER of AT91SAM7SE256: entity is "0000" & -- 4-bit version number "0101101100010101" & -- 16-bit part number "00000011111" & -- 11-bit identity of the manufacturer "1"; -- Required by IEEE Std 1149.1 -- This section specifies the test data register placed between TDI -- and TDO for each implemented instruction. attribute REGISTER_ACCESS of AT91SAM7SE256: entity is "BYPASS (BYPASS)," & "BOUNDARY (EXTEST, SAMPLE)," & "DEVICE_ID (IDCODE)"; -- Specifies the length of the boundary scan register. attribute BOUNDARY_LENGTH of AT91SAM7SE256: entity is 354; -- The following list specifies the characteristics of each cell -- in the boundary scan register from TDI to TDO. -- The following is a description of the label fields: -- num : Is the cell number. -- cell : Is the cell type as defined by the standard. -- port : Is the design port name. Control cells do not -- have a port name. -- function: Is the function of the cell as defined by the -- standard. Is one of input, output2, output3, -- bidir, control or controlr. -- safe : Specifies the value that the BSR cell should be -- loaded with for safe operation when the software -- might otherwise choose a random value. -- ccell : The control cell number. Specifies the control -- cell that drives the output enable for this port. -- disval : Specifies the value that is loaded into the -- control cell to disable the output enable for -- the corresponding port. -- rslt : Resulting state. Shows the state of the driver -- when it is disabled. attribute BOUNDARY_REGISTER of AT91SAM7SE256: entity is -- -- num cell port function safe [ccell disval rslt] -- "353 (BC_1, sdck, output2, X), " & "352 (BC_1, pc8, input, X), " & "351 (BC_1, pc8, output3, X, 350, 1, Z), " & "350 (BC_1, *, controlr, 1), " & "349 (BC_0, *, internal, X), " & "348 (BC_1, pc7, input, X), " & "347 (BC_1, pc7, output3, X, 346, 1, Z), " & "346 (BC_1, *, controlr, 1), " & "345 (BC_0, *, internal, X), " & "344 (BC_1, pc6, input, X), " & "343 (BC_1, pc6, output3, X, 342, 1, Z), " & "342 (BC_1, *, controlr, 1), " & "341 (BC_0, *, internal, X), " & "340 (BC_1, pc5, input, X), " & "339 (BC_1, pc5, output3, X, 338, 1, Z), " & "338 (BC_1, *, controlr, 1), " & "337 (BC_0, *, internal, X), " & "336 (BC_1, pc4, input, X), " & "335 (BC_1, pc4, output3, X, 334, 1, Z), " & "334 (BC_1, *, controlr, 1), " & "333 (BC_0, *, internal, X), " & "332 (BC_1, pc3, input, X), " & "331 (BC_1, pc3, output3, X, 330, 1, Z), " & "330 (BC_1, *, controlr, 1), " & "329 (BC_0, *, internal, X), " & "328 (BC_1, pc2, input, X), " & "327 (BC_1, pc2, output3, X, 326, 1, Z), " & "326 (BC_1, *, controlr, 1), " & "325 (BC_0, *, internal, X), " & "324 (BC_1, pc1, input, X), " & "323 (BC_1, pc1, output3, X, 322, 1, Z), " & "322 (BC_1, *, controlr, 1), " & "321 (BC_0, *, internal, X), " & "320 (BC_1, pc0, input, X), " & "319 (BC_1, pc0, output3, X, 318, 1, Z), " & "318 (BC_1, *, controlr, 1), " & "317 (BC_0, *, internal, X), " & "316 (BC_1, pa31, input, X), " & "315 (BC_1, pa31, output3, X, 314, 1, Z), " & "314 (BC_1, *, controlr, 1), " & "313 (BC_0, *, internal, X), " & "312 (BC_1, pa30, input, X), " & "311 (BC_1, pa30, output3, X, 310, 1, Z), " & "310 (BC_1, *, controlr, 1), " & "309 (BC_0, *, internal, X), " & "308 (BC_1, pa29, input, X), " & "307 (BC_1, pa29, output3, X, 306, 1, Z), " & "306 (BC_1, *, controlr, 1), " & "305 (BC_0, *, internal, X), " & "304 (BC_1, pa28, input, X), " & "303 (BC_1, pa28, output3, X, 302, 1, Z), " & "302 (BC_1, *, controlr, 1), " & "301 (BC_0, *, internal, X), " & "300 (BC_1, pa27, input, X), " & "299 (BC_1, pa27, output3, X, 298, 1, Z), " & "298 (BC_1, *, controlr, 1), " & "297 (BC_0, *, internal, X), " & "296 (BC_1, pa26, input, X), " & "295 (BC_1, pa26, output3, X, 294, 1, Z), " & "294 (BC_1, *, controlr, 1), " & "293 (BC_0, *, internal, X), " & "292 (BC_1, pa25, input, X), " & "291 (BC_1, pa25, output3, X, 290, 1, Z), " & "290 (BC_1, *, controlr, 1), " & "289 (BC_0, *, internal, X), " & "288 (BC_1, pa24, input, X), " & "287 (BC_1, pa24, output3, X, 286, 1, Z), " & "286 (BC_1, *, controlr, 1), " & "285 (BC_0, *, internal, X), " & "284 (BC_1, pa23, input, X), " & "283 (BC_1, pa23, output3, X, 282, 1, Z), " & "282 (BC_1, *, controlr, 1), " & "281 (BC_0, *, internal, X), " & "280 (BC_1, pa22, input, X), " & "279 (BC_1, pa22, output3, X, 278, 1, Z), " & "278 (BC_1, *, controlr, 1), " & "277 (BC_0, *, internal, X), " & "276 (BC_1, pa21, input, X), " & "275 (BC_1, pa21, output3, X, 274, 1, Z), " & "274 (BC_1, *, controlr, 1), " & "273 (BC_0, *, internal, X), " & "272 (BC_1, pa20, input, X), " & "271 (BC_1, pa20, output3, X, 270, 1, Z), " & "270 (BC_1, *, controlr, 1), " & "269 (BC_0, *, internal, X), " & "268 (BC_1, pa19, input, X), " & "267 (BC_1, pa19, output3, X, 266, 1, Z), " & "266 (BC_1, *, controlr, 1), " & "265 (BC_0, *, internal, X), " & "264 (BC_1, pa18, input, X), " & "263 (BC_1, pa18, output3, X, 262, 1, Z), " & "262 (BC_1, *, controlr, 1), " & "261 (BC_0, *, internal, X), " & "260 (BC_1, pa17, input, X), " & "259 (BC_1, pa17, output3, X, 258, 1, Z), " & "258 (BC_1, *, controlr, 1), " & "257 (BC_0, *, internal, X), " & "256 (BC_1, pa16, input, X), " & "255 (BC_1, pa16, output3, X, 254, 1, Z), " & "254 (BC_1, *, controlr, 1), " & "253 (BC_0, *, internal, X), " & "252 (BC_1, pa15, input, X), " & "251 (BC_1, pa15, output3, X, 250, 1, Z), " & "250 (BC_1, *, controlr, 1), " & "249 (BC_0, *, internal, X), " & "248 (BC_1, pa14, input, X), " & "247 (BC_1, pa14, output3, X, 246, 1, Z), " & "246 (BC_1, *, controlr, 1), " & "245 (BC_0, *, internal, X), " & "244 (BC_1, pa13, input, X), " & "243 (BC_1, pa13, output3, X, 242, 1, Z), " & "242 (BC_1, *, controlr, 1), " & "241 (BC_0, *, internal, X), " & "240 (BC_1, pa12, input, X), " & "239 (BC_1, pa12, output3, X, 238, 1, Z), " & "238 (BC_1, *, controlr, 1), " & "237 (BC_0, *, internal, X), " & "236 (BC_1, pa11, input, X), " & "235 (BC_1, pa11, output3, X, 234, 1, Z), " & "234 (BC_1, *, controlr, 1), " & "233 (BC_0, *, internal, X), " & "232 (BC_1, pa10, input, X), " & "231 (BC_1, pa10, output3, X, 230, 1, Z), " & "230 (BC_1, *, controlr, 1), " & "229 (BC_0, *, internal, X), " & "228 (BC_1, pa9, input, X), " & "227 (BC_1, pa9, output3, X, 226, 1, Z), " & "226 (BC_1, *, controlr, 1), " & "225 (BC_0, *, internal, X), " & "224 (BC_1, pa8, input, X), " & "223 (BC_1, pa8, output3, X, 222, 1, Z), " & "222 (BC_1, *, controlr, 1), " & "221 (BC_0, *, internal, X), " & "220 (BC_1, pa7, input, X), " & "219 (BC_1, pa7, output3, X, 218, 1, Z), " & "218 (BC_1, *, controlr, 1), " & "217 (BC_0, *, internal, X), " & "216 (BC_1, pa6, input, X), " & "215 (BC_1, pa6, output3, X, 214, 1, Z), " & "214 (BC_1, *, controlr, 1), " & "213 (BC_0, *, internal, X), " & "212 (BC_1, pa5, input, X), " & "211 (BC_1, pa5, output3, X, 210, 1, Z), " & "210 (BC_1, *, controlr, 1), " & "209 (BC_0, *, internal, X), " & "208 (BC_1, pa4, input, X), " & "207 (BC_1, pa4, output3, X, 206, 1, Z), " & "206 (BC_1, *, controlr, 1), " & "205 (BC_0, *, internal, X), " & "204 (BC_1, pa3, input, X), " & "203 (BC_1, pa3, output3, X, 202, 1, Z), " & "202 (BC_1, *, controlr, 1), " & "201 (BC_0, *, internal, X), " & "200 (BC_1, pa2, input, X), " & "199 (BC_1, pa2, output3, X, 198, 1, Z), " & "198 (BC_1, *, controlr, 1), " & "197 (BC_0, *, internal, X), " & "196 (BC_1, pa1, input, X), " & "195 (BC_1, pa1, output3, X, 194, 1, Z), " & "194 (BC_1, *, controlr, 1), " & "193 (BC_0, *, internal, X), " & "192 (BC_1, pa0, input, X), " & "191 (BC_1, pa0, output3, X, 190, 1, Z), " & "190 (BC_1, *, controlr, 1), " & "189 (BC_0, *, internal, X), " & "188 (BC_1, pb31, input, X), " & "187 (BC_1, pb31, output3, X, 186, 1, Z), " & "186 (BC_1, *, controlr, 1), " & "185 (BC_0, *, internal, X), " & "184 (BC_1, pb30, input, X), " & "183 (BC_1, pb30, output3, X, 182, 1, Z), " & "182 (BC_1, *, controlr, 1), " & "181 (BC_0, *, internal, X), " & "180 (BC_1, pb29, input, X), " & "179 (BC_1, pb29, output3, X, 178, 1, Z), " & "178 (BC_1, *, controlr, 1), " & "177 (BC_0, *, internal, X), " & "176 (BC_1, pb28, input, X), " & "175 (BC_1, pb28, output3, X, 174, 1, Z), " & "174 (BC_1, *, controlr, 1), " & "173 (BC_0, *, internal, X), " & "172 (BC_1, pb27, input, X), " & "171 (BC_1, pb27, output3, X, 170, 1, Z), " & "170 (BC_1, *, controlr, 1), " & "169 (BC_0, *, internal, X), " & "168 (BC_1, pb26, input, X), " & "167 (BC_1, pb26, output3, X, 166, 1, Z), " & "166 (BC_1, *, controlr, 1), " & "165 (BC_0, *, internal, X), " & "164 (BC_1, pb25, input, X), " & "163 (BC_1, pb25, output3, X, 162, 1, Z), " & "162 (BC_1, *, controlr, 1), " & "161 (BC_0, *, internal, X), " & "160 (BC_1, pb24, input, X), " & "159 (BC_1, pb24, output3, X, 158, 1, Z), " & "158 (BC_1, *, controlr, 1), " & "157 (BC_0, *, internal, X), " & "156 (BC_1, pb23, input, X), " & "155 (BC_1, pb23, output3, X, 154, 1, Z), " & "154 (BC_1, *, controlr, 1), " & "153 (BC_0, *, internal, X), " & "152 (BC_1, pb22, input, X), " & "151 (BC_1, pb22, output3, X, 150, 1, Z), " & "150 (BC_1, *, controlr, 1), " & "149 (BC_0, *, internal, X), " & "148 (BC_1, pb21, input, X), " & "147 (BC_1, pb21, output3, X, 146, 1, Z), " & "146 (BC_1, *, controlr, 1), " & "145 (BC_0, *, internal, X), " & "144 (BC_1, pb20, input, X), " & "143 (BC_1, pb20, output3, X, 142, 1, Z), " & "142 (BC_1, *, controlr, 1), " & "141 (BC_0, *, internal, X), " & "140 (BC_1, pb19, input, X), " & "139 (BC_1, pb19, output3, X, 138, 1, Z), " & "138 (BC_1, *, controlr, 1), " & "137 (BC_0, *, internal, X), " & "136 (BC_1, pb18, input, X), " & "135 (BC_1, pb18, output3, X, 134, 1, Z), " & "134 (BC_1, *, controlr, 1), " & "133 (BC_0, *, internal, X), " & "132 (BC_1, pb17, input, X), " & "131 (BC_1, pb17, output3, X, 130, 1, Z), " & "130 (BC_1, *, controlr, 1), " & "129 (BC_0, *, internal, X), " & "128 (BC_1, pb16, input, X), " & "127 (BC_1, pb16, output3, X, 126, 1, Z), " & "126 (BC_1, *, controlr, 1), " & "125 (BC_0, *, internal, X), " & "124 (BC_1, pb15, input, X), " & "123 (BC_1, pb15, output3, X, 122, 1, Z), " & "122 (BC_1, *, controlr, 1), " & "121 (BC_0, *, internal, X), " & "120 (BC_1, pb14, input, X), " & "119 (BC_1, pb14, output3, X, 118, 1, Z), " & "118 (BC_1, *, controlr, 1), " & "117 (BC_0, *, internal, X), " & "116 (BC_1, pb13, input, X), " & "115 (BC_1, pb13, output3, X, 114, 1, Z), " & "114 (BC_1, *, controlr, 1), " & "113 (BC_0, *, internal, X), " & "112 (BC_1, pb12, input, X), " & "111 (BC_1, pb12, output3, X, 110, 1, Z), " & "110 (BC_1, *, controlr, 1), " & "109 (BC_0, *, internal, X), " & "108 (BC_1, pb11, input, X), " & "107 (BC_1, pb11, output3, X, 106, 1, Z), " & "106 (BC_1, *, controlr, 1), " & "105 (BC_0, *, internal, X), " & "104 (BC_1, pb10, input, X), " & "103 (BC_1, pb10, output3, X, 102, 1, Z), " & "102 (BC_1, *, controlr, 1), " & "101 (BC_0, *, internal, X), " & "100 (BC_1, pb9, input, X), " & "99 (BC_1, pb9, output3, X, 98, 1, Z), " & "98 (BC_1, *, controlr, 1), " & "97 (BC_0, *, internal, X), " & "96 (BC_1, pb8, input, X), " & "95 (BC_1, pb8, output3, X, 94, 1, Z), " & "94 (BC_1, *, controlr, 1), " & "93 (BC_0, *, internal, X), " & "92 (BC_1, pb7, input, X), " & "91 (BC_1, pb7, output3, X, 90, 1, Z), " & "90 (BC_1, *, controlr, 1), " & "89 (BC_0, *, internal, X), " & "88 (BC_1, pb6, input, X), " & "87 (BC_1, pb6, output3, X, 86, 1, Z), " & "86 (BC_1, *, controlr, 1), " & "85 (BC_0, *, internal, X), " & "84 (BC_1, pb5, input, X), " & "83 (BC_1, pb5, output3, X, 82, 1, Z), " & "82 (BC_1, *, controlr, 1), " & "81 (BC_0, *, internal, X), " & "80 (BC_1, pb4, input, X), " & "79 (BC_1, pb4, output3, X, 78, 1, Z), " & "78 (BC_1, *, controlr, 1), " & "77 (BC_0, *, internal, X), " & "76 (BC_1, pb3, input, X), " & "75 (BC_1, pb3, output3, X, 74, 1, Z), " & "74 (BC_1, *, controlr, 1), " & "73 (BC_0, *, internal, X), " & "72 (BC_1, pb2, input, X), " & "71 (BC_1, pb2, output3, X, 70, 1, Z), " & "70 (BC_1, *, controlr, 1), " & "69 (BC_0, *, internal, X), " & "68 (BC_1, pb1, input, X), " & "67 (BC_1, pb1, output3, X, 66, 1, Z), " & "66 (BC_1, *, controlr, 1), " & "65 (BC_0, *, internal, X), " & "64 (BC_1, pb0, input, X), " & "63 (BC_1, pb0, output3, X, 62, 1, Z), " & "62 (BC_1, *, controlr, 1), " & "61 (BC_0, *, internal, X), " & "60 (BC_1, erase, input, X), " & "59 (BC_1, pc23, input, X), " & "58 (BC_1, pc23, output3, X, 57, 1, Z), " & "57 (BC_1, *, controlr, 1), " & "56 (BC_0, *, internal, X), " & "55 (BC_1, pc22, input, X), " & "54 (BC_1, pc22, output3, X, 53, 1, Z), " & "53 (BC_1, *, controlr, 1), " & "52 (BC_0, *, internal, X), " & "51 (BC_1, pc21, input, X), " & "50 (BC_1, pc21, output3, X, 49, 1, Z), " & "49 (BC_1, *, controlr, 1), " & "48 (BC_0, *, internal, X), " & "47 (BC_1, pc20, input, X), " & "46 (BC_1, pc20, output3, X, 45, 1, Z), " & "45 (BC_1, *, controlr, 1), " & "44 (BC_0, *, internal, X), " & "43 (BC_1, pc19, input, X), " & "42 (BC_1, pc19, output3, X, 41, 1, Z), " & "41 (BC_1, *, controlr, 1), " & "40 (BC_0, *, internal, X), " & "39 (BC_1, pc18, input, X), " & "38 (BC_1, pc18, output3, X, 37, 1, Z), " & "37 (BC_1, *, controlr, 1), " & "36 (BC_0, *, internal, X), " & "35 (BC_1, pc17, input, X), " & "34 (BC_1, pc17, output3, X, 33, 1, Z), " & "33 (BC_1, *, controlr, 1), " & "32 (BC_0, *, internal, X), " & "31 (BC_1, pc16, input, X), " & "30 (BC_1, pc16, output3, X, 29, 1, Z), " & "29 (BC_1, *, controlr, 1), " & "28 (BC_0, *, internal, X), " & "27 (BC_1, pc15, input, X), " & "26 (BC_1, pc15, output3, X, 25, 1, Z), " & "25 (BC_1, *, controlr, 1), " & "24 (BC_0, *, internal, X), " & "23 (BC_1, pc14, input, X), " & "22 (BC_1, pc14, output3, X, 21, 1, Z), " & "21 (BC_1, *, controlr, 1), " & "20 (BC_0, *, internal, X), " & "19 (BC_1, pc13, input, X), " & "18 (BC_1, pc13, output3, X, 17, 1, Z), " & "17 (BC_1, *, controlr, 1), " & "16 (BC_0, *, internal, X), " & "15 (BC_1, pc12, input, X), " & "14 (BC_1, pc12, output3, X, 13, 1, Z), " & "13 (BC_1, *, controlr, 1), " & "12 (BC_0, *, internal, X), " & "11 (BC_1, pc11, input, X), " & "10 (BC_1, pc11, output3, X, 9, 1, Z), " & "9 (BC_1, *, controlr, 1), " & "8 (BC_0, *, internal, X), " & "7 (BC_1, pc10, input, X), " & "6 (BC_1, pc10, output3, X, 5, 1, Z), " & "5 (BC_1, *, controlr, 1), " & "4 (BC_0, *, internal, X), " & "3 (BC_1, pc9, input, X), " & "2 (BC_1, pc9, output3, X, 1, 1, Z), " & "1 (BC_1, *, controlr, 1), " & "0 (BC_0, *, internal, X) "; end AT91SAM7SE256;