------------------------------------------------------------------------------- -- TI SN74LVTH18512 -- -- IEEE Std 1149.1 (JTAG) Boundary-Scan Test Device -- -- with 18-Bit Universal Bus Transceivers (UBTtm) -- -- features: bus-hold on A & B ports -- ------------------------------------------------------------------------------- -- Created by : Texas Instruments Incorporated -- -- Documentation : SN74LVTH18512 Data Sheet (SCBS671) -- -- Product Status: Product Preview -- -- BSDL revision : 0.1 -- -- BSDL status : Preliminary -- -- Date created : 07/26/97 -- -- Last modified : n/a -- -- Modification history - -- -- - n/a -- ------------------------------------------------------------------------------- --***************************************************************************-- --* W A R N I N G *-- --* *-- --* This BSDL file has been checked for correct syntax and semantics *-- --* using several commercial tools, but it has NOT been validated against *-- --* the device. Without validation many structural errors could be *-- --* present, leading to possible damage of the device when using its *-- --* boundary scan logic. *-- --* *-- --***************************************************************************-- ------------------------------------------------------------------------------- -- -- -- IMPORTANT NOTICE -- -- -- -- Texas Instruments (TI) reserves the right to make changes to its -- -- products or to discontinue any semiconductor product or service without -- -- notice, and advises its customers to obtain the latest version of -- -- relevant information to verify, before placing orders, that the -- -- information being relied on is current. -- -- -- -- TI warrants performance of its semiconductor products and related -- -- software to the specifications applicable at the time of sale in -- -- accordance with TI's standard warranty. Testing and other quality -- -- control techniques are utilized to the extent TI deems necessary to -- -- support this warranty. Specific testing of all parameters of each -- -- device is not necessarily performed, except those mandated by -- -- government requirements. -- -- -- -- Certain applications using semiconductor products may involve potential -- -- risks of death, personal injury, or severe property or environmental -- -- damage ("Critical Applications"). -- -- -- -- TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR -- -- WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES -- -- OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. -- -- -- -- Inclusion of TI products in such applications is understood to be fully -- -- at the risk of the customer. Use of TI products in such applications -- -- requires the written approval of an appropriate TI officer. Questions -- -- concerning potential risk applications should be directed to TI through -- -- a local SC sales office. -- -- -- -- In order to minimize risks associated with the customer's applications, -- -- adequate design and operating safeguards should be provided by the -- -- customer to minimize inherent or procedural hazards. -- -- -- -- TI assumes no liability for applications assistance, customer product -- -- design, software performance, or infringement of patents or services -- -- described herein. Nor does TI warrant or represent that any license, -- -- either express or implied, is granted under any patent right, copyright, -- -- mask work right, or other intellectual property right of TI covering or -- -- relating to any combination, machine, or process in which such -- -- semiconductor products or services might be or are used. -- -- -- -- Copyright (c) 1997, Texas Instruments Incorporated -- -- -- ------------------------------------------------------------------------------- entity sn74lvth18512 is generic (PHYSICAL_PIN_MAP : string := "UNDEFINED"); port (OEAB_NEG1:in bit; OEAB_NEG2:in bit; OEBA_NEG1:in bit; OEBA_NEG2:in bit; LEAB1:in bit; LEAB2:in bit; LEBA1:in bit; LEBA2:in bit; CLKAB1:in bit; CLKAB2:in bit; CLKBA1:in bit; CLKBA2:in bit; A1:inout bit_vector(1 to 9); A2:inout bit_vector(1 to 9); B1:inout bit_vector(1 to 9); B2:inout bit_vector(1 to 9); GND:linkage bit_vector(1 to 8); VCC:linkage bit_vector(1 to 4); TDO:out bit; TDI, TMS, TCK:in bit); use STD_1149_1_1990.all; -- Get standard attributes and definitions attribute PIN_MAP of sn74lvth18512 : entity is PHYSICAL_PIN_MAP; constant DGG: PIN_MAP_STRING := "OEAB_NEG1:3, OEAB_NEG2:28, OEBA_NEG1:62, OEBA_NEG2:37,"& "LEAB1:2, LEAB2:29, LEBA1:63, LEBA2:36,"& "CLKAB1:1, CLKAB2:30, CLKBA1:64, CLKBA2:35,"& "A1:(4,5,7,8,9,11,12,13,15),"& "A2:(16,17,18,20,21,22,24,25,26),"& "B1:(61,60,58,57,56,54,53,52,50),"& "B2:(49,48,47,45,44,43,41,40,39),"& "GND:(6,14,19,27,38,46,51,59),"& "VCC:(10,23,42,55),"& "TCK:33, TDI:34, TMS:32, TDO:31 "; constant HKC: PIN_MAP_STRING := "OEAB_NEG1:3, OEAB_NEG2:28, OEBA_NEG1:62, OEBA_NEG2:37,"& "LEAB1:2, LEAB2:29, LEBA1:63, LEBA2:36,"& "CLKAB1:1, CLKAB2:30, CLKBA1:64, CLKBA2:35,"& "A1:(4,5,7,8,9,11,12,13,15),"& "A2:(16,17,18,20,21,22,24,25,26),"& "B1:(61,60,58,57,56,54,53,52,50),"& "B2:(49,48,47,45,44,43,41,40,39),"& "GND:(6,14,19,27,38,46,51,59),"& "VCC:(10,23,42,55),"& "TCK:33, TDI:34, TMS:32, TDO:31 "; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (40.0e6, BOTH); attribute INSTRUCTION_LENGTH of sn74lvth18512 : entity is 8; attribute INSTRUCTION_OPCODE of sn74lvth18512 : entity is "BYPASS (11111111, 10000100), " & "EXTEST (00000000), " & "SAMPLE (10000010), " & "IDCODE (10000001), " & "HIGHZ (00000110), " & -- Control Boundary to High-Impedance "CLAMP (10000111), " & -- Control Boundary to 1/0 "RUNT (00001001), " & -- Boundary Run Test "READBN (00001010), " & -- Boundary Read Normal Mode "READBT (10001011), " & -- Boundary Read Test Mode "CELLTST(00001100), " & -- Boundary Self-Test Normal Mode "TOPHIP (10001101), " & -- Boundary Toggle Outputs Test Mode "SCANCN (10001110), " & -- BCR Scan Normal Mode "SCANCT (00001111) " ; -- BCR Scan Test Mode attribute INSTRUCTION_CAPTURE of sn74lvth18512 : entity is "10000001"; attribute INSTRUCTION_DISABLE of sn74lvth18512 : entity is "HIGHZ"; attribute INSTRUCTION_GUARD of sn74lvth18512 : entity is "CLAMP"; attribute IDCODE_REGISTER of sn74lvth18512 : entity is "0000" & -- 4 bit version "0000000000111011" & -- 16 bit part number "00000010111" & -- 11 bit manufacturer "1" ; -- mandatory LSB attribute REGISTER_ACCESS of sn74lvth18512 : entity is "BOUNDARY (READBN, READBT, CELLTST)," & "BYPASS (HIGHZ, CLAMP, RUNT, TOPHIP)," & "IDCODE (IDCODE), " & "BCR[3] (SCANCN, SCANCT)" ; attribute BOUNDARY_CELLS of sn74lvth18512 : entity is "BC_1,BC_7"; -- Cell type BC_7 must be added to the standard package (package -- STD_1149_1_1990) if it has not already been added. -- constant BC_7:CELL_INFO:= -- ((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, PO), -- (BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI), attribute BOUNDARY_LENGTH of sn74lvth18512 : entity is 48; attribute BOUNDARY_REGISTER of sn74lvth18512 : entity is "0 (BC_7, B1(1) ,bidir , X, 46, 1, Z)," & "1 (BC_7, B1(2) ,bidir , X, 46, 1, Z)," & "2 (BC_7, B1(3) ,bidir , X, 46, 1, Z)," & "3 (BC_7, B1(4) ,bidir , X, 46, 1, Z)," & "4 (BC_7, B1(5) ,bidir , X, 46, 1, Z)," & "5 (BC_7, B1(6) ,bidir , X, 46, 1, Z)," & "6 (BC_7, B1(7) ,bidir , X, 46, 1, Z)," & "7 (BC_7, B1(8) ,bidir , X, 46, 1, Z)," & "8 (BC_7, B1(9) ,bidir , X, 46, 1, Z)," & "9 (BC_7, B2(1) ,bidir , X, 47, 1, Z)," & "10 (BC_7, B2(2) ,bidir , X, 47, 1, Z)," & "11 (BC_7, B2(3) ,bidir , X, 47, 1, Z)," & "12 (BC_7, B2(4) ,bidir , X, 47, 1, Z)," & "13 (BC_7, B2(5) ,bidir , X, 47, 1, Z)," & "14 (BC_7, B2(6) ,bidir , X, 47, 1, Z)," & "15 (BC_7, B2(7) ,bidir , X, 47, 1, Z)," & "16 (BC_7, B2(8) ,bidir , X, 47, 1, Z)," & "17 (BC_7, B2(9) ,bidir , X, 47, 1, Z)," & "18 (BC_7, A1(1) ,bidir , X, 44, 1, Z)," & "19 (BC_7, A1(2) ,bidir , X, 44, 1, Z)," & "20 (BC_7, A1(3) ,bidir , X, 44, 1, Z)," & "21 (BC_7, A1(4) ,bidir , X, 44, 1, Z)," & "22 (BC_7, A1(5) ,bidir , X, 44, 1, Z)," & "23 (BC_7, A1(6) ,bidir , X, 44, 1, Z)," & "24 (BC_7, A1(7) ,bidir , X, 44, 1, Z)," & "25 (BC_7, A1(8) ,bidir , X, 44, 1, Z)," & "26 (BC_7, A1(9) ,bidir , X, 44, 1, Z)," & "27 (BC_7, A2(1) ,bidir , X, 45, 1, Z)," & "28 (BC_7, A2(2) ,bidir , X, 45, 1, Z)," & "29 (BC_7, A2(3) ,bidir , X, 45, 1, Z)," & "30 (BC_7, A2(4) ,bidir , X, 45, 1, Z)," & "31 (BC_7, A2(5) ,bidir , X, 45, 1, Z)," & "32 (BC_7, A2(6) ,bidir , X, 45, 1, Z)," & "33 (BC_7, A2(7) ,bidir , X, 45, 1, Z)," & "34 (BC_7, A2(8) ,bidir , X, 45, 1, Z)," & "35 (BC_7, A2(9) ,bidir , X, 45, 1, Z)," & "36 (BC_1, LEBA1 ,input , X)," & "37 (BC_1, LEBA2 ,input , X)," & "38 (BC_1, LEAB1 ,input , X)," & "39 (BC_1, LEAB2 ,input , X)," & "40 (BC_1, CLKBA1 ,input , X)," & "41 (BC_1, CLKBA2 ,input , X)," & "42 (BC_1, CLKAB1 ,input , X)," & "43 (BC_1, CLKAB2 ,input , X)," & "44 (BC_1, OEBA_NEG1,input , 1)," & "44 (BC_1, * ,controlr, 1)," & "45 (BC_1, OEBA_NEG2,input , 1)," & "45 (BC_1, * ,controlr, 1)," & "46 (BC_1, OEAB_NEG1,input , 1)," & "46 (BC_1, * ,controlr, 1)," & "47 (BC_1, OEAB_NEG2,input , 1)," & "47 (BC_1, * ,controlr, 1) " ; end sn74lvth18512;