------------------------------------------------------------------------ -- A T M E L A R M M I C R O C O N T R O L L E R S -- ------------------------------------------------------------------------ -- BSDL file -- -- File Name: AT91SAM7X256_TQ100_revC.BSD -- File Revision: 3.0 -- Date: Fri Oct 12 2007 -- Created by: Atmel Corporation -- File Status: Released -- -- Device: AT91SAM7X256_revC -- Package: R_TFBGA100_P -- -- Visit http://www.atmel.com for a updated list of BSDL files. -- ------------------------------------------------------------------------ -- Syntax and Semantics are checked against the IEEE 1149.1 standard. -- -- The logical functioning of the standard Boundary-Scan instructions -- -- and of the associated bypass, idcode and boundary-scan register -- -- described in this BSDL file has been verified against its related -- -- silicon by JTAG Technologies B.V. -- ------------------------------------------------------------------------ ------------------------------------------------------------------------ -- IMPORTANT NOTICE -- -- -- -- Copyright 2005 Atmel Corporation. All Rights Reserved. -- -- -- -- Atmel assumes no responsibility or liability arising out -- -- this application or use of any information described herein -- -- except as expressly agreed to in writing by Atmel Corporation. -- -- -- -- ------------------------------------------------------------------ -- -- This BSDL File has been verified on severals BSDL Syntax -- -- Checker/Compilers -- -- -- -- File Name: AT91SAM7X256_BGA100_revC.bsd -- -- Timestamp: Monday, October 15, 2007 4:00 AM -- -- -- -- Results: Entity name: AT91SAM7X256 -- -- IEEE Std 1149.1-2001 (Version 2.0) -- -- Packaging option selected is R_TFBGA100_P. -- -- Inputs = 0 -- -- Outputs = 0 -- -- Bidirectionals = 62 -- -- Instruction Reg Length = 3 -- -- Boundary Reg Length = 124 -- -- -- -- BSDL compilation of 555 lines completed without errors. -- -- -- ------------------------------------------------------------------------ entity AT91SAM7X256 is -- This section identifies the default device package selected. generic (PHYSICAL_PIN_MAP: string:= "R_TFBGA100_P"); -- This section declares all the ports in the design. port ( icetck : in bit; icetdi : in bit; icetms : in bit; jtagsel : in bit; test : in bit; nrst : in bit; pa0 : inout bit; pa1 : inout bit; pa10 : inout bit; pa11 : inout bit; pa12 : inout bit; pa13 : inout bit; pa14 : inout bit; pa15 : inout bit; pa16 : inout bit; pa17 : inout bit; pa18 : inout bit; pa19 : inout bit; pa2 : inout bit; pa20 : inout bit; pa21 : inout bit; pa22 : inout bit; pa23 : inout bit; pa24 : inout bit; pa25 : inout bit; pa26 : inout bit; pa27 : inout bit; pa28 : inout bit; pa29 : inout bit; pa3 : inout bit; pa30 : inout bit; pa4 : inout bit; pa5 : inout bit; pa6 : inout bit; pa7 : inout bit; pa8 : inout bit; pa9 : inout bit; pb0 : inout bit; pb1 : inout bit; pb10 : inout bit; pb11 : inout bit; pb12 : inout bit; pb13 : inout bit; pb14 : inout bit; pb15 : inout bit; pb16 : inout bit; pb17 : inout bit; pb18 : inout bit; pb19 : inout bit; pb2 : inout bit; pb20 : inout bit; pb21 : inout bit; pb22 : inout bit; pb23 : inout bit; pb24 : inout bit; pb25 : inout bit; pb26 : inout bit; pb27 : inout bit; pb28 : inout bit; pb29 : inout bit; pb3 : inout bit; pb30 : inout bit; pb4 : inout bit; pb5 : inout bit; pb6 : inout bit; pb7 : inout bit; pb8 : inout bit; pb9 : inout bit; icetdo : out bit; erase : linkage bit ); use STD_1149_1_2001.all; attribute COMPONENT_CONFORMANCE of AT91SAM7X256: entity is "STD_1149_1_2001"; attribute PIN_MAP of AT91SAM7X256: entity is PHYSICAL_PIN_MAP; -- This section specifies the pin map for each port. This information is -- extracted from the port-to-pin map file that was read in using the -- "read_pin_map" command. constant R_TFBGA100_P: PIN_MAP_STRING := "icetck : F5," & "icetdi : B1," & "icetms : E5," & "jtagsel : H3," & "test : D4," & "nrst : D3," & "pa0 : J3," & "pa1 : J4," & "pa10 : D7," & "pa11 : D10," & "pa12 : C9," & "pa13 : C8," & "pa14 : B8," & "pa15 : C10," & "pa16 : B9," & "pa17 : B10," & "pa18 : A9," & "pa19 : B2," & "pa2 : G5," & "pa20 : A3," & "pa21 : A2," & "pa22 : A1," & "pa23 : D1," & "pa24 : D2," & "pa25 : E1," & "pa26 : E2," & "pa27 : G3," & "pa28 : H2," & "pa29 : J1," & "pa3 : H4," & "pa30 : J2," & "pa4 : H5," & "pa5 : G6," & "pa6 : F6," & "pa7 : H6," & "pa8 : H8," & "pa9 : H7," & "pb0 : C5," & "pb1 : A4," & "pb10 : C3," & "pb11 : B3," & "pb12 : B5," & "pb13 : C7," & "pb14 : B7," & "pb15 : B6," & "pb16 : C1," & "pb17 : C6," & "pb18 : E3," & "pb19 : D5," & "pb2 : B4," & "pb20 : E4," & "pb21 : F1," & "pb22 : G1," & "pb23 : F2," & "pb24 : G2," & "pb25 : F3," & "pb26 : F4," & "pb27 : D9," & "pb28 : E8," & "pb29 : H9," & "pb3 : C4," & "pb30 : G9," & "pb4 : C2," & "pb5 : A6," & "pb6 : D6," & "pb7 : A5," & "pb8 : A7," & "pb9 : A8," & "icetdo : G4," & "erase : F7"; -- This section specifies the TAP ports. For the TAP TCK port, the parameters in -- the brackets are: -- First Field : Maximum TCK frequency. -- Second Field: Allowable states TCK may be stopped in. attribute TAP_SCAN_CLOCK of icetck: signal is (1.000000e+06, BOTH); attribute TAP_SCAN_IN of icetdi: signal is true; attribute TAP_SCAN_MODE of icetms: signal is true; attribute TAP_SCAN_OUT of icetdo: signal is true; attribute TAP_SCAN_RESET of nrst : signal is true; -- Specifies the compliance enable patterns for the design. It lists a set of -- design ports and the values that they should be set to, in order to enable -- compliance to IEEE Std 1149.1 attribute COMPLIANCE_PATTERNS of AT91SAM7X256: entity is "(jtagsel, test) (10)"; -- Specifies the number of bits in the instruction register. attribute INSTRUCTION_LENGTH of AT91SAM7X256: entity is 3; -- Specifies the boundary-scan instructions implemented in the design and their -- opcodes. attribute INSTRUCTION_OPCODE of AT91SAM7X256: entity is "BYPASS (111)," & "EXTEST (000)," & "SAMPLE (100)," & "INTEST (010)," & "PRELOAD (100)," & "HIGHZ (001)," & "IDCODE (011)"; -- Specifies the bit pattern that is loaded into the instruction register when -- the TAP controller passes through the Capture-IR state. The standard mandates -- that the two LSBs must be "01". The remaining bits are design specific. attribute INSTRUCTION_CAPTURE of AT91SAM7X256: entity is "001"; -- Specifies the bit pattern that is loaded into the DEVICE_ID register during -- the IDCODE instruction when the TAP controller passes through the Capture-DR -- state. attribute IDCODE_REGISTER of AT91SAM7X256: entity is "0000" & -- 4-bit version number "0101101100010110" & -- 16-bit part number "00000011111" & -- 11-bit identity of the manufacturer "1"; -- Required by IEEE Std 1149.1 -- This section specifies the test data register placed between TDI and TDO for -- each implemented instruction. attribute REGISTER_ACCESS of AT91SAM7X256: entity is "BYPASS (BYPASS, HIGHZ)," & "BOUNDARY (EXTEST, SAMPLE, INTEST, PRELOAD)," & "DEVICE_ID (IDCODE)"; -- Specifies the length of the boundary scan register. attribute BOUNDARY_LENGTH of AT91SAM7X256: entity is 124; -- The following list specifies the characteristics of each cell in the boundary -- scan register from TDI to TDO. The following is a description of the label -- fields: -- num : Is the cell number. -- cell : Is the cell type as defined by the standard. -- port : Is the design port name. Control cells do not have a port -- name. -- function: Is the function of the cell as defined by the standard. Is one -- of input, output2, output3, bidir, control or controlr. -- safe : Specifies the value that the BSR cell should be loaded with -- for safe operation when the software might otherwise choose a -- random value. -- ccell : The control cell number. Specifies the control cell that -- drives the output enable for this port. -- disval : Specifies the value that is loaded into the control cell to -- disable the output enable for the corresponding port. -- rslt : Resulting state. Shows the state of the driver when it is -- disabled. attribute BOUNDARY_REGISTER of AT91SAM7X256: entity is -- -- num cell port function safe [ccell disval rslt] -- "123 (BC_1, *, control, " & "1), " & "122 (BC_7, pa30, bidir, X, 123, 1, " & "Z), " & "121 (BC_1, *, control, " & "1), " & "120 (BC_7, pa0, bidir, X, 121, 1, " & "Z), " & "119 (BC_1, *, control, " & "1), " & "118 (BC_7, pa1, bidir, X, 119, 1, " & "Z), " & "117 (BC_1, *, control, " & "1), " & "116 (BC_7, pa3, bidir, X, 117, 1, " & "Z), " & "115 (BC_1, *, control, " & "1), " & "114 (BC_7, pa2, bidir, X, 115, 1, " & "Z), " & "113 (BC_1, *, control, " & "1), " & "112 (BC_7, pa4, bidir, X, 113, 1, " & "Z), " & "111 (BC_1, *, control, " & "1), " & "110 (BC_7, pa5, bidir, X, 111, 1, " & "Z), " & "109 (BC_1, *, control, " & "1), " & "108 (BC_7, pa6, bidir, X, 109, 1, " & "Z), " & "107 (BC_1, *, control, " & "1), " & "106 (BC_7, pa7, bidir, X, 107, 1, " & "Z), " & "105 (BC_1, *, control, " & "1), " & "104 (BC_7, pb27, bidir, X, 105, 1, " & "Z), " & "103 (BC_1, *, control, " & "1), " & "102 (BC_7, pb28, bidir, X, 103, 1, " & "Z), " & "101 (BC_1, *, control, " & "1), " & "100 (BC_7, pb29, bidir, X, 101, 1, " & "Z), " & "99 (BC_1, *, control, " & "1), " & "98 (BC_7, pb30, bidir, X, 99, 1, " & "Z), " & "97 (BC_1, *, control, " & "1), " & "96 (BC_7, pa8, bidir, X, 97, 1, " & "Z), " & "95 (BC_1, *, control, " & "1), " & "94 (BC_7, pa9, bidir, X, 95, 1, " & "Z), " & "93 (BC_1, *, control, " & "1), " & "92 (BC_7, pa10, bidir, X, 93, 1, " & "Z), " & "91 (BC_1, *, control, " & "1), " & "90 (BC_7, pa11, bidir, X, 91, 1, " & "Z), " & "89 (BC_1, *, control, " & "1), " & "88 (BC_7, pa12, bidir, X, 89, 1, " & "Z), " & "87 (BC_1, *, control, " & "1), " & "86 (BC_7, pa13, bidir, X, 87, 1, " & "Z), " & "85 (BC_1, *, control, " & "1), " & "84 (BC_7, pa14, bidir, X, 85, 1, " & "Z), " & "83 (BC_1, *, control, " & "1), " & "82 (BC_7, pa15, bidir, X, 83, 1, " & "Z), " & "81 (BC_1, *, control, " & "1), " & "80 (BC_7, pa16, bidir, X, 81, 1, " & "Z), " & "79 (BC_1, *, control, " & "1), " & "78 (BC_7, pa17, bidir, X, 79, 1, " & "Z), " & "77 (BC_1, *, control, " & "1), " & "76 (BC_7, pa18, bidir, X, 77, 1, " & "Z), " & "75 (BC_1, *, control, " & "1), " & "74 (BC_7, pb9, bidir, X, 75, 1, " & "Z), " & "73 (BC_1, *, control, " & "1), " & "72 (BC_7, pb8, bidir, X, 73, 1, " & "Z), " & "71 (BC_1, *, control, " & "1), " & "70 (BC_7, pb14, bidir, X, 71, 1, " & "Z), " & "69 (BC_1, *, control, " & "1), " & "68 (BC_7, pb13, bidir, X, 69, 1, " & "Z), " & "67 (BC_1, *, control, " & "1), " & "66 (BC_7, pb6, bidir, X, 67, 1, " & "Z), " & "65 (BC_1, *, control, " & "1), " & "64 (BC_7, pb5, bidir, X, 65, 1, " & "Z), " & "63 (BC_1, *, control, " & "1), " & "62 (BC_7, pb15, bidir, X, 63, 1, " & "Z), " & "61 (BC_1, *, control, " & "1), " & "60 (BC_7, pb17, bidir, X, 61, 1, " & "Z), " & "59 (BC_1, *, control, " & "1), " & "58 (BC_7, pb7, bidir, X, 59, 1, " & "Z), " & "57 (BC_1, *, control, " & "1), " & "56 (BC_7, pb12, bidir, X, 57, 1, " & "Z), " & "55 (BC_1, *, control, " & "1), " & "54 (BC_7, pb0, bidir, X, 55, 1, " & "Z), " & "53 (BC_1, *, control, " & "1), " & "52 (BC_7, pb1, bidir, X, 53, 1, " & "Z), " & "51 (BC_1, *, control, " & "1), " & "50 (BC_7, pb2, bidir, X, 51, 1, " & "Z), " & "49 (BC_1, *, control, " & "1), " & "48 (BC_7, pb3, bidir, X, 49, 1, " & "Z), " & "47 (BC_1, *, control, " & "1), " & "46 (BC_7, pb10, bidir, X, 47, 1, " & "Z), " & "45 (BC_1, *, control, " & "1), " & "44 (BC_7, pb11, bidir, X, 45, 1, " & "Z), " & "43 (BC_1, *, control, " & "1), " & "42 (BC_7, pa19, bidir, X, 43, 1, " & "Z), " & "41 (BC_1, *, control, " & "1), " & "40 (BC_7, pa20, bidir, X, 41, 1, " & "Z), " & "39 (BC_1, *, control, " & "1), " & "38 (BC_7, pa21, bidir, X, 39, 1, " & "Z), " & "37 (BC_1, *, control, " & "1), " & "36 (BC_7, pa22, bidir, X, 37, 1, " & "Z), " & "35 (BC_1, *, control, " & "1), " & "34 (BC_7, pb16, bidir, X, 35, 1, " & "Z), " & "33 (BC_1, *, control, " & "1), " & "32 (BC_7, pb4, bidir, X, 33, 1, " & "Z), " & "31 (BC_1, *, control, " & "1), " & "30 (BC_7, pa23, bidir, X, 31, 1, " & "Z), " & "29 (BC_1, *, control, " & "1), " & "28 (BC_7, pa24, bidir, X, 29, 1, " & "Z), " & "27 (BC_1, *, control, " & "1), " & "26 (BC_7, pa25, bidir, X, 27, 1, " & "Z), " & "25 (BC_1, *, control, " & "1), " & "24 (BC_7, pa26, bidir, X, 25, 1, " & "Z), " & "23 (BC_1, *, control, " & "1), " & "22 (BC_7, pb18, bidir, X, 23, 1, " & "Z), " & "21 (BC_1, *, control, " & "1), " & "20 (BC_7, pb19, bidir, X, 21, 1, " & "Z), " & "19 (BC_1, *, control, " & "1), " & "18 (BC_7, pb20, bidir, X, 19, 1, " & "Z), " & "17 (BC_1, *, control, " & "1), " & "16 (BC_7, pb21, bidir, X, 17, 1, " & "Z), " & "15 (BC_1, *, control, " & "1), " & "14 (BC_7, pb22, bidir, X, 15, 1, " & "Z), " & "13 (BC_1, *, control, " & "1), " & "12 (BC_7, pb23, bidir, X, 13, 1, " & "Z), " & "11 (BC_1, *, control, " & "1), " & "10 (BC_7, pb24, bidir, X, 11, 1, " & "Z), " & "9 (BC_1, *, control, " & "1), " & "8 (BC_7, pb25, bidir, X, 9, 1, " & "Z), " & "7 (BC_1, *, control, " & "1), " & "6 (BC_7, pb26, bidir, X, 7, 1, " & "Z), " & "5 (BC_1, *, control, " & "1), " & "4 (BC_7, pa27, bidir, X, 5, 1, " & "Z), " & "3 (BC_1, *, control, " & "1), " & "2 (BC_7, pa28, bidir, X, 3, 1, " & "Z), " & "1 (BC_1, *, control, " & "1), " & "0 (BC_7, pa29, bidir, X, 1, 1, " & "Z) "; end AT91SAM7X256;