-------------------------------------------------------------------------------- -- Freescale Boundary Scan Description Language -- -------------------------------------------------------------------------------- -- Boundary Scan Description Language (IEEE 1149.1b) -- -- -- -- Device : P2020 Revision 2.0 (and 2.1, 1.x) -- -- File Version : A -- -- File Name : P2020.R2A -- -- File created : Jan. 18, 2011 -- -- Package type : 689-pin TePBGAII -- -- Voltage Level : 1.0V -- -- BSDL_status : preliminary -- -- -- -------------------------------------------------------------------------------- -- Revision History: -- -- A - Same file P2020.R1C except for comment updates -- -- -- -- NOTE: Active low ports are designated with a "_B" suffix. -- -- -- -- NOTE: The IEEE 1149.1 standard optional instructions HIGHZ, CLAMP, and -- -- IDCODE are supported. -- -- -- -- NOTE: For assistance with this file, contact your sales office. -- -- -- -- WARNING : INCORRECT VOLTAGE SELECT SETTINGS CAN LEAD TO IRREVERSIBLE -- -- DEVICE DAMAGE. BVDD_VSEL(0), BVDD_VSEL(1), CVDD_VSEL(0), CVDD_VSEL(1), -- -- and LVDD_VSEL voltage selects must be correctly set to match BVDD, -- -- CVDD, and LVDD power levels. -- -- -- -- The VSELs are to be set as follows. -- -- -- -- Voltage Select Setting Supply Voltage -- -- BVDD_VSEL[0:1] 00 BVDD = 3.3V -- -- 01 BVDD = 2.5V -- -- 10 BVDD = 1.8V -- -- 11 BVDD = 3.3V -- -- -- -- CVDD_VSEL[0:1] 00 CVDD = 3.3V -- -- 01 CVDD = 2.5V -- -- 10 CVDD = 1.8V -- -- 11 CVDD = 3.3V -- -- -- -- LVDD_VSEL 0 LVDD = 3.3V -- -- 1 LVDD = 2.5V -- -- -- -- Refer to the Hardware Spec for more details. -- -------------------------------------------------------------------------------- -- -- -------------------------------------------------------------------------------- -- -- --============================================================================-- -- IMPORTANT NOTICE -- -- This information is provided on an AS IS basis and without warranty. -- -- IN NO EVENT SHALL FREESCALE BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL -- -- DAMAGES ARISING FROM USE OF THIS INFORMATION. THIS DISCLAIMER OF -- -- WARRANTY EXTENDS TO THE USER OF THE INFORMATION, AND TO THEIR CUSTOMERS -- -- OR USERS OF PRODUCTS AND IS IN LIEU OF ALL WARRANTIES WHETHER EXPRESS, -- -- IMPLIED, OR STATUTORY, INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY -- -- OR FITNESS FOR PARTICULAR PURPOSE. -- -- -- -- FREESCALE does not represent or warrant that the information furnished -- -- hereunder is free of infringement of any third party patents, -- -- copyrights, trade secrets, or other intellectual property rights. -- -- -- -- FREESCALE does not represent or warrant that the information is free of -- -- defect, or that it meets any particular standard, requirements or need -- -- of the user of the infomation or their customers. -- -- -- -- FREESCALE reserves the right to change the information in this file -- -- without notice. The BSDL files are also available at: -- -- -- -- http://www.freescale.com -- -- -- --============================================================================-- entity P2020 is generic(PHYSICAL_PIN_MAP : string := "PBGA"); -- PORT DESCRIPTION TERMS -- in = input only -- out = three-state output (0, Z, 1) -- buffer = two-state output (0, 1) -- inout = bidirectional -- linkage = OTHER (vdd, vss, analog) -- bit = single pin -- bit_vector = group of pins with suffix 0 to n port( TDI : in bit; TDO : out bit; TMS : in bit; TCK : in bit; TRST_B : in bit; SCAN_MODE_B : in bit; TEST_SEL_B : in bit; BVDD_VSEL : in bit_vector(0 to 1); CVDD_VSEL : in bit_vector(0 to 1); LVDD_VSEL : in bit; ASLEEP : inout bit; CKSTP_IN_B : in bit_vector(0 to 1); CKSTP_OUT_B : out bit_vector(0 to 1); CLK_OUT : out bit; DDRCLK : in bit; DMA1_DACK_B : inout bit; DMA1_DDONE_B : inout bit; DMA1_DREQ_B : inout bit; DMA2_DACK_B : inout bit; DMA2_DDONE_B : inout bit; DMA2_DREQ_B : inout bit; EC_GTX_CLK125 : in bit; EC_MDC : inout bit; EC_MDIO : inout bit; GPIO : inout bit_vector(0 to 15); HRESET_B : in bit; HRESET_REQ_B : inout bit; IIC1_SCL : inout bit; IIC1_SDA : inout bit; IIC2_SCL : inout bit; IIC2_SDA : inout bit; IRQ : in bit_vector(0 to 5); IRQ_6 : inout bit; IRQ_OUT_B : out bit; LA : inout bit_vector(16 to 31); LAD : inout bit_vector(0 to 15); LALE : inout bit; LBCTL : inout bit; LCLK : inout bit_vector(0 to 1); LCS_B : inout bit_vector(0 to 7); LDP : inout bit_vector(0 to 1); LGPL : inout bit_vector(0 to 5); LSYNC_IN : in bit; LSYNC_OUT : inout bit; LWE_B : inout bit_vector(0 to 1); MA : inout bit_vector(0 to 15); MAPAR_ERR_B : in bit; MAPAR_OUT : inout bit; MBA : inout bit_vector(0 to 2); MCAS_B : inout bit; MCKE : inout bit_vector(0 to 3); MCK : inout bit_vector(0 to 5); MCK_B : inout bit_vector(0 to 5); MCP_B : in bit_vector(0 to 1); MCS_B : inout bit_vector(0 to 3); MDIC : inout bit_vector(0 to 1); MDM : inout bit_vector(0 to 8); MDQ : inout bit_vector(0 to 63); MDQS : inout bit_vector(0 to 8); MDQS_B : inout bit_vector(0 to 8); MDVAL : inout bit; MECC : inout bit_vector(0 to 7); MODT : inout bit_vector(0 to 3); MRAS_B : inout bit; MSRCID : inout bit_vector(0 to 4); MWE_B : inout bit; READY_P1 : inout bit; RTC : in bit; SDHC_CLK : inout bit; SDHC_CMD : inout bit; SDHC_DAT : inout bit_vector(0 to 3); SD_RX : in bit_vector(3 downto 0); SD_RX_B : in bit_vector(3 downto 0); SD_TX : out bit_vector(3 downto 0); SD_TX_B : out bit_vector(3 downto 0); SD_REF_CLK : in bit; SD_REF_CLK_B : in bit; SPI_CLK : inout bit; SPI_CS_B : inout bit_vector(0 to 3); SPI_MISO : in bit; SPI_MOSI : inout bit; SRESET_B : in bit; SYSCLK : in bit; TRIG_IN : in bit; TRIG_OUT : inout bit; TSEC_1588_ALARM_OUT : inout bit_vector(1 to 2); TSEC_1588_CLK_IN : in bit; TSEC_1588_CLK_OUT : inout bit; TSEC_1588_PULSE_OUT : inout bit_vector(0 to 1); TSEC_1588_TRIG_IN : in bit_vector(0 to 1); TSEC1_COL : in bit; TSEC1_CRS : inout bit; TSEC1_GTX_CLK : inout bit; TSEC1_RX_CLK : in bit; TSEC1_RXD : in bit_vector(7 downto 0); TSEC1_RX_DV : in bit; TSEC1_RX_ER : in bit; TSEC1_TX_CLK : in bit; TSEC1_TXD : inout bit_vector(7 downto 0); TSEC1_TX_EN : inout bit; TSEC1_TX_ER : inout bit; TSEC2_COL : in bit; TSEC2_CRS : inout bit; TSEC2_GTX_CLK : inout bit; TSEC2_RX_CLK : in bit; TSEC2_RXD : in bit_vector(7 downto 0); TSEC2_RX_DV : in bit; TSEC2_RX_ER : in bit; TSEC2_TX_CLK : in bit; TSEC2_TXD : inout bit_vector(7 downto 0); TSEC2_TX_EN : inout bit; TSEC2_TX_ER : inout bit; UART_CTS_B : in bit_vector(0 to 1); UART_RTS_B : inout bit_vector(0 to 1); UART_SIN : in bit_vector(0 to 1); UART_SOUT : inout bit_vector(0 to 1); UDE_B : in bit_vector(0 to 1); USB_CLK : in bit; USB_D : inout bit_vector(7 downto 0); USB_DIR : inout bit; USB_NXT : inout bit; USB_PWRFAULT : inout bit; USB_STP : inout bit; -- Linkage pins SD_IMP_CAL_RX : linkage bit; SD_IMP_CAL_TX : linkage bit; SD_PLL_TPA : linkage bit; SD_PLL_TPD : linkage bit; VDD : linkage bit_vector(0 to 33); VSS : linkage bit_vector(0 to 148); BVDD : linkage bit_vector(0 to 6); CVDD : linkage bit_vector(0 to 2); LVDD : linkage bit_vector(0 to 8); POVDD : linkage bit; OVDD : linkage bit_vector(0 to 5); GVDD : linkage bit_vector(0 to 34); AVDD_CORE : linkage bit_vector(0 to 1); AVDD_DDR : linkage bit; AVDD_PLAT : linkage bit; AVDD_LBIU : linkage bit; AGND_SRDS : linkage bit; AVDD_SRDS : linkage bit; SVDD : linkage bit_vector(0 to 5); SVSS : linkage bit_vector(0 to 10); XVDD : linkage bit_vector(0 to 5); XGND_SRDS : linkage bit_vector(0 to 7); MVREF : linkage bit; NC : linkage bit_vector(0 to 12) ); use STD_1149_1_2001.all; attribute COMPONENT_CONFORMANCE of P2020 : entity is "STD_1149_1_2001"; attribute PIN_MAP of P2020 : entity is PHYSICAL_PIN_MAP; constant PBGA: PIN_MAP_STRING := "TRST_B : V26,"& "TCK : V29,"& "TMS : U26,"& "TDI : T25,"& "TDO : V28,"& "SCAN_MODE_B : W27,"& "ASLEEP : U25,"& "CKSTP_IN_B : ( AA29, AB29),"& "CKSTP_OUT_B : ( V25, Y27),"& "CLK_OUT : T24,"& "DDRCLK : AC9,"& "DMA1_DACK_B : T28,"& "DMA1_DDONE_B : T26,"& "DMA1_DREQ_B : Y28,"& "DMA2_DACK_B : T29,"& "DMA2_DDONE_B : Y29,"& "DMA2_DREQ_B : W28,"& "EC_GTX_CLK125 : AF24,"& "EC_MDC : AD20,"& "EC_MDIO : AJ21,"& "GPIO : ( R28, R26, P29, N24, U29, R24, R29, R25, F22, A24,"& " A25, D24, F23, E23, F24, E24),"& "HRESET_B : W25,"& "HRESET_REQ_B : U24,"& "IIC1_SCL : G27,"& "IIC1_SDA : H28,"& "IIC2_SCL : H25,"& "IIC2_SDA : H26,"& "IRQ : ( L24, K26, K29, N25, L26, L29),"& "IRQ_6 : K27,"& "IRQ_OUT_B : N29,"& "LA : ( B21, A22, C21, F21, E12, A21, D11, E22, F20, E21,"& " B22, F18, A23, B23, C23, D23),"& "LAD : ( B18, E20, A19, B20, D19, A18, B17, C20, F19, E10,"& " B16, D14, D17, E11, A16, C15),"& "LALE : C17,"& "LBCTL : E17,"& "LCLK : ( B15, A15),"& "LCS_B : ( D20, A12, E19, D21, F11, D15, D13, A17),"& "LDP : ( E18, B19),"& "LGPL : ( B12, C13, A20, D10, B13, C19),"& "LSYNC_IN : A13,"& "LSYNC_OUT : A14,"& "LWE_B : ( F12, D12),"& "MA : ( L6, M2, M1, M5, N1, P1, N4, P3, P2, R1,"& " K6, R4, T5, J5, T3, U4),"& "MAPAR_ERR_B : N5,"& "MAPAR_OUT : R5,"& "MBA : ( K5, L5, T4),"& "MCAS_B : J3,"& "MCK : ( U2, AD8, D4, T2, AC6, F5),"& "MCK_B : ( U1, AD7, D5, T1, AC5, F6),"& "MCKE : ( U5, V1, U6, V2),"& "MCP_B : ( AA27, M25),"& "MCS_B : ( J2, J6, J1, G2),"& "MDIC : ( C10, F10),"& "MDM : ( AH7, AE7, AH1, AC1, G1, C2, F8, A7, AA4),"& "MDQ : ( AJ8, AH8, AH5, AJ4, AJ9, AH9, AH6, AJ5, AF8, AE8,"& " AF5, AG4, AG9, AF9, AE6, AE5, AH3, AH2, AE1, AE2,"& " AH4, AJ3, AF2, AF1, AD4, AC4, Y5, W5, AF3, AE4,"& " AB5, Y4, G4, G3, E2, E4, H5, H4, F2, E1,"& " C1, C3, B4, A4, D1, D2, B3, A3, C5, E6,"& " D9, E9, C4, E5, E8, D8, A6, B7, B10, A11,"& " A5, B6, B9, A10),"& "MDQS : ( AJ6, AF6, AG2, AB3, F3, B2, D7, A9, AA1),"& "MDQS_B : ( AJ7, AF7, AG1, AB4, F4, B1, D6, A8, AB1),"& "MDVAL : M24,"& "MECC : ( AD2, AC2, W1, V3, AB2, AD1, Y1, V6),"& "MODT : ( H1, H6, J4, F1),"& "MRAS_B : K1,"& "MSRCID : ( P28, R27, P27, P26, N26),"& "MVREF : R6,"& "MWE_B : K2,"& "READY_P1 : W26,"& "RTC : K24,"& "SDHC_CLK : G29,"& "SDHC_CMD : F26,"& "SDHC_DAT : ( G28, F27, G25, G26),"& "SD_IMP_CAL_RX : AG11,"& "SD_IMP_CAL_TX : AF19,"& "SD_PLL_TPA : AD16,"& "SD_PLL_TPD : AE15,"& "SD_REF_CLK : AG15,"& "SD_REF_CLK_B : AF15,"& "SD_RX : ( AH18, AH16, AH14, AH12),"& "SD_RX_B : ( AJ18, AJ16, AJ14, AJ12),"& "SD_TX : ( AD18, AE17, AE13, AD12),"& "SD_TX_B : ( AE18, AF17, AF13, AE12),"& "SPI_CLK : D29,"& "SPI_CS_B : ( D28, E26, F29, E29),"& "SPI_MISO : F28,"& "SPI_MOSI : F25,"& "SRESET_B : W24,"& "SYSCLK : W29,"& "TEST_SEL_B : AA28,"& "TRIG_IN : AB28,"& "TRIG_OUT : U28,"& "TSEC_1588_ALARM_OUT : ( AE20, AJ20),"& "TSEC_1588_CLK_IN : AG21,"& "TSEC_1588_CLK_OUT : AG22,"& "TSEC_1588_PULSE_OUT : ( AH21, AJ22),"& "TSEC_1588_TRIG_IN : ( AH20, AG20),"& "TSEC1_COL : AH26,"& "TSEC1_CRS : AJ27,"& "TSEC1_GTX_CLK : AG25,"& "TSEC1_RX_CLK : AG26,"& "TSEC1_RXD : ( AG23, AH22, AJ23, AE24, AJ28, AE22, AD21, AH25),"& "TSEC1_RX_DV : AJ26,"& "TSEC1_RX_ER : AH23,"& "TSEC1_TX_CLK : AJ24,"& "TSEC1_TXD : ( AF22, AD22, AD23, AE21, AJ25, AH28, AE25, AD24),"& "TSEC1_TX_EN : AH24,"& "TSEC1_TX_ER : AF23,"& "TSEC2_COL : AE27,"& "TSEC2_CRS : AD25,"& "TSEC2_GTX_CLK : AG28,"& "TSEC2_RX_CLK : AC29,"& "TSEC2_RXD : ( AD27, AB26, AC26, AD26, AB27, AD28, AF29, AF28),"& "TSEC2_RX_DV : AD29,"& "TSEC2_RX_ER : AE28,"& "TSEC2_TX_CLK : AA24,"& "TSEC2_TXD : ( AE26, AF26, AB24, AB25, AG29, AA25, AF27, Y24),"& "TSEC2_TX_EN : AA26,"& "TSEC2_TX_ER : AE29,"& "UART_CTS_B : ( J28, H24),"& "UART_RTS_B : ( J29, J24),"& "UART_SIN : ( H29, G24),"& "UART_SOUT : ( J26, J25),"& "UDE_B : ( J27, K28),"& "USB_CLK : D27,"& "USB_D : ( C28, C25, B28, B25, D26, A27, A26, C26),"& "USB_DIR : A28,"& "USB_NXT : B26,"& "USB_PWRFAULT : C29,"& "USB_STP : B29,"& "VDD : ( K10, K11, K12, K13, K14, K15, K16, K17, K18, K19,"& " K20, L10, L20, M10, M20, N10, N20, P10, P20, R10,"& " R20, T10, T20, U10, U20, V10, V20, W10, W20, Y11,"& " Y12, Y18, Y19, Y20),"& "VSS : ( A1, A29, AA23, AA6, AC10, AC20, AC24, AC28, AC3, AD3,"& " AD6, AE9, AF20, AG24, AG27, AG3, AG5, AG7, AJ1, AJ29,"& " B14, B27, B5, C11, C18, C24, C6, C8, D16, D22,"& " D25, E28, E3, F7, G21, G5, G9, H27, H3, J23,"& " J7, K25, K4, L1, L11, L12, L13, L14, L15, L16,"& " L17, L18, L19, M11, M12, M13, M14, M15, M16, M17,"& " M18, M19, M26, M3, M4, M6, N11, N12, N13, N14,"& " N15, N16, N17, N18, N19, N2, N28, P11, P12, P13,"& " P14, P15, P16, P17, P18, P19, P24, P5, R11, R12,"& " R13, R14, R15, R16, R17, R18, R19, R3, T11, T12,"& " T13, T14, T15, T16, T17, T18, T19, T27, T6, U11,"& " U12, U13, U14, U15, U16, U17, U18, U19, V11, V12,"& " V13, V14, V15, V16, V17, V18, V19, V27, V4, W11,"& " W12, W13, W14, W15, W16, W17, W18, W19, W2, W4,"& " Y13, Y17, Y25, Y3, Y6, Y7, AD10, AJ10, AH10),"& "SVDD : ( AG16, AH13, AH17, AJ11, AJ15, AJ19),"& "SVSS : ( AG12, AG13, AG14, AG17, AG18, AG19, AH11, AH15, AH19, AJ13, AJ17),"& "XVDD : ( AD13, AD17, AE11, AE19, AF14, AF16),"& "AVDD_CORE : ( F15, F16),"& "AVDD_DDR : Y10,"& "AVDD_LBIU : F14,"& "AVDD_PLAT : V24,"& "BVDD : ( B24, C12, C14, C16, C22, D18, G20),"& "CVDD : ( C27, E25, E27),"& "LVDD : ( AC21, AC25, AC27, AE23, AF21, AF25, AH27, AH29, Y23),"& "BVDD_VSEL : ( M29, M27),"& "CVDD_VSEL : ( L28, L27),"& "LVDD_VSEL : M28,"& "GVDD : ( A2, AA2, AA3, AA5, AA7, AB6, AD5, AD9, AE3, AF4,"& " AG6, AG8, AJ2, B11, B8, C7, C9, D3, E7, F9,"& " G10, H2, K3, K7, L2, L3, L4, N3, N6, P4,"& " R2, U3, V5, W3, Y2),"& "AVDD_SRDS : AD14,"& "AGND_SRDS : AD15,"& "XGND_SRDS : ( AD11, AD19, AE14, AE16, AF11, AF12, AF18, AG10),"& "OVDD : ( K23, L25, N27, P25, U27, Y26),"& "POVDD : F17,"& "NC : ( AE10, AF10, E13, E14, W6, Y14, Y15, Y16, G6, E16, E15, F13, P6)"; attribute PORT_GROUPING of P2020 : entity is "Differential_Voltage ("& "(MDQS(0), MDQS_B(0)),"& "(MDQS(1), MDQS_B(1)),"& "(MDQS(2), MDQS_B(2)),"& "(MDQS(3), MDQS_B(3)),"& "(MDQS(4), MDQS_B(4)),"& "(MDQS(5), MDQS_B(5)),"& "(MDQS(6), MDQS_B(6)),"& "(MDQS(7), MDQS_B(7)),"& "(MDQS(8), MDQS_B(8)),"& "(MCK(0), MCK_B(0)),"& "(MCK(1), MCK_B(1)),"& "(MCK(2), MCK_B(2)),"& "(MCK(3), MCK_B(3)),"& "(MCK(4), MCK_B(4)),"& "(MCK(5), MCK_B(5)),"& "(SD_TX(0), SD_TX_B(0)),"& "(SD_TX(1), SD_TX_B(1)),"& "(SD_TX(2), SD_TX_B(2)),"& "(SD_TX(3), SD_TX_B(3)),"& "(SD_RX(0), SD_RX_B(0)),"& "(SD_RX(1), SD_RX_B(1)),"& "(SD_RX(2), SD_RX_B(2)),"& "(SD_RX(3), SD_RX_B(3)),"& "(SD_REF_CLK, SD_REF_CLK_B))"; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (30.0e6, BOTH); attribute TAP_SCAN_RESET of TRST_B : signal is true; -- The BVDD_VSEL(0), BVDD_VSEL(1), CVDD_VSEL(0), CVDD_VSEL(1), and LVDD_VSEL voltage -- selects must be correctly set to match BVDD, CVDD, and LVDD power levels. -- INCORRECT VOLTAGE SELECT SETTINGS CAN LEAD TO IRREVERSIBLE DEVICE DAMAGE. attribute COMPLIANCE_PATTERNS of P2020 : entity is "(SCAN_MODE_B, TEST_SEL_B, BVDD_VSEL(0), BVDD_VSEL(1),"& " CVDD_VSEL(0), CVDD_VSEL(1), LVDD_VSEL) (11XXXXX)"; attribute INSTRUCTION_LENGTH of P2020 : entity is 8; attribute INSTRUCTION_OPCODE of P2020 : entity is -- Public instructions: "EXTEST (00000000), "& -- Hex 00 "SAMPLE (11110000), "& -- Hex F0 "PRELOAD (11110000), "& -- Hex F0 "BYPASS (11111111), "& -- Hex FF "HIGHZ (11110010), "& -- Hex F2 "IDCODE (11110011), "& -- Hex F3 "CLAMP (11110001), "& -- Hex F1 -- Private instructions: "PRIVATE000(11111110), "& -- Hex FE "PRIVATE001(00000101), "& -- Hex 05 "PRIVATE002(00000110), "& -- Hex 06 "PRIVATE003(00000111), "& -- Hex 07 "PRIVATE004(00000011), "& -- Hex 03 "PRIVATE005(00000100), "& -- Hex 04 "PRIVATE006(00110000), "& -- Hex 30 "PRIVATE007(00001010), "& -- Hex 0A "PRIVATE008(00111000), "& -- Hex 38 "PRIVATE009(00110100), "& -- Hex 34 "PRIVATE010(00110101), "& -- Hex 35 "PRIVATE011(00110110), "& -- Hex 36 "PRIVATE012(00110111), "& -- Hex 37 "PRIVATE013(01000100), "& -- Hex 44 "PRIVATE014(00001001), "& -- Hex 09 "PRIVATE015(00001011), "& -- Hex 0B "PRIVATE016(00001100), "& -- Hex 0C "PRIVATE017(00001110), "& -- Hex 0E "PRIVATE018(00010000), "& -- Hex 10 "PRIVATE019(00010001), "& -- Hex 11 "PRIVATE020(00010010), "& -- Hex 12 "PRIVATE021(00010011), "& -- Hex 13 "PRIVATE022(00010100), "& -- Hex 14 "PRIVATE023(11111010), "& -- Hex FA "PRIVATE024(00111001), "& -- Hex 39 "PRIVATE025(00110010), "& -- Hex 32 "PRIVATE026(11110100), "& -- Hex F4 "PRIVATE027(00110011), "& -- Hex 33 "PRIVATE028(01010000), "& -- Hex 50 "PRIVATE029(01010001), "& -- Hex 51 "PRIVATE030(01010010), "& -- Hex 52 "PRIVATE031(01010011), "& -- Hex 53 "PRIVATE032(01010100) "; -- Hex 54 attribute INSTRUCTION_CAPTURE of P2020 : entity is "xxxxxx01"; -- Use of some private opcodes can result in damage to the circuit, -- board, or system. attribute INSTRUCTION_PRIVATE of P2020 : entity is "PRIVATE000, PRIVATE001, PRIVATE002, PRIVATE003, "& "PRIVATE004, PRIVATE005, PRIVATE006, PRIVATE007, "& "PRIVATE008, PRIVATE009, PRIVATE010, PRIVATE011, "& "PRIVATE012, PRIVATE013, PRIVATE014, PRIVATE015, "& "PRIVATE016, PRIVATE017, PRIVATE018, PRIVATE019, "& "PRIVATE020, PRIVATE021, PRIVATE022, PRIVATE023, "& "PRIVATE024, PRIVATE025, PRIVATE026, PRIVATE027, "& "PRIVATE028, PRIVATE029, PRIVATE030, PRIVATE031, "& "PRIVATE032"; -- Hex value 000EA01D attribute IDCODE_REGISTER of P2020 : entity is "0000" & -- Version "0000000011100010" & -- Part number "00000001110" & -- Manufacturer Identity "1"; -- Mandatory LSB attribute REGISTER_ACCESS of P2020 : entity is "BYPASS(BYPASS),"& "BOUNDARY (SAMPLE)"; attribute BOUNDARY_LENGTH of P2020 : entity is 664; attribute BOUNDARY_REGISTER of P2020 : entity is -- PORT DESCRIPTION TERMS -- cell type: BC_6 bidirectional else BC_2 -- port: port name with index if port description says bit_vector -- function -- input = input only -- bidir = bidirectional -- control = control cell -- buffer = output only -- output3 = three state output -- observe_only = observe only -- safe = value in control cell to make input = 0 for bidir and controlr -- ccell = controlling cell number for I/O direction -- dsval = disabling (input) value -- rslt = result if disabled (input = Z) -- tdo = first cell shifted out during ShiftDR -- num cell port function safe ccell dsval rslt "0 (BC_2, TSEC1_RXD(3), input, X), "& "1 (BC_6, TSEC1_TXD(0), bidir, 0, 2, 0, Z), "& "2 (BC_2, *, control, 0), "& "3 (BC_6, TSEC1_TXD(1), bidir, 0, 4, 0, Z), "& "4 (BC_2, *, control, 0), "& "5 (BC_2, TSEC1_RX_CLK, input, X), "& "6 (BC_6, TSEC1_TXD(2), bidir, 0, 7, 0, Z), "& "7 (BC_2, *, control, 0), "& "8 (BC_6, TSEC2_TXD(5), bidir, 0, 9, 0, Z), "& "9 (BC_2, *, control, 0), "& "10 (BC_6, TSEC2_TXD(6), bidir, 0, 11, 0, Z), "& "11 (BC_2, *, control, 0), "& "12 (BC_6, TSEC2_GTX_CLK, bidir, 0, 13, 0, Z), "& "13 (BC_2, *, control, 0), "& "14 (BC_6, TSEC2_TXD(4), bidir, 0, 15, 0, Z), "& "15 (BC_2, *, control, 0), "& "16 (BC_6, TSEC2_TXD(3), bidir, 0, 17, 0, Z), "& "17 (BC_2, *, control, 0), "& "18 (BC_6, TSEC2_CRS, bidir, 0, 19, 0, Z), "& "19 (BC_2, *, control, 0), "& "20 (BC_6, TSEC2_TXD(2), bidir, 0, 21, 0, Z), "& "21 (BC_2, *, control, 0), "& "22 (BC_6, TSEC2_TXD(7), bidir, 0, 23, 0, Z), "& "23 (BC_2, *, control, 0), "& "24 (BC_2, TSEC2_RXD(1), input, X), "& "25 (BC_6, TSEC2_TXD(1), bidir, 0, 26, 0, Z), "& "26 (BC_2, *, control, 0), "& "27 (BC_2, TSEC2_RXD(0), input, X), "& "28 (BC_2, TSEC2_COL, input, X), "& "29 (BC_2, TSEC2_RXD(4), input, X), "& "30 (BC_2, TSEC2_RXD(7), input, X), "& "31 (BC_2, TSEC2_RXD(5), input, X), "& "32 (BC_6, TSEC2_TXD(0), bidir, 0, 33, 0, Z), "& "33 (BC_2, *, control, 0), "& "34 (BC_2, TSEC2_TX_CLK, input, X), "& "35 (BC_2, TSEC2_RXD(6), input, X), "& "36 (BC_2, TSEC2_RX_ER, input, X), "& "37 (BC_2, TSEC2_RXD(2), input, X), "& "38 (BC_6, TSEC2_TX_ER, bidir, 0, 39, 0, Z), "& "39 (BC_2, *, control, 0), "& "40 (BC_2, TSEC2_RX_DV, input, X), "& "41 (BC_6, TSEC2_TX_EN, bidir, 0, 42, 0, Z), "& "42 (BC_2, *, control, 0), "& "43 (BC_2, TSEC2_RXD(3), input, X), "& "44 (BC_2, TSEC2_RX_CLK, input, X), "& "45 (BC_2, TRIG_IN, input, X), "& "46 (BC_2, MCP_B(0), input, X), "& "47 (BC_2, CKSTP_IN_B(1), input, X), "& "48 (BC_2, CKSTP_OUT_B(1), output3, 0, 49, 0, Z), "& "49 (BC_2, *, control, 0), "& "50 (BC_2, SRESET_B, input, X), "& "51 (BC_2, HRESET_B, input, X), "& "52 (BC_6, READY_P1, bidir, 0, 53, 0, Z), "& "53 (BC_2, *, control, 0), "& "54 (BC_2, CKSTP_IN_B(0), input, X), "& "55 (BC_2, CKSTP_OUT_B(0), output3, 0, 56, 0, Z), "& "56 (BC_2, *, control, 0), "& "57 (BC_2, SYSCLK, input, X), "& "58 (BC_6, DMA1_DREQ_B, bidir, 0, 59, 0, Z), "& "59 (BC_2, *, control, 0), "& "60 (BC_6, DMA2_DREQ_B, bidir, 0, 61, 0, Z), "& "61 (BC_2, *, control, 0), "& "62 (BC_6, DMA2_DDONE_B, bidir, 0, 63, 0, Z), "& "63 (BC_2, *, control, 0), "& "64 (BC_6, ASLEEP, bidir, 0, 65, 0, Z), "& "65 (BC_2, *, control, 0), "& "66 (BC_2, CLK_OUT, output3, 0, 67, 0, Z), "& "67 (BC_2, *, control, 0), "& "68 (BC_6, GPIO(7), bidir, 0, 69, 0, Z), "& "69 (BC_2, *, control, 0), "& "70 (BC_6, HRESET_REQ_B, bidir, 0, 71, 0, Z), "& "71 (BC_2, *, control, 0), "& "72 (BC_6, GPIO(1), bidir, 0, 73, 0, Z), "& "73 (BC_2, *, control, 0), "& "74 (BC_6, DMA1_DDONE_B, bidir, 0, 75, 0, Z), "& "75 (BC_2, *, control, 0), "& "76 (BC_6, TRIG_OUT, bidir, 0, 77, 0, Z), "& "77 (BC_2, *, control, 0), "& "78 (BC_6, GPIO(4), bidir, 0, 79, 0, Z), "& "79 (BC_2, *, control, 0), "& "80 (BC_6, DMA1_DACK_B, bidir, 0, 81, 0, Z), "& "81 (BC_2, *, control, 0), "& "82 (BC_6, DMA2_DACK_B, bidir, 0, 83, 0, Z), "& "83 (BC_2, *, control, 0), "& "84 (BC_6, GPIO(5), bidir, 0, 85, 0, Z), "& "85 (BC_2, *, control, 0), "& "86 (BC_6, GPIO(0), bidir, 0, 87, 0, Z), "& "87 (BC_2, *, control, 0), "& "88 (BC_6, MSRCID(1), bidir, 0, 89, 0, Z), "& "89 (BC_2, *, control, 0), "& "90 (BC_6, GPIO(6), bidir, 0, 91, 0, Z), "& "91 (BC_2, *, control, 0), "& "92 (BC_6, GPIO(2), bidir, 0, 93, 0, Z), "& "93 (BC_2, *, control, 0), "& "94 (BC_6, MSRCID(2), bidir, 0, 95, 0, Z), "& "95 (BC_2, *, control, 0), "& "96 (BC_6, MSRCID(0), bidir, 0, 97, 0, Z), "& "97 (BC_2, *, control, 0), "& "98 (BC_6, MSRCID(3), bidir, 0, 99, 0, Z), "& "99 (BC_2, *, control, 0), "& "100 (BC_2, IRQ(3), input, X), "& "101 (BC_6, GPIO(3), bidir, 0, 102, 0, Z), "& "102 (BC_2, *, control, 0), "& "103 (BC_6, MSRCID(4), bidir, 0, 104, 0, Z), "& "104 (BC_2, *, control, 0), "& "105 (BC_2, IRQ_OUT_B, output3, 0, 106, 0, Z), "& "106 (BC_2, *, control, 0), "& "107 (BC_2, MCP_B(1), input, X), "& "108 (BC_6, MDVAL, bidir, 0, 109, 0, Z), "& "109 (BC_2, *, control, 0), "& "110 (BC_2, IRQ(5), input, X), "& "111 (BC_2, IRQ(1), input, X), "& "112 (BC_2, IRQ(4), input, X), "& "113 (BC_6, IRQ_6, bidir, 0, 114, 0, Z), "& "114 (BC_2, *, control, 0), "& "115 (BC_2, IRQ(0), input, X), "& "116 (BC_2, IRQ(2), input, X), "& "117 (BC_2, RTC, input, X), "& "118 (BC_2, UDE_B(1), input, X), "& "119 (BC_2, UDE_B(0), input, X), "& "120 (BC_6, UART_RTS_B(1), bidir, 0, 121, 0, Z), "& "121 (BC_2, *, control, 0), "& "122 (BC_6, UART_SOUT(1), bidir, 0, 123, 0, Z), "& "123 (BC_2, *, control, 0), "& "124 (BC_6, UART_SOUT(0), bidir, 0, 125, 0, Z), "& "125 (BC_2, *, control, 0), "& "126 (BC_2, UART_CTS_B(0), input, X), "& "127 (BC_2, UART_CTS_B(1), input, X), "& "128 (BC_6, UART_RTS_B(0), bidir, 0, 129, 0, Z), "& "129 (BC_2, *, control, 0), "& "130 (BC_2, UART_SIN(0), input, X), "& "131 (BC_2, UART_SIN(1), input, X), "& "132 (BC_6, IIC2_SCL, bidir, 0, 133, 0, Z), "& "133 (BC_2, *, control, 0), "& "134 (BC_6, IIC2_SDA, bidir, 0, 135, 0, Z), "& "135 (BC_2, *, control, 0), "& "136 (BC_6, IIC1_SDA, bidir, 0, 137, 0, Z), "& "137 (BC_2, *, control, 0), "& "138 (BC_6, IIC1_SCL, bidir, 0, 139, 0, Z), "& "139 (BC_2, *, control, 0), "& "140 (BC_6, SDHC_DAT(2), bidir, 0, 141, 0, Z), "& "141 (BC_2, *, control, 0), "& "142 (BC_6, SDHC_DAT(3), bidir, 0, 143, 0, Z), "& "143 (BC_2, *, control, 0), "& "144 (BC_6, SDHC_DAT(0), bidir, 0, 145, 0, Z), "& "145 (BC_2, *, control, 0), "& "146 (BC_6, SDHC_CLK, bidir, 0, 147, 0, Z), "& "147 (BC_2, *, control, 0), "& "148 (BC_6, SDHC_DAT(1), bidir, 0, 149, 0, Z), "& "149 (BC_2, *, control, 0), "& "150 (BC_6, SDHC_CMD, bidir, 0, 151, 0, Z), "& "151 (BC_2, *, control, 0), "& "152 (BC_2, SPI_MISO, input, X), "& "153 (BC_6, SPI_CS_B(2), bidir, 0, 154, 0, Z), "& "154 (BC_2, *, control, 0), "& "155 (BC_6, SPI_CS_B(1), bidir, 0, 156, 0, Z), "& "156 (BC_2, *, control, 0), "& "157 (BC_6, SPI_CS_B(3), bidir, 0, 158, 0, Z), "& "158 (BC_2, *, control, 0), "& "159 (BC_6, SPI_CS_B(0), bidir, 0, 160, 0, Z), "& "160 (BC_2, *, control, 0), "& "161 (BC_6, SPI_MOSI, bidir, 0, 162, 0, Z), "& "162 (BC_2, *, control, 0), "& "163 (BC_6, SPI_CLK, bidir, 0, 164, 0, Z), "& "164 (BC_2, *, control, 0), "& "165 (BC_2, USB_CLK, input, X), "& "166 (BC_6, USB_PWRFAULT, bidir, 0, 167, 0, Z), "& "167 (BC_2, *, control, 0), "& "168 (BC_6, USB_STP, bidir, 0, 169, 0, Z), "& "169 (BC_2, *, control, 0), "& "170 (BC_6, USB_D(7), bidir, 0, 171, 0, Z), "& "171 (BC_2, *, control, 0), "& "172 (BC_6, USB_D(6), bidir, 0, 173, 0, Z), "& "173 (BC_2, *, control, 0), "& "174 (BC_6, USB_D(5), bidir, 0, 175, 0, Z), "& "175 (BC_2, *, control, 0), "& "176 (BC_6, USB_DIR, bidir, 0, 177, 0, Z), "& "177 (BC_2, *, control, 0), "& "178 (BC_6, USB_D(2), bidir, 0, 179, 0, Z), "& "179 (BC_2, *, control, 0), "& "180 (BC_6, USB_D(3), bidir, 0, 181, 0, Z), "& "181 (BC_2, *, control, 0), "& "182 (BC_6, USB_D(0), bidir, 0, 183, 0, Z), "& "183 (BC_2, *, control, 0), "& "184 (BC_6, USB_NXT, bidir, 0, 185, 0, Z), "& "185 (BC_2, *, control, 0), "& "186 (BC_6, USB_D(4), bidir, 0, 187, 0, Z), "& "187 (BC_2, *, control, 0), "& "188 (BC_6, USB_D(1), bidir, 0, 189, 0, Z), "& "189 (BC_2, *, control, 0), "& "190 (BC_6, GPIO(13), bidir, 0, 191, 0, Z), "& "191 (BC_2, *, control, 0), "& "192 (BC_6, GPIO(14), bidir, 0, 193, 0, Z), "& "193 (BC_2, *, control, 0), "& "194 (BC_6, GPIO(15), bidir, 0, 195, 0, Z), "& "195 (BC_2, *, control, 0), "& "196 (BC_6, GPIO(12), bidir, 0, 197, 0, Z), "& "197 (BC_2, *, control, 0), "& "198 (BC_6, GPIO(10), bidir, 0, 199, 0, Z), "& "199 (BC_2, *, control, 0), "& "200 (BC_6, GPIO(11), bidir, 0, 201, 0, Z), "& "201 (BC_2, *, control, 0), "& "202 (BC_6, GPIO(9), bidir, 0, 203, 0, Z), "& "203 (BC_2, *, control, 0), "& "204 (BC_6, GPIO(8), bidir, 0, 205, 0, Z), "& "205 (BC_2, *, control, 0), "& "206 (BC_6, LA(31), bidir, 0, 207, 0, Z), "& "207 (BC_2, *, control, 0), "& "208 (BC_6, LA(19), bidir, 0, 209, 0, Z), "& "209 (BC_2, *, control, 0), "& "210 (BC_6, LA(23), bidir, 0, 211, 0, Z), "& "211 (BC_2, *, control, 0), "& "212 (BC_6, LA(30), bidir, 0, 213, 0, Z), "& "213 (BC_2, *, control, 0), "& "214 (BC_6, LA(29), bidir, 0, 215, 0, Z), "& "215 (BC_2, *, control, 0), "& "216 (BC_6, LA(24), bidir, 0, 217, 0, Z), "& "217 (BC_2, *, control, 0), "& "218 (BC_6, LA(28), bidir, 0, 219, 0, Z), "& "219 (BC_2, *, control, 0), "& "220 (BC_6, LAD(8), bidir, 0, 221, 0, Z), "& "221 (BC_2, *, control, 0), "& "222 (BC_6, LA(26), bidir, 0, 223, 0, Z), "& "223 (BC_2, *, control, 0), "& "224 (BC_6, LA(25), bidir, 0, 225, 0, Z), "& "225 (BC_2, *, control, 0), "& "226 (BC_6, LA(17), bidir, 0, 227, 0, Z), "& "227 (BC_2, *, control, 0), "& "228 (BC_6, LCS_B(3), bidir, 0, 229, 0, Z), "& "229 (BC_2, *, control, 0), "& "230 (BC_6, LA(18), bidir, 0, 231, 0, Z), "& "231 (BC_2, *, control, 0), "& "232 (BC_6, LA(16), bidir, 0, 233, 0, Z), "& "233 (BC_2, *, control, 0), "& "234 (BC_6, LA(27), bidir, 0, 235, 0, Z), "& "235 (BC_2, *, control, 0), "& "236 (BC_6, LA(21), bidir, 0, 237, 0, Z), "& "237 (BC_2, *, control, 0), "& "238 (BC_6, LAD(1), bidir, 0, 239, 0, Z), "& "239 (BC_2, *, control, 0), "& "240 (BC_6, LCS_B(0), bidir, 0, 241, 0, Z), "& "241 (BC_2, *, control, 0), "& "242 (BC_6, LCS_B(2), bidir, 0, 243, 0, Z), "& "243 (BC_2, *, control, 0), "& "244 (BC_6, LAD(7), bidir, 0, 245, 0, Z), "& "245 (BC_2, *, control, 0), "& "246 (BC_6, LDP(0), bidir, 0, 247, 0, Z), "& "247 (BC_2, *, control, 0), "& "248 (BC_6, LAD(3), bidir, 0, 249, 0, Z), "& "249 (BC_2, *, control, 0), "& "250 (BC_6, LGPL(2), bidir, 0, 251, 0, Z), "& "251 (BC_2, *, control, 0), "& "252 (BC_6, LAD(4), bidir, 0, 253, 0, Z), "& "253 (BC_2, *, control, 0), "& "254 (BC_6, LGPL(5), bidir, 0, 255, 0, Z), "& "255 (BC_2, *, control, 0), "& "256 (BC_6, LBCTL, bidir, 0, 257, 0, Z), "& "257 (BC_2, *, control, 0), "& "258 (BC_6, LDP(1), bidir, 0, 259, 0, Z), "& "259 (BC_2, *, control, 0), "& "260 (BC_6, LAD(2), bidir, 0, 261, 0, Z), "& "261 (BC_2, *, control, 0), "& "262 (BC_6, LAD(12), bidir, 0, 263, 0, Z), "& "263 (BC_2, *, control, 0), "& "264 (BC_6, LAD(0), bidir, 0, 265, 0, Z), "& "265 (BC_2, *, control, 0), "& "266 (BC_6, LAD(5), bidir, 0, 267, 0, Z), "& "267 (BC_2, *, control, 0), "& "268 (BC_6, LALE, bidir, 0, 269, 0, Z), "& "269 (BC_2, *, control, 0), "& "270 (BC_6, LAD(6), bidir, 0, 271, 0, Z), "& "271 (BC_2, *, control, 0), "& "272 (BC_6, LCS_B(7), bidir, 0, 273, 0, Z), "& "273 (BC_2, *, control, 0), "& "274 (BC_6, LAD(10), bidir, 0, 275, 0, Z), "& "275 (BC_2, *, control, 0), "& "276 (BC_6, LAD(14), bidir, 0, 277, 0, Z), "& "277 (BC_2, *, control, 0), "& "278 (BC_6, LAD(15), bidir, 0, 279, 0, Z), "& "279 (BC_2, *, control, 0), "& "280 (BC_6, LCS_B(5), bidir, 0, 281, 0, Z), "& "281 (BC_2, *, control, 0), "& "282 (BC_6, LCLK(0), bidir, 0, 283, 0, Z), "& "283 (BC_2, *, control, 0), "& "284 (BC_6, LCLK(1), bidir, 0, 285, 0, Z), "& "285 (BC_2, *, control, 0), "& "286 (BC_6, LAD(11), bidir, 0, 287, 0, Z), "& "287 (BC_2, *, control, 0), "& "288 (BC_6, LSYNC_OUT, bidir, 0, 289, 0, Z), "& "289 (BC_2, *, control, 0), "& "290 (BC_6, LCS_B(6), bidir, 0, 291, 0, Z), "& "291 (BC_2, *, control, 0), "& "292 (BC_6, LGPL(1), bidir, 0, 293, 0, Z), "& "293 (BC_2, *, control, 0), "& "294 (BC_6, LGPL(4), bidir, 0, 295, 0, Z), "& "295 (BC_2, *, control, 0), "& "296 (BC_2, LSYNC_IN, input, X), "& "297 (BC_6, LA(20), bidir, 0, 298, 0, Z), "& "298 (BC_2, *, control, 0), "& "299 (BC_6, LCS_B(1), bidir, 0, 300, 0, Z), "& "300 (BC_2, *, control, 0), "& "301 (BC_6, LWE_B(0), bidir, 0, 302, 0, Z), "& "302 (BC_2, *, control, 0), "& "303 (BC_6, LGPL(0), bidir, 0, 304, 0, Z), "& "304 (BC_2, *, control, 0), "& "305 (BC_6, LCS_B(4), bidir, 0, 306, 0, Z), "& "306 (BC_2, *, control, 0), "& "307 (BC_6, LWE_B(1), bidir, 0, 308, 0, Z), "& "308 (BC_2, *, control, 0), "& "309 (BC_6, LA(22), bidir, 0, 310, 0, Z), "& "310 (BC_2, *, control, 0), "& "311 (BC_6, LAD(13), bidir, 0, 312, 0, Z), "& "312 (BC_2, *, control, 0), "& "313 (BC_6, LAD(9), bidir, 0, 314, 0, Z), "& "314 (BC_2, *, control, 0), "& "315 (BC_6, LGPL(3), bidir, 0, 316, 0, Z), "& "316 (BC_2, *, control, 0), "& "317 (BC_6, MDIC(1), bidir, 0, 318, 0, Z), "& "318 (BC_2, *, control, 0), "& "319 (BC_6, MDIC(0), bidir, 0, 320, 0, Z), "& "320 (BC_2, *, control, 0), "& "321 (BC_6, MDQ(59), bidir, 0, 322, 0, Z), "& "322 (BC_2, *, control, 0), "& "323 (BC_6, MDQ(58), bidir, 0, 324, 0, Z), "& "324 (BC_2, *, control, 0), "& "325 (BC_6, MDQ(63), bidir, 0, 326, 0, Z), "& "326 (BC_2, *, control, 0), "& "327 (BC_6, MDQ(62), bidir, 0, 328, 0, Z), "& "328 (BC_2, *, control, 0), "& "329 (BC_6, MDQS(7), bidir, 0, 330, 0, Z), "& "330 (BC_2, *, control, 0), "& "331 (BC_2, *, internal, X), "& "332 (BC_6, MDM(7), bidir, 0, 333, 0, Z), "& "333 (BC_2, *, control, 0), "& "334 (BC_6, MDQ(57), bidir, 0, 335, 0, Z), "& "335 (BC_2, *, control, 0), "& "336 (BC_6, MDQ(56), bidir, 0, 337, 0, Z), "& "337 (BC_2, *, control, 0), "& "338 (BC_6, MDQ(61), bidir, 0, 339, 0, Z), "& "339 (BC_2, *, control, 0), "& "340 (BC_6, MDQ(60), bidir, 0, 341, 0, Z), "& "341 (BC_2, *, control, 0), "& "342 (BC_2, *, internal, X), "& "343 (BC_6, MCK(5), bidir, 0, 344, 0, Z), "& "344 (BC_2, *, control, 0), "& "345 (BC_2, *, internal, X), "& "346 (BC_6, MCK(2), bidir, 0, 347, 0, Z), "& "347 (BC_2, *, control, 0), "& "348 (BC_6, MDQ(50), bidir, 0, 349, 0, Z), "& "349 (BC_2, *, control, 0), "& "350 (BC_6, MDQ(51), bidir, 0, 351, 0, Z), "& "351 (BC_2, *, control, 0), "& "352 (BC_6, MDQ(55), bidir, 0, 353, 0, Z), "& "353 (BC_2, *, control, 0), "& "354 (BC_6, MDQ(54), bidir, 0, 355, 0, Z), "& "355 (BC_2, *, control, 0), "& "356 (BC_6, MDM(6), bidir, 0, 357, 0, Z), "& "357 (BC_2, *, control, 0), "& "358 (BC_6, MDQS(6), bidir, 0, 359, 0, Z), "& "359 (BC_2, *, control, 0), "& "360 (BC_2, *, internal, X), "& "361 (BC_6, MDQ(49), bidir, 0, 362, 0, Z), "& "362 (BC_2, *, control, 0), "& "363 (BC_6, MDQ(48), bidir, 0, 364, 0, Z), "& "364 (BC_2, *, control, 0), "& "365 (BC_6, MDQ(52), bidir, 0, 366, 0, Z), "& "366 (BC_2, *, control, 0), "& "367 (BC_6, MDQ(53), bidir, 0, 368, 0, Z), "& "368 (BC_2, *, control, 0), "& "369 (BC_6, MDQ(42), bidir, 0, 370, 0, Z), "& "370 (BC_2, *, control, 0), "& "371 (BC_6, MDQ(43), bidir, 0, 372, 0, Z), "& "372 (BC_2, *, control, 0), "& "373 (BC_6, MDQ(46), bidir, 0, 374, 0, Z), "& "374 (BC_2, *, control, 0), "& "375 (BC_6, MDQ(47), bidir, 0, 376, 0, Z), "& "376 (BC_2, *, control, 0), "& "377 (BC_6, MDQ(41), bidir, 0, 378, 0, Z), "& "378 (BC_2, *, control, 0), "& "379 (BC_6, MDQS(5), bidir, 0, 380, 0, Z), "& "380 (BC_2, *, control, 0), "& "381 (BC_2, *, internal, X), "& "382 (BC_6, MDM(5), bidir, 0, 383, 0, Z), "& "383 (BC_2, *, control, 0), "& "384 (BC_6, MDQ(40), bidir, 0, 385, 0, Z), "& "385 (BC_2, *, control, 0), "& "386 (BC_6, MDQ(45), bidir, 0, 387, 0, Z), "& "387 (BC_2, *, control, 0), "& "388 (BC_6, MDQ(44), bidir, 0, 389, 0, Z), "& "389 (BC_2, *, control, 0), "& "390 (BC_6, MDQ(35), bidir, 0, 391, 0, Z), "& "391 (BC_2, *, control, 0), "& "392 (BC_6, MDQ(34), bidir, 0, 393, 0, Z), "& "393 (BC_2, *, control, 0), "& "394 (BC_6, MDQ(39), bidir, 0, 395, 0, Z), "& "395 (BC_2, *, control, 0), "& "396 (BC_6, MDQ(36), bidir, 0, 397, 0, Z), "& "397 (BC_2, *, control, 0), "& "398 (BC_6, MDQ(32), bidir, 0, 399, 0, Z), "& "399 (BC_2, *, control, 0), "& "400 (BC_2, *, internal, X), "& "401 (BC_6, MDQS(4), bidir, 0, 402, 0, Z), "& "402 (BC_2, *, control, 0), "& "403 (BC_6, MDQ(33), bidir, 0, 404, 0, Z), "& "404 (BC_2, *, control, 0), "& "405 (BC_6, MDQ(38), bidir, 0, 406, 0, Z), "& "406 (BC_2, *, control, 0), "& "407 (BC_6, MDQ(37), bidir, 0, 408, 0, Z), "& "408 (BC_2, *, control, 0), "& "409 (BC_6, MDM(4), bidir, 0, 410, 0, Z), "& "410 (BC_2, *, control, 0), "& "411 (BC_6, MODT(3), bidir, 0, 412, 0, Z), "& "412 (BC_2, *, control, 0), "& "413 (BC_6, MODT(1), bidir, 0, 414, 0, Z), "& "414 (BC_2, *, control, 0), "& "415 (BC_6, MODT(2), bidir, 0, 416, 0, Z), "& "416 (BC_2, *, control, 0), "& "417 (BC_6, MA(13), bidir, 0, 418, 0, Z), "& "418 (BC_2, *, control, 0), "& "419 (BC_6, MCS_B(3), bidir, 0, 420, 0, Z), "& "420 (BC_2, *, control, 0), "& "421 (BC_6, MCAS_B, bidir, 0, 422, 0, Z), "& "422 (BC_2, *, control, 0), "& "423 (BC_6, MCS_B(1), bidir, 0, 424, 0, Z), "& "424 (BC_2, *, control, 0), "& "425 (BC_6, MA(3), bidir, 0, 426, 0, Z), "& "426 (BC_2, *, control, 0), "& "427 (BC_6, MA(10), bidir, 0, 428, 0, Z), "& "428 (BC_2, *, control, 0), "& "429 (BC_6, MODT(0), bidir, 0, 430, 0, Z), "& "430 (BC_2, *, control, 0), "& "431 (BC_6, MBA(0), bidir, 0, 432, 0, Z), "& "432 (BC_2, *, control, 0), "& "433 (BC_6, MCS_B(0), bidir, 0, 434, 0, Z), "& "434 (BC_2, *, control, 0), "& "435 (BC_6, MCS_B(2), bidir, 0, 436, 0, Z), "& "436 (BC_2, *, control, 0), "& "437 (BC_6, MWE_B, bidir, 0, 438, 0, Z), "& "438 (BC_2, *, control, 0), "& "439 (BC_6, MA(0), bidir, 0, 440, 0, Z), "& "440 (BC_2, *, control, 0), "& "441 (BC_6, MRAS_B, bidir, 0, 442, 0, Z), "& "442 (BC_2, *, control, 0), "& "443 (BC_6, MBA(1), bidir, 0, 444, 0, Z), "& "444 (BC_2, *, control, 0), "& "445 (BC_6, MA(1), bidir, 0, 446, 0, Z), "& "446 (BC_2, *, control, 0), "& "447 (BC_6, MA(2), bidir, 0, 448, 0, Z), "& "448 (BC_2, *, control, 0), "& "449 (BC_6, MA(4), bidir, 0, 450, 0, Z), "& "450 (BC_2, *, control, 0), "& "451 (BC_6, MA(6), bidir, 0, 452, 0, Z), "& "452 (BC_2, *, control, 0), "& "453 (BC_6, MA(8), bidir, 0, 454, 0, Z), "& "454 (BC_2, *, control, 0), "& "455 (BC_6, MA(5), bidir, 0, 456, 0, Z), "& "456 (BC_2, *, control, 0), "& "457 (BC_2, MAPAR_ERR_B, input, X), "& "458 (BC_6, MAPAR_OUT, bidir, 0, 459, 0, Z), "& "459 (BC_2, *, control, 0), "& "460 (BC_6, MA(7), bidir, 0, 461, 0, Z), "& "461 (BC_2, *, control, 0), "& "462 (BC_6, MA(9), bidir, 0, 463, 0, Z), "& "463 (BC_2, *, control, 0), "& "464 (BC_6, MA(11), bidir, 0, 465, 0, Z), "& "465 (BC_2, *, control, 0), "& "466 (BC_6, MA(12), bidir, 0, 467, 0, Z), "& "467 (BC_2, *, control, 0), "& "468 (BC_6, MBA(2), bidir, 0, 469, 0, Z), "& "469 (BC_2, *, control, 0), "& "470 (BC_6, MA(14), bidir, 0, 471, 0, Z), "& "471 (BC_2, *, control, 0), "& "472 (BC_6, MCK(3), bidir, 0, 473, 0, Z), "& "473 (BC_2, *, control, 0), "& "474 (BC_2, *, internal, X), "& "475 (BC_6, MCK(0), bidir, 0, 476, 0, Z), "& "476 (BC_2, *, control, 0), "& "477 (BC_2, *, internal, X), "& "478 (BC_6, MA(15), bidir, 0, 479, 0, Z), "& "479 (BC_2, *, control, 0), "& "480 (BC_6, MCKE(0), bidir, 0, 481, 0, Z), "& "481 (BC_2, *, control, 0), "& "482 (BC_6, MCKE(2), bidir, 0, 483, 0, Z), "& "483 (BC_2, *, control, 0), "& "484 (BC_6, MCKE(1), bidir, 0, 485, 0, Z), "& "485 (BC_2, *, control, 0), "& "486 (BC_6, MCKE(3), bidir, 0, 487, 0, Z), "& "487 (BC_2, *, control, 0), "& "488 (BC_6, MECC(3), bidir, 0, 489, 0, Z), "& "489 (BC_2, *, control, 0), "& "490 (BC_6, MECC(7), bidir, 0, 491, 0, Z), "& "491 (BC_2, *, control, 0), "& "492 (BC_6, MECC(2), bidir, 0, 493, 0, Z), "& "493 (BC_2, *, control, 0), "& "494 (BC_6, MECC(6), bidir, 0, 495, 0, Z), "& "495 (BC_2, *, control, 0), "& "496 (BC_6, MDQS(8), bidir, 0, 497, 0, Z), "& "497 (BC_2, *, control, 0), "& "498 (BC_2, *, internal, X), "& "499 (BC_6, MDM(8), bidir, 0, 500, 0, Z), "& "500 (BC_2, *, control, 0), "& "501 (BC_6, MECC(1), bidir, 0, 502, 0, Z), "& "502 (BC_2, *, control, 0), "& "503 (BC_6, MECC(0), bidir, 0, 504, 0, Z), "& "504 (BC_2, *, control, 0), "& "505 (BC_6, MECC(4), bidir, 0, 506, 0, Z), "& "506 (BC_2, *, control, 0), "& "507 (BC_6, MECC(5), bidir, 0, 508, 0, Z), "& "508 (BC_2, *, control, 0), "& "509 (BC_6, MDQ(27), bidir, 0, 510, 0, Z), "& "510 (BC_2, *, control, 0), "& "511 (BC_6, MDQ(31), bidir, 0, 512, 0, Z), "& "512 (BC_2, *, control, 0), "& "513 (BC_6, MDQ(26), bidir, 0, 514, 0, Z), "& "514 (BC_2, *, control, 0), "& "515 (BC_6, MDM(3), bidir, 0, 516, 0, Z), "& "516 (BC_2, *, control, 0), "& "517 (BC_6, MDQS(3), bidir, 0, 518, 0, Z), "& "518 (BC_2, *, control, 0), "& "519 (BC_2, *, internal, X), "& "520 (BC_6, MDQ(30), bidir, 0, 521, 0, Z), "& "521 (BC_2, *, control, 0), "& "522 (BC_6, MDQ(25), bidir, 0, 523, 0, Z), "& "523 (BC_2, *, control, 0), "& "524 (BC_6, MDQ(24), bidir, 0, 525, 0, Z), "& "525 (BC_2, *, control, 0), "& "526 (BC_6, MDQ(28), bidir, 0, 527, 0, Z), "& "527 (BC_2, *, control, 0), "& "528 (BC_6, MDQ(29), bidir, 0, 529, 0, Z), "& "529 (BC_2, *, control, 0), "& "530 (BC_6, MDQ(18), bidir, 0, 531, 0, Z), "& "531 (BC_2, *, control, 0), "& "532 (BC_6, MDQ(19), bidir, 0, 533, 0, Z), "& "533 (BC_2, *, control, 0), "& "534 (BC_6, MDQ(23), bidir, 0, 535, 0, Z), "& "535 (BC_2, *, control, 0), "& "536 (BC_6, MDQ(22), bidir, 0, 537, 0, Z), "& "537 (BC_2, *, control, 0), "& "538 (BC_6, MDM(2), bidir, 0, 539, 0, Z), "& "539 (BC_2, *, control, 0), "& "540 (BC_2, *, internal, X), "& "541 (BC_6, MDQS(2), bidir, 0, 542, 0, Z), "& "542 (BC_2, *, control, 0), "& "543 (BC_6, MDQ(17), bidir, 0, 544, 0, Z), "& "544 (BC_2, *, control, 0), "& "545 (BC_6, MDQ(21), bidir, 0, 546, 0, Z), "& "546 (BC_2, *, control, 0), "& "547 (BC_6, MDQ(16), bidir, 0, 548, 0, Z), "& "548 (BC_2, *, control, 0), "& "549 (BC_6, MDQ(20), bidir, 0, 550, 0, Z), "& "550 (BC_2, *, control, 0), "& "551 (BC_2, *, internal, X), "& "552 (BC_6, MCK(4), bidir, 0, 553, 0, Z), "& "553 (BC_2, *, control, 0), "& "554 (BC_2, *, internal, X), "& "555 (BC_6, MCK(1), bidir, 0, 556, 0, Z), "& "556 (BC_2, *, control, 0), "& "557 (BC_6, MDQ(11), bidir, 0, 558, 0, Z), "& "558 (BC_2, *, control, 0), "& "559 (BC_6, MDQ(10), bidir, 0, 560, 0, Z), "& "560 (BC_2, *, control, 0), "& "561 (BC_6, MDQ(15), bidir, 0, 562, 0, Z), "& "562 (BC_2, *, control, 0), "& "563 (BC_6, MDQ(14), bidir, 0, 564, 0, Z), "& "564 (BC_2, *, control, 0), "& "565 (BC_6, MDQS(1), bidir, 0, 566, 0, Z), "& "566 (BC_2, *, control, 0), "& "567 (BC_2, *, internal, X), "& "568 (BC_6, MDM(1), bidir, 0, 569, 0, Z), "& "569 (BC_2, *, control, 0), "& "570 (BC_6, MDQ(12), bidir, 0, 571, 0, Z), "& "571 (BC_2, *, control, 0), "& "572 (BC_6, MDQ(9), bidir, 0, 573, 0, Z), "& "573 (BC_2, *, control, 0), "& "574 (BC_6, MDQ(13), bidir, 0, 575, 0, Z), "& "575 (BC_2, *, control, 0), "& "576 (BC_6, MDQ(8), bidir, 0, 577, 0, Z), "& "577 (BC_2, *, control, 0), "& "578 (BC_6, MDQ(3), bidir, 0, 579, 0, Z), "& "579 (BC_2, *, control, 0), "& "580 (BC_6, MDQ(2), bidir, 0, 581, 0, Z), "& "581 (BC_2, *, control, 0), "& "582 (BC_6, MDQ(7), bidir, 0, 583, 0, Z), "& "583 (BC_2, *, control, 0), "& "584 (BC_6, MDQ(6), bidir, 0, 585, 0, Z), "& "585 (BC_2, *, control, 0), "& "586 (BC_6, MDQS(0), bidir, 0, 587, 0, Z), "& "587 (BC_2, *, control, 0), "& "588 (BC_2, *, internal, X), "& "589 (BC_6, MDM(0), bidir, 0, 590, 0, Z), "& "590 (BC_2, *, control, 0), "& "591 (BC_6, MDQ(1), bidir, 0, 592, 0, Z), "& "592 (BC_2, *, control, 0), "& "593 (BC_6, MDQ(0), bidir, 0, 594, 0, Z), "& "594 (BC_2, *, control, 0), "& "595 (BC_6, MDQ(5), bidir, 0, 596, 0, Z), "& "596 (BC_2, *, control, 0), "& "597 (BC_6, MDQ(4), bidir, 0, 598, 0, Z), "& "598 (BC_2, *, control, 0), "& "599 (BC_2, DDRCLK, input, X), "& "600 (BC_6, EC_MDC, bidir, 0, 601, 0, Z), "& "601 (BC_2, *, control, 0), "& "602 (BC_6, TSEC_1588_ALARM_OUT(2), bidir, 0, 603, 0, Z), "& "603 (BC_2, *, control, 0), "& "604 (BC_6, EC_MDIO, bidir, 0, 605, 0, Z), "& "605 (BC_2, *, control, 0), "& "606 (BC_6, TSEC_1588_ALARM_OUT(1), bidir, 0, 607, 0, Z), "& "607 (BC_2, *, control, 0), "& "608 (BC_2, TSEC_1588_TRIG_IN(0), input, X), "& "609 (BC_2, TSEC_1588_TRIG_IN(1), input, X), "& "610 (BC_6, TSEC_1588_PULSE_OUT(1), bidir, 0, 611, 0, Z), "& "611 (BC_2, *, control, 0), "& "612 (BC_2, TSEC_1588_CLK_IN, input, X), "& "613 (BC_6, TSEC_1588_PULSE_OUT(0), bidir, 0, 614, 0, Z), "& "614 (BC_2, *, control, 0), "& "615 (BC_6, TSEC_1588_CLK_OUT, bidir, 0, 616, 0, Z), "& "616 (BC_2, *, control, 0), "& "617 (BC_6, TSEC1_TXD(4), bidir, 0, 618, 0, Z), "& "618 (BC_2, *, control, 0), "& "619 (BC_2, TSEC1_RXD(1), input, X), "& "620 (BC_2, TSEC1_RXD(6), input, X), "& "621 (BC_2, TSEC1_RXD(5), input, X), "& "622 (BC_2, TSEC1_RX_ER, input, X), "& "623 (BC_6, TSEC1_TXD(7), bidir, 0, 624, 0, Z), "& "624 (BC_2, *, control, 0), "& "625 (BC_6, TSEC1_TX_ER, bidir, 0, 626, 0, Z), "& "626 (BC_2, *, control, 0), "& "627 (BC_2, TSEC1_TX_CLK, input, X), "& "628 (BC_2, TSEC1_RXD(7), input, X), "& "629 (BC_6, TSEC1_TX_EN, bidir, 0, 630, 0, Z), "& "630 (BC_2, *, control, 0), "& "631 (BC_6, TSEC1_TXD(6), bidir, 0, 632, 0, Z), "& "632 (BC_2, *, control, 0), "& "633 (BC_2, TSEC1_RXD(2), input, X), "& "634 (BC_2, EC_GTX_CLK125, input, X), "& "635 (BC_6, TSEC1_TXD(3), bidir, 0, 636, 0, Z), "& "636 (BC_2, *, control, 0), "& "637 (BC_2, TSEC1_RXD(0), input, X), "& "638 (BC_6, TSEC1_TXD(5), bidir, 0, 639, 0, Z), "& "639 (BC_2, *, control, 0), "& "640 (BC_2, TSEC1_RX_DV, input, X), "& "641 (BC_2, TSEC1_COL, input, X), "& "642 (BC_6, TSEC1_GTX_CLK, bidir, 0, 643, 0, Z), "& "643 (BC_2, *, control, 0), "& "644 (BC_2, TSEC1_RXD(4), input, X), "& "645 (BC_6, TSEC1_CRS, bidir, 0, 646, 0, Z), "& "646 (BC_2, *, control, 0), "& "647 (BC_4, SD_RX(0), observe_only, X), "& "648 (BC_2, *, control, 1), "& "649 (BC_2, SD_TX(0), output3, 0, 648, 1, Z), "& "650 (BC_2, *, control, 1), "& "651 (BC_2, SD_TX(1), output3, 0, 650, 1, Z), "& "652 (BC_4, SD_RX(1), observe_only, X), "& "653 (BC_4, SD_REF_CLK, clock, X), "& "654 (BC_2, *, internal, X), "& "655 (BC_2, *, internal, X), "& "656 (BC_2, *, internal, X), "& "657 (BC_2, *, internal, X), "& "658 (BC_4, SD_RX(2), observe_only, X), "& "659 (BC_2, *, control, 1), "& "660 (BC_2, SD_TX(2), output3, 0, 659, 1, Z), "& "661 (BC_2, *, control, 1), "& "662 (BC_2, SD_TX(3), output3, 0, 661, 1, Z), "& "663 (BC_4, SD_RX(3), observe_only, X)"; -- tdi attribute DESIGN_WARNING of P2020 : entity is "WARNING: Some of the I/O on this device support multiple supply voltages "& "and must be configured appropriately. INCORRECT VOLTAGE SELECT SETTINGS CAN "& "LEAD TO IRREVERSIBLE DEVICE DAMAGE. Read the comments in the header of the "& "BSDL and refer to the Hardware Spec. "; end P2020;