---------------------------------------------------------------------- -- BSDL Description for RM44Lx -- -- Revised 15 December 2014 -- ---------------------------------------------------------------------- -- Supported Devices: RM44Lx Revision 1.0 -- ---------------------------------------------------------------------- -- Created by : Texas Instruments Incorporated -- -- David Livingston -- -- BSDL Revision : 1.0 Released -- -- BSDL Revision : 0.2 Beta Testing -- -- BSDL Revision : 0.1 originally created -- -- -- -- BSDL Status : Released -- -- Date Created : 25 June 2014 -- -- Revision : 0.2 -- ---------------------------------------------------------------------- -- -- -- IMPORTANT NOTICE -- Texas Instruments Incorporated (TI) reserves the right to make -- changes to its products or to discontinue any semiconductor -- product or service without notice, and advises its customers to -- obtain the latest version of the relevant information to -- verify, before placing orders, that the information being -- relied on is current. -- TI warrants performance of its semiconductor products and -- related software to the specifications applicable at the time -- of sale in accordance with TI's standard warranty. Testing and -- other quality control techniques are utilized to the extent TI -- deems necessary to support this warranty. Specific testing of -- all parameters of each device is not necessarily performed, -- except those mandated by government requirements. -- -- Certain applications using semiconductor devices may involve -- potential risks of death, personal injury, or severe property -- or environmental damage ("Critical Applications"). -- TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, -- AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN -- LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER -- CRITICAL APPLICATIONS. -- Inclusion of TI products in such applications is understood -- to be fully at the risk of the customer. Use of TI products -- in such applications requires the written approval of an -- appropriate TI officer. Questions concerning potential risk -- applications should be directed to TI through a local SC sales -- office. -- In order to minimize risks associated with the customer's -- applications, adequate design and operating safeguards should -- be provided by the -- customer to minimize inherent or procedural hazards. -- -- TI assumes no liability for applications assistance, customer -- product design, software performance, or infringement of -- patents or services described herein. Nor does TI warrant or -- represent that any license, either express or implied, is -- granted under any patent right, copyright, mask work right, or -- other intellectual property right of TI covering or relating -- to any combination, machine, or process in which such -- semiconductor products or services might be or are used. -- Also see: Standard Terms and Conditions of Sale for Semiconductor -- -- Products. www.ti.com/sc/docs/stdterms.htm -- -- -- -- Mailing Address: -- -- -- -- Texas Instruments -- -- Post Office Box 655303 -- -- Dallas, Texas 75265 -- -- Copyright (c) 2014, Texas Instruments Incorporated -- ------------------------------------------------------------------- entity RM44Lx is -- This section identifies the default device package selected. generic (PHYSICAL_PIN_MAP: string:= "ZWT"); -- This section declares all the ports in the design. port ( GIOB_3 : inout bit; GIOA_0 : inout bit; MIBSPI3nCS_3 : inout bit; NHET_29 : inout bit; MIBSPI3nCS_2 : inout bit; NHET_27 : inout bit; GIOA_1 : inout bit; NHET_11 : inout bit; NHET2_03 : inout bit; NHET_21 : inout bit; GIOA_2 : inout bit; GIOB_4 : inout bit; CAN3RX : inout bit; GIOA_3 : inout bit; NHET2_01 : inout bit; NHET_23 : inout bit; NHET2_11 : inout bit; GIOB_5 : inout bit; CAN3TX : inout bit; NHET2_13 : inout bit; GIOA_4 : inout bit; GIOA_5 : inout bit; NHET2_15 : inout bit; NHET_22 : inout bit; GIOA_6 : inout bit; GIOA_7 : inout bit; GIOB_6 : inout bit; NHET_01 : inout bit; NHET_03 : inout bit; NHET_0 : inout bit; NHET_02 : inout bit; NHET_25 : inout bit; NHET_05 : inout bit; MIBSPI5NCS_0 : inout bit; SPI2NCS0 : inout bit; NHET_07 : inout bit; TEST : in bit; NHET_09 : inout bit; NHET_04 : inout bit; MIBSPI3NCS_1 : inout bit; NHET_06 : inout bit; NHET_13 : inout bit; MIBSPI1NCS_2 : inout bit; NHET_15 : inout bit; MIBSPI5NCS_2 : inout bit; nPORRST : in bit; MIBSPI3SOMI : inout bit; MIBSPI3SIMO : inout bit; MIBSPI3CLK : inout bit; MIBSPI3NENA : inout bit; MIBSPI3NCS_0 : inout bit; GIOB_7 : inout bit; MIBSPI1NCS_3 : inout bit; MIBSPI5NCS_3 : inout bit; AD1EVT : inout bit; NHET2_07 : inout bit; CAN1TX : inout bit; CAN1RX : inout bit; NHET_24 : inout bit; NHET_26 : inout bit; MIBSPI1SIMO : inout bit; MIBSPI1SOMI : inout bit; MIBSPI1CLK : inout bit; MIBSPI1NENA : inout bit; SPI2NENA : inout bit; NHET2_09 : inout bit; MIBSPI5NENA : inout bit; SPI2SOMI : inout bit; MIBSPI5SOMI_0 : inout bit; NHET_31 : inout bit; SPI2SIMO : inout bit; MIBSPI5SIMO_0 : inout bit; MIBSPI5CLK : inout bit; SPI2CLK : inout bit; MIBSPI5SIMO_2 : inout bit; MIBSPI5SIMO_3 : inout bit; MIBSPI5SOMI_1 : inout bit; NHET2_05 : inout bit; MIBSPI5SOMI_2 : inout bit; MIBSPI5SOMI_3 : inout bit; MIBSPI1NCS_0 : inout bit; NHET_08 : inout bit; MIBSPI5SIMO_1 : inout bit; NHET_28 : inout bit; TMS : in bit; nTRST : in bit; TDI : in bit; TDO : out bit; TCK : in bit; RTCK : linkage bit; nRST : inout bit; nERROR : inout bit; NHET_19 : inout bit; NHET_10 : inout bit; ECLK : inout bit; NHET_12 : inout bit; NHET_14 : inout bit; GIOB_0 : inout bit; NHET_30 : inout bit; CAN2TX : inout bit; CAN2RX : inout bit; MIBSPI1NCS_1 : inout bit; NHET_17 : inout bit; LINRX : inout bit; LINTX : inout bit; GIOB_1 : inout bit; MIBSPI5NCS_1 : inout bit; NHET_16 : inout bit; NHET_18 : inout bit; NHET_20 : inout bit; GIOB_2 : inout bit; AD1IN_23 : linkage bit; AD1IN_09 : linkage bit; AD1IN_10 : linkage bit; KELVIN_GND : linkage bit; AD1IN_02 : linkage bit; AD1IN_07 : linkage bit; AD1IN_19 : linkage bit; AD1IN_06 : linkage bit; AD1IN_20 : linkage bit; AD1IN_15 : linkage bit; OSCIN : linkage bit; AD1IN_01 : linkage bit; AD1IN_04 : linkage bit; AD1IN_12 : linkage bit; FLTP2 : linkage bit; AD1IN_17 : linkage bit; AD1IN_03 : linkage bit; AD1IN_22 : linkage bit; AD1IN_11 : linkage bit; AD1IN_21 : linkage bit; AD1IN_08 : linkage bit; AD1IN_18 : linkage bit; FLTP1 : linkage bit; OSCOUT : linkage bit; EXTCLKIN2 : linkage bit; -- NC Port AD1IN_14 : linkage bit; AD1IN_13 : linkage bit; AD1IN_0 : linkage bit; AD1IN_16 : linkage bit; AD1IN_05 : linkage bit; VCC : linkage bit_vector (0 to 11); VCCIO : linkage bit_vector (0 to 22); VSS : linkage bit_vector (0 to 29); VCCAD : linkage bit; ADREFLO : linkage bit; ADREFHI : linkage bit; VSSAD : linkage bit_vector (0 to 3); VCCPLL : linkage bit; VCCP : linkage bit ); use STD_1149_1_2001.all; attribute COMPONENT_CONFORMANCE of RM44Lx: entity is "STD_1149_1_2001"; attribute PIN_MAP of RM44Lx: entity is PHYSICAL_PIN_MAP; -- This section specifies the pin map for each port. constant ZWT: PIN_MAP_STRING := "GIOB_3 : W10," & "GIOA_0 : A5," & "MIBSPI3NCS_3 : C3," & "MIBSPI3NCS_2 : B2," & "GIOA_1 : C2," & "NHET_11 : E3," & "FLTP1 : J5," & "FLTP2 : H5," & "NHET2_03 : D5," & "NHET_21 : H4," & "GIOA_2 : C1," & "NHET_29 : A3," & "GIOB_4 : G1," & "CAN3RX : M19," & "GIOA_3 : E1," & "NHET2_01 : D4," & "NHET_23 : J4," & "NHET2_11 : C4," & "GIOB_5 : G2," & "CAN3TX : M18," & "NHET2_13 : C5," & "GIOA_4 : A6," & "GIOA_5 : B5," & "NHET2_15 : C6," & "NHET_22 : B3," & "GIOA_6 : H3," & "OSCIN : K1," & "KELVIN_GND : L2," & "OSCOUT : L1," & "GIOA_7 : M1," & "GIOB_6 : J2," & "NHET_01 : V2," & "NHET_03 : U1," & "NHET_0 : K18," & "NHET_02 : W5," & "NHET_25 : M3," & "NHET_05 : V6," & "MIBSPI5NCS_0 : E19," & "SPI2NCS0 : N3," & "NHET_07 : T1," & "TEST : U2," & "NHET_09 : V7," & "NHET_04 : B12," & "MIBSPI3NCS_1 : V5," & "NHET_06 : W3," & "NHET_13 : N2," & "MIBSPI1NCS_2 : G3," & "NHET_15 : N1," & "MIBSPI5NCS_2 : W6," & "nPORRST : W7," & "MIBSPI3SOMI : V8," & "MIBSPI3SIMO : W8," & "MIBSPI3CLK : V9," & "MIBSPI3NENA : W9," & "MIBSPI3NCS_0 : V10," & "GIOB_7 : F1," & "VCCPLL : P11," & "MIBSPI1NCS_3 : J3," & "MIBSPI5NCS_3 : T12," & "AD1IN_16 : V13," & "AD1IN_17 : U13," & "AD1IN_0 : W14," & "AD1IN_07 : V14," & "AD1IN_18 : U14," & "AD1IN_19 : U16," & "AD1IN_20 : U15," & "AD1IN_21 : T15," & "ADREFHI : V15," & "ADREFLO : V16," & "VCCAD : W15," & "AD1IN_09 : W17," & "AD1IN_01 : V17," & "AD1IN_10 : U17," & "AD1IN_02 : V18," & "AD1IN_03 : T17," & "AD1IN_11 : U19," & "AD1IN_04 : U18," & "AD1IN_12 : T16," & "AD1IN_05 : R17," & "AD1IN_13 : T18," & "AD1IN_06 : T19," & "AD1IN_22 : R19," & "AD1IN_14 : R18," & "AD1IN_08 : P18," & "AD1IN_23 : R16," & "AD1IN_15 : P19," & "AD1EVT : N19," & "NHET2_07 : N17," & "CAN1TX : A10," & "CAN1RX : B10," & "NHET_24 : P1," & "NHET_26 : A14," & "MIBSPI1SIMO : F19," & "MIBSPI1SOMI : G18," & "MIBSPI1CLK : F18," & "MIBSPI1NENA : G19," & "SPI2NENA : D3," & "NHET2_09 : K17," & "MIBSPI5NENA : H18," & "SPI2SOMI : D2," & "MIBSPI5SOMI_0 : J18," & "NHET_31 : J17," & "SPI2SIMO : D1," & "MIBSPI5SIMO_0 : J19," & "MIBSPI5CLK : H19," & "SPI2CLK : E2," & "MIBSPI5SIMO_2 : H17," & "MIBSPI5SIMO_3 : G17," & "MIBSPI5SOMI_1 : E17," & "NHET2_05 : D16," & "MIBSPI5SOMI_2 : H16," & "MIBSPI5SOMI_3 : G16," & "MIBSPI1NCS_0 : R2," & "NHET_08 : E18," & "MIBSPI5SIMO_1 : E16," & "NHET_28 : K19," & "TMS : C19," & "nTRST : D18," & "TDI : A17," & "TDO : C18," & "TCK : B18," & "RTCK : A16," & "nRST : B17," & "nERROR : B14," & "NHET_19 : B13," & "NHET_10 : D19," & "ECLK : A12," & "NHET_12 : B4," & "NHET_14 : A11," & "GIOB_0 : M2," & "NHET_30 : B11," & "CAN2TX : H2," & "NHET_27 : A9," & "CAN2RX : H1," & "MIBSPI1NCS_1 : F3," & "NHET_17 : A13," & "LINRX : A7," & "LINTX : B7," & "GIOB_1 : K2," & "MIBSPI5NCS_1 : B6," & "NHET_16 : A4," & "NHET_18 : J1," & "NHET_20 : P2," & "GIOB_2 : F2," & "EXTCLKIN2 : R9," & "VCCP : F8," & "VCC : (F9, F10, H10, J14, K6, K8, K12, K14, L6, M10, P10, NC0), " & "VCCIO : (F6, F7, F11, F12, F13, F14, G6, G14, H6, H14, J6, L14, M6, M14, N6, N14, P6, P7, P8, P9, P12, P13, P14)," & "VSS : (A1, A2, A18, A19, B1, B19, H8, H9, H11, H12, J8, J9, J10, J11, J12, K9, K10, K11, L8, L9, L10, L11, L12, M8, M9, M11, M12, V1, W1, W2), " & "VSSAD : (V19, W16, W18, W19) "; constant PGEB: PIN_MAP_STRING := "GIOB_3 : 1 ," & "GIOA_0 : 2 ," & "MIBSPI3NCS_3 : 3 ," & "MIBSPI3NCS_2 : 4 ," & "GIOA_1 : 5 ," & "NHET_11 : 6 ," & "FLTP1 : 7 ," & "FLTP2 : 8 ," & "NHET2_03 : NC119," & "NHET_21 : NC116," & "NHET_29 : NC113," & "GIOB_4 : NC111," & "GIOA_2 : 9 ," & "CAN3RX : 12 ," & "GIOA_3 : NC107," & "NHET2_01 : NC106," & "NHET_23 : NC105," & "NHET2_11 : NC104," & "GIOB_5 : NC103," & "CAN3TX : 13 ," & "NHET2_13 : NC102," & "GIOA_4 : NC101," & "GIOA_5 : 14 ," & "NHET2_15 : NC100," & "NHET_22 : 15 ," & "GIOA_6 : 16 ," & "OSCIN : 18 ," & "KELVIN_GND : 19 ," & "OSCOUT : 20 ," & "GIOA_7 : 22 ," & "GIOB_6 : NC96 ," & "NHET_01 : 23 ," & "NHET_03 : 24 ," & "NHET_0 : 25 ," & "NHET_02 : 30 ," & "NHET_25 : NC92 ," & "NHET_05 : 31 ," & "MIBSPI5NCS_0 : 32 ," & "SPI2NCS0 : NC90 ," & "NHET_07 : 33 ," & "TEST : 34 ," & "NHET_09 : 35 ," & "NHET_04 : 36 ," & "MIBSPI3NCS_1 : 37 ," & "NHET_06 : 38 ," & "NHET_13 : 39 ," & "MIBSPI1NCS_2 : 40 ," & "NHET_15 : 41 ," & "MIBSPI5NCS_2 : NC84 ," & "nPORRST : 46 ," & "MIBSPI3SOMI : 51 ," & "MIBSPI3SIMO : 52 ," & "MIBSPI3CLK : 53 ," & "MIBSPI3NENA : 54 ," & "GIOB_7 : NC82 ," & "VCCPLL : NC81 ," & "MIBSPI1NCS_3 : NC80 ," & "MIBSPI5NCS_3 : NC79 ," & "MIBSPI3NCS_0 : 55 ," & "AD1IN_16 : 58 ," & "AD1IN_17 : 59 ," & "AD1IN_0 : 60 ," & "AD1IN_07 : 61 ," & "AD1IN_18 : 62 ," & "AD1IN_19 : 63 ," & "AD1IN_20 : 64 ," & "AD1IN_21 : 65 ," & "ADREFHI : 66 ," & "ADREFLO : 67 ," & "VCCAD : 69 ," & "AD1IN_09 : 70 ," & "AD1IN_01 : 71 ," & "AD1IN_10 : 72 ," & "AD1IN_02 : 73 ," & "AD1IN_03 : 74 ," & "AD1IN_11 : 75 ," & "AD1IN_04 : 76 ," & "AD1IN_12 : 77 ," & "AD1IN_05 : 78 ," & "AD1IN_13 : 79 ," & "AD1IN_06 : 80 ," & "AD1IN_22 : 81 ," & "AD1IN_14 : 82 ," & "AD1IN_08 : 83 ," & "AD1IN_23 : 84 ," & "AD1IN_15 : 85 ," & "NHET2_07 : NC78 ," & "AD1EVT : 86 ," & "CAN1TX : 89 ," & "CAN1RX : 90 ," & "NHET_24 : 91 ," & "NHET_26 : 92 ," & "MIBSPI1SIMO : 93 ," & "MIBSPI1SOMI : 94 ," & "MIBSPI1CLK : 95 ," & "MIBSPI1NENA : 96 ," & "SPI2NENA : NC72 ," & "NHET2_09 : NC71 ," & "MIBSPI5NENA : 97 ," & "SPI2SOMI : NC70 ," & "MIBSPI5SOMI_0 : 98 ," & "NHET_31 : NC68 ," & "SPI2SIMO : NC67 ," & "MIBSPI5SIMO_0 : 99 ," & "MIBSPI5CLK : 100 ," & "SPI2CLK : NC66 ," & "MIBSPI5SIMO_2 : NC65 ," & "MIBSPI5SIMO_3 : NC64 ," & "MIBSPI5SOMI_1 : NC124," & "MIBSPI1NCS_0 : 105 ," & "NHET2_05 : NC62 ," & "MIBSPI5SOMI_2 : NC61 ," & "MIBSPI5SOMI_3 : NC60 ," & "NHET_08 : 106 ," & "MIBSPI5SIMO_1 : NC58 ," & "NHET_28 : 107 ," & "TMS : 108 ," & "nTRST : 109 ," & "TDI : 110 ," & "TDO : 111 ," & "TCK : 112 ," & "RTCK : 113 ," & "nRST : 116 ," & "nERROR : 117 ," & "NHET_19 : NC55 ," & "NHET_10 : 118 ," & "ECLK : 119 ," & "NHET_12 : 124 ," & "NHET_14 : 125 ," & "GIOB_0 : 126 ," & "NHET_30 : 127 ," & "CAN2TX : 128 ," & "NHET_27 : NC46 ," & "NHET_17 : NC43 ," & "MIBSPI5NCS_1 : NC37 ," & "CAN2RX : 129 ," & "EXTCLKIN2 : NC31 ," & "MIBSPI1NCS_1 : 130 ," & "LINRX : 131 ," & "LINTX : 132 ," & "GIOB_1 : 133 ," & "VCCP : 134 ," & "NHET_16 : 139 ," & "NHET_18 : 140 ," & "NHET_20 : 141 ," & "GIOB_2 : 142 ," & "VCC : (17, 29, 45, 48, 49, 57, 87, 101, 114, 123, 137, 143), " & "VCCIO : (10, 26, 42, 104, 120, 136, NC15, NC16, NC17, NC32, NC18, NC19, NC20, NC21, NC22, NC23, NC24, NC25, NC26, NC27, NC28, NC29, NC30)," & "VSS : (11, 21, 27, 28, 43, 44, 47, 50, 56, 88, 102, 103, 115, 121, 122, 135, 138, 144, NC3, NC4, NC5, NC6, NC7, NC8, NC9, NC10, NC11, NC12, NC13, NC14), " & "VSSAD : (68, NC0, NC1, NC2) "; constant PZ: PIN_MAP_STRING := "GIOB_3 : NC200," & "GIOA_0 : 1 ," & "MIBSPI3NCS_3 : NC201," & "MIBSPI3NCS_2 : NC202," & "GIOA_1 : 2 ," & "NHET_11 : NC203," & "FLTP1 : 3 ," & "FLTP2 : 4 ," & "NHET2_03 : NC119," & "NHET_21 : NC116," & "NHET_29 : NC113," & "GIOB_4 : NC111," & "GIOA_2 : 5 ," & "CAN3RX : 8 ," & "GIOA_3 : NC107," & "NHET2_01 : NC106," & "NHET_23 : NC105," & "NHET2_11 : NC104," & "GIOB_5 : NC103," & "CAN3TX : NC204," & "NHET2_13 : NC102," & "GIOA_4 : 9 ," & "GIOA_5 : 10 ," & "NHET2_15 : NC100," & "NHET_22 : 11 ," & "GIOA_6 : 12 ," & "OSCIN : 14 ," & "KELVIN_GND : 15 ," & "OSCOUT : 16 ," & "GIOA_7 : 18 ," & "GIOB_6 : NC96 ," & "NHET_01 : 19 ," & "NHET_03 : NC205," & "NHET_0 : NC206," & "NHET_02 : 22 ," & "NHET_25 : NC92 ," & "NHET_05 : NC207," & "MIBSPI5NCS_0 : NC208," & "SPI2NCS0 : 23 ," & "NHET_07 : NC209," & "TEST : 24 ," & "NHET_09 : NC210," & "NHET_04 : 25 ," & "MIBSPI3NCS_1 : NC211," & "NHET_06 : 26 ," & "NHET_13 : NC212," & "MIBSPI1NCS_2 : 27 ," & "NHET_15 : NC213," & "MIBSPI5NCS_2 : NC84 ," & "nPORRST : 31 ," & "MIBSPI3SOMI : 34 ," & "MIBSPI3SIMO : 35 ," & "MIBSPI3CLK : 36 ," & "MIBSPI3NENA : 37 ," & "GIOB_7 : NC82 ," & "VCCPLL : NC81 ," & "MIBSPI1NCS_3 : 39 ," & "MIBSPI5NCS_3 : NC79 ," & "MIBSPI3NCS_0 : 38 ," & "AD1IN_16 : 40 ," & "AD1IN_17 : 41 ," & "AD1IN_0 : 42 ," & "AD1IN_07 : 43 ," & "AD1IN_18 : NC214," & "AD1IN_19 : NC215," & "AD1IN_20 : 44 ," & "AD1IN_21 : 45 ," & "ADREFHI : 46 ," & "ADREFLO : 47 ," & "VCCAD : NC216," & "AD1IN_09 : 48 ," & "AD1IN_01 : 49 ," & "AD1IN_10 : 50 ," & "AD1IN_02 : 51 ," & "AD1IN_03 : 52 ," & "AD1IN_11 : 53 ," & "AD1IN_04 : 54 ," & "AD1IN_12 : NC217," & "AD1IN_05 : 55 ," & "AD1IN_13 : NC218," & "AD1IN_06 : 56 ," & "AD1IN_22 : NC219," & "AD1IN_14 : NC220," & "AD1IN_08 : 57 ," & "AD1IN_23 : NC221," & "AD1IN_15 : NC222," & "NHET2_07 : NC78 ," & "AD1EVT : 58 ," & "CAN1TX : 62 ," & "CAN1RX : 63 ," & "NHET_24 : 64 ," & "NHET_26 : NC223," & "MIBSPI1SIMO : 65 ," & "MIBSPI1SOMI : 66 ," & "MIBSPI1CLK : 67 ," & "MIBSPI1NENA : 68 ," & "SPI2NENA : NC72 ," & "NHET2_09 : NC71 ," & "MIBSPI5NENA : NC ," & "SPI2SOMI : 69 ," & "MIBSPI5SOMI_0 : NC224," & "NHET_31 : NC68 ," & "SPI2SIMO : 70 ," & "MIBSPI5SIMO_0 : NC225," & "MIBSPI5CLK : NC226," & "SPI2CLK : 71 ," & "MIBSPI5SIMO_2 : NC227," & "MIBSPI5SIMO_3 : NC228," & "MIBSPI5SOMI_1 : NC229," & "MIBSPI1NCS_0 : 73 ," & "NHET2_05 : NC62 ," & "MIBSPI5SOMI_2 : NC61 ," & "MIBSPI5SOMI_3 : NC60 ," & "NHET_08 : 74 ," & "MIBSPI5SIMO_1 : NC58 ," & "NHET_28 : NC230," & "TMS : 75 ," & "nTRST : 76 ," & "TDI : 77 ," & "TDO : 78 ," & "TCK : 79 ," & "RTCK : 80 ," & "nRST : 81 ," & "nERROR : 82 ," & "NHET_19 : NC55 ," & "NHET_10 : 83 ," & "ECLK : 84 ," & "NHET_12 : 89 ," & "NHET_14 : 90 ," & "GIOB_0 : NC231," & "NHET_30 : NC232," & "CAN2TX : 91 ," & "NHET_27 : NC46 ," & "NHET_17 : NC43 ," & "MIBSPI5NCS_1 : NC37 ," & "CAN2RX : 92 ," & "EXTCLKIN2 : NC31 ," & "MIBSPI1NCS_1 : 93 ," & "LINRX : 94 ," & "LINTX : 95 ," & "GIOB_1 : NC233," & "VCCP : NC234," & "NHET_16 : 97 ," & "NHET_18 : 98 ," & "NHET_20 : NC235," & "GIOB_2 : NC236," & "VCC : (13, 21, 30, 32, 61, 88, 99, NC237, NC238, NC239, NC240, NC241), " & "VCCIO : (6, 28, 60, 85, 96, NC17, NC32, NC18, NC19, NC20, NC21, NC22, NC23, NC24, NC25, NC26, NC27, NC28, NC29, NC30, NC242, NC243, NC244)," & "VSS : (7, 17, 20, 29, 33, 59, 72, 86, 87, 100, NC3, NC4, NC5, NC6, NC7, NC8, NC9, NC10, NC11, NC12, NC13, NC14, NC245, NC246, NC247, NC248, NC249, NC250, NC251, NC252), " & "VSSAD : (NC0, NC1, NC2, NC253) "; -- This section specifies the TAP ports. For the TAP TCK port, the parameters in -- the brackets are: -- First Field : Maximum TCK frequency. -- Second Field: Allowable states TCK may be stopped in. attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH); attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_RESET of nTRST: signal is true; -- Specifies the compliance enable patterns for the design. It lists a set of -- design ports and the values that they should be set to, in order to enable -- compliance to IEEE Std 1149.1 attribute COMPLIANCE_PATTERNS of RM44Lx: entity is "(nPORRST, TEST) (10)"; -- Specifies the number of bits in the instruction register. attribute INSTRUCTION_LENGTH of RM44Lx: entity is 6; -- Specifies the boundary-scan instructions implemented in the design and their -- opcodes. attribute INSTRUCTION_OPCODE of RM44Lx: entity is "IDCODE (000100),"& "BYPASS (111111)," & "EXTEST (011000)," & "SAMPLE (011011)," & "PRELOAD (011011)," & "HIGHZ (011110)"; -- Specifies the bit pattern that is loaded into the instruction register when -- the TAP controller passes through the Capture-IR state. The standard mandates -- that the two LSBs must be "01". The remaining bits are design specific. attribute INSTRUCTION_CAPTURE of RM44Lx: entity is "000001"; attribute IDCODE_REGISTER of RM44Lx : entity is "XXXX" & -- Version "1011101100000011" & -- Part Number "00000010111" & -- Manufacturer ID "1"; -- Required by the IEEE Std 1149.1 - 1990 -- This section specifies the test data register placed between TDI and TDO for -- each implemented instruction. attribute REGISTER_ACCESS of RM44Lx: entity is "BYPASS (BYPASS, HIGHZ)," & "DEVICE_ID (IDCODE), " & "BOUNDARY (EXTEST, SAMPLE, PRELOAD)"; -- Specifies the length of the boundary scan register. attribute BOUNDARY_LENGTH of RM44Lx: entity is 213; -- The following list specifies the characteristics of each cell in the boundary -- scan register from TDI to TDO. The following is a description of the label -- fields: -- num : Is the cell number. -- cell : Is the cell type as defined by the standard. -- port : Is the design port name. Control cells do not have a port -- name. -- function: Is the function of the cell as defined by the standard. Is one -- of input, output2, output3, bidir, control or controlr. -- safe : Specifies the value that the BSR cell should be loaded with -- for safe operation when the software might otherwise choose a -- random value. -- ccell : The control cell number. Specifies the control cell that -- drives the output enable for this port. -- disval : Specifies the value that is loaded into the control cell to -- disable the output enable for the corresponding port. -- rslt : Resulting state. Shows the state of the driver when it is -- disabled. attribute BOUNDARY_REGISTER of RM44Lx: entity is -- -- num cell port function safe [ccell disval rslt] -- "212 ( BC_2, *, control, 1), " & "211 ( BC_7, GIOB_3, bidir, X, 212, 1, Z), " & "210 ( BC_2, *, control, 1), " & "209 ( BC_7, GIOA_0, bidir, X, 210, 1, Z), " & "208 ( BC_2, *, control, 1), " & "207 ( BC_7, MIBSPI3NCS_3, bidir, X, 208, 1, Z), " & "206 ( BC_2, *, control, 1), " & "205 ( BC_7, MIBSPI3NCS_2, bidir, X, 206, 1, Z), " & "204 ( BC_2, *, control, 1), " & "203 ( BC_7, GIOA_1, bidir, X, 204, 1, Z), " & "202 ( BC_2, *, control, 1), " & "201 ( BC_7, NHET_11, bidir, X, 202, 1, Z), " & "200 ( BC_2, *, control, 1), " & "199 ( BC_7, NHET2_03, bidir, X, 200, 1, Z), " & "198 ( BC_2, *, control, 1), " & "197 ( BC_7, NHET_21, bidir, X, 198, 1, Z), " & "196 ( BC_2, *, control, 1), " & "195 ( BC_7, GIOA_2, bidir, X, 196, 1, Z), " & "194 ( BC_2, *, control, 1), " & "193 ( BC_7, NHET_29, bidir, X, 194, 1, Z), " & "192 ( BC_2, *, control, 1), " & "191 ( BC_7, GIOB_4, bidir, X, 192, 1, Z), " & "190 ( BC_2, *, control, 1), " & "189 ( BC_7, CAN3RX, bidir, X, 190, 1, Z), " & "188 ( BC_2, *, control, 1), " & "187 ( BC_7, GIOA_3, bidir, X, 188, 1, Z), " & "186 ( BC_2, *, control, 1), " & "185 ( BC_7, NHET2_01, bidir, X, 186, 1, Z), " & "184 ( BC_2, *, control, 1), " & "183 ( BC_7, NHET_23, bidir, X, 184, 1, Z), " & "182 ( BC_2, *, control, 1), " & "181 ( BC_7, NHET2_11, bidir, X, 182, 1, Z), " & "180 ( BC_2, *, control, 1), " & "179 ( BC_7, GIOB_5, bidir, X, 180, 1, Z), " & "178 ( BC_2, *, control, 1), " & "177 ( BC_7, CAN3TX, bidir, X, 178, 1, Z), " & "176 ( BC_2, *, control, 1), " & "175 ( BC_7, NHET2_13, bidir, X, 176, 1, Z), " & "174 ( BC_2, *, control, 1), " & "173 ( BC_7, GIOA_4, bidir, X, 174, 1, Z), " & "172 ( BC_2, *, control, 1), " & "171 ( BC_7, GIOA_5, bidir, X, 172, 1, Z), " & "170 ( BC_2, *, control, 1), " & "169 ( BC_7, NHET2_15, bidir, X, 170, 1, Z), " & "168 ( BC_2, *, control, 1), " & "167 ( BC_7, NHET_22, bidir, X, 168, 1, Z), " & "166 ( BC_2, *, control, 1), " & "165 ( BC_7, GIOA_6, bidir, X, 166, 1, Z), " & "164 ( BC_2, *, control, 1), " & "163 ( BC_7, GIOA_7, bidir, X, 164, 1, Z), " & "162 ( BC_2, *, control, 1), " & "161 ( BC_7, GIOB_6, bidir, X, 162, 1, Z), " & "160 ( BC_2, *, control, 1), " & "159 ( BC_7, NHET_01, bidir, X, 160, 1, Z), " & "158 ( BC_2, *, control, 1), " & "157 ( BC_7, NHET_03, bidir, X, 158, 1, Z), " & "156 ( BC_2, *, control, 1), " & "155 ( BC_7, NHET_0, bidir, X, 156, 1, Z), " & "154 ( BC_2, *, control, 1), " & "153 ( BC_7, NHET_02, bidir, X, 154, 1, Z), " & "152 ( BC_2, *, control, 1), " & "151 ( BC_7, NHET_25, bidir, X, 152, 1, Z), " & "150 ( BC_2, *, control, 1), " & "149 ( BC_7, NHET_05, bidir, X, 150, 1, Z), " & "148 ( BC_2, *, control, 1), " & "147 ( BC_7, MIBSPI5NCS_0, bidir, X, 148, 1, Z), " & "146 ( BC_2, *, control, 1), " & "145 ( BC_7, SPI2NCS0, bidir, X, 146, 1, Z), " & "144 ( BC_2, *, control, 1), " & "143 ( BC_7, NHET_07, bidir, X, 144, 1, Z), " & "142 ( BC_2, *, control, 1), " & "141 ( BC_7, NHET_09, bidir, X, 142, 1, Z), " & "140 ( BC_2, *, control, 1), " & "139 ( BC_7, NHET_04, bidir, X, 140, 1, Z), " & "138 ( BC_2, *, control, 1), " & "137 ( BC_7, MIBSPI3NCS_1, bidir, X, 138, 1, Z), " & "136 ( BC_2, *, control, 1), " & "135 ( BC_7, NHET_06, bidir, X, 136, 1, Z), " & "134 ( BC_2, *, control, 1), " & "133 ( BC_7, NHET_13, bidir, X, 134, 1, Z), " & "132 ( BC_2, *, control, 1), " & "131 ( BC_7, MIBSPI1NCS_2, bidir, X, 132, 1, Z), " & "130 ( BC_2, *, control, 1), " & "129 ( BC_7, NHET_15, bidir, X, 130, 1, Z), " & "128 ( BC_2, *, control, 1), " & "127 ( BC_7, MIBSPI5NCS_2, bidir, X, 128, 1, Z), " & "126 ( BC_2, *, control, 1), " & "125 ( BC_7, MIBSPI3SOMI, bidir, X, 126, 1, Z), " & "124 ( BC_2, *, internal, X), " & "123 ( BC_2, *, internal, X), " & "122 ( BC_2, *, control, 1), " & "121 ( BC_7, MIBSPI3SIMO, bidir, X, 122, 1, Z), " & "120 ( BC_2, *, control, 1), " & "119 ( BC_7, MIBSPI3CLK, bidir, X, 120, 1, Z), " & "118 ( BC_2, *, control, 1), " & "117 ( BC_7, MIBSPI3NENA, bidir, X, 118, 1, Z), " & "116 ( BC_2, *, control, 1), " & "115 ( BC_7, MIBSPI3NCS_0, bidir, X, 116, 1, Z), " & "114 ( BC_2, *, control, 1), " & "113 ( BC_7, GIOB_7, bidir, X, 114, 1, Z), " & "112 ( BC_2, *, control, 1), " & "111 ( BC_7, MIBSPI1NCS_3, bidir, X, 112, 1, Z), " & "110 ( BC_2, *, control, 1), " & "109 ( BC_7, MIBSPI5NCS_3, bidir, X, 110, 1, Z), " & "108 ( BC_2, *, control, 1), " & "107 ( BC_7, AD1EVT, bidir, X, 108, 1, Z), " & "106 ( BC_2, *, control, 1), " & "105 ( BC_7, NHET2_07, bidir, X, 106, 1, Z), " & "104 ( BC_2, *, control, 1), " & "103 ( BC_7, CAN1TX, bidir, X, 104, 1, Z), " & "102 ( BC_2, *, control, 1), " & "101 ( BC_7, CAN1RX, bidir, X, 102, 1, Z), " & "100 ( BC_2, *, control, 1), " & "99 ( BC_7, NHET_24, bidir, X, 100, 1, Z), " & "98 ( BC_2, *, control, 1), " & "97 ( BC_7, NHET_26, bidir, X, 98, 1, Z), " & "96 ( BC_2, *, control, 1), " & "95 ( BC_7, MIBSPI1SIMO, bidir, X, 96, 1, Z), " & "94 ( BC_2, *, control, 1), " & "93 ( BC_7, MIBSPI1SOMI, bidir, X, 94, 1, Z), " & "92 ( BC_2, *, control, 1), " & "91 ( BC_7, MIBSPI1CLK, bidir, X, 92, 1, Z), " & "90 ( BC_2, *, control, 1), " & "89 ( BC_7, MIBSPI1NENA, bidir, X, 90, 1, Z), " & "88 ( BC_2, *, control, 1), " & "87 ( BC_7, SPI2NENA, bidir, X, 88, 1, Z), " & "86 ( BC_2, *, control, 1), " & "85 ( BC_7, NHET2_09, bidir, X, 86, 1, Z), " & "84 ( BC_2, *, control, 1), " & "83 ( BC_7, MIBSPI5NENA, bidir, X, 84, 1, Z), " & "82 ( BC_2, *, control, 1), " & "81 ( BC_7, SPI2SOMI, bidir, X, 82, 1, Z), " & "80 ( BC_2, *, control, 1), " & "79 ( BC_7, MIBSPI5SOMI_0, bidir, X, 80, 1, Z), " & "78 ( BC_2, *, control, 1), " & "77 ( BC_7, NHET_31, bidir, X, 78, 1, Z), " & "76 ( BC_2, *, control, 1), " & "75 ( BC_7, SPI2SIMO, bidir, X, 76, 1, Z), " & "74 ( BC_2, *, control, 1), " & "73 ( BC_7, MIBSPI5SIMO_0, bidir, X, 74, 1, Z), " & "72 ( BC_2, *, control, 1), " & "71 ( BC_7, MIBSPI5CLK, bidir, X, 72, 1, Z), " & "70 ( BC_2, *, control, 1), " & "69 ( BC_7, SPI2CLK, bidir, X, 70, 1, Z), " & "68 ( BC_2, *, control, 1), " & "67 ( BC_7, MIBSPI5SIMO_2, bidir, X, 68, 1, Z), " & "66 ( BC_2, *, control, 1), " & "65 ( BC_7, MIBSPI5SIMO_3, bidir, X, 66, 1, Z), " & "64 ( BC_2, *, control, 1), " & "63 ( BC_7, MIBSPI5SOMI_1, bidir, X, 64, 1, Z), " & "62 ( BC_2, *, control, 1), " & "61 ( BC_7, NHET2_05, bidir, X, 62, 1, Z), " & "60 ( BC_2, *, control, 1), " & "59 ( BC_7, MIBSPI5SOMI_2, bidir, X, 60, 1, Z), " & "58 ( BC_2, *, control, 1), " & "57 ( BC_7, MIBSPI5SOMI_3, bidir, X, 58, 1, Z), " & "56 ( BC_2, *, control, 1), " & "55 ( BC_7, MIBSPI1NCS_0, bidir, X, 56, 1, Z), " & "54 ( BC_2, *, control, 1), " & "53 ( BC_7, NHET_08, bidir, X, 54, 1, Z), " & "52 ( BC_2, *, control, 1), " & "51 ( BC_7, MIBSPI5SIMO_1, bidir, X, 52, 1, Z), " & "50 ( BC_2, *, control, 1), " & "49 ( BC_7, NHET_28, bidir, X, 50, 1, Z), " & "48 ( BC_2, *, control, 1), " & "47 ( BC_7, nRST, bidir, X, 48, 1, Z), " & "46 ( BC_2, *, control, 1), " & "45 ( BC_7, nERROR, bidir, X, 46, 1, Z), " & "44 ( BC_2, *, control, 1), " & "43 ( BC_7, NHET_19, bidir, X, 44, 1, Z), " & "42 ( BC_2, *, control, 1), " & "41 ( BC_7, NHET_10, bidir, X, 42, 1, Z), " & "40 ( BC_2, *, control, 1), " & "39 ( BC_7, ECLK, bidir, X, 40, 1, Z), " & "38 ( BC_2, *, control, 1), " & "37 ( BC_7, NHET_12, bidir, X, 38, 1, Z), " & "36 ( BC_2, *, control, 1), " & "35 ( BC_7, NHET_14, bidir, X, 36, 1, Z), " & "34 ( BC_2, *, control, 1), " & "33 ( BC_7, GIOB_0, bidir, X, 34, 1, Z), " & "32 ( BC_2, *, control, 1), " & "31 ( BC_7, NHET_30, bidir, X, 32, 1, Z), " & "30 ( BC_2, *, control, 1), " & "29 ( BC_7, CAN2TX, bidir, X, 30, 1, Z), " & "28 ( BC_2, *, control, 1), " & "27 ( BC_7, NHET_27, bidir, X, 28, 1, Z), " & "26 ( BC_2, *, control, 1), " & "25 ( BC_7, CAN2RX, bidir, X, 26, 1, Z), " & "24 ( BC_2, *, control, 1), " & "23 ( BC_7, MIBSPI1NCS_1, bidir, X, 24, 1, Z), " & "22 ( BC_2, *, control, 1), " & "21 ( BC_7, NHET_17, bidir, X, 22, 1, Z), " & "20 ( BC_2, *, control, 1), " & "19 ( BC_7, LINRX, bidir, X, 20, 1, Z), " & "18 ( BC_2, *, control, 1), " & "17 ( BC_7, LINTX, bidir, X, 18, 1, Z), " & "16 ( BC_2, *, control, 1), " & "15 ( BC_7, GIOB_1, bidir, X, 16, 1, Z), " & "14 ( BC_2, *, control, 1), " & "13 ( BC_7, MIBSPI5NCS_1, bidir, X, 14, 1, Z), " & "12 ( BC_2, *, control, 1), " & "11 ( BC_7, NHET_16, bidir, X, 12, 1, Z), " & "10 ( BC_2, *, control, 1), " & "9 ( BC_7, NHET_18, bidir, X, 10, 1, Z), " & "8 ( BC_2, *, control, 1), " & "7 ( BC_7, NHET_20, bidir, X, 8, 1, Z), " & "6 ( BC_2, *, control, 1), " & "5 ( BC_7, GIOB_2, bidir, X, 6, 1, Z), " & "4 ( BC_2, *, internal, 1), " & "3 ( BC_2, *, internal, 0), " & "2 ( BC_2, *, internal, 1), " & "1 ( BC_2, *, internal, 1), " & "0 ( BC_2, *, internal, 1) "; attribute DESIGN_WARNING of RM44Lx : entity is "According to simulation, BSD JTAG TAP may not work correctly unless "& " device has completed RESET sequence first. "& "Forcing PORz low then release (no clock pulses required) would meet "& " the requirement. "& " "& "In order to enter bscan mode correctly, TMS must be low at the "& "rising edge of TRSTz and at least one cycle after TRSTz is high. "; end RM44Lx;