------------------------------------------------------------------------------- -- TI SN74LVTH18504A -- -- IEEE Std 1149.1 (JTAG) Boundary-Scan Test Device -- -- with 20-Bit Universal Bus Transceivers (UBTtm) -- -- features: bus-hold on A & B ports -- ------------------------------------------------------------------------------- -- Created by : Texas Instruments Incorporated -- -- Documentation : SN74LVTH18504A Data Sheet (SCBS667) -- -- Product Status: Released to Production (RTP) -- -- BSDL revision : 0.9 -- -- BSDL status : Preliminary -- -- Date created : 11/15/96 -- -- Last modified : 07/26/97 -- -- Modification history - -- -- - modified to add IDCODE version for 'C' die -- -- - misc clean-up, cosmetic only -- ------------------------------------------------------------------------------- --***************************************************************************-- --* W A R N I N G *-- --* *-- --* This BSDL file has been checked for correct syntax and semantics *-- --* using several commercial tools, but it has NOT been validated against *-- --* the device. Without validation many structural errors could be *-- --* present, leading to possible damage of the device when using its *-- --* boundary scan logic. *-- --* *-- --***************************************************************************-- ------------------------------------------------------------------------------- -- -- -- IMPORTANT NOTICE -- -- -- -- Texas Instruments (TI) reserves the right to make changes to its -- -- products or to discontinue any semiconductor product or service without -- -- notice, and advises its customers to obtain the latest version of -- -- relevant information to verify, before placing orders, that the -- -- information being relied on is current. -- -- -- -- TI warrants performance of its semiconductor products and related -- -- software to the specifications applicable at the time of sale in -- -- accordance with TI's standard warranty. Testing and other quality -- -- control techniques are utilized to the extent TI deems necessary to -- -- support this warranty. Specific testing of all parameters of each -- -- device is not necessarily performed, except those mandated by -- -- government requirements. -- -- -- -- Certain applications using semiconductor products may involve potential -- -- risks of death, personal injury, or severe property or environmental -- -- damage ("Critical Applications"). -- -- -- -- TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR -- -- WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES -- -- OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. -- -- -- -- Inclusion of TI products in such applications is understood to be fully -- -- at the risk of the customer. Use of TI products in such applications -- -- requires the written approval of an appropriate TI officer. Questions -- -- concerning potential risk applications should be directed to TI through -- -- a local SC sales office. -- -- -- -- In order to minimize risks associated with the customer's applications, -- -- adequate design and operating safeguards should be provided by the -- -- customer to minimize inherent or procedural hazards. -- -- -- -- TI assumes no liability for applications assistance, customer product -- -- design, software performance, or infringement of patents or services -- -- described herein. Nor does TI warrant or represent that any license, -- -- either express or implied, is granted under any patent right, copyright, -- -- mask work right, or other intellectual property right of TI covering or -- -- relating to any combination, machine, or process in which such -- -- semiconductor products or services might be or are used. -- -- -- -- Copyright (c) 1997, Texas Instruments Incorporated -- -- -- ------------------------------------------------------------------------------- entity sn74lvth18504a is generic (PHYSICAL_PIN_MAP : string := "UNDEFINED"); port (OEBA_NEG:in bit; OEAB_NEG:in bit; LEAB:in bit; LEBA:in bit; CLKAB:in bit; CLKBA:in bit; CLKENAB_NEG:in bit; CLKENBA_NEG:in bit; A:inout bit_vector(1 to 20); B:inout bit_vector(1 to 20); GND:linkage bit_vector(1 to 8); VCC:linkage bit_vector(1 to 4); NC:linkage bit_vector(1 to 4); TDO:out bit; TDI, TMS, TCK:in bit); use STD_1149_1_1990.all; -- Get standard attributes and definitions attribute PIN_MAP of sn74lvth18504a : entity is PHYSICAL_PIN_MAP; constant PM : PIN_MAP_STRING := "OEAB_NEG:28," & "OEBA_NEG:60, LEAB:27, LEBA:59,"& "CLKAB:23, CLKBA:55," & "CLKENAB_NEG:22, CLKENBA_NEG:54, " & "A:(62,63,64,1,2,3,5,6,7,8,10, " & "11,12,14,15,16,17,18,19,21), " & "B:(53,51,50,49,48,47,46,44,43,42," & "40,39,38,37,35,34,33,32,31,30)," & "GND:(4,13,20,29,36,45,52,61)," & "VCC:(9,25,41,57)," & "TCK:26, TDI:24, TMS:56, TDO:58 "; constant HV : PIN_MAP_STRING := "OEAB_NEG:39," & "OEBA_NEG:5, LEAB:38, LEBA:4," & "CLKAB:33, CLKBA:67," & "CLKENAB_NEG:32, CLKENBA_NEG:66," & "A:(7,8,9,10,11,12,14,15,16,17," & "20,21,22,24,25,26,27,28,29,31)," & "B:(65,63,62,61,60,59,58,56,55,54," & "51,50,49,48,46,45,44,43,42,41)," & "GND:(6,13,23,30,40,47,57,64),"& "VCC:(2,19,36,53),"& "NC:(1,18,35,52),"& "TCK:37, TDI:34, TMS:68, TDO:3 "; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (40.0e6, BOTH); attribute INSTRUCTION_LENGTH of sn74lvth18504a : entity is 8; attribute INSTRUCTION_OPCODE of sn74lvth18504a : entity is "BYPASS (11111111, 10000100), " & "EXTEST (00000000), " & "SAMPLE (10000010), " & "IDCODE (10000001), " & "HIGHZ (00000110), " & -- Control Boundary to High-Impedance "CLAMP (10000111), " & -- Control Boundary to 1/0 "RUNT (00001001), " & -- Boundary Run Test "READBN (00001010), " & -- Boundary Read Normal Mode "READBT (10001011), " & -- Boundary Read Test Mode "CELLTST(00001100), " & -- Boundary Self-Test Normal Mode "TOPHIP (10001101), " & -- Boundary Toggle Outputs Test Mode "SCANCN (10001110), " & -- BCR Scan Normal Mode "SCANCT (00001111) " ; -- BCR Scan Test Mode attribute INSTRUCTION_CAPTURE of sn74lvth18504a : entity is "10000001"; attribute INSTRUCTION_DISABLE of sn74lvth18504a : entity is "HIGHZ"; attribute INSTRUCTION_GUARD of sn74lvth18504a : entity is "CLAMP"; attribute IDCODE_REGISTER of sn74lvth18504a : entity is -- 'B' die "0010" & -- 4 bit version "0000000000011101" & -- 16 bit part number "00000010111" & -- 11 bit manufacturer "1," -- mandatory LSB -- 'C' die "0011" & -- 4 bit version "0000000000011101" & -- 16 bit part number "00000010111" & -- 11 bit manufacturer "1" ; -- mandatory LSB attribute REGISTER_ACCESS of sn74lvth18504a : entity is "BOUNDARY (READBN, READBT, CELLTST)," & "BYPASS (HIGHZ, CLAMP, RUNT, TOPHIP)," & "IDCODE (IDCODE), " & "BCR[3] (SCANCN, SCANCT)" ; attribute BOUNDARY_CELLS of sn74lvth18504a : entity is "BC_1,BC_7"; -- Cell type BC_7 must be added to the standard package (package -- STD_1149_1_1990) if it has not already been added. -- constant BC_7:CELL_INFO:= -- ((BIDIR_IN, EXTEST, PI), (BIDIR_OUT, EXTEST, PO), -- (BIDIR_IN, SAMPLE, PI), (BIDIR_OUT, SAMPLE, PI), attribute BOUNDARY_LENGTH of sn74lvth18504a : entity is 48; attribute BOUNDARY_REGISTER of sn74lvth18504a : entity is "0 (BC_7, B(1) ,bidir , X, 47, 1, Z)," & "1 (BC_7, B(2) ,bidir , X, 47, 1, Z)," & "2 (BC_7, B(3) ,bidir , X, 47, 1, Z)," & "3 (BC_7, B(4) ,bidir , X, 47, 1, Z)," & "4 (BC_7, B(5) ,bidir , X, 47, 1, Z)," & "5 (BC_7, B(6) ,bidir , X, 47, 1, Z)," & "6 (BC_7, B(7) ,bidir , X, 47, 1, Z)," & "7 (BC_7, B(8) ,bidir , X, 47, 1, Z)," & "8 (BC_7, B(9) ,bidir , X, 47, 1, Z)," & "9 (BC_7, B(10) ,bidir , X, 47, 1, Z)," & "10 (BC_7, B(11) ,bidir , X, 47, 1, Z)," & "11 (BC_7, B(12) ,bidir , X, 47, 1, Z)," & "12 (BC_7, B(13) ,bidir , X, 47, 1, Z)," & "13 (BC_7, B(14) ,bidir , X, 47, 1, Z)," & "14 (BC_7, B(15) ,bidir , X, 47, 1, Z)," & "15 (BC_7, B(16) ,bidir , X, 47, 1, Z)," & "16 (BC_7, B(17) ,bidir , X, 47, 1, Z)," & "17 (BC_7, B(18) ,bidir , X, 47, 1, Z)," & "18 (BC_7, B(19) ,bidir , X, 47, 1, Z)," & "19 (BC_7, B(20) ,bidir , X, 47, 1, Z)," & "20 (BC_7, A(1) ,bidir , X, 46, 1, Z)," & "21 (BC_7, A(2) ,bidir , X, 46, 1, Z)," & "22 (BC_7, A(3) ,bidir , X, 46, 1, Z)," & "23 (BC_7, A(4) ,bidir , X, 46, 1, Z)," & "24 (BC_7, A(5) ,bidir , X, 46, 1, Z)," & "25 (BC_7, A(6) ,bidir , X, 46, 1, Z)," & "26 (BC_7, A(7) ,bidir , X, 46, 1, Z)," & "27 (BC_7, A(8) ,bidir , X, 46, 1, Z)," & "28 (BC_7, A(9) ,bidir , X, 46, 1, Z)," & "29 (BC_7, A(10) ,bidir , X, 46, 1, Z)," & "30 (BC_7, A(11) ,bidir , X, 46, 1, Z)," & "31 (BC_7, A(12) ,bidir , X, 46, 1, Z)," & "32 (BC_7, A(13) ,bidir , X, 46, 1, Z)," & "33 (BC_7, A(14) ,bidir , X, 46, 1, Z)," & "34 (BC_7, A(15) ,bidir , X, 46, 1, Z)," & "35 (BC_7, A(16) ,bidir , X, 46, 1, Z)," & "36 (BC_7, A(17) ,bidir , X, 46, 1, Z)," & "37 (BC_7, A(18) ,bidir , X, 46, 1, Z)," & "38 (BC_7, A(19) ,bidir , X, 46, 1, Z)," & "39 (BC_7, A(20) ,bidir , X, 46, 1, Z)," & "40 (BC_1, LEBA ,input , X)," & "41 (BC_1, LEAB ,input , X)," & "42 (BC_1, CLKENBA_NEG,input , X)," & "43 (BC_1, CLKENAB_NEG,input , X)," & "44 (BC_1, CLKBA ,input , X)," & "45 (BC_1, CLKAB ,input , X)," & "46 (BC_1, OEBA_NEG ,input , 1)," & "46 (BC_1, * ,controlr, 1)," & "47 (BC_1, OEAB_NEG ,input , 1)," & "47 (BC_1, * ,controlr, 1) " ; end sn74lvth18504a;