-- ---------------------------------------------------------------------- -- A T M E L _A R M_M I C R O C O N T R O L L E R S -- -- ---------------------------------------------------------------------- -- BSDL file -- -- File Name: AT91SAM9G20_TFBGA247.bsd -- File Revision: 1.0 -- Date: Wednesday, April 28, 2010 -- Created by: Atmel Corporation -- File Status: -- -- Device: AT91SAM9G20_TFBGA247 -- Package: TFBGA247 -- Visit http://www.atmel.com for a updated list of BSDL files. -- -- ---------------------------------------------------------------------- -- Syntax and Semantics are checked against the IEEE 1149.1 standard. -- -- _The logical functioning of the standard Boundary-Scan instructions _-- -- and of the associated bypass, idcode and boundary-scan register -- -- described in this BSDL file has been verified against its related -- -- silicon by JTAG Technologies B.V. -- -- --------------------------------------------------------------------------- -- ---------------------------------------------------------------------------- -- IMPORTANT NOTICE -- -- -- -- Copyright 2005 Atmel Corporation. All Rights Reserved. -- -- -- -- Atmel assumes no responsibility or liability arising out -- -- this application or use of any information described herein -- -- except as expressly agreed to in writing by Atmel Corporation. -- -- -- -- ------------------------------------------------------------------ -- This BSDL File has been verified on severals BSDL Syntax -- -- Checker/Compilers -- -- -- -- File Name: AT91SAM9G20_TFBGA247.bsd -- Timestamp: Wednesday, April 28, 2010 9:46 AM -- Results: Entity name: AT91SAM9G20_TFBGA247 -- IEEE Std 1149.1-2001 (Version 2.0) -- Packaging option selected is TFBGA247. -- Inputs = 4 -- Outputs = 2 -- Bidirectionals = 150 -- Instruction Reg Length = 3 -- Boundary Reg Length = 308 -- BSDL compilation of 892 lines completed without errors. -- ------------------------------------------------------------------ entity AT91SAM9G20_TFBGA247 is -- This section identifies the default device package selected. generic (PHYSICAL_PIN_MAP: string:= "TFBGA247"); -- This section declares all the ports in the design. port ( BMS : in bit; NTRST : in bit; OSCSEL : in bit; TCK : in bit; TDI : in bit; TMS : in bit; TST : in bit; WKUP : in bit; JTAGSEL : in bit; NBS0 : inout bit; NWR2 : inout bit; A10 : inout bit; A11 : inout bit; A12 : inout bit; A13 : inout bit; A14 : inout bit; A15 : inout bit; BA0 : inout bit; BA1 : inout bit; A18 : inout bit; A19 : inout bit; A2 : inout bit; A20 : inout bit; A21 : inout bit; A22 : inout bit; A3 : inout bit; A4 : inout bit; A5 : inout bit; A6 : inout bit; A7 : inout bit; A8 : inout bit; A9 : inout bit; CAS : inout bit; D0 : inout bit; D1 : inout bit; D10 : inout bit; D11 : inout bit; D12 : inout bit; D13 : inout bit; D14 : inout bit; D15 : inout bit; D2 : inout bit; D3 : inout bit; D4 : inout bit; D5 : inout bit; D6 : inout bit; D7 : inout bit; D8 : inout bit; D9 : inout bit; NANDOE : inout bit; NANDWE : inout bit; NCS0 : inout bit; SDCS : inout bit; CFOE : inout bit; NRST : inout bit; CFWE : inout bit; CFIOR : inout bit; CFIOW : inout bit; PA0 : inout bit; PA1 : inout bit; PA10 : inout bit; PA11 : inout bit; PA12 : inout bit; PA13 : inout bit; PA14 : inout bit; PA15 : inout bit; PA16 : inout bit; PA17 : inout bit; PA18 : inout bit; PA19 : inout bit; PA2 : inout bit; PA20 : inout bit; PA21 : inout bit; PA22 : inout bit; PA23 : inout bit; PA24 : inout bit; PA25 : inout bit; PA26 : inout bit; PA27 : inout bit; PA28 : inout bit; PA29 : inout bit; PA3 : inout bit; PA30 : inout bit; PA31 : inout bit; PA4 : inout bit; PA5 : inout bit; PA6 : inout bit; PA7 : inout bit; PA8 : inout bit; PA9 : inout bit; PB0 : inout bit; PB1 : inout bit; PB10 : inout bit; PB11 : inout bit; PB12 : inout bit; PB13 : inout bit; PB14 : inout bit; PB15 : inout bit; PB16 : inout bit; PB17 : inout bit; PB18 : inout bit; PB19 : inout bit; PB2 : inout bit; PB20 : inout bit; PB21 : inout bit; PB22 : inout bit; PB23 : inout bit; PB24 : inout bit; PB25 : inout bit; PB26 : inout bit; PB27 : inout bit; PB28 : inout bit; PB29 : inout bit; PB3 : inout bit; PB30 : inout bit; PB31 : inout bit; PB4 : inout bit; PB5 : inout bit; PB6 : inout bit; PB7 : inout bit; PB8 : inout bit; PB9 : inout bit; PC0 : inout bit; PC1 : inout bit; PC10 : inout bit; PC11 : inout bit; PC12 : inout bit; PC13 : inout bit; PC14 : inout bit; PC15 : inout bit; PC16 : inout bit; PC17 : inout bit; PC18 : inout bit; PC19 : inout bit; PC2 : inout bit; PC20 : inout bit; PC21 : inout bit; PC22 : inout bit; PC23 : inout bit; PC24 : inout bit; PC25 : inout bit; PC26 : inout bit; PC27 : inout bit; PC28 : inout bit; PC29 : inout bit; PC3 : inout bit; PC30 : inout bit; PC31 : inout bit; PC4 : inout bit; PC5 : inout bit; PC6 : inout bit; PC7 : inout bit; PC8 : inout bit; PC9 : inout bit; RAS : inout bit; SDA10 : inout bit; SDCK : inout bit; SDCKE : inout bit; SDWE : inout bit; RTCK : out bit; SHDN : out bit; TDO : out bit; DDM : linkage bit; DDP : linkage bit; HDMA : linkage bit; HDMB : linkage bit; HDPA : linkage bit; HDPB : linkage bit; XIN32 : linkage bit; XOUT32 : linkage bit; XIN : linkage bit; XOUT : linkage bit; ADVREF : linkage bit; VDDUSB : linkage bit_vector (1 to 2); GNDUSB : linkage bit_vector (1 to 2); VDDBU : linkage bit; GNDBU : linkage bit; VDDANA : linkage bit; GNDANA : linkage bit; VDDIOM : linkage bit_vector (1 to 7); VDDIOP : linkage bit_vector (1 to 6); VDDCORE : linkage bit_vector (1 to 7); VDDPLL : linkage bit_vector (1 to 2); GNDPLL : linkage bit_vector (1 to 2); VDDOSC : linkage bit; GND : linkage bit_vector (1 to 38) ); use STD_1149_1_2001.all; attribute COMPONENT_CONFORMANCE of AT91SAM9G20_TFBGA247: entity is "STD_1149_1_2001"; attribute PIN_MAP of AT91SAM9G20_TFBGA247: entity is PHYSICAL_PIN_MAP; -- This section specifies the pin map for each port. This information is -- extracted from the port-to-pin map file that was read in using the -- "read_pin_map" command. constant TFBGA247: PIN_MAP_STRING := "D13 : A1," & "D12 : A2," & "A9 : A12," & "A13 : A14," & "A20 : A16," & "A22 : A18," & "NANDOE : A19," & "D15 : B1," & "D14 : B2," & "D10 : B3," & "D9 : B4," & "D7 : B5," & "D3 : B6," & "D2 : B7," & "RAS : B8," & "CAS : B9," & "NWR2 : B10," & "A3 : B11," & "A10 : B13," & "A18 : B15," & "A21 : B17," & "PC15 : C2," & "D11 : C3," & "D8 : C4," & "SDCKE : C5," & "SDWE : C6," & "SDCK : C7," & "D1 : C8," & "SDCS : C9," & "A2 : C10," & "A7 : C11," & "A11 : C12," & "A19 : C14," & "CFWE : C18," & "PC17 : D2," & "PC16 : D3," & "A14 : D13," & "NANDWE : D15," & "CFOE : D17," & "NCS0 : D19," & "PC18 : E2," & "PC19 : E3," & "D6 : E5," & "D5 : E6," & "D0 : E7," & "CFIOW : E8," & "A4 : E10," & "A8 : E11," & "BA0 : E13," & "PC8 : E14," & "PC4 : E15," & "PC5 : E16," & "PC7 : E18," & "PC6 : E19," & "PC22 : F2," & "PC23 : F3," & "PC20 : F5," & "D4 : F6," & "CFIOR : F7," & "SDA10 : F8," & "NBS0 : F9," & "A6 : F10," & "A12 : F11," & "A15 : F12," & "BA1 : F13," & "PC10 : F14," & "PC14 : F15," & "PC9 : F17," & "PC12 : F18," & "PC26 : G2," & "PC25 : G3," & "PC24 : G5," & "PC21 : G6," & "A5 : G9," & "PC13 : G14," & "PC11 : G18," & "PC31 : H2," & "PC30 : H3," & "PC28 : H5," & "PC27 : H6," & "PC29 : H7," & "SHDN : H14," & "HDPB : H17," & "HDMB : H18," & "XOUT : J5," & "XIN : J6," & "WKUP : J14," & "DDP : J15," & "DDM : J17," & "XOUT32 : K14," & "XIN32 : K15," & "HDPA : K17," & "HDMA : K18," & "ADVREF : L5," & "PC2 : L6," & "OSCSEL : L13," & "NRST : L17," & "TCK : L18," & "PC0 : M2," & "PC1 : M3," & "PC3 : M5," & "NTRST : M6," & "PA16 : M10," & "TST : M14," & "JTAGSEL : M15," & "PB18 : M17," & "TMS : M18," & "PB20 : N2," & "PB13 : N3," & "PB11 : N5," & "BMS : N6," & "PA17 : N11," & "PA23 : N12," & "TDO : N17," & "TDI : N18," & "PB24 : P2," & "PB22 : P3," & "PA6 : P7," & "PA7 : P8," & "PA11 : P9," & "PA18 : P11," & "PA24 : P12," & "PA28 : P13," & "PB3 : P14," & "PB5 : P15," & "RTCK : P17," & "PB16 : P18," & "PB29 : R3," & "PB26 : R5," & "PB27 : R6," & "PA5 : R7," & "PA12 : R9," & "PA19 : R11," & "PA26 : R12," & "PB1 : R13," & "PB7 : R15," & "PB14 : R17," & "PB9 : R18," & "PA1 : T2," & "PB10 : T3," & "PB19 : T17," & "PB17 : T18," & "PB21 : U3," & "PB28 : U4," & "PB31 : U5," & "PA4 : U6," & "PA3 : U7," & "PA9 : U8," & "PA15 : U10," & "PA21 : U11," & "PA25 : U12," & "PA29 : U13," & "PA27 : U14," & "PA31 : U15," & "PB2 : U17," & "PB12 : V1," & "PB23 : V2," & "PB30 : V3," & "PA2 : V4," & "PA8 : V5," & "PA10 : V6," & "PA13 : V7," & "PA14 : V9," & "PA20 : V11," & "PA22 : V12," & "PA30 : V14," & "PB0 : V15," & "PB4 : V17," & "PB6 : V19," & "PB25 : W1," & "PA0 : W2," & "PB8 : W18," & "PB15 : W19," & "VDDUSB : (B19,F16)," & "GNDUSB : (C16,G17)," & "VDDBU : H15," & "GNDBU : L14," & "VDDIOM : (E12,H10,H11,J9,J10,J11,K11)," & "VDDIOP : (J18,M13,N15,V8,V10,V13)," & "VDDCORE : (G8,G10,G11,G12,H13,L11,M11)," & "VDDOSC : J2," & "VDDPLL : (J3,J7)," & "GNDPLL : (K2,K6)," & "VDDANA : K7," & "GNDANA : U2," & "GND : (E9,G15,K3,H8,H9,H12,J8,J12,J13,K8,K9,K10,K12,K13,L7,L8,L9,L10,L12,L15,M7,M8,M9,M12,N8,N14,P5,P6,P10,R2,R8,R10,R14,U9,U16,U18,V16,V18)" ; -- This section specifies the TAP ports. For the TAP TCK port, the parameters in -- the brackets are: -- First Field : Maximum TCK frequency. -- Second Field: Allowable states TCK may be stopped in. attribute TAP_SCAN_CLOCK of TCK : signal is (1.000000e+06, BOTH); attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_RESET of NTRST: signal is true; -- Specifies the compliance enable patterns for the design. It lists a set of -- design ports and the values that they should be set to, in order to enable -- compliance to IEEE Std 1149.1 attribute COMPLIANCE_PATTERNS of AT91SAM9G20_TFBGA247: entity is "(JTAGSEL) (1)"; -- Specifies the number of bits in the instruction register. attribute INSTRUCTION_LENGTH of AT91SAM9G20_TFBGA247: entity is 3; -- Specifies the boundary-scan instructions implemented in the design and their -- opcodes. attribute INSTRUCTION_OPCODE of AT91SAM9G20_TFBGA247: entity is "BYPASS (111)," & "EXTEST (001)," & "SAMPLE (101)," & "INTEST (011)," & "PRELOAD (101)," & "HIGHZ (010)," & "IDCODE (100)"; -- Specifies the bit pattern that is loaded into the instruction register when -- the TAP controller passes through the Capture-IR state. The standard mandates -- that the two LSBs must be "01". The remaining bits are design specific. attribute INSTRUCTION_CAPTURE of AT91SAM9G20_TFBGA247: entity is "001"; -- Specifies the bit pattern that is loaded into the DEVICE_ID register during -- the IDCODE instruction when the TAP controller passes through the Capture-DR -- state. attribute IDCODE_REGISTER of AT91SAM9G20_TFBGA247: entity is "0000" & -- 4-bit version number "0101101100100100" & -- 16-bit part number "00000011111" & -- 11-bit identity of the manufacturer "1"; -- Required by IEEE Std 1149.1 -- This section specifies the test data register placed between TDI and TDO for -- each implemented instruction. attribute REGISTER_ACCESS of AT91SAM9G20_TFBGA247: entity is "BYPASS (BYPASS, HIGHZ)," & "BOUNDARY (EXTEST, SAMPLE, INTEST, PRELOAD)," & "DEVICE_ID (IDCODE)"; -- Specifies the length of the boundary scan register. attribute BOUNDARY_LENGTH of AT91SAM9G20_TFBGA247: entity is 308; -- The following list specifies the characteristics of each cell in the boundary -- scan register from TDI to TDO. The following is a description of the label -- fields: -- num : Is the cell number. -- cell : Is the cell type as defined by the standard. -- port : Is the design port name. Control cells do not have a port -- name. -- function: Is the function of the cell as defined by the standard. Is one -- of input, output2, output3, bidir, control or controlr. -- safe : Specifies the value that the BSR cell should be loaded with -- for safe operation when the software might otherwise choose a -- random value. -- ccell : The control cell number. Specifies the control cell that -- drives the output enable for this port. -- disval : Specifies the value that is loaded into the control cell to -- disable the output enable for the corresponding port. -- rslt : Resulting state. Shows the state of the driver when it is -- disabled. attribute BOUNDARY_REGISTER of AT91SAM9G20_TFBGA247: entity is -- -- num cell port function safe [ccell disval rslt] -- "307 (BC_1, *, control, 1), " & "306 (BC_7, PC0, bidir, X, 307, 1, Z), " & "305 (BC_1, *, control, 1), " & "304 (BC_7, PC1, bidir, X, 305, 1, Z), " & "303 (BC_1, *, control, 1), " & "302 (BC_7, PC3, bidir, X, 303, 1, Z), " & "301 (BC_1, *, control, 1), " & "300 (BC_7, PB10, bidir, X, 301, 1, Z), " & "299 (BC_1, *, control, 1), " & "298 (BC_7, PB11, bidir, X, 299, 1, Z), " & "297 (BC_1, *, control, 1), " & "296 (BC_7, PB20, bidir, X, 297, 1, Z), " & "295 (BC_1, *, control, 1), " & "294 (BC_7, PB21, bidir, X, 295, 1, Z), " & "293 (BC_1, *, control, 1), " & "292 (BC_7, PB22, bidir, X, 293, 1, Z), " & "291 (BC_1, *, control, 1), " & "290 (BC_7, PB23, bidir, X, 291, 1, Z), " & "289 (BC_1, *, control, 1), " & "288 (BC_7, PB24, bidir, X, 289, 1, Z), " & "287 (BC_1, *, control, 1), " & "286 (BC_7, PB25, bidir, X, 287, 1, Z), " & "285 (BC_1, *, control, 1), " & "284 (BC_7, PB12, bidir, X, 285, 1, Z), " & "283 (BC_1, *, control, 1), " & "282 (BC_7, PB13, bidir, X, 283, 1, Z), " & "281 (BC_1, *, control, 1), " & "280 (BC_7, PB26, bidir, X, 281, 1, Z), " & "279 (BC_1, *, control, 1), " & "278 (BC_7, PB27, bidir, X, 279, 1, Z), " & "277 (BC_1, *, control, 1), " & "276 (BC_7, PA0, bidir, X, 277, 1, Z), " & "275 (BC_1, *, control, 1), " & "274 (BC_7, PA1, bidir, X, 275, 1, Z), " & "273 (BC_1, *, control, 1), " & "272 (BC_7, PA2, bidir, X, 273, 1, Z), " & "271 (BC_1, *, control, 1), " & "270 (BC_7, PA3, bidir, X, 271, 1, Z), " & "269 (BC_1, *, control, 1), " & "268 (BC_7, PA4, bidir, X, 269, 1, Z), " & "267 (BC_1, *, control, 1), " & "266 (BC_7, PA5, bidir, X, 267, 1, Z), " & "265 (BC_1, *, control, 1), " & "264 (BC_7, PA6, bidir, X, 265, 1, Z), " & "263 (BC_1, *, control, 1), " & "262 (BC_7, PA7, bidir, X, 263, 1, Z), " & "261 (BC_1, *, control, 1), " & "260 (BC_7, PA8, bidir, X, 261, 1, Z), " & "259 (BC_1, *, control, 1), " & "258 (BC_7, PA9, bidir, X, 259, 1, Z), " & "257 (BC_1, *, control, 1), " & "256 (BC_7, PA10, bidir, X, 257, 1, Z), " & "255 (BC_1, *, control, 1), " & "254 (BC_7, PA11, bidir, X, 255, 1, Z), " & "253 (BC_1, *, control, 1), " & "252 (BC_7, PA12, bidir, X, 253, 1, Z), " & "251 (BC_1, *, control, 1), " & "250 (BC_7, PA13, bidir, X, 251, 1, Z), " & "249 (BC_1, *, control, 1), " & "248 (BC_7, PA14, bidir, X, 249, 1, Z), " & "247 (BC_1, *, control, 1), " & "246 (BC_7, PA15, bidir, X, 247, 1, Z), " & "245 (BC_1, *, control, 1), " & "244 (BC_7, PA16, bidir, X, 245, 1, Z), " & "243 (BC_1, *, control, 1), " & "242 (BC_7, PA17, bidir, X, 243, 1, Z), " & "241 (BC_1, *, control, 1), " & "240 (BC_7, PA18, bidir, X, 241, 1, Z), " & "239 (BC_1, *, control, 1), " & "238 (BC_7, PA19, bidir, X, 239, 1, Z), " & "237 (BC_1, *, control, 1), " & "236 (BC_7, PA20, bidir, X, 237, 1, Z), " & "235 (BC_1, *, control, 1), " & "234 (BC_7, PA21, bidir, X, 235, 1, Z), " & "233 (BC_1, *, control, 1), " & "232 (BC_7, PA22, bidir, X, 233, 1, Z), " & "231 (BC_1, *, control, 1), " & "230 (BC_7, PA23, bidir, X, 231, 1, Z), " & "229 (BC_1, *, control, 1), " & "228 (BC_7, PA24, bidir, X, 229, 1, Z), " & "227 (BC_1, *, control, 1), " & "226 (BC_7, PA25, bidir, X, 227, 1, Z), " & "225 (BC_1, *, control, 1), " & "224 (BC_7, PA26, bidir, X, 225, 1, Z), " & "223 (BC_1, *, control, 1), " & "222 (BC_7, PA27, bidir, X, 223, 1, Z), " & "221 (BC_1, *, control, 1), " & "220 (BC_7, PA30, bidir, X, 221, 1, Z), " & "219 (BC_1, *, control, 1), " & "218 (BC_7, PA31, bidir, X, 219, 1, Z), " & "217 (BC_1, *, control, 1), " & "216 (BC_7, PA28, bidir, X, 217, 1, Z), " & "215 (BC_1, *, control, 1), " & "214 (BC_7, PA29, bidir, X, 215, 1, Z), " & "213 (BC_1, *, control, 1), " & "212 (BC_7, PB0, bidir, X, 213, 1, Z), " & "211 (BC_1, *, control, 1), " & "210 (BC_7, PB1, bidir, X, 211, 1, Z), " & "209 (BC_1, *, control, 1), " & "208 (BC_7, PB2, bidir, X, 209, 1, Z), " & "207 (BC_1, *, control, 1), " & "206 (BC_7, PB3, bidir, X, 207, 1, Z), " & "205 (BC_1, *, control, 1), " & "204 (BC_7, PB4, bidir, X, 205, 1, Z), " & "203 (BC_1, *, control, 1), " & "202 (BC_7, PB5, bidir, X, 203, 1, Z), " & "201 (BC_1, *, control, 1), " & "200 (BC_7, PB6, bidir, X, 201, 1, Z), " & "199 (BC_1, *, control, 1), " & "198 (BC_7, PB7, bidir, X, 199, 1, Z), " & "197 (BC_1, *, control, 1), " & "196 (BC_7, PB8, bidir, X, 197, 1, Z), " & "195 (BC_1, *, control, 1), " & "194 (BC_7, PB9, bidir, X, 195, 1, Z), " & "193 (BC_1, *, control, 1), " & "192 (BC_7, PB14, bidir, X, 193, 1, Z), " & "191 (BC_1, *, control, 1), " & "190 (BC_7, PB15, bidir, X, 191, 1, Z), " & "189 (BC_1, *, control, 1), " & "188 (BC_7, PB16, bidir, X, 189, 1, Z), " & "187 (BC_1, *, control, 1), " & "186 (BC_7, PB17, bidir, X, 187, 1, Z), " & "185 (BC_1, *, control, 1), " & "184 (BC_7, PB18, bidir, X, 185, 1, Z), " & "183 (BC_1, *, control, 1), " & "182 (BC_7, PB19, bidir, X, 183, 1, Z), " & "181 (BC_1, *, control, 1), " & "180 (BC_7, PB28, bidir, X, 181, 1, Z), " & "179 (BC_1, *, control, 1), " & "178 (BC_7, PB29, bidir, X, 179, 1, Z), " & "177 (BC_1, *, control, 1), " & "176 (BC_7, PB30, bidir, X, 177, 1, Z), " & "175 (BC_1, *, control, 1), " & "174 (BC_7, PB31, bidir, X, 175, 1, Z), " & "173 (BC_1, *, control, 1), " & "172 (BC_7, NRST, bidir, X, 173, 1, Z), " & "171 (BC_1, *, control, 1), " & "170 (BC_1, RTCK, output3, X, 171, 1, Z), " & "169 (BC_2, BMS, input, X), " & "168 (BC_2, OSCSEL, input, X), " & "167 (BC_2, TST, input, X), " & "166 (BC_2, WKUP, input, X), " & "165 (BC_1, *, control, 1), " & "164 (BC_1, SHDN, output3, X, 165, 1, Z), " & "163 (BC_1, *, control, 1), " & "162 (BC_7, PC13, bidir, X, 163, 1, Z), " & "161 (BC_1, *, control, 1), " & "160 (BC_7, PC11, bidir, X, 161, 1, Z), " & "159 (BC_1, *, control, 1), " & "158 (BC_7, PC10, bidir, X, 159, 1, Z), " & "157 (BC_1, *, control, 1), " & "156 (BC_7, PC14, bidir, X, 157, 1, Z), " & "155 (BC_1, *, control, 1), " & "154 (BC_7, PC9, bidir, X, 155, 1, Z), " & "153 (BC_1, *, control, 1), " & "152 (BC_7, PC8, bidir, X, 153, 1, Z), " & "151 (BC_1, *, control, 1), " & "150 (BC_7, PC4, bidir, X, 151, 1, Z), " & "149 (BC_1, *, control, 1), " & "148 (BC_7, PC6, bidir, X, 149, 1, Z), " & "147 (BC_1, *, control, 1), " & "146 (BC_7, PC7, bidir, X, 147, 1, Z), " & "145 (BC_1, *, control, 1), " & "144 (BC_7, PC12, bidir, X, 145, 1, Z), " & "143 (BC_1, *, control, 1), " & "142 (BC_7, PC5, bidir, X, 143, 1, Z), " & "141 (BC_1, *, control, 1), " & "140 (BC_7, NCS0, bidir, X, 141, 1, Z), " & "139 (BC_1, *, control, 1), " & "138 (BC_7, CFOE, bidir, X, 139, 1, Z), " & "137 (BC_1, *, control, 1), " & "136 (BC_7, CFWE, bidir, X, 137, 1, Z), " & "135 (BC_1, *, control, 1), " & "134 (BC_7, NANDOE, bidir, X, 135, 1, Z), " & "133 (BC_1, *, control, 1), " & "132 (BC_7, NANDWE, bidir, X, 133, 1, Z), " & "131 (BC_1, *, control, 1), " & "130 (BC_7, A22, bidir, X, 131, 1, Z), " & "129 (BC_1, *, control, 1), " & "128 (BC_7, A21, bidir, X, 129, 1, Z), " & "127 (BC_1, *, control, 1), " & "126 (BC_7, A20, bidir, X, 127, 1, Z), " & "125 (BC_1, *, control, 1), " & "124 (BC_7, A19, bidir, X, 125, 1, Z), " & "123 (BC_1, *, control, 1), " & "122 (BC_7, A18, bidir, X, 123, 1, Z), " & "121 (BC_1, *, control, 1), " & "120 (BC_7, BA1, bidir, X, 121, 1, Z), " & "119 (BC_1, *, control, 1), " & "118 (BC_7, BA0, bidir, X, 119, 1, Z), " & "117 (BC_1, *, control, 1), " & "116 (BC_7, A15, bidir, X, 117, 1, Z), " & "115 (BC_1, *, control, 1), " & "114 (BC_7, A14, bidir, X, 115, 1, Z), " & "113 (BC_1, *, control, 1), " & "112 (BC_7, A13, bidir, X, 113, 1, Z), " & "111 (BC_1, *, control, 1), " & "110 (BC_7, A12, bidir, X, 111, 1, Z), " & "109 (BC_1, *, control, 1), " & "108 (BC_7, A11, bidir, X, 109, 1, Z), " & "107 (BC_1, *, control, 1), " & "106 (BC_7, A10, bidir, X, 107, 1, Z), " & "105 (BC_1, *, control, 1), " & "104 (BC_7, A9, bidir, X, 105, 1, Z), " & "103 (BC_1, *, control, 1), " & "102 (BC_7, A8, bidir, X, 103, 1, Z), " & "101 (BC_1, *, control, 1), " & "100 (BC_7, A7, bidir, X, 101, 1, Z), " & "99 (BC_1, *, control, 1), " & "98 (BC_7, A6, bidir, X, 99, 1, Z), " & "97 (BC_1, *, control, 1), " & "96 (BC_7, A5, bidir, X, 97, 1, Z), " & "95 (BC_1, *, control, 1), " & "94 (BC_7, A4, bidir, X, 95, 1, Z), " & "93 (BC_1, *, control, 1), " & "92 (BC_7, A3, bidir, X, 93, 1, Z), " & "91 (BC_1, *, control, 1), " & "90 (BC_7, A2, bidir, X, 91, 1, Z), " & "89 (BC_1, *, control, 1), " & "88 (BC_7, NWR2, bidir, X, 89, 1, Z), " & "87 (BC_1, *, control, 1), " & "86 (BC_7, NBS0, bidir, X, 87, 1, Z), " & "85 (BC_1, *, control, 1), " & "84 (BC_7, SDA10, bidir, X, 85, 1, Z), " & "83 (BC_1, *, control, 1), " & "82 (BC_7, CFIOW, bidir, X, 83, 1, Z), " & "81 (BC_1, *, control, 1), " & "80 (BC_7, CFIOR, bidir, X, 81, 1, Z), " & "79 (BC_1, *, control, 1), " & "78 (BC_7, SDCS, bidir, X, 79, 1, Z), " & "77 (BC_1, *, control, 1), " & "76 (BC_7, CAS, bidir, X, 77, 1, Z), " & "75 (BC_1, *, control, 1), " & "74 (BC_7, RAS, bidir, X, 75, 1, Z), " & "73 (BC_1, *, control, 1), " & "72 (BC_7, D0, bidir, X, 73, 1, Z), " & "71 (BC_1, *, control, 1), " & "70 (BC_7, D1, bidir, X, 71, 1, Z), " & "69 (BC_1, *, control, 1), " & "68 (BC_7, D2, bidir, X, 69, 1, Z), " & "67 (BC_1, *, control, 1), " & "66 (BC_7, D3, bidir, X, 67, 1, Z), " & "65 (BC_1, *, control, 1), " & "64 (BC_7, D4, bidir, X, 65, 1, Z), " & "63 (BC_1, *, control, 1), " & "62 (BC_7, D5, bidir, X, 63, 1, Z), " & "61 (BC_1, *, control, 1), " & "60 (BC_7, D6, bidir, X, 61, 1, Z), " & "59 (BC_1, *, control, 1), " & "58 (BC_7, SDCK, bidir, X, 59, 1, Z), " & "57 (BC_1, *, control, 1), " & "56 (BC_7, SDWE, bidir, X, 57, 1, Z), " & "55 (BC_1, *, control, 1), " & "54 (BC_7, SDCKE, bidir, X, 55, 1, Z), " & "53 (BC_1, *, control, 1), " & "52 (BC_7, D7, bidir, X, 53, 1, Z), " & "51 (BC_1, *, control, 1), " & "50 (BC_7, D8, bidir, X, 51, 1, Z), " & "49 (BC_1, *, control, 1), " & "48 (BC_7, D9, bidir, X, 49, 1, Z), " & "47 (BC_1, *, control, 1), " & "46 (BC_7, D10, bidir, X, 47, 1, Z), " & "45 (BC_1, *, control, 1), " & "44 (BC_7, D11, bidir, X, 45, 1, Z), " & "43 (BC_1, *, control, 1), " & "42 (BC_7, D12, bidir, X, 43, 1, Z), " & "41 (BC_1, *, control, 1), " & "40 (BC_7, D13, bidir, X, 41, 1, Z), " & "39 (BC_1, *, control, 1), " & "38 (BC_7, D14, bidir, X, 39, 1, Z), " & "37 (BC_1, *, control, 1), " & "36 (BC_7, D15, bidir, X, 37, 1, Z), " & "35 (BC_1, *, control, 1), " & "34 (BC_7, PC15, bidir, X, 35, 1, Z), " & "33 (BC_1, *, control, 1), " & "32 (BC_7, PC16, bidir, X, 33, 1, Z), " & "31 (BC_1, *, control, 1), " & "30 (BC_7, PC17, bidir, X, 31, 1, Z), " & "29 (BC_1, *, control, 1), " & "28 (BC_7, PC18, bidir, X, 29, 1, Z), " & "27 (BC_1, *, control, 1), " & "26 (BC_7, PC19, bidir, X, 27, 1, Z), " & "25 (BC_1, *, control, 1), " & "24 (BC_7, PC20, bidir, X, 25, 1, Z), " & "23 (BC_1, *, control, 1), " & "22 (BC_7, PC21, bidir, X, 23, 1, Z), " & "21 (BC_1, *, control, 1), " & "20 (BC_7, PC22, bidir, X, 21, 1, Z), " & "19 (BC_1, *, control, 1), " & "18 (BC_7, PC23, bidir, X, 19, 1, Z), " & "17 (BC_1, *, control, 1), " & "16 (BC_7, PC24, bidir, X, 17, 1, Z), " & "15 (BC_1, *, control, 1), " & "14 (BC_7, PC25, bidir, X, 15, 1, Z), " & "13 (BC_1, *, control, 1), " & "12 (BC_7, PC26, bidir, X, 13, 1, Z), " & "11 (BC_1, *, control, 1), " & "10 (BC_7, PC27, bidir, X, 11, 1, Z), " & "9 (BC_1, *, control, 1), " & "8 (BC_7, PC28, bidir, X, 9, 1, Z), " & "7 (BC_1, *, control, 1), " & "6 (BC_7, PC29, bidir, X, 7, 1, Z), " & "5 (BC_1, *, control, 1), " & "4 (BC_7, PC30, bidir, X, 5, 1, Z), " & "3 (BC_1, *, control, 1), " & "2 (BC_7, PC31, bidir, X, 3, 1, Z), " & "1 (BC_1, *, control, 1), " & "0 (BC_7, PC2, bidir, X, 1, 1, Z) "; end AT91SAM9G20_TFBGA247;