-- Copyright Intel Corporation 2001 --**************************************************************************** -- Intel Corporation makes no warranty for the use of its products -- and assumes no responsibility for any errors which may appear in -- this document nor does it make a commitment to update the information -- contained herein. -- 8P425A (tm) Processor BSDL Model -- Project code IXP425 -- rev 1.0 August 2003 -- --------------------------------------------------------- entity IXP425 is generic(PHYSICAL_PIN_MAP : string:= "BGA"); port (pci_ad : inout bit_vector(31 downto 0); pci_cbe_n : inout bit_vector(3 downto 0); pci_par : inout bit; pci_frame_n : inout bit; pci_irdy_n : inout bit; pci_trdy_n : inout bit; pci_stop_n : inout bit; pci_devsel_n : inout bit; pci_idsel : in bit; pci_perr_n : inout bit; pci_serr_n : inout bit; -- pci_req_n : in bit_vector(3 downto 0); pci_req_n_3 : in bit; pci_req_n_2 : in bit; pci_req_n_1 : in bit; pci_req_n_0 : inout bit; -- pci_gnt_n : out bit_vector(3 downto 0); pci_gnt_n_3 : out bit; pci_gnt_n_2 : out bit; pci_gnt_n_1 : out bit; pci_gnt_n_0 : inout bit; pci_clkin : in bit; pci_inta_n : out bit; sdm_addr : out bit_vector(12 downto 0); sdm_data : inout bit_vector(31 downto 0); sdm_cs_n : out bit_vector(1 downto 0); sdm_dqm : out bit_vector(3 downto 0); sdm_ba : out bit_vector(1 downto 0); sdm_cas_n : out bit; sdm_ras_n : out bit; sdm_we_n : out bit; sdm_cke : out bit; sdm_clkout : out bit; utp_op_clk : in bit; utp_op_fco : out bit; utp_op_fci : in bit; utp_op_data : out bit_vector(7 downto 0); utp_op_soc : out bit; utp_op_addr : inout bit_vector(4 downto 0); utp_ip_clk : in bit; utp_ip_fco : out bit; utp_ip_fci : in bit; utp_ip_soc : in bit; utp_ip_data : in bit_vector(7 downto 0); utp_ip_addr : inout bit_vector(4 downto 0); hss_rxclk0 : inout bit; hss_rxdata0 : in bit; hss_rxframe0 : inout bit; hss_txclk0 : inout bit; hss_txdata0 : out bit; hss_txframe0 : inout bit; hss_rxclk1 : inout bit; hss_rxdata1 : in bit; hss_rxframe1 : inout bit; hss_txclk1 : inout bit; hss_txdata1 : out bit; hss_txframe1 : inout bit; eth_txclk0 : in bit; eth_txdata0 : out bit_vector(3 downto 0); eth_txen0 : out bit; eth_rxdv0 : in bit; eth_rxdata0 : in bit_vector(3 downto 0); eth_rxclk0 : in bit; eth_crs0 : in bit; eth_col0 : in bit; eth_mdio : inout bit; eth_mdc : inout bit; eth_txclk1 : in bit; eth_txdata1 : out bit_vector(3 downto 0); eth_txen1 : out bit; eth_rxdv1 : in bit; eth_rxdata1 : in bit_vector(3 downto 0); eth_rxclk1 : in bit; eth_crs1 : in bit; eth_col1 : in bit; ex_iowait_n : in bit; ex_clk : in bit; ex_ale : out bit; ex_addr : inout bit_vector(23 downto 0); ex_wr_n : out bit; ex_rd_n : out bit; ex_cs_n : out bit_vector(7 downto 0); ex_data : inout bit_vector(15 downto 0); ex_rdy_n : in bit_vector(3 downto 0); jtg_trst_n : in bit; jtg_tdi : in bit; jtg_tck : in bit; jtg_tms : in bit; jtg_tdo : out bit; gpio : inout bit_vector(15 downto 0); rxdata0 : in bit; txdata0 : out bit; rts0_n : out bit; cts0_n : in bit; rxdata1 : in bit; txdata1 : out bit; rts1_n : out bit; cts1_n : in bit; usb_dpos : inout bit; usb_dneg : inout bit; osc_in : in bit; osc_out : out bit; reset_in_n : in bit; pwron_reset_n : in bit; bypass_clk : in bit; scantestmode_n : in bit; pll_lock : out bit; highz_n : in bit; VCC : linkage bit_vector(44 downto 0); VSS : linkage bit_vector(99 downto 0); VCCP : linkage bit_vector(89 downto 0); VCCPLL1 : linkage bit; VCCPLL2 : linkage bit; OSC_VCCP : linkage bit; OSC_VCC : linkage bit; OSC_VSSP_9 : linkage bit; OSC_VSSP_10 : linkage bit; OSC_VSS : linkage bit ); use STD_1149_1_1990.all; use ixp425_a.all; attribute PIN_MAP of IXP425 : entity is PHYSICAL_PIN_MAP; constant BGA:PIN_MAP_STRING := "pci_ad : (D3, C2, J6, B1, A1, C1, D1, G3,"& " E1, J4, G1, F1, K5, H2, K3, H1,"& " N5, P2, P3, P5, N1, R1, R3, U1,"& " U4, T1, V1, R5, V3, T4, W1, U3),"& "pci_cbe_n : (H4, K1, M1, P1),"& "pci_par : M2,"& "pci_frame_n : L5,"& "pci_irdy_n : M4,"& "pci_trdy_n : T2,"& "pci_stop_n : L3,"& "pci_devsel_n : L1,"& "pci_idsel : F2,"& "pci_perr_n : N4,"& "pci_serr_n : D5,"& "pci_req_n_3 : H6,"& "pci_req_n_2 : E3,"& "pci_req_n_1 : G5,"& "pci_req_n_0 : F4,"& "pci_gnt_n_3 : A3,"& "pci_gnt_n_2 : B3,"& "pci_gnt_n_1 : A2,"& "pci_gnt_n_0 : E5,"& "pci_clkin : J1,"& "pci_inta_n : C4,"& "sdm_addr : (A19, C18, B19, A20, A21, E18, C20, A22,"& " F18, E20, C21, B21, D19),"& "sdm_data : (F7, E8, D7, B5, A5, A6, A7, C9,"& " A8, E10, B7, D8, A4, C6, F9, E6,"& " D10, A9, A10, B11, A11, A12, B13, A14,"& " C14, A13, D13, C12, E12, C11, D11, B9),"& "sdm_cs_n : (D16, A16),"& "sdm_dqm : (C15, B15, A15, E14),"& "sdm_ba : (D17, E16),"& "sdm_cas_n : C17,"& "sdm_ras_n : A18,"& "sdm_we_n : D15,"& "sdm_cke : B17,"& "sdm_clkout : A17,"& "utp_op_clk : AF17,"& "utp_op_fco : AE16,"& "utp_op_fci : AC16,"& "utp_op_data : (AB13, AF14, AE14, AD14, AF15, AD15, AC15, AF16),"& "utp_op_soc : AB15,"& "utp_op_addr : (AF18, AD17, AE18, AC17, AF19),"& "utp_ip_clk : AB19,"& "utp_ip_fco : AE22,"& "utp_ip_fci : AA18,"& "utp_ip_soc : AC20,"& "utp_ip_data : (AD18, AB17, AF20, AE20, AF21, AC19, AD20, AF22),"& "utp_ip_addr : (AD21, AF23, AF24, AB20, AA19),"& "hss_rxclk0 : Y2,"& "hss_rxdata0 : AA1,"& "hss_rxframe0 : W3,"& "hss_txclk0 : Y1,"& "hss_txdata0 : U5,"& "hss_txframe0 : V5,"& "hss_rxclk1 : AA4,"& "hss_rxdata1 : AB2,"& "hss_rxframe1 : W6,"& "hss_txclk1 : W5,"& "hss_txdata1 : AB1,"& "hss_txframe1 : Y3,"& "eth_txclk0 : AD1,"& "eth_txdata0 : (AB3, AA5, AB4, AC2),"& "eth_txen0 : Y6,"& "eth_rxdv0 : AD2,"& "eth_rxdata0 : (AE1, AF1, AA7, AC5),"& "eth_rxclk0 : AB6,"& "eth_crs0 : AD4,"& "eth_col0 : AE3,"& "eth_mdio : AF2,"& "eth_mdc : AD5,"& "eth_txclk1 : AF5,"& "eth_txdata1 : (AF4, AB8, AA9, AD6),"& "eth_txen1 : AE4,"& "eth_rxdv1 : AE6,"& "eth_rxdata1 : (AD7, AC8, AB9, AF6),"& "eth_rxclk1 : AD8,"& "eth_crs1 : AF7,"& "eth_col1 : AE8,"& "ex_iowait_n : B23,"& "ex_clk : M23,"& "ex_ale : D22,"& "ex_addr : (J24, G26, F26, G25, E26, H23, D26, J22,"& " E25, F24, C26, G23, H22, E24, B26, J21,"& " C25, D24, A26, C24, A25, G21, A24, C23),"& "ex_wr_n : F22,"& "ex_rd_n : A23,"& "ex_cs_n : (K26, L24, M22, J26, K24, J25, H26, K23),"& "ex_data : (U26, T24, T26, R24, R25, R26, P26, P24,"& " P23, P22, N26, N25, M26, M24, L26, L25),"& "ex_rdy_n : (V26, U24, U23, T22),"& "jtg_trst_n : AC22,"& "jtg_tdi : AE24,"& "jtg_tck : AF26,"& "jtg_tms : AF25,"& "jtg_tdo : AD23,"& "gpio : (U25, U22, V24, W26, W25, Y26, V22, W23,"& " AA26, V21, Y24, AB26, AA24, AC26, W21, Y22),"& "rxdata0 : AC24,"& "txdata0 : AD25,"& "rts0_n : AD26,"& "cts0_n : AB23,"& "rxdata1 : Y21,"& "txdata1 : AA22,"& "rts1_n : AC25,"& "cts1_n : AB24,"& "usb_dpos : F20,"& "usb_dneg : E21,"& "osc_in : AF9,"& "osc_out : AF11,"& "reset_in_n : AC13,"& "pwron_reset_n : AD13,"& "bypass_clk : AF13,"& "scantestmode_n : AB21,"& "pll_lock : AD12,"& "highz_n : AE26,"& "VCC : (F10,F17,AA10,K6,K21,U21,F6,F21,"& " AA21,AA6,D23,D4,AC4,AC23,AC9,V4,"& " J23,V23,D9,D18,R4,D12,D14,L23,"& " R23,AC12,AC14,AC21,D6,D21,N3,AC7,"& " N24,N22,H5,F23,Y23,Y4,F3,L4,"& " H3,AC10,AA17,AC18,U6),"& "VSS : (L15,T12,R12,R11,N12,N11,M11,L12,"& " T13,R13,P14,P13,N14,N13,M14,L14,"& " T15,R16,P16,P15,M16,M15,L16,T11,"& " P12,P11,M12,L11,T14,R14,M13,L13,"& " T16,R15,N16,N15,R2,P4,J5,G6,"& " G4,E4,C5,B8,E9,B12,E13,B16,E17,"& " B20,D20,D25,B24,H25,M25,T25,AD24,H21,K22,"& " N23,T23,W24,AA23,AA20,AE19,AE15,AE11,"& " AE7,AB16,AB12,AA8,AC6,AD3,AC1,AB5,V6,W4,"& " M3,C3,C10,C13,C19,E23,V2,AF3,C22,C7,D2,J3,"& " T3,AA3,K2,F8,F19,AD16,AD9,AD22,G24,AA25,G22),"& "VCCP : (B2,B6,B10,B14,B18,B22,B25,F25,K25,P25,V25,"& " AB25,AE25,AE21,AE17,AE13,AE5,AE2,AA2,U2,N2,"& " J2,E2,E7,E11,E15,E19,E22,L22,R22,W22,AB22,"& " AB18,AB14,AB11,AB10,AB7,Y5,T5,M5,F5,AE23,Y25,"& " AC3,B4,C8,C16,H24,AD19,AD11,W2,K4,L2,G2,AE9),"& "VCCPLL1 : AE10,"& "VCCPLL2 : AE12,"& "OSC_VCCP : AC11,"& "OSC_VCC : AF12,"& "OSC_VSSP_9 : AD10,"& "OSC_VSSP_10 : AF10,"& "OSC_VSS : AF8"; attribute Tap_Scan_In of jtg_tdi : signal is true; attribute Tap_Scan_Mode of jtg_tms : signal is true; attribute Tap_Scan_Out of jtg_tdo : signal is true; attribute Tap_Scan_Reset of jtg_trst_n : signal is true; attribute Tap_Scan_Clock of jtg_tck : signal is (16.0e6, BOTH); attribute Instruction_Length of IXP425: entity is 7; attribute Instruction_Opcode of IXP425: entity is "BYPASS (1111111)," & "EXTEST (0000000)," & "SAMPLE (0000001)," & "IDCODE (1111110)," & "CLAMP (1001001)," & "HIGHZ (1001010)," & "DBGRX (0000010)," & "DCSR (0001001)," & "DBGTX (0010000)," & "Reserved (0000011, 0000100, 0000101, 0000110, 0000111, 0001000, "& " 0001010, 0001011, 0001100, 0001101, 0001110, 0001111, "& " 0010001, 0010010, 0010011, 0010100, 0010101, 0010110, "& " 0010111, 0011000, 0011001, 0011010, 0011011, 0011100, "& " 0011101, 0011110, 0011111, 0100000, 0100001, 0100010, "& " 0100011, 0100100, 0100101, 0100101, 0100110, 0100111, "& " 0101000, 0101001, 0101010, 0101011, 0101100, 0101101, "& " 0101110, 0101111, 0110000, 0110001, 0110010, 0110011, "& " 0110100, 0110101, 0110110, 0110111, 0111000, 0111001, "& " 0111010, 0111011, 0111100, 0111101, 0111110, 0111111, "& " 1000000, 1000001, 1000010, 1000011, 1000100, 1000101, "& " 1000110, 1000111, 1001000, 1001011, 1001100, 1001101, "& " 1001110, 1001111, 1010000, 1010001, 1010010, 1010011, "& " 1010100, 1010101, 1010110, 1010111, 1011000, 1011001, "& " 1011010, 1011011, 1011100, 1011101, 1011110, 1011111, "& " 1100000, 1100001, 1100010, 1100011, 1100100, 1100101, "& " 1100110, 1100111, 1101000, 1101001, 1101010, 1101011, "& " 1101100, 1101101, 1101110, 1101111, 1110000, 1110001, "& " 1110010, 1110011, 1110100, 1110101, 1110110, 1110111, "& " 1111000, 1111001, 1111010, 1111011, 1111100, 1111101)"; attribute Instruction_Capture of IXP425: entity is "0000001"; attribute Instruction_Private of IXP425: entity is "Reserved" ; attribute Idcode_Register of IXP425: entity is -- IXP425 A-0 533MHz part JTAG ID : 09274013 hex -- IXP425 A-0 400MHz part JTAG ID : 09275013 hex -- IXP425 A-0 266MHz part JTAG ID : 09277013 hex "0000" & --version (A-0 stepping) -- "0001" & --version (next stepping) "1001001001110100" & --part number (533MHz : 9274 hex) -- "1001001001110101" & --part number (400MHz : 9275 hex) -- "1001001001110111" & --part number (266MHz : 9277 hex) "00000001001" & --manufacturers identity (Intel) "1"; --required by the standard attribute Register_Access of IXP425: entity is "Bypass (CLAMP, HIGHZ)," & "Dbg[36] (DBGRX, DBGTX, DCSR)"; --{*******************************************************************} --{ The first cell, cell 0, is closest to TDO } --{ BC_1:Control, Output3 BC_4: Input, Clock } --{ CBSC_1: Bidirectional } --{*******************************************************************} attribute Boundary_Cells of IXP425: entity is "BC_4, BC_1, CBSC_1"; attribute Boundary_Length of IXP425: entity is 498; attribute Boundary_Register of IXP425: entity is -- # cell name function safe control disable disable -- type bit signal value result "0 (BC_1, *, control, 1 )," & "1 (BC_1, *, control, 1 )," & "2 (BC_1, *, control, 1 )," & "3 (BC_1, *, control, 1 )," & "4 (BC_1, *, control, 1 )," & "5 (CBSC_1, hss_txframe1, bidir, X, 0, 1, Z )," & "6 (BC_1, hss_txdata1, output3, X, 1, 1, Z )," & "7 (CBSC_1, hss_txclk1, bidir, X, 2, 1, Z )," & "8 (CBSC_1, hss_rxframe1, bidir, X, 3, 1, Z )," & "9 (BC_4, hss_rxdata1, input, X )," & "10 (CBSC_1, hss_rxclk1, bidir, X, 4, 1, Z )," & "11 (BC_1, *, control, 1 )," & "12 (BC_1, *, control, 1 )," & "13 (BC_1, *, control, 1 )," & "14 (BC_1, *, control, 1 )," & "15 (BC_1, *, control, 1 )," & "16 (CBSC_1, hss_txframe0, bidir, X, 11, 1, Z )," & "17 (BC_1, hss_txdata0, output3, X, 12, 1, Z )," & "18 (CBSC_1, hss_txclk0, bidir, X, 13, 1, Z )," & "19 (CBSC_1, hss_rxframe0, bidir, X, 14, 1, Z )," & "20 (BC_4, hss_rxdata0, input, X )," & "21 (CBSC_1, hss_rxclk0, bidir, X, 15, 1, Z )," & "22 (BC_1, *, control, 1 )," & "23 (BC_1, *, control, 1 )," & "24 (BC_1, *, control, 1 )," & "25 (BC_1, *, control, 1 )," & "26 (BC_1, *, control, 1 )," & "27 (BC_1, *, control, 1 )," & "28 (BC_1, *, control, 1 )," & "29 (BC_1, *, control, 1 )," & "30 (BC_1, *, control, 1 )," & "31 (BC_1, *, control, 1 )," & "32 (BC_1, *, control, 1 )," & "33 (BC_1, *, control, 1 )," & "34 (BC_1, *, control, 1 )," & "35 (BC_1, *, control, 1 )," & "36 (BC_1, *, control, 1 )," & "37 (BC_1, *, control, 1 )," & "38 (BC_1, *, control, 1 )," & "39 (BC_1, *, control, 1 )," & "40 (BC_1, *, control, 1 )," & "41 (BC_1, *, control, 1 )," & "42 (BC_1, *, control, 1 )," & "43 (BC_1, *, control, 1 )," & "44 (BC_1, *, control, 1 )," & "45 (BC_1, *, control, 1 )," & "46 (BC_1, *, control, 1 )," & "47 (BC_1, *, control, 1 )," & "48 (BC_1, *, control, 1 )," & "49 (BC_1, *, control, 1 )," & "50 (BC_1, *, control, 1 )," & "51 (BC_1, *, control, 1 )," & "52 (BC_1, *, control, 1 )," & "53 (BC_1, *, control, 1 )," & "54 (BC_1, *, control, 1 )," & "55 (BC_1, *, control, 1 )," & "56 (BC_1, *, control, 1 )," & "57 (BC_1, *, control, 1 )," & "58 (BC_1, *, control, 1 )," & "59 (BC_1, *, control, 1 )," & "60 (BC_1, *, control, 1 )," & "61 (BC_1, *, control, 1 )," & "62 (BC_1, *, control, 1 )," & "63 (BC_1, *, control, 1 )," & "64 (BC_1, *, control, 1 )," & "65 (BC_1, *, control, 1 )," & "66 (BC_1, *, control, 1 )," & "67 (BC_1, *, control, 1 )," & "68 (BC_1, *, control, 1 )," & "69 (BC_1, *, control, 1 )," & "70 (BC_1, *, control, 1 )," & "71 (BC_1, *, control, 1 )," & "72 (BC_4, pci_clkin, input, X )," & "73 (BC_1, pci_inta_n, output3, X, 22, 1, Z )," & "74 (BC_1, pci_gnt_n_3, output3, X, 23, 1, Z )," & "75 (BC_1, pci_gnt_n_2, output3, X, 24, 1, Z )," & "76 (BC_1, pci_gnt_n_1, output3, X, 25, 1, Z )," & "77 (CBSC_1, pci_gnt_n_0, bidir, X, 26, 1, Z )," & "78 (BC_4, pci_req_n_3, input, X )," & "79 (BC_4, pci_req_n_2, input, X )," & "80 (BC_4, pci_req_n_1, input, X )," & "81 (CBSC_1, pci_req_n_0, bidir, X, 27, 1, Z )," & "82 (CBSC_1, pci_serr_n, bidir, X, 28, 1, Z )," & "83 (CBSC_1, pci_perr_n, bidir, X, 29, 1, Z )," & "84 (BC_4, pci_idsel, input, X )," & "85 (CBSC_1, pci_devsel_n, bidir, X, 30, 1, Z )," & "86 (CBSC_1, pci_stop_n, bidir, X, 31, 1, Z )," & "87 (CBSC_1, pci_trdy_n, bidir, X, 32, 1, Z )," & "88 (CBSC_1, pci_irdy_n, bidir, X, 33, 1, Z )," & "89 (CBSC_1, pci_frame_n, bidir, X, 34, 1, Z )," & "90 (CBSC_1, pci_par, bidir, X, 35, 1, Z )," & "91 (CBSC_1, pci_cbe_n(3), bidir, X, 36, 1, Z )," & "92 (CBSC_1, pci_cbe_n(2), bidir, X, 37, 1, Z )," & "93 (CBSC_1, pci_cbe_n(1), bidir, X, 38, 1, Z )," & "94 (CBSC_1, pci_cbe_n(0), bidir, X, 39, 1, Z )," & "95 (CBSC_1, pci_ad(31), bidir, X, 40, 1, Z )," & "96 (CBSC_1, pci_ad(30), bidir, X, 41, 1, Z )," & "97 (CBSC_1, pci_ad(29), bidir, X, 42, 1, Z )," & "98 (CBSC_1, pci_ad(28), bidir, X, 43, 1, Z )," & "99 (CBSC_1, pci_ad(27), bidir, X, 44, 1, Z )," & "100 (CBSC_1, pci_ad(26), bidir, X, 45, 1, Z )," & "101 (CBSC_1, pci_ad(25), bidir, X, 46, 1, Z )," & "102 (CBSC_1, pci_ad(24), bidir, X, 47, 1, Z )," & "103 (CBSC_1, pci_ad(23), bidir, X, 48, 1, Z )," & "104 (CBSC_1, pci_ad(22), bidir, X, 49, 1, Z )," & "105 (CBSC_1, pci_ad(21), bidir, X, 50, 1, Z )," & "106 (CBSC_1, pci_ad(20), bidir, X, 51, 1, Z )," & "107 (CBSC_1, pci_ad(19), bidir, X, 52, 1, Z )," & "108 (CBSC_1, pci_ad(18), bidir, X, 53, 1, Z )," & "109 (CBSC_1, pci_ad(17), bidir, X, 54, 1, Z )," & "110 (CBSC_1, pci_ad(16), bidir, X, 55, 1, Z )," & "111 (CBSC_1, pci_ad(15), bidir, X, 56, 1, Z )," & "112 (CBSC_1, pci_ad(14), bidir, X, 57, 1, Z )," & "113 (CBSC_1, pci_ad(13), bidir, X, 58, 1, Z )," & "114 (CBSC_1, pci_ad(12), bidir, X, 59, 1, Z )," & "115 (CBSC_1, pci_ad(11), bidir, X, 60, 1, Z )," & "116 (CBSC_1, pci_ad(10), bidir, X, 61, 1, Z )," & "117 (CBSC_1, pci_ad(9), bidir, X, 62, 1, Z )," & "118 (CBSC_1, pci_ad(8), bidir, X, 63, 1, Z )," & "119 (CBSC_1, pci_ad(7), bidir, X, 64, 1, Z )," & "120 (CBSC_1, pci_ad(6), bidir, X, 65, 1, Z )," & "121 (CBSC_1, pci_ad(5), bidir, X, 66, 1, Z )," & "122 (CBSC_1, pci_ad(4), bidir, X, 67, 1, Z )," & "123 (CBSC_1, pci_ad(3), bidir, X, 68, 1, Z )," & "124 (CBSC_1, pci_ad(2), bidir, X, 69, 1, Z )," & "125 (CBSC_1, pci_ad(1), bidir, X, 70, 1, Z )," & "126 (CBSC_1, pci_ad(0), bidir, X, 71, 1, Z )," & "127 (BC_1, *, control, 1 )," & "128 (BC_1, *, control, 1 )," & "129 (BC_1, *, control, 1 )," & "130 (BC_1, *, control, 1 )," & "131 (BC_1, *, control, 1 )," & "132 (BC_1, *, control, 1 )," & "133 (BC_1, *, control, 1 )," & "134 (BC_1, *, control, 1 )," & "135 (BC_1, *, control, 1 )," & "136 (BC_1, *, control, 1 )," & "137 (BC_1, *, control, 1 )," & "138 (BC_1, *, control, 1 )," & "139 (BC_1, *, control, 1 )," & "140 (BC_1, *, control, 1 )," & "141 (BC_1, *, control, 1 )," & "142 (BC_1, *, control, 1 )," & "143 (BC_1, *, control, 1 )," & "144 (BC_1, *, control, 1 )," & "145 (BC_1, *, control, 1 )," & "146 (BC_1, *, control, 1 )," & "147 (BC_1, *, control, 1 )," & "148 (BC_1, *, control, 1 )," & "149 (BC_1, *, control, 1 )," & "150 (BC_1, *, control, 1 )," & "151 (BC_1, *, control, 1 )," & "152 (BC_1, *, control, 1 )," & "153 (BC_1, *, control, 1 )," & "154 (BC_1, *, control, 1 )," & "155 (BC_1, *, control, 1 )," & "156 (BC_1, *, control, 1 )," & "157 (BC_1, *, control, 1 )," & "158 (BC_1, *, control, 1 )," & "159 (BC_1, *, control, 1 )," & "160 (BC_1, *, control, 1 )," & "161 (BC_1, *, control, 1 )," & "162 (BC_1, *, control, 1 )," & "163 (BC_1, *, control, 1 )," & "164 (BC_1, *, control, 1 )," & "165 (BC_1, *, control, 1 )," & "166 (BC_1, *, control, 1 )," & "167 (BC_1, *, control, 1 )," & "168 (BC_1, *, control, 1 )," & "169 (BC_1, *, control, 1 )," & "170 (BC_1, *, control, 1 )," & "171 (BC_1, *, control, 1 )," & "172 (BC_1, *, control, 1 )," & "173 (BC_1, *, control, 1 )," & "174 (BC_1, *, control, 1 )," & "175 (BC_1, *, control, 1 )," & "176 (BC_1, *, control, 1 )," & "177 (BC_1, *, control, 1 )," & "178 (BC_1, *, control, 1 )," & "179 (BC_1, *, control, 1 )," & "180 (BC_1, *, control, 1 )," & "181 (BC_1, *, control, 1 )," & "182 (BC_1, *, control, 1 )," & "183 (BC_1, *, control, 1 )," & "184 (BC_1, *, control, 1 )," & "185 (BC_1, sdm_clkout, output3, X, 127, 1, Z )," & "186 (BC_1, sdm_cke, output3, X, 128, 1, Z )," & "187 (BC_1, sdm_we_n, output3, X, 129, 1, Z )," & "188 (BC_1, sdm_ras_n, output3, X, 130, 1, Z )," & "189 (BC_1, sdm_cas_n, output3, X, 131, 1, Z )," & "190 (BC_1, sdm_ba(1), output3, X, 132, 1, Z )," & "191 (BC_1, sdm_ba(0), output3, X, 133, 1, Z )," & "192 (BC_1, sdm_dqm(3), output3, X, 134, 1, Z )," & "193 (BC_1, sdm_dqm(2), output3, X, 135, 1, Z )," & "194 (BC_1, sdm_dqm(1), output3, X, 136, 1, Z )," & "195 (BC_1, sdm_dqm(0), output3, X, 137, 1, Z )," & "196 (BC_1, sdm_cs_n(1), output3, X, 138, 1, Z )," & "197 (BC_1, sdm_cs_n(0), output3, X, 139, 1, Z )," & "198 (CBSC_1, sdm_data(31), bidir, X, 140, 1, Z )," & "199 (CBSC_1, sdm_data(30), bidir, X, 141, 1, Z )," & "200 (CBSC_1, sdm_data(29), bidir, X, 142, 1, Z )," & "201 (CBSC_1, sdm_data(28), bidir, X, 143, 1, Z )," & "202 (CBSC_1, sdm_data(27), bidir, X, 144, 1, Z )," & "203 (CBSC_1, sdm_data(26), bidir, X, 145, 1, Z )," & "204 (CBSC_1, sdm_data(25), bidir, X, 146, 1, Z )," & "205 (CBSC_1, sdm_data(24), bidir, X, 147, 1, Z )," & "206 (CBSC_1, sdm_data(23), bidir, X, 148, 1, Z )," & "207 (CBSC_1, sdm_data(22), bidir, X, 149, 1, Z )," & "208 (CBSC_1, sdm_data(21), bidir, X, 150, 1, Z )," & "209 (CBSC_1, sdm_data(20), bidir, X, 151, 1, Z )," & "210 (CBSC_1, sdm_data(19), bidir, X, 152, 1, Z )," & "211 (CBSC_1, sdm_data(18), bidir, X, 153, 1, Z )," & "212 (CBSC_1, sdm_data(17), bidir, X, 154, 1, Z )," & "213 (CBSC_1, sdm_data(16), bidir, X, 155, 1, Z )," & "214 (CBSC_1, sdm_data(15), bidir, X, 156, 1, Z )," & "215 (CBSC_1, sdm_data(14), bidir, X, 157, 1, Z )," & "216 (CBSC_1, sdm_data(13), bidir, X, 158, 1, Z )," & "217 (CBSC_1, sdm_data(12), bidir, X, 159, 1, Z )," & "218 (CBSC_1, sdm_data(11), bidir, X, 160, 1, Z )," & "219 (CBSC_1, sdm_data(10), bidir, X, 161, 1, Z )," & "220 (CBSC_1, sdm_data(9), bidir, X, 162, 1, Z )," & "221 (CBSC_1, sdm_data(8), bidir, X, 163, 1, Z )," & "222 (CBSC_1, sdm_data(7), bidir, X, 164, 1, Z )," & "223 (CBSC_1, sdm_data(6), bidir, X, 165, 1, Z )," & "224 (CBSC_1, sdm_data(5), bidir, X, 166, 1, Z )," & "225 (CBSC_1, sdm_data(4), bidir, X, 167, 1, Z )," & "226 (CBSC_1, sdm_data(3), bidir, X, 168, 1, Z )," & "227 (CBSC_1, sdm_data(2), bidir, X, 169, 1, Z )," & "228 (CBSC_1, sdm_data(1), bidir, X, 170, 1, Z )," & "229 (CBSC_1, sdm_data(0), bidir, X, 171, 1, Z )," & "230 (BC_1, sdm_addr(12), output3, X, 172, 1, Z )," & "231 (BC_1, sdm_addr(11), output3, X, 173, 1, Z )," & "232 (BC_1, sdm_addr(10), output3, X, 174, 1, Z )," & "233 (BC_1, sdm_addr(9), output3, X, 175, 1, Z )," & "234 (BC_1, sdm_addr(8), output3, X, 176, 1, Z )," & "235 (BC_1, sdm_addr(7), output3, X, 177, 1, Z )," & "236 (BC_1, sdm_addr(6), output3, X, 178, 1, Z )," & "237 (BC_1, sdm_addr(5), output3, X, 179, 1, Z )," & "238 (BC_1, sdm_addr(4), output3, X, 180, 1, Z )," & "239 (BC_1, sdm_addr(3), output3, X, 181, 1, Z )," & "240 (BC_1, sdm_addr(2), output3, X, 182, 1, Z )," & "241 (BC_1, sdm_addr(1), output3, X, 183, 1, Z )," & "242 (BC_1, sdm_addr(0), output3, X, 184, 1, Z )," & "243 (BC_1, *, control, 1 )," & "244 (BC_1, *, control, 1 )," & "245 (CBSC_1, usb_dneg, bidir, X, 243, 1, Z )," & "246 (CBSC_1, usb_dpos, bidir, X, 244, 1, Z )," & "247 (BC_1, *, control, 1 )," & "248 (BC_1, *, control, 1 )," & "249 (BC_1, *, control, 1 )," & "250 (BC_1, *, control, 1 )," & "251 (BC_1, *, control, 1 )," & "252 (BC_1, *, control, 1 )," & "253 (BC_1, *, control, 1 )," & "254 (BC_1, *, control, 1 )," & "255 (BC_1, *, control, 1 )," & "256 (BC_1, *, control, 1 )," & "257 (BC_1, *, control, 1 )," & "258 (BC_1, *, control, 1 )," & "259 (BC_1, *, control, 1 )," & "260 (BC_1, *, control, 1 )," & "261 (BC_1, *, control, 1 )," & "262 (BC_1, *, control, 1 )," & "263 (BC_1, *, control, 1 )," & "264 (BC_1, *, control, 1 )," & "265 (BC_1, *, control, 1 )," & "266 (BC_1, *, control, 1 )," & "267 (BC_1, *, control, 1 )," & "268 (BC_1, *, control, 1 )," & "269 (BC_1, *, control, 1 )," & "270 (BC_1, *, control, 1 )," & "271 (BC_1, *, control, 1 )," & "272 (BC_1, *, control, 1 )," & "273 (BC_1, *, control, 1 )," & "274 (BC_1, *, control, 1 )," & "275 (BC_1, *, control, 1 )," & "276 (BC_1, *, control, 1 )," & "277 (BC_1, *, control, 1 )," & "278 (BC_1, *, control, 1 )," & "279 (BC_1, *, control, 1 )," & "280 (BC_1, *, control, 1 )," & "281 (BC_1, *, control, 1 )," & "282 (BC_1, *, control, 1 )," & "283 (BC_1, *, control, 1 )," & "284 (BC_1, *, control, 1 )," & "285 (BC_1, *, control, 1 )," & "286 (BC_1, *, control, 1 )," & "287 (BC_1, *, control, 1 )," & "288 (BC_1, *, control, 1 )," & "289 (BC_1, *, control, 1 )," & "290 (BC_1, *, control, 1 )," & "291 (BC_1, *, control, 1 )," & "292 (BC_1, *, control, 1 )," & "293 (BC_1, *, control, 1 )," & "294 (BC_1, *, control, 1 )," & "295 (BC_1, *, control, 1 )," & "296 (BC_1, *, control, 1 )," & "297 (BC_1, *, control, 1 )," & "298 (BC_4, ex_rdy_n(3), input, X )," & "299 (BC_4, ex_rdy_n(2), input, X )," & "300 (BC_4, ex_rdy_n(1), input, X )," & "301 (BC_4, ex_rdy_n(0), input, X )," & "302 (CBSC_1, ex_data(15), bidir, X, 247, 1, Z )," & "303 (CBSC_1, ex_data(14), bidir, X, 248, 1, Z )," & "304 (CBSC_1, ex_data(13), bidir, X, 249, 1, Z )," & "305 (CBSC_1, ex_data(12), bidir, X, 250, 1, Z )," & "306 (CBSC_1, ex_data(11), bidir, X, 251, 1, Z )," & "307 (CBSC_1, ex_data(10), bidir, X, 252, 1, Z )," & "308 (CBSC_1, ex_data(9), bidir, X, 253, 1, Z )," & "309 (CBSC_1, ex_data(8), bidir, X, 254, 1, Z )," & "310 (CBSC_1, ex_data(7), bidir, X, 255, 1, Z )," & "311 (CBSC_1, ex_data(6), bidir, X, 256, 1, Z )," & "312 (CBSC_1, ex_data(5), bidir, X, 257, 1, Z )," & "313 (CBSC_1, ex_data(4), bidir, X, 258, 1, Z )," & "314 (CBSC_1, ex_data(3), bidir, X, 259, 1, Z )," & "315 (CBSC_1, ex_data(2), bidir, X, 260, 1, Z )," & "316 (CBSC_1, ex_data(1), bidir, X, 261, 1, Z )," & "317 (CBSC_1, ex_data(0), bidir, X, 262, 1, Z )," & "318 (BC_1, ex_cs_n(7), output3, X, 263, 1, Z )," & "319 (BC_1, ex_cs_n(6), output3, X, 264, 1, Z )," & "320 (BC_1, ex_cs_n(5), output3, X, 265, 1, Z )," & "321 (BC_1, ex_cs_n(4), output3, X, 266, 1, Z )," & "322 (BC_1, ex_cs_n(3), output3, X, 267, 1, Z )," & "323 (BC_1, ex_cs_n(2), output3, X, 268, 1, Z )," & "324 (BC_1, ex_cs_n(1), output3, X, 269, 1, Z )," & "325 (BC_1, ex_cs_n(0), output3, X, 270, 1, Z )," & "326 (BC_1, ex_rd_n, output3, X, 271, 1, Z )," & "327 (BC_1, ex_wr_n, output3, X, 272, 1, Z )," & "328 (CBSC_1, ex_addr(23), bidir, X, 273, 1, Z )," & "329 (CBSC_1, ex_addr(22), bidir, X, 274, 1, Z )," & "330 (CBSC_1, ex_addr(21), bidir, X, 275, 1, Z )," & "331 (CBSC_1, ex_addr(20), bidir, X, 276, 1, Z )," & "332 (CBSC_1, ex_addr(19), bidir, X, 277, 1, Z )," & "333 (CBSC_1, ex_addr(18), bidir, X, 278, 1, Z )," & "334 (CBSC_1, ex_addr(17), bidir, X, 279, 1, Z )," & "335 (CBSC_1, ex_addr(16), bidir, X, 280, 1, Z )," & "336 (CBSC_1, ex_addr(15), bidir, X, 281, 1, Z )," & "337 (CBSC_1, ex_addr(14), bidir, X, 282, 1, Z )," & "338 (CBSC_1, ex_addr(13), bidir, X, 283, 1, Z )," & "339 (CBSC_1, ex_addr(12), bidir, X, 284, 1, Z )," & "340 (CBSC_1, ex_addr(11), bidir, X, 285, 1, Z )," & "341 (CBSC_1, ex_addr(10), bidir, X, 286, 1, Z )," & "342 (CBSC_1, ex_addr(9), bidir, X, 287, 1, Z )," & "343 (CBSC_1, ex_addr(8), bidir, X, 288, 1, Z )," & "344 (CBSC_1, ex_addr(7), bidir, X, 289, 1, Z )," & "345 (CBSC_1, ex_addr(6), bidir, X, 290, 1, Z )," & "346 (CBSC_1, ex_addr(5), bidir, X, 291, 1, Z )," & "347 (CBSC_1, ex_addr(4), bidir, X, 292, 1, Z )," & "348 (CBSC_1, ex_addr(3), bidir, X, 293, 1, Z )," & "349 (CBSC_1, ex_addr(2), bidir, X, 294, 1, Z )," & "350 (CBSC_1, ex_addr(1), bidir, X, 295, 1, Z )," & "351 (CBSC_1, ex_addr(0), bidir, X, 296, 1, Z )," & "352 (BC_1, ex_ale, output3, X, 297, 1, Z )," & "353 (BC_4, ex_clk, input, X )," & "354 (BC_4, ex_iowait_n, input, X )," & "355 (BC_1, *, control, 1 )," & "356 (BC_1, *, control, 1 )," & "357 (BC_1, *, control, 1 )," & "358 (BC_1, *, control, 1 )," & "359 (BC_1, *, control, 1 )," & "360 (BC_1, *, control, 1 )," & "361 (BC_1, *, control, 1 )," & "362 (BC_1, *, control, 1 )," & "363 (BC_1, *, control, 1 )," & "364 (BC_1, *, control, 1 )," & "365 (BC_1, *, control, 1 )," & "366 (BC_1, *, control, 1 )," & "367 (BC_1, *, control, 1 )," & "368 (BC_1, *, control, 1 )," & "369 (BC_1, *, control, 1 )," & "370 (CBSC_1, gpio(15), bidir, X, 355, 1, Z )," & "371 (CBSC_1, gpio(14), bidir, X, 356, 1, Z )," & "372 (CBSC_1, gpio(13), bidir, X, 357, 1, Z )," & "373 (CBSC_1, gpio(12), bidir, X, 358, 1, Z )," & "374 (CBSC_1, gpio(11), bidir, X, 359, 1, Z )," & "375 (CBSC_1, gpio(10), bidir, X, 360, 1, Z )," & "376 (CBSC_1, gpio(9), bidir, X, 361, 1, Z )," & "377 (CBSC_1, gpio(8), bidir, X, 362, 1, Z )," & "378 (CBSC_1, gpio(7), bidir, X, 363, 1, Z )," & "379 (CBSC_1, gpio(6), bidir, X, 364, 1, Z )," & "380 (CBSC_1, gpio(5), bidir, X, 365, 1, Z )," & "381 (CBSC_1, gpio(4), bidir, X, 366, 1, Z )," & "382 (CBSC_1, gpio(3), bidir, X, 367, 1, Z )," & "383 (CBSC_1, gpio(2), bidir, X, 368, 1, Z )," & "384 (CBSC_1, gpio(1), bidir, X, 369, 1, Z )," & "385 (BC_1, *, control, 1 )," & "386 (BC_1, *, control, 1 )," & "387 (BC_4, cts1_n, input, X )," & "388 (BC_4, rxdata1, input, X )," & "389 (BC_1, rts1_n, output3, X, 385, 1, Z )," & "390 (BC_1, txdata1, output3, X, 386, 1, Z )," & "391 (BC_1, *, control, 1 )," & "392 (BC_1, *, control, 1 )," & "393 (BC_4, cts0_n, input, X )," & "394 (BC_4, rxdata0, input, X )," & "395 (BC_1, rts0_n, output3, X, 391, 1, Z )," & "396 (BC_1, txdata0, output3, X, 392, 1, Z )," & "397 (BC_1, *, control, 1 )," & "398 (BC_1, *, control, 1 )," & "399 (BC_1, *, control, 1 )," & "400 (BC_1, *, control, 1 )," & "401 (BC_1, *, control, 1 )," & "402 (BC_1, *, control, 1 )," & "403 (BC_1, *, control, 1 )," & "404 (BC_1, *, control, 1 )," & "405 (BC_1, *, control, 1 )," & "406 (BC_1, *, control, 1 )," & "407 (BC_1, *, control, 1 )," & "408 (BC_1, *, control, 1 )," & "409 (BC_1, *, control, 1 )," & "410 (BC_1, *, control, 1 )," & "411 (BC_1, *, control, 1 )," & "412 (BC_1, *, control, 1 )," & "413 (BC_1, *, control, 1 )," & "414 (BC_1, *, control, 1 )," & "415 (BC_1, *, control, 1 )," & "416 (BC_1, *, control, 1 )," & "417 (BC_1, *, control, 1 )," & "418 (CBSC_1, utp_ip_addr(4), bidir, X, 397, 1, Z )," & "419 (CBSC_1, utp_ip_addr(3), bidir, X, 398, 1, Z )," & "420 (CBSC_1, utp_ip_addr(2), bidir, X, 399, 1, Z )," & "421 (CBSC_1, utp_ip_addr(1), bidir, X, 400, 1, Z )," & "422 (CBSC_1, utp_ip_addr(0), bidir, X, 401, 1, Z )," & "423 (BC_4, utp_ip_data(7), input, X )," & "424 (BC_4, utp_ip_data(6), input, X )," & "425 (BC_4, utp_ip_data(5), input, X )," & "426 (BC_4, utp_ip_data(4), input, X )," & "427 (BC_4, utp_ip_data(3), input, X )," & "428 (BC_4, utp_ip_data(2), input, X )," & "429 (BC_4, utp_ip_data(1), input, X )," & "430 (BC_4, utp_ip_data(0), input, X )," & "431 (BC_4, utp_ip_soc, input, X )," & "432 (BC_4, utp_ip_fci, input, X )," & "433 (BC_1, utp_ip_fco, output3, X, 402, 1, Z )," & "434 (BC_4, utp_ip_clk, input, X )," & "435 (CBSC_1, utp_op_addr(4), bidir, X, 403, 1, Z )," & "436 (CBSC_1, utp_op_addr(3), bidir, X, 404, 1, Z )," & "437 (CBSC_1, utp_op_addr(2), bidir, X, 405, 1, Z )," & "438 (CBSC_1, utp_op_addr(1), bidir, X, 406, 1, Z )," & "439 (CBSC_1, utp_op_addr(0), bidir, X, 407, 1, Z )," & "440 (BC_1, utp_op_soc, output3, X, 408, 1, Z )," & "441 (BC_1, utp_op_data(7), output3, X, 409, 1, Z )," & "442 (BC_1, utp_op_data(6), output3, X, 410, 1, Z )," & "443 (BC_1, utp_op_data(5), output3, X, 411, 1, Z )," & "444 (BC_1, utp_op_data(4), output3, X, 412, 1, Z )," & "445 (BC_1, utp_op_data(3), output3, X, 413, 1, Z )," & "446 (BC_1, utp_op_data(2), output3, X, 414, 1, Z )," & "447 (BC_1, utp_op_data(1), output3, X, 415, 1, Z )," & "448 (BC_1, utp_op_data(0), output3, X, 416, 1, Z )," & "449 (BC_4, utp_op_fci, input, X )," & "450 (BC_1, utp_op_fco, output3, X, 417, 1, Z )," & "451 (BC_4, utp_op_clk, input, X )," & "452 (BC_1, *, control, 1 )," & "453 (BC_4, reset_in_n, input, X )," & "454 (BC_1, pll_lock, output3, X, 452, 1, Z )," & "455 (BC_4, bypass_clk, input, X )," & "456 (BC_1, *, control, 1 )," & "457 (BC_1, *, control, 1 )," & "458 (BC_1, *, control, 1 )," & "459 (BC_1, *, control, 1 )," & "460 (BC_1, *, control, 1 )," & "461 (BC_4, eth_col1, input, X )," & "462 (BC_4, eth_crs1, input, X )," & "463 (BC_4, eth_rxclk1, input, X )," & "464 (BC_4, eth_rxdata1(3), input, X )," & "465 (BC_4, eth_rxdata1(2), input, X )," & "466 (BC_4, eth_rxdata1(1), input, X )," & "467 (BC_4, eth_rxdata1(0), input, X )," & "468 (BC_4, eth_rxdv1, input, X )," & "469 (BC_4, eth_txclk1, input, X )," & "470 (BC_1, eth_txdata1(3), output3, X, 456, 1, Z )," & "471 (BC_1, eth_txdata1(2), output3, X, 457, 1, Z )," & "472 (BC_1, eth_txdata1(1), output3, X, 458, 1, Z )," & "473 (BC_1, eth_txdata1(0), output3, X, 459, 1, Z )," & "474 (BC_1, eth_txen1, output3, X, 460, 1, Z )," & "475 (BC_1, *, control, 1 )," & "476 (BC_1, *, control, 1 )," & "477 (BC_1, *, control, 1 )," & "478 (BC_1, *, control, 1 )," & "479 (BC_1, *, control, 1 )," & "480 (BC_1, *, control, 1 )," & "481 (BC_1, *, control, 1 )," & "482 (CBSC_1, eth_mdc, bidir, X, 475, 1, Z )," & "483 (CBSC_1, eth_mdio, bidir, X, 476, 1, Z )," & "484 (BC_4, eth_col0, input, X )," & "485 (BC_4, eth_crs0, input, X )," & "486 (BC_4, eth_rxclk0, input, X )," & "487 (BC_4, eth_rxdata0(3), input, X )," & "488 (BC_4, eth_rxdata0(2), input, X )," & "489 (BC_4, eth_rxdata0(1), input, X )," & "490 (BC_4, eth_rxdata0(0), input, X )," & "491 (BC_4, eth_rxdv0, input, X )," & "492 (BC_4, eth_txclk0, input, X )," & "493 (BC_1, eth_txdata0(3), output3, X, 477, 1, Z )," & "494 (BC_1, eth_txdata0(2), output3, X, 478, 1, Z )," & "495 (BC_1, eth_txdata0(1), output3, X, 479, 1, Z )," & "496 (BC_1, eth_txdata0(0), output3, X, 480, 1, Z )," & "497 (BC_1, eth_txen0, output3, X, 481, 1, Z )"; end IXP425;