-- ***************************************************************************** -- Copyright (c) 2008 NXP B.V. All rights reserved. -- BSDL file for design LPC2458FET180 Revision B -- Created by Synopsys Version Y-2006.06-SP2 (Sep 01, 2006) -- Version: 1.0 -- Date: Apr 22, 2008 -- ***************************************************************************** entity LPC2458FET180 is -- This section identifies the default device package selected. generic (PHYSICAL_PIN_MAP: string:= "TFBGA180"); -- This section declares all the ports in the design. port ( DBGEN : in bit; TCK : in bit; TDI : in bit; TMS : in bit; TRST_N : in bit; P0_0 : inout bit; P0_1 : inout bit; P0_2 : inout bit; P0_3 : inout bit; P0_4 : inout bit; P0_5 : inout bit; P0_6 : inout bit; P0_7 : inout bit; P0_8 : inout bit; P0_9 : inout bit; P0_10 : inout bit; P0_11 : inout bit; P0_12 : inout bit; P0_13 : inout bit; P0_14 : inout bit; P0_15 : inout bit; P0_16 : inout bit; P0_17 : inout bit; P0_18 : inout bit; P0_19 : inout bit; P0_20 : inout bit; P0_21 : inout bit; P0_22 : inout bit; P0_23 : inout bit; P0_24 : inout bit; P0_25 : inout bit; P0_26 : inout bit; P0_27 : inout bit; P0_28 : inout bit; P1_0 : inout bit; P1_1 : inout bit; P1_2 : inout bit; P1_3 : inout bit; P1_4 : inout bit; P1_5 : inout bit; P1_6 : inout bit; P1_7 : inout bit; P1_8 : inout bit; P1_9 : inout bit; P1_10 : inout bit; P1_11 : inout bit; P1_12 : inout bit; P1_13 : inout bit; P1_14 : inout bit; P1_15 : inout bit; P1_16 : inout bit; P1_17 : inout bit; P1_18 : inout bit; P1_19 : inout bit; P1_20 : inout bit; P1_21 : inout bit; P1_22 : inout bit; P1_23 : inout bit; P1_24 : inout bit; P1_25 : inout bit; P1_26 : inout bit; P1_27 : inout bit; P1_28 : inout bit; P1_29 : inout bit; P1_30 : inout bit; P1_31 : inout bit; P2_0 : inout bit; P2_1 : inout bit; P2_2 : inout bit; P2_3 : inout bit; P2_4 : inout bit; P2_5 : inout bit; P2_6 : inout bit; P2_7 : inout bit; P2_8 : inout bit; P2_9 : inout bit; P2_10 : inout bit; P2_11 : inout bit; P2_12 : inout bit; P2_13 : inout bit; P2_16 : inout bit; P2_17 : inout bit; P2_18 : inout bit; P2_19 : inout bit; P2_20 : inout bit; P2_21 : inout bit; P2_24 : inout bit; P2_25 : inout bit; P2_28 : inout bit; P2_29 : inout bit; P3_0 : inout bit; P3_1 : inout bit; P3_2 : inout bit; P3_3 : inout bit; P3_4 : inout bit; P3_5 : inout bit; P3_6 : inout bit; P3_7 : inout bit; P3_8 : inout bit; P3_9 : inout bit; P3_10 : inout bit; P3_11 : inout bit; P3_12 : inout bit; P3_13 : inout bit; P3_14 : inout bit; P3_15 : inout bit; P3_23 : inout bit; P3_24 : inout bit; P3_25 : inout bit; P3_26 : inout bit; P4_0 : inout bit; P4_1 : inout bit; P4_2 : inout bit; P4_3 : inout bit; P4_4 : inout bit; P4_5 : inout bit; P4_6 : inout bit; P4_7 : inout bit; P4_8 : inout bit; P4_9 : inout bit; P4_10 : inout bit; P4_11 : inout bit; P4_12 : inout bit; P4_13 : inout bit; P4_14 : inout bit; P4_15 : inout bit; P4_16 : inout bit; P4_17 : inout bit; P4_18 : inout bit; P4_19 : inout bit; P4_24 : inout bit; P4_25 : inout bit; P4_26 : inout bit; P4_27 : inout bit; P4_28 : inout bit; P4_29 : inout bit; P4_30 : inout bit; P4_31 : inout bit; RSTOUT_N : out bit; RTCK : inout bit; TDO : out bit; ALARM : linkage bit; NC : linkage bit_vector (1 to 3); P0_29 : linkage bit; P0_30 : linkage bit; P0_31 : linkage bit; RESET_N : linkage bit; RTCX1 : linkage bit; RTCX2 : linkage bit; USB_DM2 : linkage bit; VBAT : linkage bit; VDCDC : linkage bit_vector (1 to 3); VDD : linkage bit_vector (1 to 8); VDDA : linkage bit; VREF : linkage bit; VSSA : linkage bit; VSSCORE : linkage bit_vector (1 to 3); VSSIO : linkage bit_vector (1 to 8); XTAL1 : linkage bit; XTAL2 : linkage bit ); use STD_1149_1_2001.all; attribute COMPONENT_CONFORMANCE of LPC2458FET180: entity is "STD_1149_1_2001"; attribute PIN_MAP of LPC2458FET180: entity is PHYSICAL_PIN_MAP; -- This section specifies the pin map for each port. This information is -- extracted from the port-to-pin map file that was read in using the -- "read_pin_map" command. constant TFBGA180: PIN_MAP_STRING := "DBGEN : E5," & "TCK : D2," & "TDI : C3," & "TMS : C2," & "TRST_N : D4," & "P0_0 : M10," & "P0_1 : N11," & "P0_2 : D5," & "P0_3 : A3," & "P0_4 : A11," & "P0_5 : B11," & "P0_6 : D11," & "P0_7 : B12," & "P0_8 : C12," & "P0_9 : A13," & "P0_10 : L10," & "P0_11 : P12," & "P0_12 : J4," & "P0_13 : J5," & "P0_14 : M5," & "P0_15 : H13," & "P0_16 : H14," & "P0_17 : J12," & "P0_18 : J13," & "P0_19 : J10," & "P0_20 : K14," & "P0_21 : K11," & "P0_22 : L14," & "P0_23 : F5," & "P0_24 : E1," & "P0_25 : E4," & "P0_26 : D1," & "P0_27 : L3," & "P0_28 : M1," & "P1_0 : B5," & "P1_1 : A5," & "P1_2 : B7," & "P1_3 : A9," & "P1_4 : C6," & "P1_5 : B13," & "P1_6 : B10," & "P1_7 : C13," & "P1_8 : B6," & "P1_9 : D7," & "P1_10 : A7," & "P1_11 : A12," & "P1_12 : A14," & "P1_13 : D14," & "P1_14 : D8," & "P1_15 : A8," & "P1_16 : B8," & "P1_17 : C9," & "P1_18 : L5," & "P1_19 : P5," & "P1_20 : K6," & "P1_21 : N6," & "P1_22 : M6," & "P1_23 : N7," & "P1_24 : P7," & "P1_25 : L7," & "P1_26 : P8," & "P1_27 : M9," & "P1_28 : P10," & "P1_29 : N10," & "P1_30 : K3," & "P1_31 : K2," & "P2_0 : D12," & "P2_1 : C14," & "P2_2 : E11," & "P2_3 : E13," & "P2_4 : E14," & "P2_5 : F12," & "P2_6 : F13," & "P2_7 : G11," & "P2_8 : G14," & "P2_9 : H11," & "P2_10 : M13," & "P2_11 : M12," & "P2_12 : N14," & "P2_13 : M11," & "P2_16 : P9," & "P2_17 : P11," & "P2_18 : P3," & "P2_19 : N5," & "P2_20 : P6," & "P2_21 : N8," & "P2_24 : P1," & "P2_25 : P2," & "P2_28 : M2," & "P2_29 : L1," & "P3_0 : D6," & "P3_1 : E6," & "P3_2 : A2," & "P3_3 : G5," & "P3_4 : D3," & "P3_5 : E3," & "P3_6 : F4," & "P3_7 : G3," & "P3_8 : A6," & "P3_9 : A4," & "P3_10 : B3," & "P3_11 : B2," & "P3_12 : A1," & "P3_13 : C1," & "P3_14 : F1," & "P3_15 : G4," & "P3_23 : M4," & "P3_24 : N3," & "P3_25 : M3," & "P3_26 : K7," & "P4_0 : L6," & "P4_1 : M7," & "P4_2 : M8," & "P4_3 : K9," & "P4_4 : P13," & "P4_5 : H10," & "P4_6 : K10," & "P4_7 : K12," & "P4_8 : J11," & "P4_9 : H12," & "P4_10 : G12," & "P4_11 : F11," & "P4_12 : F10," & "P4_13 : B14," & "P4_14 : E8," & "P4_15 : C10," & "P4_16 : N12," & "P4_17 : N13," & "P4_18 : P14," & "P4_19 : M14," & "P4_24 : C8," & "P4_25 : D9," & "P4_26 : K13," & "P4_27 : F14," & "P4_28 : D10," & "P4_29 : B9," & "P4_30 : C7," & "P4_31 : E7," & "RSTOUT_N : H2," & "RTCK : C4," & "TDO : B1," & "ALARM : H5," & "NC : (H1, L12, G10)," & "P0_29 : K5," & "P0_30 : N4," & "P0_31 : N1," & "RESET_N : J1," & "RTCX1 : J2," & "RTCX2 : J3," & "USB_DM2 : N2," & "VBAT : K1," & "VDCDC : (G1, N9, E9)," & "VDD : (E2, L4, K8, L11, J14, E12, E10, C5)," & "VDDA : F2," & "VREF : G2," & "VSSA : F3," & "VSSCORE : (H3, L8, A10)," & "VSSIO : (H4, P4, L9, L13, G13, D13, C11, B4)," & "XTAL1 : L2," & "XTAL2 : K4"; -- This section specifies the TAP ports. For the TAP TCK port, the parameters in -- the brackets are: -- First Field : Maximum TCK frequency. -- Second Field: Allowable states TCK may be stopped in. attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH); attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_RESET of TRST_N: signal is true; -- Specifies the compliance enable patterns for the design. It lists a set of -- design ports and the values that they should be set to, in order to enable -- compliance to IEEE Std 1149.1 attribute COMPLIANCE_PATTERNS of LPC2458FET180: entity is "(DBGEN) (0)"; -- Specifies the number of bits in the instruction register. attribute INSTRUCTION_LENGTH of LPC2458FET180: entity is 3; -- Specifies the boundary-scan instructions implemented in the design and their -- opcodes. attribute INSTRUCTION_OPCODE of LPC2458FET180: entity is "BYPASS (111)," & "EXTEST (001)," & "SAMPLE (100)," & "PRELOAD (100)," & "CLAMP (010)," & "IDCODE (011)"; -- Specifies the bit pattern that is loaded into the instruction register when -- the TAP controller passes through the Capture-IR state. The standard mandates -- that the two LSBs must be "01". The remaining bits are design specific. attribute INSTRUCTION_CAPTURE of LPC2458FET180: entity is "001"; -- Specifies the bit pattern that is loaded into the DEVICE_ID register during -- the IDCODE instruction when the TAP controller passes through the Capture-DR -- state. attribute IDCODE_REGISTER of LPC2458FET180: entity is "0100" & -- 4-bit version number "0000000111110000" & -- 16-bit part number "00000010101" & -- 11-bit identity of the manufacturer "1"; -- Required by IEEE Std 1149.1 -- This section specifies the test data register placed between TDI and TDO for -- each implemented instruction. attribute REGISTER_ACCESS of LPC2458FET180: entity is "BYPASS (BYPASS, CLAMP)," & "BOUNDARY (EXTEST, SAMPLE, PRELOAD)," & "DEVICE_ID (IDCODE)"; -- Specifies the length of the boundary scan register. attribute BOUNDARY_LENGTH of LPC2458FET180: entity is 317; -- The following list specifies the characteristics of each cell in the boundary -- scan register from TDI to TDO. The following is a description of the label -- fields: -- num : Is the cell number. -- cell : Is the cell type as defined by the standard. -- port : Is the design port name. Control cells do not have a port -- name. -- function: Is the function of the cell as defined by the standard. Is one -- of input, output2, output3, bidir, control or controlr. -- safe : Specifies the value that the BSR cell should be loaded with -- for safe operation when the software might otherwise choose a -- random value. -- ccell : The control cell number. Specifies the control cell that -- drives the output enable for this port. -- disval : Specifies the value that is loaded into the control cell to -- disable the output enable for the corresponding port. -- rslt : Resulting state. Shows the state of the driver when it is -- disabled. attribute BOUNDARY_REGISTER of LPC2458FET180: entity is -- -- num cell port function safe [ccell disval rslt] -- "316 (BC_2, *, control, 1), " & "315 (BC_7, P3_12, bidir, X, 316, 1, Z), " & "314 (BC_2, *, control, 1), " & "313 (BC_7, P3_3, bidir, X, 314, 1, Z), " & "312 (BC_0, *, internal, X), " & "311 (BC_0, *, internal, X), " & "310 (BC_2, *, control, 1), " & "309 (BC_7, P3_13, bidir, X, 310, 1, Z), " & "308 (BC_0, *, internal, X), " & "307 (BC_0, *, internal, X), " & "306 (BC_2, *, control, 1), " & "305 (BC_7, P0_26, bidir, X, 306, 1, Z), " & "304 (BC_2, *, control, 1), " & "303 (BC_7, P3_4, bidir, X, 304, 1, Z), " & "302 (BC_2, *, control, 1), " & "301 (BC_7, P0_25, bidir, X, 302, 1, Z), " & "300 (BC_2, *, control, 1), " & "299 (BC_7, P0_24, bidir, X, 300, 1, Z), " & "298 (BC_2, *, control, 1), " & "297 (BC_7, P3_5, bidir, X, 298, 1, Z), " & "296 (BC_2, *, control, 1), " & "295 (BC_7, P0_23, bidir, X, 296, 1, Z), " & "294 (BC_0, *, internal, X), " & "293 (BC_0, *, internal, X), " & "292 (BC_2, *, control, 1), " & "291 (BC_7, P3_14, bidir, X, 292, 1, Z), " & "290 (BC_2, *, control, 1), " & "289 (BC_7, P3_6, bidir, X, 290, 1, Z), " & "288 (BC_0, *, internal, X), " & "287 (BC_0, *, internal, X), " & "286 (BC_2, *, control, 1), " & "285 (BC_7, P3_7, bidir, X, 286, 1, Z), " & "284 (BC_2, *, control, 1), " & "283 (BC_7, P3_15, bidir, X, 284, 1, Z), " & "282 (BC_1, RSTOUT_N, output2, X), " & "281 (BC_0, *, internal, X), " & "280 (BC_0, *, internal, X), " & "279 (BC_0, *, internal, X), " & "278 (BC_0, *, internal, X), " & "277 (BC_2, *, control, 1), " & "276 (BC_7, P1_31, bidir, X, 277, 1, Z), " & "275 (BC_2, *, control, 1), " & "274 (BC_7, P0_12, bidir, X, 275, 1, Z), " & "273 (BC_2, *, control, 1), " & "272 (BC_7, P1_30, bidir, X, 273, 1, Z), " & "271 (BC_2, *, control, 1), " & "270 (BC_7, P2_29, bidir, X, 271, 1, Z), " & "269 (BC_2, *, control, 1), " & "268 (BC_7, P0_13, bidir, X, 269, 1, Z), " & "267 (BC_0, *, internal, X), " & "266 (BC_0, *, internal, X), " & "265 (BC_2, P0_28, output2, 1, 265, 1, Z), " & "264 (BC_2, P0_28, input, X), " & "263 (BC_2, *, control, 1), " & "262 (BC_7, P2_28, bidir, X, 263, 1, Z), " & "261 (BC_2, P0_27, output2, 1, 261, 1, Z), " & "260 (BC_2, P0_27, input, X), " & "259 (BC_2, *, control, 1), " & "258 (BC_7, P2_24, bidir, X, 259, 1, Z), " & "257 (BC_2, *, control, 1), " & "256 (BC_7, P2_25, bidir, X, 257, 1, Z), " & "255 (BC_2, *, control, 1), " & "254 (BC_7, P3_26, bidir, X, 255, 1, Z), " & "253 (BC_2, *, control, 1), " & "252 (BC_7, P3_25, bidir, X, 253, 1, Z), " & "251 (BC_0, *, internal, X), " & "250 (BC_0, *, internal, X), " & "249 (BC_2, *, control, 1), " & "248 (BC_7, P3_24, bidir, X, 249, 1, Z), " & "247 (BC_2, *, control, 1), " & "246 (BC_7, P2_18, bidir, X, 247, 1, Z), " & "245 (BC_0, *, internal, X), " & "244 (BC_0, *, internal, X), " & "243 (BC_2, *, control, 1), " & "242 (BC_7, P3_23, bidir, X, 243, 1, Z), " & "241 (BC_2, *, control, 1), " & "240 (BC_7, P1_18, bidir, X, 241, 1, Z), " & "239 (BC_2, *, control, 1), " & "238 (BC_7, P2_19, bidir, X, 239, 1, Z), " & "237 (BC_2, *, control, 1), " & "236 (BC_7, P1_19, bidir, X, 237, 1, Z), " & "235 (BC_2, *, control, 1), " & "234 (BC_7, P0_14, bidir, X, 235, 1, Z), " & "233 (BC_2, *, control, 1), " & "232 (BC_7, P1_20, bidir, X, 233, 1, Z), " & "231 (BC_2, *, control, 1), " & "230 (BC_7, P1_21, bidir, X, 231, 1, Z), " & "229 (BC_2, *, control, 1), " & "228 (BC_7, P2_20, bidir, X, 229, 1, Z), " & "227 (BC_2, *, control, 1), " & "226 (BC_7, P1_22, bidir, X, 227, 1, Z), " & "225 (BC_2, *, control, 1), " & "224 (BC_7, P4_0, bidir, X, 225, 1, Z), " & "223 (BC_2, *, control, 1), " & "222 (BC_7, P1_23, bidir, X, 223, 1, Z), " & "221 (BC_2, *, control, 1), " & "220 (BC_7, P1_24, bidir, X, 221, 1, Z), " & "219 (BC_2, *, control, 1), " & "218 (BC_7, P4_1, bidir, X, 219, 1, Z), " & "217 (BC_2, *, control, 1), " & "216 (BC_7, P1_25, bidir, X, 217, 1, Z), " & "215 (BC_2, *, control, 1), " & "214 (BC_7, P2_21, bidir, X, 215, 1, Z), " & "213 (BC_2, *, control, 1), " & "212 (BC_7, P1_26, bidir, X, 213, 1, Z), " & "211 (BC_2, *, control, 1), " & "210 (BC_7, P4_2, bidir, X, 211, 1, Z), " & "209 (BC_0, *, internal, X), " & "208 (BC_0, *, internal, X), " & "207 (BC_2, *, control, 1), " & "206 (BC_7, P2_16, bidir, X, 207, 1, Z), " & "205 (BC_2, *, control, 1), " & "204 (BC_7, P1_27, bidir, X, 205, 1, Z), " & "203 (BC_2, *, control, 1), " & "202 (BC_7, P1_28, bidir, X, 203, 1, Z), " & "201 (BC_0, *, internal, X), " & "200 (BC_0, *, internal, X), " & "199 (BC_2, *, control, 1), " & "198 (BC_7, P1_29, bidir, X, 199, 1, Z), " & "197 (BC_2, *, control, 1), " & "196 (BC_7, P0_0, bidir, X, 197, 1, Z), " & "195 (BC_2, *, control, 1), " & "194 (BC_7, P2_17, bidir, X, 195, 1, Z), " & "193 (BC_2, *, control, 1), " & "192 (BC_7, P0_1, bidir, X, 193, 1, Z), " & "191 (BC_2, *, control, 1), " & "190 (BC_7, P4_3, bidir, X, 191, 1, Z), " & "189 (BC_2, *, control, 1), " & "188 (BC_7, P0_10, bidir, X, 189, 1, Z), " & "187 (BC_0, *, internal, X), " & "186 (BC_0, *, internal, X), " & "185 (BC_2, *, control, 1), " & "184 (BC_7, P0_11, bidir, X, 185, 1, Z), " & "183 (BC_2, *, control, 1), " & "182 (BC_7, P4_16, bidir, X, 183, 1, Z), " & "181 (BC_2, *, control, 1), " & "180 (BC_7, P2_13, bidir, X, 181, 1, Z), " & "179 (BC_2, *, control, 1), " & "178 (BC_7, P4_4, bidir, X, 179, 1, Z), " & "177 (BC_2, *, control, 1), " & "176 (BC_7, P4_17, bidir, X, 177, 1, Z), " & "175 (BC_2, *, control, 1), " & "174 (BC_7, P4_18, bidir, X, 175, 1, Z), " & "173 (BC_2, *, control, 1), " & "172 (BC_7, P2_12, bidir, X, 173, 1, Z), " & "171 (BC_2, *, control, 1), " & "170 (BC_7, P4_5, bidir, X, 171, 1, Z), " & "169 (BC_2, *, control, 1), " & "168 (BC_7, P2_11, bidir, X, 169, 1, Z), " & "167 (BC_0, *, internal, X), " & "166 (BC_0, *, internal, X), " & "165 (BC_2, *, control, 1), " & "164 (BC_7, P2_10, bidir, X, 165, 1, Z), " & "163 (BC_2, *, control, 1), " & "162 (BC_7, P4_19, bidir, X, 163, 1, Z), " & "161 (BC_2, *, control, 1), " & "160 (BC_7, P4_6, bidir, X, 161, 1, Z), " & "159 (BC_0, *, internal, X), " & "158 (BC_0, *, internal, X), " & "157 (BC_2, *, control, 1), " & "156 (BC_7, P0_22, bidir, X, 157, 1, Z), " & "155 (BC_2, *, control, 1), " & "154 (BC_7, P0_21, bidir, X, 155, 1, Z), " & "153 (BC_2, *, control, 1), " & "152 (BC_7, P4_26, bidir, X, 153, 1, Z), " & "151 (BC_2, *, control, 1), " & "150 (BC_7, P0_20, bidir, X, 151, 1, Z), " & "149 (BC_2, *, control, 1), " & "148 (BC_7, P4_7, bidir, X, 149, 1, Z), " & "147 (BC_2, *, control, 1), " & "146 (BC_7, P0_19, bidir, X, 147, 1, Z), " & "145 (BC_0, *, internal, X), " & "144 (BC_0, *, internal, X), " & "143 (BC_2, *, control, 1), " & "142 (BC_7, P0_18, bidir, X, 143, 1, Z), " & "141 (BC_2, *, control, 1), " & "140 (BC_7, P0_17, bidir, X, 141, 1, Z), " & "139 (BC_2, *, control, 1), " & "138 (BC_7, P4_8, bidir, X, 139, 1, Z), " & "137 (BC_2, *, control, 1), " & "136 (BC_7, P0_15, bidir, X, 137, 1, Z), " & "135 (BC_0, *, internal, X), " & "134 (BC_0, *, internal, X), " & "133 (BC_2, *, control, 1), " & "132 (BC_7, P0_16, bidir, X, 133, 1, Z), " & "131 (BC_2, *, control, 1), " & "130 (BC_7, P4_9, bidir, X, 131, 1, Z), " & "129 (BC_2, *, control, 1), " & "128 (BC_7, P2_9, bidir, X, 129, 1, Z), " & "127 (BC_2, *, control, 1), " & "126 (BC_7, P2_8, bidir, X, 127, 1, Z), " & "125 (BC_2, *, control, 1), " & "124 (BC_7, P4_10, bidir, X, 125, 1, Z), " & "123 (BC_2, *, control, 1), " & "122 (BC_7, P2_7, bidir, X, 123, 1, Z), " & "121 (BC_0, *, internal, X), " & "120 (BC_0, *, internal, X), " & "119 (BC_2, *, control, 1), " & "118 (BC_7, P2_6, bidir, X, 119, 1, Z), " & "117 (BC_2, *, control, 1), " & "116 (BC_7, P4_27, bidir, X, 117, 1, Z), " & "115 (BC_2, *, control, 1), " & "114 (BC_7, P2_5, bidir, X, 115, 1, Z), " & "113 (BC_2, *, control, 1), " & "112 (BC_7, P2_4, bidir, X, 113, 1, Z), " & "111 (BC_0, *, internal, X), " & "110 (BC_0, *, internal, X), " & "109 (BC_2, *, control, 1), " & "108 (BC_7, P2_3, bidir, X, 109, 1, Z), " & "107 (BC_2, *, control, 1), " & "106 (BC_7, P4_11, bidir, X, 107, 1, Z), " & "105 (BC_2, *, control, 1), " & "104 (BC_7, P1_13, bidir, X, 105, 1, Z), " & "103 (BC_2, *, control, 1), " & "102 (BC_7, P4_12, bidir, X, 103, 1, Z), " & "101 (BC_2, *, control, 1), " & "100 (BC_7, P2_2, bidir, X, 101, 1, Z), " & "99 (BC_0, *, internal, X), " & "98 (BC_0, *, internal, X), " & "97 (BC_2, *, control, 1), " & "96 (BC_7, P2_1, bidir, X, 97, 1, Z), " & "95 (BC_2, *, control, 1), " & "94 (BC_7, P1_7, bidir, X, 95, 1, Z), " & "93 (BC_2, *, control, 1), " & "92 (BC_7, P2_0, bidir, X, 93, 1, Z), " & "91 (BC_2, *, control, 1), " & "90 (BC_7, P4_13, bidir, X, 91, 1, Z), " & "89 (BC_2, *, control, 1), " & "88 (BC_7, P1_5, bidir, X, 89, 1, Z), " & "87 (BC_2, *, control, 1), " & "86 (BC_7, P1_12, bidir, X, 87, 1, Z), " & "85 (BC_2, *, control, 1), " & "84 (BC_7, P0_9, bidir, X, 85, 1, Z), " & "83 (BC_2, *, control, 1), " & "82 (BC_7, P4_14, bidir, X, 83, 1, Z), " & "81 (BC_2, *, control, 1), " & "80 (BC_7, P0_8, bidir, X, 81, 1, Z), " & "79 (BC_0, *, internal, X), " & "78 (BC_0, *, internal, X), " & "77 (BC_2, *, control, 1), " & "76 (BC_7, P0_7, bidir, X, 77, 1, Z), " & "75 (BC_2, *, control, 1), " & "74 (BC_7, P1_11, bidir, X, 75, 1, Z), " & "73 (BC_2, *, control, 1), " & "72 (BC_7, P0_6, bidir, X, 73, 1, Z), " & "71 (BC_2, *, control, 1), " & "70 (BC_7, P0_5, bidir, X, 71, 1, Z), " & "69 (BC_0, *, internal, X), " & "68 (BC_0, *, internal, X), " & "67 (BC_2, *, control, 1), " & "66 (BC_7, P0_4, bidir, X, 67, 1, Z), " & "65 (BC_2, *, control, 1), " & "64 (BC_7, P4_28, bidir, X, 65, 1, Z), " & "63 (BC_2, *, control, 1), " & "62 (BC_7, P1_6, bidir, X, 63, 1, Z), " & "61 (BC_2, *, control, 1), " & "60 (BC_7, P4_15, bidir, X, 61, 1, Z), " & "59 (BC_0, *, internal, X), " & "58 (BC_0, *, internal, X), " & "57 (BC_2, *, control, 1), " & "56 (BC_7, P4_29, bidir, X, 57, 1, Z), " & "55 (BC_2, *, control, 1), " & "54 (BC_7, P1_3, bidir, X, 55, 1, Z), " & "53 (BC_2, *, control, 1), " & "52 (BC_7, P1_17, bidir, X, 53, 1, Z), " & "51 (BC_2, *, control, 1), " & "50 (BC_7, P4_25, bidir, X, 51, 1, Z), " & "49 (BC_2, *, control, 1), " & "48 (BC_7, P1_16, bidir, X, 49, 1, Z), " & "47 (BC_2, *, control, 1), " & "46 (BC_7, P1_15, bidir, X, 47, 1, Z), " & "45 (BC_2, *, control, 1), " & "44 (BC_7, P4_24, bidir, X, 45, 1, Z), " & "43 (BC_2, *, control, 1), " & "42 (BC_7, P1_14, bidir, X, 43, 1, Z), " & "41 (BC_2, *, control, 1), " & "40 (BC_7, P1_2, bidir, X, 41, 1, Z), " & "39 (BC_2, *, control, 1), " & "38 (BC_7, P1_10, bidir, X, 39, 1, Z), " & "37 (BC_2, *, control, 1), " & "36 (BC_7, P4_30, bidir, X, 37, 1, Z), " & "35 (BC_2, *, control, 1), " & "34 (BC_7, P1_9, bidir, X, 35, 1, Z), " & "33 (BC_2, *, control, 1), " & "32 (BC_7, P1_8, bidir, X, 33, 1, Z), " & "31 (BC_2, *, control, 1), " & "30 (BC_7, P3_8, bidir, X, 31, 1, Z), " & "29 (BC_2, *, control, 1), " & "28 (BC_7, P1_4, bidir, X, 29, 1, Z), " & "27 (BC_2, *, control, 1), " & "26 (BC_7, P4_31, bidir, X, 27, 1, Z), " & "25 (BC_2, *, control, 1), " & "24 (BC_7, P1_1, bidir, X, 25, 1, Z), " & "23 (BC_0, *, internal, X), " & "22 (BC_0, *, internal, X), " & "21 (BC_2, *, control, 1), " & "20 (BC_7, P1_0, bidir, X, 21, 1, Z), " & "19 (BC_2, *, control, 1), " & "18 (BC_7, P3_0, bidir, X, 19, 1, Z), " & "17 (BC_2, *, control, 1), " & "16 (BC_7, P3_9, bidir, X, 17, 1, Z), " & "15 (BC_2, *, control, 1), " & "14 (BC_7, P3_1, bidir, X, 15, 1, Z), " & "13 (BC_2, *, control, 1), " & "12 (BC_7, P0_2, bidir, X, 13, 1, Z), " & "11 (BC_0, *, internal, X), " & "10 (BC_0, *, internal, X), " & "9 (BC_2, *, control, 1), " & "8 (BC_7, P0_3, bidir, X, 9, 1, Z), " & "7 (BC_2, *, control, 1), " & "6 (BC_7, P3_10, bidir, X, 7, 1, Z), " & "5 (BC_2, *, control, 1), " & "4 (BC_7, RTCK, bidir, X, 5, 1, PULL1)," & "3 (BC_2, *, control, 1), " & "2 (BC_7, P3_2, bidir, X, 3, 1, Z), " & "1 (BC_2, *, control, 1), " & "0 (BC_7, P3_11, bidir, X, 1, 1, Z) "; end LPC2458FET180;