---------------------------------------------------------------------- -- BSDL Description for RM48LxPGE -- -- Revised 12 April 2013 -- ---------------------------------------------------------------------- -- Supported Devices: RM48LxPGE Revision 1.5 -- ---------------------------------------------------------------------- -- Created by : Texas Instruments Incorporated -- -- Marley Morrell -- -- BSDL Revision : 1.5 Consolidated packages -- -- BSDL Revision : 1.4 Updated power and ground numbers -- -- BSDL Revision : 1.2 Pin numbers change to letter/number -- -- BSDL Revision : 1.0 Released -- -- BSDL Revision : 0.2 Beta Testing -- -- BSDL Revision : 0.1 originally created -- -- -- -- BSDL Status : Released -- -- Date Created : 16 March 2011 -- -- Revision : 0.5 -- ---------------------------------------------------------------------- -- -- -- IMPORTANT NOTICE -- Texas Instruments Incorporated (TI) reserves the right to make -- changes to its products or to discontinue any semiconductor -- product or service without notice, and advises its customers to -- obtain the latest version of the relevant information to -- verify, before placing orders, that the information being -- relied on is current. -- TI warrants performance of its semiconductor products and -- related software to the specifications applicable at the time -- of sale in accordance with TI's standard warranty. Testing and -- other quality control techniques are utilized to the extent TI -- deems necessary to support this warranty. Specific testing of -- all parameters of each device is not necessarily performed, -- except those mandated by government requirements. -- -- Certain applications using semiconductor devices may involve -- potential risks of death, personal injury, or severe property -- or environmental damage ("Critical Applications"). -- TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, -- AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN -- LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER -- CRITICAL APPLICATIONS. -- Inclusion of TI products in such applications is understood -- to be fully at the risk of the customer. Use of TI products -- in such applications requires the written approval of an -- appropriate TI officer. Questions concerning potential risk -- applications should be directed to TI through a local SC sales -- office. -- In order to minimize risks associated with the customer's -- applications, adequate design and operating safeguards should -- be provided by the -- customer to minimize inherent or procedural hazards. -- -- TI assumes no liability for applications assistance, customer -- product design, software performance, or infringement of -- patents or services described herein. Nor does TI warrant or -- represent that any license, either express or implied, is -- granted under any patent right, copyright, mask work right, or -- other intellectual property right of TI covering or relating -- to any combination, machine, or process in which such -- semiconductor products or services might be or are used. -- Also see: Standard Terms and Conditions of Sale for Semiconductor -- -- Products. www.ti.com/sc/docs/stdterms.htm -- -- -- -- Mailing Address: -- -- -- -- Texas Instruments -- -- Post Office Box 655303 -- -- Dallas, Texas 75265 -- -- Copyright (c) 2012, Texas Instruments Incorporated -- ------------------------------------------------------------------- entity RM48LxPGE is -- This section identifies the default device package selected. generic (PHYSICAL_PIN_MAP: string:= "PGEB"); -- This section declares all the ports in the design. port ( GIOB_3 : inout bit; FRAYTX2 : out bit; GIOA_0 : inout bit; FRAYRX2 : in bit; MIBSPI3nCS_3 : inout bit; NHET_29 : inout bit; MIBSPI3nCS_2 : inout bit; NHET_27 : inout bit; FRAYTXEN2 : out bit; GIOA_1 : inout bit; NHET_11 : inout bit; ETMDATA_20 : inout bit; ETMDATA_21 : inout bit; GIOA_2 : inout bit; ETMDATA_22 : inout bit; GIOB_4 : inout bit; CAN3RX : inout bit; GIOA_3 : inout bit; GIOB_5 : inout bit; CAN3TX : inout bit; GIOA_4 : inout bit; GIOA_5 : inout bit; EMIF_CLK : inout bit; ETMDATA_23 : inout bit; NHET_22 : inout bit; GIOA_6 : inout bit; ETMDATA_24 : inout bit; EMIF_CKE : inout bit; GIOA_7 : inout bit; GIOB_6 : inout bit; ETMDATA_25 : inout bit; NHET_1 : inout bit; NHET_3 : inout bit; NHET_0 : inout bit; NHET_2 : inout bit; EMIF_nWAIT : inout bit; NHET_5 : inout bit; EMIF_nRAS : inout bit; ETMDATA_26 : inout bit; MIBSPI5NCS_0 : inout bit; SPI2nCS0 : inout bit; NHET_7 : inout bit; EMIF_nCAS : inout bit; TEST : in bit; ETMDATA_27 : inout bit; NHET_9 : inout bit; NHET_4 : inout bit; ETMDATA_28 : inout bit; ETMDATA_29 : inout bit; MIBSPI3nCS_1 : inout bit; NHET_25 : inout bit; NHET_6 : inout bit; ETMDATA_30 : inout bit; NHET_13 : inout bit; MIBSPI1nCS_2 : inout bit; NHET_19 : inout bit; NHET_15 : inout bit; ETMDATA_31 : inout bit; nPORRST : in bit; ETMTRACECLKIN : inout bit; MIBSPI3SOMI : inout bit; MIBSPI3SIMO : inout bit; MIBSPI3CLK : inout bit; MIBSPI3nENA : inout bit; NHET_31 : inout bit; ETMTRACECLKOUT : inout bit; MIBSPI3nCS_0 : inout bit; GIOB_7 : inout bit; ETMTRACECTL : inout bit; MIBSPI1nCS_3 : inout bit; NHET_21 : inout bit; ETMDATA_0 : inout bit; ETMDATA_1 : inout bit; AD1EVT : inout bit; ETMDATA_19 : inout bit; EMIF_nCS0 : inout bit; ETMDATA_18 : inout bit; EMIF_nCS2 : inout bit; EMIF_nCS3 : inout bit; EMIF_nCS4 : inout bit; CAN1TX : inout bit; CAN1RX : inout bit; ETMDATA_17 : inout bit; NHET_24 : inout bit; NHET_26 : inout bit; ETMDATA_16 : inout bit; MIBSPI1SIMO : inout bit; MIBSPI1SOMI : inout bit; MIBSPI1CLK : inout bit; MIBSPI1nENA : inout bit; NHET_23 : inout bit; ETMDATA_2 : inout bit; MIBSPI5NCS_1 : inout bit; MIBSPI5NCS_2 : inout bit; MIBSPI5NCS_3 : inout bit; SPI2nENA : inout bit; MIBSPI5NENA : inout bit; SPI2SOMI : inout bit; MIBSPI5SOMI_0 : inout bit; SPI2SIMO : inout bit; MIBSPI5SIMO_0 : inout bit; ETMDATA_3 : inout bit; MIBSPI5SIMO_1 : inout bit; MIBSPI5CLK : inout bit; SPI2CLK : inout bit; MIBSPI5SIMO_2 : inout bit; MIBSPI5SIMO_3 : inout bit; MIBSPI5SOMI_1 : inout bit; MIBSPI5SOMI_2 : inout bit; MIBSPI5SOMI_3 : inout bit; ETMDATA_4 : inout bit; MIBSPI1nCS_0 : inout bit; NHET_8 : inout bit; NHET_28 : inout bit; ETMDATA_5 : inout bit; TMS : in bit; EMIF_nWE : inout bit; EMIF_BA1 : inout bit; ETMDATA_6 : inout bit; EMIF_ADDR2_21 : inout bit; nTRST : in bit; TDI : in bit; EMIF_ADDR2_20 : inout bit; EMIF_ADDR2_19 : inout bit; EMIF_ADDR2_18 : inout bit; TDO : out bit; TCK : in bit; RTCK : linkage bit; ETMDATA_12 : inout bit; nRST : inout bit; EMIF_ADDR2_17 : inout bit; EMIF_ADDR2_16 : inout bit; ETMDATA_13 : inout bit; nERROR : inout bit; ETMDATA_7 : inout bit; DMM_CLK : inout bit; NHET_10 : inout bit; ECLK : inout bit; ETMDATA_14 : inout bit; NHET_12 : inout bit; ETMDATA_8 : inout bit; EMIF_ADDR2_15 : inout bit; DMM_SYNC : inout bit; NHET_14 : inout bit; EMIF_ADDR2_14 : inout bit; FRAYRX1 : in bit; GIOB_0 : inout bit; ETMDATA_9 : inout bit; DMM_nENA : inout bit; NHET_30 : inout bit; CAN2TX : inout bit; ETMDATA_15 : inout bit; ETMDATA_10 : inout bit; CAN2RX : inout bit; EMIF_ADDR2_13 : inout bit; EMIF_ADDR2_12 : inout bit; DMM_DATA_0 : inout bit; MIBSPI1nCS_1 : inout bit; NHET_17 : inout bit; LINRX : inout bit; LINTX : inout bit; EMIF_ADDR2_11 : inout bit; EMIF_ADDR1_1 : inout bit; GIOB_1 : inout bit; FRAYTX1 : out bit; EMIF_ADDR2_10 : inout bit; EMIF_ADDR2_9 : inout bit; EMIF_ADDR1_0 : inout bit; DMM_DATA_1 : inout bit; NHET_16 : inout bit; EMIF_ADDR2_7 : inout bit; EMIF_ADDR2_6 : inout bit; ETMDATA_11 : inout bit; NHET_18 : inout bit; NHET_20 : inout bit; FRAYTXEN1 : out bit; GIOB_2 : inout bit; EMIF_ADDR2_8 : inout bit; AD1IN_23 : linkage bit; AD1IN_3 : linkage bit; AD1IN_2 : linkage bit; AD1IN_22 : linkage bit; AD1IN_10 : linkage bit; KELVIN_GND : linkage bit; AD1IN_11 : linkage bit; AD1IN_21 : linkage bit; AD1IN_8 : linkage bit; AD1IN_18 : linkage bit; AD1IN_19 : linkage bit; AD1IN_4 : linkage bit; FLTP1 : linkage bit; AD1IN_20 : linkage bit; OSCOUT : linkage bit; AD1IN_7 : linkage bit; AD1IN_15 : linkage bit; AD1IN_6 : linkage bit; AD1IN_14 : linkage bit; OSCIN : linkage bit; AD1IN_13 : linkage bit; AD1IN_12 : linkage bit; AD1IN_5 : linkage bit; FLTP2 : linkage bit; AD1IN_0 : linkage bit; AD1IN_9 : linkage bit; AD1IN_16 : linkage bit; AD1IN_1 : linkage bit; AD1IN_17 : linkage bit; VCC : linkage bit_vector (0 to 10); VCCIO : linkage bit_vector (0 to 22); VSS : linkage bit_vector (0 to 29); VCCAD : linkage bit; ADREFLO : linkage bit; ADREFHI : linkage bit; VSSAD : linkage bit_vector (0 to 3); VCCPLL : linkage bit; VCCP : linkage bit ); use STD_1149_1_2001.all; attribute COMPONENT_CONFORMANCE of RM48LxPGE: entity is "STD_1149_1_2001"; attribute PIN_MAP of RM48LxPGE: entity is PHYSICAL_PIN_MAP; -- This section specifies the pin map for each port. constant ZWT: PIN_MAP_STRING := "GIOB_3 : W10 ," & "FRAYTX2 : B8 ," & "GIOA_0 : A5 ," & "FRAYRX2 : A8 ," & "MIBSPI3nCS_3 : C3 ," & "NHET_29 : A3 ," & "MIBSPI3nCS_2 : B2 ," & "NHET_27 : A9 ," & "FRAYTXEN2 : B9 ," & "GIOA_1 : C2 ," & "NHET_11 : E3 ," & "ETMDATA_20 : E5 ," & "ETMDATA_21 : F5 ," & "FLTP1 : J5 ," & "FLTP2 : H5 ," & "GIOA_2 : C1 ," & "ETMDATA_22 : G5 ," & "GIOB_4 : G1 ," & "CAN3RX : M19 ," & "GIOA_3 : E1 ," & "GIOB_5 : G2 ," & "CAN3TX : M18 ," & "GIOA_4 : A6 ," & "GIOA_5 : B5 ," & "EMIF_CLK : K3 ," & "ETMDATA_23 : K5 ," & "NHET_22 : B3 ," & "GIOA_6 : H3 ," & "OSCIN : K1 ," & "KELVIN_GND : L2 ," & "OSCOUT : L1 ," & "ETMDATA_24 : L5 ," & "EMIF_CKE : L3 ," & "GIOA_7 : M1 ," & "GIOB_6 : J2 ," & "ETMDATA_25 : M5 ," & "NHET_1 : V2 ," & "NHET_3 : U1 ," & "NHET_0 : K18 ," & "NHET_2 : W5 ," & "EMIF_nWAIT : P3 ," & "NHET_5 : V6 ," & "EMIF_nRAS : R3 ," & "ETMDATA_26 : N5 ," & "MIBSPI5NCS_0 : E19 ," & "SPI2nCS0 : N3 ," & "NHET_7 : T1 ," & "EMIF_nCAS : R4 ," & "TEST : U2 ," & "ETMDATA_27 : P5 ," & "NHET_9 : V7 ," & "NHET_4 : B12 ," & "ETMDATA_28 : R5 ," & "ETMDATA_29 : R6 ," & "MIBSPI3nCS_1 : V5 ," & "NHET_25 : M3 ," & "NHET_6 : W3 ," & "ETMDATA_30 : R7 ," & "NHET_13 : N2 ," & "MIBSPI1nCS_2 : G3 ," & "NHET_19 : B13 ," & "NHET_15 : N1 ," & "ETMDATA_31 : R8 ," & "nPORRST : W7 ," & "ETMTRACECLKIN : R9 ," & "MIBSPI3SOMI : V8 ," & "MIBSPI3SIMO : W8 ," & "MIBSPI3CLK : V9 ," & "MIBSPI3nENA : W9 ," & "NHET_31 : J17 ," & "ETMTRACECLKOUT : R10 ," & "MIBSPI3nCS_0 : V10 ," & "GIOB_7 : F1 ," & "ETMTRACECTL : R11 ," & "MIBSPI1nCS_3 : J3 ," & "NHET_21 : H4 ," & "ETMDATA_0 : R12 ," & "ETMDATA_1 : R13 ," & "AD1IN_16 : V13 ," & "AD1IN_17 : U13 ," & "AD1IN_0 : W14 ," & "AD1IN_7 : V14 ," & "AD1IN_18 : U14 ," & "AD1IN_19 : U16 ," & "AD1IN_20 : U15 ," & "AD1IN_21 : T15 ," & "ADREFHI : V15 ," & "ADREFLO : V16 ," & "VCCAD : W15 ," & "AD1IN_9 : W17 ," & "AD1IN_1 : V17 ," & "AD1IN_10 : U17 ," & "AD1IN_2 : V18 ," & "AD1IN_3 : T17 ," & "AD1IN_11 : U19 ," & "AD1IN_4 : U18 ," & "AD1IN_12 : T16 ," & "AD1IN_5 : R17 ," & "AD1IN_13 : T18 ," & "AD1IN_6 : T19 ," & "AD1IN_22 : R19 ," & "AD1IN_14 : R18 ," & "AD1IN_8 : P18 ," & "AD1IN_23 : R16 ," & "AD1IN_15 : P19 ," & "AD1EVT : N19 ," & "ETMDATA_19 : N15 ," & "EMIF_nCS0 : N17 ," & "ETMDATA_18 : M15 ," & "EMIF_nCS2 : L17 ," & "EMIF_nCS3 : K17 ," & "EMIF_nCS4 : M17 ," & "CAN1TX : A10 ," & "CAN1RX : B10 ," & "ETMDATA_17 : L15 ," & "NHET_24 : P1 ," & "NHET_26 : A14 ," & "ETMDATA_16 : K15 ," & "MIBSPI1SIMO : F19 ," & "MIBSPI1SOMI : G18 ," & "MIBSPI1CLK : F18 ," & "MIBSPI1nENA : G19 ," & "NHET_23 : J4 ," & "ETMDATA_2 : J15 ," & "MIBSPI5NCS_1 : B6 ," & "MIBSPI5NCS_2 : W6 ," & "MIBSPI5NCS_3 : T12 ," & "SPI2nENA : D3 ," & "MIBSPI5NENA : H18 ," & "SPI2SOMI : D2 ," & "MIBSPI5SOMI_0 : J18 ," & "SPI2SIMO : D1 ," & "MIBSPI5SIMO_0 : J19 ," & "ETMDATA_3 : H15 ," & "MIBSPI5SIMO_1 : E16 ," & "MIBSPI5CLK : H19 ," & "SPI2CLK : E2 ," & "MIBSPI5SIMO_2 : H17 ," & "MIBSPI5SIMO_3 : G17 ," & "VCCPLL : P11 ," & "MIBSPI5SOMI_1 : E17 ," & "MIBSPI5SOMI_2 : H16 ," & "MIBSPI5SOMI_3 : G16 ," & "ETMDATA_4 : G15 ," & "MIBSPI1nCS_0 : R2 ," & "NHET_8 : E18 ," & "NHET_28 : K19 ," & "ETMDATA_5 : F15 ," & "TMS : C19 ," & "EMIF_nWE : D17 ," & "EMIF_BA1 : D16 ," & "ETMDATA_6 : E15 ," & "EMIF_ADDR2_21 : C17 ," & "nTRST : D18 ," & "TDI : A17 ," & "EMIF_ADDR2_20 : C16 ," & "EMIF_ADDR2_19 : C15 ," & "EMIF_ADDR2_18 : D15 ," & "TDO : C18 ," & "TCK : B18 ," & "RTCK : A16 ," & "ETMDATA_12 : E13 ," & "nRST : B17 ," & "EMIF_ADDR2_17 : C14 ," & "EMIF_ADDR2_16 : D14 ," & "ETMDATA_13 : E12 ," & "nERROR : B14 ," & "ETMDATA_7 : E14 ," & "DMM_CLK : F17 ," & "NHET_10 : D19 ," & "ECLK : A12 ," & "ETMDATA_14 : E11 ," & "NHET_12 : B4 ," & "ETMDATA_8 : E9 ," & "EMIF_ADDR2_15 : C13 ," & "DMM_SYNC : J16 ," & "NHET_14 : A11 ," & "EMIF_ADDR2_14 : C12 ," & "FRAYRX1 : A15 ," & "GIOB_0 : M2 ," & "ETMDATA_9 : E8 ," & "DMM_nENA : F16 ," & "NHET_30 : B11 ," & "CAN2TX : H2 ," & "ETMDATA_15 : E10 ," & "ETMDATA_10 : E7 ," & "CAN2RX : H1 ," & "EMIF_ADDR2_13 : C11 ," & "EMIF_ADDR2_12 : C10 ," & "DMM_DATA_0 : L19 ," & "MIBSPI1nCS_1 : F3 ," & "NHET_17 : A13 ," & "LINRX : A7 ," & "LINTX : B7 ," & "EMIF_ADDR2_11 : C9 ," & "EMIF_ADDR1_1 : D5 ," & "GIOB_1 : K2 ," & "FRAYTX1 : B15 ," & "VCCP : F8 ," & "EMIF_ADDR2_10 : C8 ," & "EMIF_ADDR2_9 : C7 ," & "EMIF_ADDR1_0 : D4 ," & "DMM_DATA_1 : L18 ," & "NHET_16 : A4 ," & "EMIF_ADDR2_7 : C5 ," & "EMIF_ADDR2_6 : C4 ," & "ETMDATA_11 : E6 ," & "NHET_18 : J1 ," & "NHET_20 : P2 ," & "FRAYTXEN1 : B16 ," & "GIOB_2 : F2 ," & "EMIF_ADDR2_8 : C6 ," & "VCC : (F9, F10, H10, J14, K6, K8, K12, K14, L6, M10, P10), " & "VCCIO : (F6, F7, F11, F12, F13, F14, G6, G14, H6, H14, J6, L14, M6, M14, N6, N14, P6, P7, P8, P9, P12, P13, P14)," & "VSS : (A1, A2, A18, A19, B1, B19, H8, H9, H11, H12, J8, J9, J10, J11, J12, K9, K10, K11, L8, L9, L10, L11, L12, M8, M9, M11, M12, V1, W1, W2), " & "VSSAD : (V19, W16, W18, W19) "; constant PGEB: PIN_MAP_STRING := "GIOB_3 : 1 ," & "FRAYTX2 : NC1 ," & "GIOA_0 : 2 ," & "FRAYRX2 : NC2 ," & "MIBSPI3nCS_3 : 3 ," & "NHET_29 : NC3 ," & "MIBSPI3nCS_2 : 4 ," & "NHET_27 : NC4 ," & "FRAYTXEN2 : NC5 ," & "GIOA_1 : 5 ," & "NHET_11 : 6 ," & "ETMDATA_20 : NC6 ," & "ETMDATA_21 : NC7 ," & "FLTP1 : 7 ," & "FLTP2 : 8 ," & "GIOA_2 : 9 ," & "ETMDATA_22 : NC8 ," & "GIOB_4 : NC9 ," & "CAN3RX : 12 ," & "GIOA_3 : NC10 ," & "GIOB_5 : NC11 ," & "CAN3TX : 13 ," & "GIOA_4 : NC12 ," & "GIOA_5 : 14 ," & "EMIF_CLK : NC13 ," & "ETMDATA_23 : NC14 ," & "NHET_22 : 15 ," & "GIOA_6 : 16 ," & "OSCIN : 18 ," & "KELVIN_GND : 19 ," & "OSCOUT : 20 ," & "ETMDATA_24 : NC15 ," & "EMIF_CKE : NC16 ," & "GIOA_7 : 22 ," & "GIOB_6 : NC17 ," & "ETMDATA_25 : NC18 ," & "NHET_1 : 23 ," & "NHET_3 : 24 ," & "NHET_0 : 25 ," & "NHET_2 : 30 ," & "EMIF_nWAIT : NC19 ," & "NHET_5 : 31 ," & "EMIF_nRAS : NC20 ," & "ETMDATA_26 : NC21 ," & "MIBSPI5NCS_0 : 32 ," & "SPI2nCS0 : NC22 ," & "NHET_7 : 33 ," & "EMIF_nCAS : NC23 ," & "TEST : 34 ," & "ETMDATA_27 : NC24 ," & "NHET_9 : 35 ," & "NHET_4 : 36 ," & "ETMDATA_28 : NC25 ," & "ETMDATA_29 : NC26 ," & "MIBSPI3nCS_1 : 37 ," & "NHET_25 : NC27 ," & "NHET_6 : 38 ," & "ETMDATA_30 : NC28 ," & "NHET_13 : 39 ," & "MIBSPI1nCS_2 : 40 ," & "NHET_19 : NC29 ," & "NHET_15 : 41 ," & "ETMDATA_31 : NC30 ," & "nPORRST : 46 ," & "ETMTRACECLKIN : NC31 ," & "MIBSPI3SOMI : 51 ," & "MIBSPI3SIMO : 52 ," & "MIBSPI3CLK : 53 ," & "MIBSPI3nENA : 54 ," & "NHET_31 : NC32 ," & "ETMTRACECLKOUT : NC33 ," & "MIBSPI3nCS_0 : 55 ," & "GIOB_7 : NC34 ," & "ETMTRACECTL : NC35 ," & "MIBSPI1nCS_3 : NC36 ," & "NHET_21 : NC37 ," & "ETMDATA_0 : NC38 ," & "ETMDATA_1 : NC39 ," & "AD1IN_16 : 58 ," & "AD1IN_17 : 59 ," & "AD1IN_0 : 60 ," & "AD1IN_7 : 61 ," & "AD1IN_18 : 62 ," & "AD1IN_19 : 63 ," & "AD1IN_20 : 64 ," & "AD1IN_21 : 65 ," & "ADREFHI : 66 ," & "ADREFLO : 67 ," & "VCCAD : 69 ," & "AD1IN_9 : 70 ," & "AD1IN_1 : 71 ," & "AD1IN_10 : 72 ," & "AD1IN_2 : 73 ," & "AD1IN_3 : 74 ," & "AD1IN_11 : 75 ," & "AD1IN_4 : 76 ," & "AD1IN_12 : 77 ," & "AD1IN_5 : 78 ," & "AD1IN_13 : 79 ," & "AD1IN_6 : 80 ," & "AD1IN_22 : 81 ," & "AD1IN_14 : 82 ," & "AD1IN_8 : 83 ," & "AD1IN_23 : 84 ," & "AD1IN_15 : 85 ," & "AD1EVT : 86 ," & "ETMDATA_19 : NC40 ," & "EMIF_nCS0 : NC41 ," & "ETMDATA_18 : NC42 ," & "EMIF_nCS2 : NC43 ," & "EMIF_nCS3 : NC44 ," & "EMIF_nCS4 : NC45 ," & "CAN1TX : 89 ," & "CAN1RX : 90 ," & "ETMDATA_17 : NC46 ," & "NHET_24 : 91 ," & "NHET_26 : 92 ," & "ETMDATA_16 : NC47 ," & "MIBSPI1SIMO : 93 ," & "MIBSPI1SOMI : 94 ," & "MIBSPI1CLK : 95 ," & "MIBSPI1nENA : 96 ," & "NHET_23 : NC48 ," & "ETMDATA_2 : NC49 ," & "MIBSPI5NCS_1 : NC50 ," & "MIBSPI5NCS_2 : NC51 ," & "MIBSPI5NCS_3 : NC52 ," & "SPI2nENA : NC53 ," & "MIBSPI5NENA : 97 ," & "SPI2SOMI : NC54 ," & "MIBSPI5SOMI_0 : 98 ," & "SPI2SIMO : NC55 ," & "MIBSPI5SIMO_0 : 99 ," & "ETMDATA_3 : NC56 ," & "MIBSPI5SIMO_1 : NC57 ," & "MIBSPI5CLK : 100 ," & "SPI2CLK : NC58 ," & "MIBSPI5SIMO_2 : NC59 ," & "MIBSPI5SIMO_3 : NC60 ," & "VCCPLL : NC61 ," & "MIBSPI5SOMI_1 : NC62 ," & "MIBSPI5SOMI_2 : NC63 ," & "MIBSPI5SOMI_3 : NC64 ," & "ETMDATA_4 : NC65 ," & "MIBSPI1nCS_0 : 105 ," & "NHET_8 : 106 ," & "NHET_28 : 107 ," & "ETMDATA_5 : NC66 ," & "TMS : 108 ," & "EMIF_nWE : NC67 ," & "EMIF_BA1 : NC68 ," & "ETMDATA_6 : NC69 ," & "EMIF_ADDR2_21 : NC70 ," & "nTRST : 109 ," & "TDI : 110 ," & "EMIF_ADDR2_20 : NC71 ," & "EMIF_ADDR2_19 : NC72 ," & "EMIF_ADDR2_18 : NC73 ," & "TDO : 111 ," & "TCK : 112 ," & "RTCK : 113 ," & "ETMDATA_12 : NC74 ," & "nRST : 116 ," & "EMIF_ADDR2_17 : NC75 ," & "EMIF_ADDR2_16 : NC76 ," & "ETMDATA_13 : NC77 ," & "nERROR : 117 ," & "ETMDATA_7 : NC78 ," & "DMM_CLK : NC79 ," & "NHET_10 : 118 ," & "ECLK : 119 ," & "ETMDATA_14 : NC80 ," & "NHET_12 : 124 ," & "ETMDATA_8 : NC81 ," & "EMIF_ADDR2_15 : NC82 ," & "DMM_SYNC : NC83 ," & "NHET_14 : 125 ," & "EMIF_ADDR2_14 : NC84 ," & "FRAYRX1 : NC85 ," & "GIOB_0 : 126 ," & "ETMDATA_9 : NC86 ," & "DMM_nENA : NC87 ," & "NHET_30 : 127 ," & "CAN2TX : 128 ," & "ETMDATA_15 : NC88 ," & "ETMDATA_10 : NC89 ," & "CAN2RX : 129 ," & "EMIF_ADDR2_13 : NC90 ," & "EMIF_ADDR2_12 : NC91 ," & "DMM_DATA_0 : NC92 ," & "MIBSPI1nCS_1 : 130 ," & "NHET_17 : NC93 ," & "LINRX : 131 ," & "LINTX : 132 ," & "EMIF_ADDR2_11 : NC94 ," & "EMIF_ADDR1_1 : NC95 ," & "GIOB_1 : 133 ," & "FRAYTX1 : NC96 ," & "VCCP : NC97 ," & "EMIF_ADDR2_10 : NC98 ," & "EMIF_ADDR2_9 : NC99 ," & "EMIF_ADDR1_0 : NC100 ," & "DMM_DATA_1 : NC101 ," & "NHET_16 : 139 ," & "EMIF_ADDR2_7 : NC102 ," & "EMIF_ADDR2_6 : NC103 ," & "ETMDATA_11 : NC104 ," & "NHET_18 : 140 ," & "NHET_20 : 141 ," & "FRAYTXEN1 : NC105 ," & "GIOB_2 : 142 ," & "EMIF_ADDR2_8 : NC106 ," & "VCC : (17, 29, 45, 48, 49, 57, 87, 114, 123, 137, 143), " & "VCCIO : (10, 26, 42, 104, 120, 136, NC107, NC108, NC109, NC110, NC111, NC112, NC113, NC114, NC115, NC116, NC117, NC118, NC119, NC120, NC121, NC122, NC123)," & "VSS : (11, 21, 27, 28, 43, 44, 47, 50, 56, 88, 102, 103, 115, 121, 122, 135, 138, 144, NC124, NC125, NC126, NC127, NC128, NC129, NC130, NC131, NC132, NC133, NC134, NC135), " & "VSSAD : (68, NC136, NC137, NC138) "; constant PGEA: PIN_MAP_STRING := "GIOB_3 : NC1 ," & "FRAYTX2 : 1 ," & "GIOA_0 : NC2 ," & "FRAYRX2 : 2 ," & "MIBSPI3nCS_3 : 3 ," & "NHET_29 : NC3 ," & "MIBSPI3nCS_2 : 4 ," & "NHET_27 : NC4 ," & "FRAYTXEN2 : 5 ," & "GIOA_1 : NC5 ," & "NHET_11 : 6 ," & "ETMDATA_20 : NC6 ," & "ETMDATA_21 : NC7 ," & "FLTP1 : 7 ," & "FLTP2 : 8 ," & "GIOA_2 : 9 ," & "ETMDATA_22 : NC8 ," & "GIOB_4 : NC9 ," & "CAN3RX : 12 ," & "GIOA_3 : NC10 ," & "GIOB_5 : NC11 ," & "CAN3TX : 13 ," & "GIOA_4 : NC12 ," & "GIOA_5 : 14 ," & "EMIF_CLK : NC13 ," & "ETMDATA_23 : NC14 ," & "NHET_22 : 15 ," & "GIOA_6 : 16 ," & "OSCIN : 18 ," & "KELVIN_GND : 19 ," & "OSCOUT : 20 ," & "ETMDATA_24 : NC15 ," & "EMIF_CKE : NC16 ," & "GIOA_7 : 22 ," & "GIOB_6 : NC17 ," & "ETMDATA_25 : NC18 ," & "NHET_1 : 23 ," & "NHET_3 : 24 ," & "NHET_0 : 25 ," & "NHET_2 : 30 ," & "EMIF_nWAIT : NC19 ," & "NHET_5 : 31 ," & "EMIF_nRAS : NC20 ," & "ETMDATA_26 : NC21 ," & "MIBSPI5NCS_0 : 32 ," & "SPI2nCS0 : NC22 ," & "NHET_7 : 33 ," & "EMIF_nCAS : NC23 ," & "TEST : 34 ," & "ETMDATA_27 : NC24 ," & "NHET_9 : 35 ," & "NHET_4 : 36 ," & "ETMDATA_28 : NC25 ," & "ETMDATA_29 : NC26 ," & "MIBSPI3nCS_1 : 37 ," & "NHET_25 : NC27 ," & "NHET_6 : 38 ," & "ETMDATA_30 : NC28 ," & "NHET_13 : 39 ," & "MIBSPI1nCS_2 : 40 ," & "NHET_19 : NC29 ," & "NHET_15 : 41 ," & "ETMDATA_31 : NC30 ," & "nPORRST : 46 ," & "ETMTRACECLKIN : NC31 ," & "MIBSPI3SOMI : 51 ," & "MIBSPI3SIMO : 52 ," & "MIBSPI3CLK : 53 ," & "MIBSPI3nENA : 54 ," & "NHET_31 : NC32 ," & "ETMTRACECLKOUT : NC33 ," & "MIBSPI3nCS_0 : 55 ," & "GIOB_7 : NC34 ," & "ETMTRACECTL : NC35 ," & "MIBSPI1nCS_3 : NC36 ," & "NHET_21 : NC37 ," & "ETMDATA_0 : NC38 ," & "ETMDATA_1 : NC39 ," & "AD1IN_16 : 58 ," & "AD1IN_17 : 59 ," & "AD1IN_0 : 60 ," & "AD1IN_7 : 61 ," & "AD1IN_18 : 62 ," & "AD1IN_19 : 63 ," & "AD1IN_20 : 64 ," & "AD1IN_21 : 65 ," & "ADREFHI : 66 ," & "ADREFLO : 67 ," & "VCCAD : 69 ," & "AD1IN_9 : 70 ," & "AD1IN_1 : 71 ," & "AD1IN_10 : 72 ," & "AD1IN_2 : 73 ," & "AD1IN_3 : 74 ," & "AD1IN_11 : 75 ," & "AD1IN_4 : 76 ," & "AD1IN_12 : 77 ," & "AD1IN_5 : 78 ," & "AD1IN_13 : 79 ," & "AD1IN_6 : 80 ," & "AD1IN_22 : 81 ," & "AD1IN_14 : 82 ," & "AD1IN_8 : 83 ," & "AD1IN_23 : 84 ," & "AD1IN_15 : 85 ," & "AD1EVT : 86 ," & "ETMDATA_19 : NC40 ," & "EMIF_nCS0 : NC41 ," & "ETMDATA_18 : NC42 ," & "EMIF_nCS2 : NC43 ," & "EMIF_nCS3 : NC44 ," & "EMIF_nCS4 : NC45 ," & "CAN1TX : 89 ," & "CAN1RX : 90 ," & "ETMDATA_17 : NC46 ," & "NHET_24 : 91 ," & "NHET_26 : 92 ," & "ETMDATA_16 : NC47 ," & "MIBSPI1SIMO : 93 ," & "MIBSPI1SOMI : 94 ," & "MIBSPI1CLK : 95 ," & "MIBSPI1nENA : 96 ," & "NHET_23 : NC48 ," & "ETMDATA_2 : NC49 ," & "MIBSPI5NCS_1 : NC50 ," & "MIBSPI5NCS_2 : NC51 ," & "MIBSPI5NCS_3 : NC52 ," & "SPI2nENA : NC53 ," & "MIBSPI5NENA : 97 ," & "SPI2SOMI : NC54 ," & "MIBSPI5SOMI_0 : 98 ," & "SPI2SIMO : NC55 ," & "MIBSPI5SIMO_0 : 99 ," & "ETMDATA_3 : NC56 ," & "MIBSPI5SIMO_1 : NC57 ," & "MIBSPI5CLK : 100 ," & "SPI2CLK : NC58 ," & "MIBSPI5SIMO_2 : NC59 ," & "MIBSPI5SIMO_3 : NC60 ," & "VCCPLL : NC61 ," & "MIBSPI5SOMI_1 : NC62 ," & "MIBSPI5SOMI_2 : NC63 ," & "MIBSPI5SOMI_3 : NC64 ," & "ETMDATA_4 : NC65 ," & "MIBSPI1nCS_0 : 105 ," & "NHET_8 : 106 ," & "NHET_28 : 107 ," & "ETMDATA_5 : NC66 ," & "TMS : 108 ," & "EMIF_nWE : NC67 ," & "EMIF_BA1 : NC68 ," & "ETMDATA_6 : NC69 ," & "EMIF_ADDR2_21 : NC70 ," & "nTRST : 109 ," & "TDI : 110 ," & "EMIF_ADDR2_20 : NC71 ," & "EMIF_ADDR2_19 : NC72 ," & "EMIF_ADDR2_18 : NC73 ," & "TDO : 111 ," & "TCK : 112 ," & "RTCK : 113 ," & "ETMDATA_12 : NC74 ," & "nRST : 116 ," & "EMIF_ADDR2_17 : NC75 ," & "EMIF_ADDR2_16 : NC76 ," & "ETMDATA_13 : NC77 ," & "nERROR : 117 ," & "ETMDATA_7 : NC78 ," & "DMM_CLK : NC79 ," & "NHET_10 : 118 ," & "ECLK : 119 ," & "ETMDATA_14 : NC80 ," & "NHET_12 : 124 ," & "ETMDATA_8 : NC81 ," & "EMIF_ADDR2_15 : NC82 ," & "DMM_SYNC : NC83 ," & "NHET_14 : 125 ," & "EMIF_ADDR2_14 : NC84 ," & "FRAYRX1 : 126 ," & "GIOB_0 : NC85 ," & "ETMDATA_9 : NC86 ," & "DMM_nENA : NC87 ," & "NHET_30 : 127 ," & "CAN2TX : 128 ," & "ETMDATA_15 : NC88 ," & "ETMDATA_10 : NC89 ," & "CAN2RX : 129 ," & "EMIF_ADDR2_13 : NC90 ," & "EMIF_ADDR2_12 : NC91 ," & "DMM_DATA_0 : NC92 ," & "MIBSPI1nCS_1 : 130 ," & "NHET_17 : NC93 ," & "LINRX : 131 ," & "LINTX : 132 ," & "EMIF_ADDR2_11 : NC94 ," & "EMIF_ADDR1_1 : NC95 ," & "GIOB_1 : NC96 ," & "FRAYTX1 : 133 ," & "VCCP : NC97 ," & "EMIF_ADDR2_10 : NC98 ," & "EMIF_ADDR2_9 : NC99 ," & "EMIF_ADDR1_0 : NC100 ," & "DMM_DATA_1 : NC101 ," & "NHET_16 : 139 ," & "EMIF_ADDR2_7 : NC102 ," & "EMIF_ADDR2_6 : NC103 ," & "ETMDATA_11 : NC104 ," & "NHET_18 : 140 ," & "NHET_20 : 141 ," & "FRAYTXEN1 : 142 ," & "GIOB_2 : NC105 ," & "EMIF_ADDR2_8 : NC106 ," & "VCC : (17, 29, 45, 48, 49, 57, 87, 114, 123, 137, 143), " & "VCCIO : (10, 26, 42, 104, 120, 136, NC107, NC108, NC109, NC110, NC111, NC112, NC113, NC114, NC115, NC116, NC117, NC118, NC119, NC120, NC121, NC122, NC123)," & "VSS : (11, 21, 27, 28, 43, 44, 47, 50, 56, 88, 102, 103, 115, 121, 122, 135, 138, 144, NC124, NC125, NC126, NC127, NC128, NC129, NC130, NC131, NC132, NC133, NC134, NC135), " & "VSSAD : (68, NC136, NC137, NC138) "; -- This section specifies the TAP ports. For the TAP TCK port, the parameters in -- the brackets are: -- First Field : Maximum TCK frequency. -- Second Field: Allowable states TCK may be stopped in. attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH); attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_RESET of nTRST: signal is true; -- Specifies the compliance enable patterns for the design. It lists a set of -- design ports and the values that they should be set to, in order to enable -- compliance to IEEE Std 1149.1 attribute COMPLIANCE_PATTERNS of RM48LxPGE: entity is "(nPORRST, TEST) (10)"; -- Specifies the number of bits in the instruction register. attribute INSTRUCTION_LENGTH of RM48LxPGE: entity is 6; -- Specifies the boundary-scan instructions implemented in the design and their -- opcodes. attribute INSTRUCTION_OPCODE of RM48LxPGE: entity is "IDCODE (000100),"& "BYPASS (111111)," & "EXTEST (011000)," & "SAMPLE (011011)," & "PRELOAD (011011)," & "HIGHZ (011110)"; -- Specifies the bit pattern that is loaded into the instruction register when -- the TAP controller passes through the Capture-IR state. The standard mandates -- that the two LSBs must be "01". The remaining bits are design specific. attribute INSTRUCTION_CAPTURE of RM48LxPGE: entity is "000001"; attribute IDCODE_REGISTER of RM48LxPGE : entity is "XXXX" & -- Version "1011100010100000" & -- Part Number "00000010111" & -- Manufacturer ID "1"; -- Required by the IEEE Std 1149.1 - 1990 -- This section specifies the test data register placed between TDI and TDO for -- each implemented instruction. attribute REGISTER_ACCESS of RM48LxPGE: entity is "BYPASS (BYPASS, HIGHZ)," & "DEVICE_ID (IDCODE), " & "BOUNDARY (EXTEST, SAMPLE, PRELOAD)"; -- Specifies the length of the boundary scan register. attribute BOUNDARY_LENGTH of RM48LxPGE: entity is 353; -- The following list specifies the characteristics of each cell in the boundary -- scan register from TDI to TDO. The following is a description of the label -- fields: -- num : Is the cell number. -- cell : Is the cell type as defined by the standard. -- port : Is the design port name. Control cells do not have a port -- name. -- function: Is the function of the cell as defined by the standard. Is one -- of input, output2, output3, bidir, control or controlr. -- safe : Specifies the value that the BSR cell should be loaded with -- for safe operation when the software might otherwise choose a -- random value. -- ccell : The control cell number. Specifies the control cell that -- drives the output enable for this port. -- disval : Specifies the value that is loaded into the control cell to -- disable the output enable for the corresponding port. -- rslt : Resulting state. Shows the state of the driver when it is -- disabled. attribute BOUNDARY_REGISTER of RM48LxPGE: entity is -- -- num cell port function safe [ccell disval rslt] -- "352 ( BC_2, *, control, 1), " & "351 ( BC_7, GIOB_3, bidir, X, 352, 1, Z), " & "350 ( BC_2, *, control, 1), " & "349 ( BC_1, FRAYTX2, output3, X, 350, 1, Z), " & "348 ( BC_2, *, control, 1), " & "347 ( BC_7, GIOA_0, bidir, X, 348, 1, Z), " & "346 ( BC_2, FRAYRX2, input, X), " & "345 ( BC_2, *, control, 1), " & "344 ( BC_7, MIBSPI3nCS_3, bidir, X, 345, 1, Z), " & "343 ( BC_2, *, control, 1), " & "342 ( BC_7, NHET_29, bidir, X, 343, 1, Z), " & "341 ( BC_2, *, control, 1), " & "340 ( BC_7, MIBSPI3nCS_2, bidir, X, 341, 1, Z), " & "339 ( BC_2, *, control, 1), " & "338 ( BC_7, NHET_27, bidir, X, 339, 1, Z), " & "337 ( BC_2, *, control, 1), " & "336 ( BC_1, FRAYTXEN2, output3, X, 337, 1, Z), " & "335 ( BC_2, *, control, 1), " & "334 ( BC_7, GIOA_1, bidir, X, 335, 1, Z), " & "333 ( BC_2, *, control, 1), " & "332 ( BC_7, NHET_11, bidir, X, 333, 1, Z), " & "331 ( BC_2, *, control, 1), " & "330 ( BC_7, ETMDATA_20, bidir, X, 331, 1, Z), " & "329 ( BC_2, *, control, 1), " & "328 ( BC_7, ETMDATA_21, bidir, X, 329, 1, Z), " & "327 ( BC_2, *, control, 1), " & "326 ( BC_7, GIOA_2, bidir, X, 327, 1, Z), " & "325 ( BC_2, *, control, 1), " & "324 ( BC_7, ETMDATA_22, bidir, X, 325, 1, Z), " & "323 ( BC_2, *, control, 1), " & "322 ( BC_7, GIOB_4, bidir, X, 323, 1, Z), " & "321 ( BC_2, *, control, 1), " & "320 ( BC_7, CAN3RX, bidir, X, 321, 1, Z), " & "319 ( BC_2, *, control, 1), " & "318 ( BC_7, GIOA_3, bidir, X, 319, 1, Z), " & "317 ( BC_2, *, control, 1), " & "316 ( BC_7, GIOB_5, bidir, X, 317, 1, Z), " & "315 ( BC_2, *, control, 1), " & "314 ( BC_7, CAN3TX, bidir, X, 315, 1, Z), " & "313 ( BC_2, *, control, 1), " & "312 ( BC_7, GIOA_4, bidir, X, 313, 1, Z), " & "311 ( BC_2, *, control, 1), " & "310 ( BC_7, GIOA_5, bidir, X, 311, 1, Z), " & "309 ( BC_2, *, control, 1), " & "308 ( BC_7, EMIF_CLK, bidir, X, 309, 1, Z), " & "307 ( BC_2, *, control, 1), " & "306 ( BC_7, ETMDATA_23, bidir, X, 307, 1, Z), " & "305 ( BC_2, *, control, 1), " & "304 ( BC_7, NHET_22, bidir, X, 305, 1, Z), " & "303 ( BC_2, *, control, 1), " & "302 ( BC_7, GIOA_6, bidir, X, 303, 1, Z), " & "301 ( BC_2, *, control, 1), " & "300 ( BC_7, ETMDATA_24, bidir, X, 301, 1, Z), " & "299 ( BC_2, *, control, 1), " & "298 ( BC_7, EMIF_CKE, bidir, X, 299, 1, Z), " & "297 ( BC_2, *, control, 1), " & "296 ( BC_7, GIOA_7, bidir, X, 297, 1, Z), " & "295 ( BC_2, *, control, 1), " & "294 ( BC_7, GIOB_6, bidir, X, 295, 1, Z), " & "293 ( BC_2, *, control, 1), " & "292 ( BC_7, ETMDATA_25, bidir, X, 293, 1, Z), " & "291 ( BC_2, *, control, 1), " & "290 ( BC_7, NHET_1, bidir, X, 291, 1, Z), " & "289 ( BC_2, *, control, 1), " & "288 ( BC_7, NHET_3, bidir, X, 289, 1, Z), " & "287 ( BC_2, *, control, 1), " & "286 ( BC_7, NHET_0, bidir, X, 287, 1, Z), " & "285 ( BC_2, *, control, 1), " & "284 ( BC_7, NHET_2, bidir, X, 285, 1, Z), " & "283 ( BC_2, *, control, 1), " & "282 ( BC_7, EMIF_nWAIT, bidir, X, 283, 1, Z), " & "281 ( BC_2, *, control, 1), " & "280 ( BC_7, NHET_5, bidir, X, 281, 1, Z), " & "279 ( BC_2, *, control, 1), " & "278 ( BC_7, EMIF_nRAS, bidir, X, 279, 1, Z), " & "277 ( BC_2, *, control, 1), " & "276 ( BC_7, ETMDATA_26, bidir, X, 277, 1, Z), " & "275 ( BC_2, *, control, 1), " & "274 ( BC_7, MIBSPI5NCS_0, bidir, X, 275, 1, Z), " & "273 ( BC_2, *, control, 1), " & "272 ( BC_7, SPI2nCS0, bidir, X, 273, 1, Z), " & "271 ( BC_2, *, control, 1), " & "270 ( BC_7, NHET_7, bidir, X, 271, 1, Z), " & "269 ( BC_2, *, control, 1), " & "268 ( BC_7, EMIF_nCAS, bidir, X, 269, 1, Z), " & "267 ( BC_2, *, control, 1), " & "266 ( BC_7, ETMDATA_27, bidir, X, 267, 1, Z), " & "265 ( BC_2, *, control, 1), " & "264 ( BC_7, NHET_9, bidir, X, 265, 1, Z), " & "263 ( BC_2, *, control, 1), " & "262 ( BC_7, NHET_4, bidir, X, 263, 1, Z), " & "261 ( BC_2, *, control, 1), " & "260 ( BC_7, ETMDATA_28, bidir, X, 261, 1, Z), " & "259 ( BC_2, *, control, 1), " & "258 ( BC_7, ETMDATA_29, bidir, X, 259, 1, Z), " & "257 ( BC_2, *, control, 1), " & "256 ( BC_7, MIBSPI3nCS_1, bidir, X, 257, 1, Z), " & "255 ( BC_2, *, control, 1), " & "254 ( BC_7, NHET_25, bidir, X, 255, 1, Z), " & "253 ( BC_2, *, control, 1), " & "252 ( BC_7, NHET_6, bidir, X, 253, 1, Z), " & "251 ( BC_2, *, control, 1), " & "250 ( BC_7, ETMDATA_30, bidir, X, 251, 1, Z), " & "249 ( BC_2, *, control, 1), " & "248 ( BC_7, NHET_13, bidir, X, 249, 1, Z), " & "247 ( BC_2, *, control, 1), " & "246 ( BC_7, MIBSPI1nCS_2, bidir, X, 247, 1, Z), " & "245 ( BC_2, *, control, 1), " & "244 ( BC_7, NHET_19, bidir, X, 245, 1, Z), " & "243 ( BC_2, *, control, 1), " & "242 ( BC_7, NHET_15, bidir, X, 243, 1, Z), " & "241 ( BC_2, *, control, 1), " & "240 ( BC_7, ETMDATA_31, bidir, X, 241, 1, Z), " & "239 ( BC_2, *, control, 1), " & "238 ( BC_7, ETMTRACECLKIN, bidir, X, 239, 1, Z), " & "237 ( BC_2, *, control, 1), " & "236 ( BC_7, MIBSPI3SOMI, bidir, X, 237, 1, Z), " & "235 ( BC_2, *, control, 1), " & "234 ( BC_7, MIBSPI3SIMO, bidir, X, 235, 1, Z), " & "233 ( BC_2, *, control, 1), " & "232 ( BC_7, MIBSPI3CLK, bidir, X, 233, 1, Z), " & "231 ( BC_2, *, control, 1), " & "230 ( BC_7, MIBSPI3nENA, bidir, X, 231, 1, Z), " & "229 ( BC_2, *, control, 1), " & "228 ( BC_7, NHET_31, bidir, X, 229, 1, Z), " & "227 ( BC_2, *, control, 1), " & "226 ( BC_7, ETMTRACECLKOUT, bidir, X, 227, 1, Z), " & "225 ( BC_2, *, control, 1), " & "224 ( BC_7, MIBSPI3nCS_0, bidir, X, 225, 1, Z), " & "223 ( BC_2, *, control, 1), " & "222 ( BC_7, GIOB_7, bidir, X, 223, 1, Z), " & "221 ( BC_2, *, control, 1), " & "220 ( BC_7, ETMTRACECTL, bidir, X, 221, 1, Z), " & "219 ( BC_2, *, control, 1), " & "218 ( BC_7, MIBSPI1nCS_3, bidir, X, 219, 1, Z), " & "217 ( BC_2, *, control, 1), " & "216 ( BC_7, NHET_21, bidir, X, 217, 1, Z), " & "215 ( BC_2, *, control, 1), " & "214 ( BC_7, ETMDATA_0, bidir, X, 215, 1, Z), " & "213 ( BC_2, *, control, 1), " & "212 ( BC_7, ETMDATA_1, bidir, X, 213, 1, Z), " & "211 ( BC_2, *, control, 1), " & "210 ( BC_7, AD1EVT, bidir, X, 211, 1, Z), " & "209 ( BC_2, *, control, 1), " & "208 ( BC_7, ETMDATA_19, bidir, X, 209, 1, Z), " & "207 ( BC_2, *, control, 1), " & "206 ( BC_7, EMIF_nCS0, bidir, X, 207, 1, Z), " & "205 ( BC_2, *, control, 1), " & "204 ( BC_7, ETMDATA_18, bidir, X, 205, 1, Z), " & "203 ( BC_2, *, control, 1), " & "202 ( BC_7, EMIF_nCS2, bidir, X, 203, 1, Z), " & "201 ( BC_2, *, control, 1), " & "200 ( BC_7, EMIF_nCS3, bidir, X, 201, 1, Z), " & "199 ( BC_2, *, control, 1), " & "198 ( BC_7, EMIF_nCS4, bidir, X, 199, 1, Z), " & "197 ( BC_2, *, control, 1), " & "196 ( BC_7, CAN1TX, bidir, X, 197, 1, Z), " & "195 ( BC_2, *, control, 1), " & "194 ( BC_7, CAN1RX, bidir, X, 195, 1, Z), " & "193 ( BC_2, *, control, 1), " & "192 ( BC_7, ETMDATA_17, bidir, X, 193, 1, Z), " & "191 ( BC_2, *, control, 1), " & "190 ( BC_7, NHET_24, bidir, X, 191, 1, Z), " & "189 ( BC_2, *, control, 1), " & "188 ( BC_7, NHET_26, bidir, X, 189, 1, Z), " & "187 ( BC_2, *, control, 1), " & "186 ( BC_7, ETMDATA_16, bidir, X, 187, 1, Z), " & "185 ( BC_2, *, control, 1), " & "184 ( BC_7, MIBSPI1SIMO, bidir, X, 185, 1, Z), " & "183 ( BC_2, *, control, 1), " & "182 ( BC_7, MIBSPI1SOMI, bidir, X, 183, 1, Z), " & "181 ( BC_2, *, control, 1), " & "180 ( BC_7, MIBSPI1CLK, bidir, X, 181, 1, Z), " & "179 ( BC_2, *, control, 1), " & "178 ( BC_7, MIBSPI1nENA, bidir, X, 179, 1, Z), " & "177 ( BC_2, *, control, 1), " & "176 ( BC_7, NHET_23, bidir, X, 177, 1, Z), " & "175 ( BC_2, *, control, 1), " & "174 ( BC_7, ETMDATA_2, bidir, X, 175, 1, Z), " & "173 ( BC_2, *, control, 1), " & "172 ( BC_7, MIBSPI5NCS_1, bidir, X, 173, 1, Z), " & "171 ( BC_2, *, control, 1), " & "170 ( BC_7, MIBSPI5NCS_2, bidir, X, 171, 1, Z), " & "169 ( BC_2, *, control, 1), " & "168 ( BC_7, MIBSPI5NCS_3, bidir, X, 169, 1, Z), " & "167 ( BC_2, *, control, 1), " & "166 ( BC_7, SPI2nENA, bidir, X, 167, 1, Z), " & "165 ( BC_2, *, control, 1), " & "164 ( BC_7, MIBSPI5NENA, bidir, X, 165, 1, Z), " & "163 ( BC_2, *, control, 1), " & "162 ( BC_7, SPI2SOMI, bidir, X, 163, 1, Z), " & "161 ( BC_2, *, control, 1), " & "160 ( BC_7, MIBSPI5SOMI_0, bidir, X, 161, 1, Z), " & "159 ( BC_2, *, control, 1), " & "158 ( BC_7, SPI2SIMO, bidir, X, 159, 1, Z), " & "157 ( BC_2, *, control, 1), " & "156 ( BC_7, MIBSPI5SIMO_0, bidir, X, 157, 1, Z), " & "155 ( BC_2, *, control, 1), " & "154 ( BC_7, ETMDATA_3, bidir, X, 155, 1, Z), " & "153 ( BC_2, *, control, 1), " & "152 ( BC_7, MIBSPI5SIMO_1, bidir, X, 153, 1, Z), " & "151 ( BC_2, *, control, 1), " & "150 ( BC_7, MIBSPI5CLK, bidir, X, 151, 1, Z), " & "149 ( BC_2, *, control, 1), " & "148 ( BC_7, SPI2CLK, bidir, X, 149, 1, Z), " & "147 ( BC_2, *, control, 1), " & "146 ( BC_7, MIBSPI5SIMO_2, bidir, X, 147, 1, Z), " & "145 ( BC_2, *, control, 1), " & "144 ( BC_7, MIBSPI5SIMO_3, bidir, X, 145, 1, Z), " & "143 ( BC_2, *, control, 1), " & "142 ( BC_7, MIBSPI5SOMI_1, bidir, X, 143, 1, Z), " & "141 ( BC_2, *, internal, X), " & "140 ( BC_2, *, internal, X), " & "139 ( BC_2, *, internal, X), " & "138 ( BC_2, *, internal, X), " & "137 ( BC_2, *, internal, X), " & "136 ( BC_2, *, internal, X), " & "135 ( BC_2, *, internal, X), " & "134 ( BC_2, *, internal, X), " & "133 ( BC_2, *, internal, X), " & "132 ( BC_2, *, internal, X), " & "131 ( BC_2, *, control, 1), " & "130 ( BC_7, MIBSPI5SOMI_2, bidir, X, 131, 1, Z), " & "129 ( BC_2, *, control, 1), " & "128 ( BC_7, MIBSPI5SOMI_3, bidir, X, 129, 1, Z), " & "127 ( BC_2, *, control, 1), " & "126 ( BC_7, ETMDATA_4, bidir, X, 127, 1, Z), " & "125 ( BC_2, *, control, 1), " & "124 ( BC_7, MIBSPI1nCS_0, bidir, X, 125, 1, Z), " & "123 ( BC_2, *, control, 1), " & "122 ( BC_7, NHET_8, bidir, X, 123, 1, Z), " & "121 ( BC_2, *, control, 1), " & "120 ( BC_7, NHET_28, bidir, X, 121, 1, Z), " & "119 ( BC_2, *, control, 1), " & "118 ( BC_7, ETMDATA_5, bidir, X, 119, 1, Z), " & "117 ( BC_2, *, control, 1), " & "116 ( BC_7, EMIF_nWE, bidir, X, 117, 1, Z), " & "115 ( BC_2, *, control, 1), " & "114 ( BC_7, EMIF_BA1, bidir, X, 115, 1, Z), " & "113 ( BC_2, *, control, 1), " & "112 ( BC_7, ETMDATA_6, bidir, X, 113, 1, Z), " & "111 ( BC_2, *, control, 1), " & "110 ( BC_7, EMIF_ADDR2_21, bidir, X, 111, 1, Z), " & "109 ( BC_2, *, control, 1), " & "108 ( BC_7, EMIF_ADDR2_20, bidir, X, 109, 1, Z), " & "107 ( BC_2, *, control, 1), " & "106 ( BC_7, EMIF_ADDR2_19, bidir, X, 107, 1, Z), " & "105 ( BC_2, *, control, 1), " & "104 ( BC_7, EMIF_ADDR2_18, bidir, X, 105, 1, Z), " & "103 ( BC_2, *, control, 1), " & "102 ( BC_7, ETMDATA_12, bidir, X, 103, 1, Z), " & "101 ( BC_2, *, control, 1), " & "100 ( BC_7, nRST, bidir, X, 101, 1, Z), " & "99 ( BC_2, *, control, 1), " & "98 ( BC_7, EMIF_ADDR2_17, bidir, X, 99, 1, Z), " & "97 ( BC_2, *, control, 1), " & "96 ( BC_7, EMIF_ADDR2_16, bidir, X, 97, 1, Z), " & "95 ( BC_2, *, control, 1), " & "94 ( BC_7, ETMDATA_13, bidir, X, 95, 1, Z), " & "93 ( BC_2, *, control, 1), " & "92 ( BC_7, nERROR, bidir, X, 93, 1, Z), " & "91 ( BC_2, *, control, 1), " & "90 ( BC_7, ETMDATA_7, bidir, X, 91, 1, Z), " & "89 ( BC_2, *, control, 1), " & "88 ( BC_7, DMM_CLK, bidir, X, 89, 1, Z), " & "87 ( BC_2, *, control, 1), " & "86 ( BC_7, NHET_10, bidir, X, 87, 1, Z), " & "85 ( BC_2, *, control, 1), " & "84 ( BC_7, ECLK, bidir, X, 85, 1, Z), " & "83 ( BC_2, *, control, 1), " & "82 ( BC_7, ETMDATA_14, bidir, X, 83, 1, Z), " & "81 ( BC_2, *, control, 1), " & "80 ( BC_7, NHET_12, bidir, X, 81, 1, Z), " & "79 ( BC_2, *, control, 1), " & "78 ( BC_7, ETMDATA_8, bidir, X, 79, 1, Z), " & "77 ( BC_2, *, control, 1), " & "76 ( BC_7, EMIF_ADDR2_15, bidir, X, 77, 1, Z), " & "75 ( BC_2, *, control, 1), " & "74 ( BC_7, DMM_SYNC, bidir, X, 75, 1, Z), " & "73 ( BC_2, *, control, 1), " & "72 ( BC_7, NHET_14, bidir, X, 73, 1, Z), " & "71 ( BC_2, *, control, 1), " & "70 ( BC_7, EMIF_ADDR2_14, bidir, X, 71, 1, Z), " & "69 ( BC_2, FRAYRX1, input, X), " & "68 ( BC_2, *, control, 1), " & "67 ( BC_7, GIOB_0, bidir, X, 68, 1, Z), " & "66 ( BC_2, *, control, 1), " & "65 ( BC_7, ETMDATA_9, bidir, X, 66, 1, Z), " & "64 ( BC_2, *, control, 1), " & "63 ( BC_7, DMM_nENA, bidir, X, 64, 1, Z), " & "62 ( BC_2, *, control, 1), " & "61 ( BC_7, NHET_30, bidir, X, 62, 1, Z), " & "60 ( BC_2, *, control, 1), " & "59 ( BC_7, CAN2TX, bidir, X, 60, 1, Z), " & "58 ( BC_2, *, control, 1), " & "57 ( BC_7, ETMDATA_15, bidir, X, 58, 1, Z), " & "56 ( BC_2, *, control, 1), " & "55 ( BC_7, ETMDATA_10, bidir, X, 56, 1, Z), " & "54 ( BC_2, *, control, 1), " & "53 ( BC_7, CAN2RX, bidir, X, 54, 1, Z), " & "52 ( BC_2, *, control, 1), " & "51 ( BC_7, EMIF_ADDR2_13, bidir, X, 52, 1, Z), " & "50 ( BC_2, *, control, 1), " & "49 ( BC_7, EMIF_ADDR2_12, bidir, X, 50, 1, Z), " & "48 ( BC_2, *, control, 1), " & "47 ( BC_7, DMM_DATA_0, bidir, X, 48, 1, Z), " & "46 ( BC_2, *, control, 1), " & "45 ( BC_7, MIBSPI1nCS_1, bidir, X, 46, 1, Z), " & "44 ( BC_2, *, control, 1), " & "43 ( BC_7, NHET_17, bidir, X, 44, 1, Z), " & "42 ( BC_2, *, control, 1), " & "41 ( BC_7, LINRX, bidir, X, 42, 1, Z), " & "40 ( BC_2, *, control, 1), " & "39 ( BC_7, LINTX, bidir, X, 40, 1, Z), " & "38 ( BC_2, *, control, 1), " & "37 ( BC_7, EMIF_ADDR2_11, bidir, X, 38, 1, Z), " & "36 ( BC_2, *, control, 1), " & "35 ( BC_7, EMIF_ADDR1_1, bidir, X, 36, 1, Z), " & "34 ( BC_2, *, control, 1), " & "33 ( BC_7, GIOB_1, bidir, X, 34, 1, Z), " & "32 ( BC_2, *, control, 1), " & "31 ( BC_1, FRAYTX1, output3, X, 32, 1, Z), " & "30 ( BC_2, *, control, 1), " & "29 ( BC_7, EMIF_ADDR2_10, bidir, X, 30, 1, Z), " & "28 ( BC_2, *, control, 1), " & "27 ( BC_7, EMIF_ADDR2_9, bidir, X, 28, 1, Z), " & "26 ( BC_2, *, control, 1), " & "25 ( BC_7, EMIF_ADDR1_0, bidir, X, 26, 1, Z), " & "24 ( BC_2, *, control, 1), " & "23 ( BC_7, DMM_DATA_1, bidir, X, 24, 1, Z), " & "22 ( BC_2, *, control, 1), " & "21 ( BC_7, NHET_16, bidir, X, 22, 1, Z), " & "20 ( BC_2, *, control, 1), " & "19 ( BC_7, EMIF_ADDR2_7, bidir, X, 20, 1, Z), " & "18 ( BC_2, *, control, 1), " & "17 ( BC_7, EMIF_ADDR2_6, bidir, X, 18, 1, Z), " & "16 ( BC_2, *, control, 1), " & "15 ( BC_7, ETMDATA_11, bidir, X, 16, 1, Z), " & "14 ( BC_2, *, control, 1), " & "13 ( BC_7, NHET_18, bidir, X, 14, 1, Z), " & "12 ( BC_2, *, control, 1), " & "11 ( BC_7, NHET_20, bidir, X, 12, 1, Z), " & "10 ( BC_2, *, control, 1), " & "9 ( BC_1, FRAYTXEN1, output3, X, 10, 1, Z), " & "8 ( BC_2, *, control, 1), " & "7 ( BC_7, GIOB_2, bidir, X, 8, 1, Z), " & "6 ( BC_2, *, control, 1), " & "5 ( BC_7, EMIF_ADDR2_8, bidir, X, 6, 1, Z), " & "4 ( BC_2, *, internal, 1), " & "3 ( BC_2, *, internal, 1), " & "2 ( BC_2, *, internal, 1), " & "1 ( BC_2, *, internal, 1), " & "0 ( BC_2, *, internal, 1) "; attribute DESIGN_WARNING of RM48LxPGE : entity is "According to simulation, BSD JTAG TAP may not work correctly unless "& " device has completed RESET sequence first. "& "Forcing PORz low then release (no clock pulses required) would meet "& " the requirement. "& " "& "In order to enter bscan mode correctly, TMS must be low at the "& "rising edge of TRSTz and at least one cycle after TRSTz is high. "; end RM48LxPGE;