---------------------------------------------- -- BSDL for ADSP_21467 324_CSPBGA_19mmx19mm_PACKAGE -- Revision: 0.1 -- Created on: 21-oct-09 ---------------------------------------------- entity ADSP_21467 is generic (PHYSICAL_PIN_MAP : string:="CSPBGA_19mmx19mm_PACKAGE"); port ( AMI_ACK: in bit; BOOT_CFG0: in bit; BOOT_CFG1: in bit; BOOT_CFG2: in bit; CLKIN: in bit; CLK_CFG0: in bit; CLK_CFG1: in bit; RESET_B: in bit; TCK: in bit; TDI: in bit; TMS: in bit; TRST_B: in bit; AMI_ADDR0: inout bit; AMI_ADDR01: inout bit; AMI_ADDR02: inout bit; AMI_ADDR03: inout bit; AMI_ADDR04: inout bit; AMI_ADDR05: inout bit; AMI_ADDR06: inout bit; AMI_ADDR07: inout bit; AMI_ADDR08: inout bit; AMI_ADDR09: inout bit; AMI_ADDR10: inout bit; AMI_ADDR11: inout bit; AMI_ADDR12: inout bit; AMI_ADDR13: inout bit; AMI_ADDR14: inout bit; AMI_ADDR15: inout bit; AMI_ADDR16: inout bit; AMI_ADDR17: inout bit; AMI_ADDR18: inout bit; AMI_ADDR19: inout bit; AMI_ADDR20: inout bit; AMI_ADDR21: inout bit; AMI_ADDR22: inout bit; AMI_ADDR23: inout bit; AMI_DATA0: inout bit; AMI_DATA1: inout bit; AMI_DATA2: inout bit; AMI_DATA3: inout bit; AMI_DATA4: inout bit; AMI_DATA5: inout bit; AMI_DATA6: inout bit; AMI_DATA7: inout bit; CLKOUT: inout bit; DDR2_DATA0: inout bit; DDR2_DATA01: inout bit; DDR2_DATA02: inout bit; DDR2_DATA03: inout bit; DDR2_DATA04: inout bit; DDR2_DATA05: inout bit; DDR2_DATA06: inout bit; DDR2_DATA07: inout bit; DDR2_DATA08: inout bit; DDR2_DATA09: inout bit; DDR2_DATA10: inout bit; DDR2_DATA11: inout bit; DDR2_DATA12: inout bit; DDR2_DATA13: inout bit; DDR2_DATA14: inout bit; DDR2_DATA15: inout bit; DDR2_DM1: out bit; DPI_P01: inout bit; DPI_P02: inout bit; DPI_P03: inout bit; DPI_P04: inout bit; DPI_P05: inout bit; DPI_P06: inout bit; DPI_P07: inout bit; DPI_P08: inout bit; DPI_P09: inout bit; DPI_P10: inout bit; DPI_P11: inout bit; DPI_P12: inout bit; DPI_P13: inout bit; DPI_P14: inout bit; DDR2_DQS0: inout bit; DDR2_DQS0_B: inout bit; DDR2_DQS1: inout bit; DDR2_DQS1_B: inout bit; FLAG0: inout bit; FLAG1: inout bit; FLAG2: inout bit; FLAG3: inout bit; LACK_0: inout bit; LACK_1: inout bit; LCLK_0: inout bit; LCLK_1: inout bit; LDAT1_0: inout bit; LDAT0_0: inout bit; LDAT1_1: inout bit; LDAT0_1: inout bit; LDAT0_2: inout bit; LDAT1_2: inout bit; LDAT0_3: inout bit; LDAT1_3: inout bit; LDAT0_4: inout bit; LDAT1_4: inout bit; LDAT0_5: inout bit; LDAT1_5: inout bit; LDAT1_6: inout bit; LDAT0_6: inout bit; LDAT0_7: inout bit; LDAT1_7: inout bit; DAI_P03: inout bit; DAI_P07: inout bit; DAI_P13: inout bit; DAI_P19: inout bit; DAI_P12: inout bit; DAI_P05: inout bit; DAI_P15: inout bit; DAI_P11: inout bit; DAI_P06: inout bit; DAI_P17: inout bit; DAI_P01: inout bit; DAI_P18: inout bit; DAI_P02: inout bit; DAI_P10: inout bit; DAI_P16: inout bit; DAI_P09: inout bit; DAI_P04: inout bit; DAI_P08: inout bit; DAI_P14: inout bit; DAI_P20: inout bit; AMI_MS1_B: out bit; AMI_MS0_B: out bit; AMI_RD_B: out bit; AMI_WR_B: out bit; DDR2_CAS_B: out bit; DDR2_CKE: out bit; DDR2_RAS_B: out bit; DDR2_CLK0: out bit; DDR2_CLK0_B: out bit; DDR2_CLK1: out bit; DDR2_CLK1_B: out bit; DDR2_ADDR0: out bit; DDR2_ADDR01: out bit; DDR2_ADDR02: out bit; DDR2_ADDR03: out bit; DDR2_ADDR04: out bit; DDR2_ADDR05: out bit; DDR2_ADDR06: out bit; DDR2_ADDR07: out bit; DDR2_ADDR08: out bit; DDR2_ADDR09: out bit; DDR2_ADDR10: out bit; DDR2_ADDR11: out bit; DDR2_ADDR12: out bit; DDR2_ADDR13: out bit; DDR2_ADDR14: out bit; DDR2_ADDR15: out bit; DDR2_BA0: out bit; DDR2_BA1: out bit; DDR2_BA2: out bit; DDR2_CS0_B: out bit; DDR2_CS1_B: out bit; DDR2_CS3_B: out bit; DDR2_CS2_B: out bit; DDR2_WE_B: out bit; DDR2_DM0: out bit; EMU_B: out bit; DDR2_ODT: out bit; TDO: out bit; XTAL: out bit; NC: linkage bit_vector(0 to 4); VDD_A: linkage bit; THD_P: linkage bit; THD_M: linkage bit; VDD_DDR2: linkage bit_vector(0 to 16); VDD_EXT: linkage bit_vector(0 to 20); VDD_INT: linkage bit_vector(0 to 32); VDD_THD: linkage bit; VREF: linkage bit_vector(0 to 1); AGND: linkage bit; GND: linkage bit_vector(0 to 76)); use STD_1149_1_1994.all; attribute COMPONENT_CONFORMANCE of ADSP_21467 : entity is "STD_1149_1_1990"; attribute PIN_MAP of ADSP_21467: entity is PHYSICAL_PIN_MAP; constant CSPBGA_19mmx19mm_PACKAGE: PIN_MAP_STRING:= "AMI_ACK: R10," & "AMI_ADDR0: V16," & "AMI_ADDR01: U16," & "AMI_ADDR02: T16," & "AMI_ADDR03: R16," & "AMI_ADDR04: V15," & "AMI_ADDR05: U15," & "AMI_ADDR06: T15," & "AMI_ADDR07: R15," & "AMI_ADDR08: V14," & "AMI_ADDR09: U14," & "AMI_ADDR10: T14," & "AMI_ADDR11: R14," & "AMI_ADDR12: V13," & "AMI_ADDR13: U13," & "AMI_ADDR14: T13," & "AMI_ADDR15: R13," & "AMI_ADDR16: V12," & "AMI_ADDR17: U12," & "AMI_ADDR18: T12," & "AMI_ADDR19: R12," & "AMI_ADDR20: V11," & "AMI_ADDR21: U11," & "AMI_ADDR22: T11," & "AMI_ADDR23: R11," & "AMI_DATA0: U18," & "AMI_DATA1: T18," & "AMI_DATA2: R18," & "AMI_DATA3: P18," & "AMI_DATA4: V17," & "AMI_DATA5: U17," & "AMI_DATA6: T17," & "AMI_DATA7: R17," & "AMI_MS0_B: T10," & "AMI_MS1_B: U10," & "AMI_RD_B: J04," & "AMI_WR_B: V10," & "BOOT_CFG0: J02," & "BOOT_CFG1: J03," & "BOOT_CFG2: H3," & "CLKIN: L01," & "CLKOUT: M02," & "CLK_CFG0: G01," & "CLK_CFG1: G02," & "DAI_P01: R06," & "DAI_P02: V05," & "DAI_P03: R07," & "DAI_P04: R03," & "DAI_P05: U05," & "DAI_P06: T05," & "DAI_P07: V06," & "DAI_P08: V02," & "DAI_P09: R05," & "DAI_P10: V04," & "DAI_P11: U04," & "DAI_P12: T04," & "DAI_P13: U06," & "DAI_P14: U02," & "DAI_P15: R04," & "DAI_P16: V03," & "DAI_P17: U03," & "DAI_P18: T03," & "DAI_P19: T06," & "DAI_P20: T02," & "DDR2_ADDR0: D13," & "DDR2_ADDR01: C13," & "DDR2_ADDR02: D14," & "DDR2_ADDR03: C14," & "DDR2_ADDR04: B14," & "DDR2_ADDR05: A14," & "DDR2_ADDR06: D15," & "DDR2_ADDR07: C15," & "DDR2_ADDR08: B15," & "DDR2_ADDR09: A15," & "DDR2_ADDR10: D16," & "DDR2_ADDR11: C16," & "DDR2_ADDR12: B16," & "DDR2_ADDR13: A16," & "DDR2_ADDR14: B17," & "DDR2_ADDR15: A17," & "DDR2_BA0: C18," & "DDR2_BA1: C17," & "DDR2_BA2: B18," & "DDR2_CAS_B: C07," & "DDR2_CKE: E01," & "DDR2_CLK0_B: A07," & "DDR2_CLK0: B07," & "DDR2_CLK1_B: A13," & "DDR2_CLK1: B13," & "DDR2_CS0_B: C01," & "DDR2_CS1_B: D01," & "DDR2_CS2_B: C02," & "DDR2_CS3_B: D02," & "DDR2_DATA0: B02," & "DDR2_DATA01: A02," & "DDR2_DATA02: B03," & "DDR2_DATA03: A03," & "DDR2_DATA04: B05," & "DDR2_DATA05: A05," & "DDR2_DATA06: B06," & "DDR2_DATA07: A06," & "DDR2_DATA08: B08," & "DDR2_DATA09: A08," & "DDR2_DATA10: B09," & "DDR2_DATA11: A09," & "DDR2_DATA12: A11," & "DDR2_DATA13: B11," & "DDR2_DATA14: A12," & "DDR2_DATA15: B12," & "DDR2_DM0: C03," & "DDR2_DM1: C11," & "DDR2_DQS0: A04," & "DDR2_DQS0_B: B04," & "DDR2_DQS1: A10," & "DDR2_DQS1_B: B10," & "DDR2_ODT: B01," & "DDR2_RAS_B: C09," & "DDR2_WE_B: C10," & "DPI_P01: R02," & "DPI_P02: U01," & "DPI_P03: T01," & "DPI_P04: R01," & "DPI_P05: P01," & "DPI_P06: P02," & "DPI_P07: P03," & "DPI_P08: P04," & "DPI_P09: N01," & "DPI_P10: N02," & "DPI_P11: N03," & "DPI_P12: N04," & "DPI_P13: M03," & "DPI_P14: M04," & "EMU_B: K02," & "FLAG0: R08," & "FLAG1: V07," & "FLAG2: U07," & "FLAG3: T07," & "LACK_0: K17," & "LACK_1: P17," & "LCLK_0: J18," & "LCLK_1: N18," & "LDAT0_0: E18," & "LDAT0_1: F17," & "LDAT0_2: F18," & "LDAT0_3: G17," & "LDAT0_4: G18," & "LDAT0_5: H16," & "LDAT0_6: H17," & "LDAT0_7: J16," & "LDAT1_0: K18," & "LDAT1_1: L16," & "LDAT1_2: L17," & "LDAT1_3: L18," & "LDAT1_4: M16," & "LDAT1_5: M17," & "LDAT1_6: N16," & "LDAT1_7: P16," & "RESET_B: M01," & "TCK: K15," & "TDI: L15," & "TDO: M15," & "THD_M: N12," & "THD_P: N11," & "TMS: K16," & "TRST_B: N15," & "XTAL: K01," & "VDD_A: H01," & "VDD_THD: N10," & "AGND: H02," & "NC: (K03,K04,L02,L03,L04)," & "VDD_DDR2: (C05,C12,D03,D06,D08,D18,E02,E04,E07,E10,E11,E17,F03,F05,F15,G14,G16)," & "VDD_EXT: (H15,H18,J05,J15,K14,L05,M14,M18,N05,P06,P08,P10,P12,P14,P15,T08,T09,U08,U09,V08,V09)," & "VDD_INT: (D12,E06,E08,E09,E14,E15,F06,F07,F08,F09,F10,F11,F12,F13,G06,G13,H05,H06,H13,H14,J06,J13,K06,K13,L06,L13,M06,M13,N06,N07,N08,N09,N13)," & "VREF: (D04,D11)," & "GND: (A01,A18,C04,C06,C08,D05,D07,D09,D10,D17,E03,E05,E12,E13,E16,F01,F02,F04,F14,F16,G03,G04,G05,G07,G08,G09,G10,G11,G12,G15,H04,H07,H08,H09,H10,H11,H12,J01,J07,J08,J09,J10,J11,J12,J14,J17,K05,K07,K08,K09,K10,K11,K12,L07,L08,L09,L10,L11,L12,L14,M05,M07,M08,M09,M10,M11,M12,N14,N17,P05,P07,P09,P11,P13,R09,V01,V18)"; attribute TAP_SCAN_IN of TDI: signal is true; attribute TAP_SCAN_MODE of TMS: signal is true; attribute TAP_SCAN_OUT of TDO: signal is true; attribute TAP_SCAN_RESET of TRST_B: signal is true; attribute TAP_SCAN_CLOCK of TCK: signal is (50.0e6, BOTH); attribute INSTRUCTION_LENGTH of ADSP_21467: entity is 5; -- Unspecified opcodes assigned to Bypass. attribute INSTRUCTION_OPCODE of ADSP_21467: entity is "IDCODE (11101)," & "BYPASS (11111)," & "EXTEST (00000)," & "SAMPLE (10000)," & "INTEST (11000)," & "EMULATION (01000,00100,10100,10110,01100,11100,00010,01001,01010)"; attribute IDCODE_REGISTER of ADSP_21467: entity is "00000000000010100000000011001011"; attribute INSTRUCTION_CAPTURE of ADSP_21467: entity is "00001"; attribute INSTRUCTION_PRIVATE of ADSP_21467: entity is "EMULATION"; -- "EMULATION," & -- "MEMTEST"; -- attribute INSTRUCTION_USAGE of ADSP_21467: entity is -- "INTEST (clock CLKIN)"; attribute BOUNDARY_LENGTH of ADSP_21467: entity is 565; attribute BOUNDARY_REGISTER of ADSP_21467: entity is --num cell port function safe [ccell disval rslt] " 0 (BC_1, DDR2_CS1_B, output3, X, 1, 0, Z), " & " 1 (BC_1, *, control, 0), " & " 2 (BC_3, *, internal, X), " & " 3 (BC_1, DDR2_CS2_B, output3, X, 4, 0, Z), " & " 4 (BC_1, *, control, 0), " & " 5 (BC_3, *, internal, X), " & " 6 (BC_1, DDR2_CS3_B, output3, X, 7, 0, Z), " & " 7 (BC_1, *, control, 0), " & " 8 (BC_3, *, internal, X), " & " 9 (BC_1, DDR2_RAS_B, output3, X, 10, 0, Z), " & " 10 (BC_1, *, control, 0), " & " 11 (BC_3, *, internal, X), " & " 12 (BC_1, DDR2_CAS_B, output3, X, 13, 0, Z), " & " 13 (BC_1, *, control, 0), " & " 14 (BC_3, *, internal, X), " & " 15 (BC_1, DDR2_WE_B, output3, X, 16, 0, Z), " & " 16 (BC_1, *, control, 0), " & " 17 (BC_3, *, internal, X), " & " 18 (BC_1, DDR2_CKE, output3, X, 19, 0, Z), " & " 19 (BC_1, *, control, 0), " & " 20 (BC_3, *, internal, X), " & " 21 (BC_1, DDR2_ODT, output3, X, 22, 0, Z), " & " 22 (BC_1, *, control, 0), " & " 23 (BC_3, *, internal, X), " & " 24 (BC_1, EMU_B, output3, X, 25, 0, Z), " & " 25 (BC_1, *, control, 0), " & " 26 (BC_3, *, internal, X), " & " 27 (BC_3, *, internal, X), " & " 28 (BC_3, *, internal, X), " & " 29 (BC_3, *, internal, X), " & " 30 (BC_3, *, internal, X), " & " 31 (BC_3, *, internal, X), " & " 32 (BC_3, *, internal, X), " & " 33 (BC_3, *, internal, X), " & " 34 (BC_3, *, internal, X), " & " 35 (BC_3, *, internal, X), " & " 36 (BC_3, *, internal, X), " & " 37 (BC_3, *, internal, X), " & " 38 (BC_2, CLK_CFG0, input, X), " & " 39 (BC_3, *, internal, X), " & " 40 (BC_3, *, internal, X), " & " 41 (BC_2, CLK_CFG1, input, X), " & " 42 (BC_3, *, internal, X), " & " 43 (BC_3, *, internal, X), " & " 44 (BC_2,BOOT_CFG0, input, X), " & " 45 (BC_3, *, internal, X), " & " 46 (BC_3, *, internal, X), " & " 47 (BC_2,BOOT_CFG1, input, X), " & " 48 (BC_3, *, internal, X), " & " 49 (BC_3, *, internal, X), " & " 50 (BC_2,BOOT_CFG2, input, X), " & " 51 (BC_1, AMI_RD_B, output3, X, 52, 0, Z), " & " 52 (BC_1, *, control, 0), " & " 53 (BC_3, *, internal, X), " & " 54 (BC_3, *, internal, X), " & " 55 (BC_3, *, internal, X), " & " 56 (BC_3, *, internal, X), " & " 57 (BC_3, *, internal, X), " & " 58 (BC_3, *, internal, X), " & " 59 (BC_3, *, internal, X), " & " 60 (BC_3, *, internal, X), " & " 61 (BC_3, *, internal, X), " & " 62 (BC_3, *, internal, X), " & " 63 (BC_3, *, internal, X), " & " 64 (BC_3, *, internal, X), " & " 65 (BC_3, *, internal, X), " & " 66 (BC_3, *, internal, X), " & " 67 (BC_3, *, internal, X), " & " 68 (BC_3, *, internal, X), " & " 69 (BC_3, *, internal, X), " & " 70 (BC_3, *, internal, X), " & " 71 (BC_3, *, internal, X), " & " 72 (BC_3, *, internal, X), " & " 73 (BC_3, *, internal, X), " & " 74 (BC_3, *, internal, X), " & " 75 (BC_3, *, internal, X), " & " 76 (BC_3, *, internal, X), " & " 77 (BC_3, *, internal, X), " & " 78 (BC_3, *, internal, X), " & " 79 (BC_3, *, internal, X), " & " 80 (BC_3, *, internal, X), " & " 81 (BC_3, *, internal, X), " & " 82 (BC_3, *, internal, X), " & " 83 (BC_3, *, internal, X), " & " 84 (BC_3, *, internal, X), " & " 85 (BC_3, *, internal, X), " & " 86 (BC_3, *, internal, X), " & " 87 (BC_3, *, internal, X), " & " 88 (BC_3, *, internal, X), " & " 89 (BC_3, *, internal, X), " & " 90 (BC_3, *, internal, X), " & " 91 (BC_3, *, internal, X), " & " 92 (BC_3, *, internal, X), " & " 93 (BC_3, *, internal, X), " & " 94 (BC_3, *, internal, X), " & " 95 (BC_3, *, internal, X), " & " 96 (BC_3, *, internal, X), " & " 97 (BC_3, *, internal, X), " & " 98 (BC_3, *, internal, X), " & " 99 (BC_3, *, internal, X), " & " 100 (BC_3, *, internal, X), " & " 101 (BC_3, *, internal, X), " & " 102 (BC_3, *, internal, X), " & " 103 (BC_3, *, internal, X), " & " 104 (BC_3, *, internal, X), " & " 105 (BC_3, *, internal, X), " & " 106 (BC_3, *, internal, X), " & " 107 (BC_3, *, internal, X), " & " 108 (BC_3, *, internal, X), " & " 109 (BC_3, *, internal, X), " & " 110 (BC_3, *, internal, X), " & " 111 (BC_3, *, internal, X), " & " 112 (BC_3, *, internal, X), " & " 113 (BC_3, *, internal, X), " & " 114 (BC_3, *, internal, X), " & " 115 (BC_3, *, internal, X), " & " 116 (BC_3, *, internal, X), " & " 117 (BC_3, *, internal, X), " & " 118 (BC_3, *, internal, X), " & " 119 (BC_3, *, internal, X), " & " 120 (BC_3, *, internal, X), " & " 121 (BC_3, *, internal, X), " & " 122 (BC_3, *, internal, X), " & " 123 (BC_3, *, internal, X), " & " 124 (BC_3, *, internal, X), " & " 125 (BC_3, *, internal, X), " & " 126 (BC_3, *, internal, X), " & " 127 (BC_3, *, internal, X), " & " 128 (BC_3, *, internal, X), " & " 129 (BC_1, CLKOUT, output3, X, 130, 0, Z), " & " 130 (BC_1, *, control, 0), " & " 131 (BC_2, CLKOUT, input, X), " & " 132 (BC_3, *, internal, X), " & " 133 (BC_3, *, internal, X), " & " 134 (BC_2, RESET_B, input, X), " & " 135 (BC_1, DPI_P14, output3, X, 136, 0, Z), " & " 136 (BC_1, *, control, 0), " & " 137 (BC_2, DPI_P14, input, X), " & " 138 (BC_1, DPI_P13, output3, X, 139, 0, Z), " & " 139 (BC_1, *, control, 0), " & " 140 (BC_2, DPI_P13, input, X), " & " 141 (BC_1, DPI_P12, output3, X, 142, 0, Z), " & " 142 (BC_1, *, control, 0), " & " 143 (BC_2, DPI_P12, input, X), " & " 144 (BC_1, DPI_P11, output3, X, 145, 0, Z), " & " 145 (BC_1, *, control, 0), " & " 146 (BC_2, DPI_P11, input, X), " & " 147 (BC_1, DPI_P10, output3, X, 148, 0, Z), " & " 148 (BC_1, *, control, 0), " & " 149 (BC_2, DPI_P10, input, X), " & " 150 (BC_1, DPI_P09, output3, X, 151, 0, Z), " & " 151 (BC_1, *, control, 0), " & " 152 (BC_2, DPI_P09, input, X), " & " 153 (BC_1, DPI_P08, output3, X, 154, 0, Z), " & " 154 (BC_1, *, control, 0), " & " 155 (BC_2, DPI_P08, input, X), " & " 156 (BC_1, DPI_P07, output3, X, 157, 0, Z), " & " 157 (BC_1, *, control, 0), " & " 158 (BC_2, DPI_P07, input, X), " & " 159 (BC_1, DPI_P06, output3, X, 160, 0, Z), " & " 160 (BC_1, *, control, 0), " & " 161 (BC_2, DPI_P06, input, X), " & " 162 (BC_1, DPI_P05, output3, X, 163, 0, Z), " & " 163 (BC_1, *, control, 0), " & " 164 (BC_2, DPI_P05, input, X), " & " 165 (BC_1, DPI_P04, output3, X, 166, 0, Z), " & " 166 (BC_1, *, control, 0), " & " 167 (BC_2, DPI_P04, input, X), " & " 168 (BC_1, DPI_P03, output3, X, 169, 0, Z), " & " 169 (BC_1, *, control, 0), " & " 170 (BC_2, DPI_P03, input, X), " & " 171 (BC_1, DPI_P02, output3, X, 172, 0, Z), " & " 172 (BC_1, *, control, 0), " & " 173 (BC_2, DPI_P02, input, X), " & " 174 (BC_1, DPI_P01, output3, X, 175, 0, Z), " & " 175 (BC_1, *, control, 0), " & " 176 (BC_2, DPI_P01, input, X), " & " 177 (BC_1, DAI_P01, output3, X, 178, 0, Z), " & " 178 (BC_1, *, control, 0), " & " 179 (BC_2, DAI_P01, input, X), " & " 180 (BC_1, DAI_P02, output3, X, 181, 0, Z), " & " 181 (BC_1, *, control, 0), " & " 182 (BC_2, DAI_P02, input, X), " & " 183 (BC_1, DAI_P03, output3, X, 184, 0, Z), " & " 184 (BC_1, *, control, 0), " & " 185 (BC_2, DAI_P03, input, X), " & " 186 (BC_1, DAI_P04, output3, X, 187, 0, Z), " & " 187 (BC_1, *, control, 0), " & " 188 (BC_2, DAI_P04, input, X), " & " 189 (BC_1, DAI_P05, output3, X, 190, 0, Z), " & " 190 (BC_1, *, control, 0), " & " 191 (BC_2, DAI_P05, input, X), " & " 192 (BC_1, DAI_P06, output3, X, 193, 0, Z), " & " 193 (BC_1, *, control, 0), " & " 194 (BC_2, DAI_P06, input, X), " & " 195 (BC_1, DAI_P07, output3, X, 196, 0, Z), " & " 196 (BC_1, *, control, 0), " & " 197 (BC_2, DAI_P07, input, X), " & " 198 (BC_1, DAI_P08, output3, X, 199, 0, Z), " & " 199 (BC_1, *, control, 0), " & " 200 (BC_2, DAI_P08, input, X), " & " 201 (BC_1, DAI_P09, output3, X, 202, 0, Z), " & " 202 (BC_1, *, control, 0), " & " 203 (BC_2, DAI_P09, input, X), " & " 204 (BC_1, DAI_P10, output3, X, 205, 0, Z), " & " 205 (BC_1, *, control, 0), " & " 206 (BC_2, DAI_P10, input, X), " & " 207 (BC_1, DAI_P11, output3, X, 208, 0, Z), " & " 208 (BC_1, *, control, 0), " & " 209 (BC_2, DAI_P11, input, X), " & " 210 (BC_1, DAI_P12, output3, X, 211, 0, Z), " & " 211 (BC_1, *, control, 0), " & " 212 (BC_2, DAI_P12, input, X), " & " 213 (BC_1, DAI_P13, output3, X, 214, 0, Z), " & " 214 (BC_1, *, control, 0), " & " 215 (BC_2, DAI_P13, input, X), " & " 216 (BC_1, DAI_P14, output3, X, 217, 0, Z), " & " 217 (BC_1, *, control, 0), " & " 218 (BC_2, DAI_P14, input, X), " & " 219 (BC_1, DAI_P15, output3, X, 220, 0, Z), " & " 220 (BC_1, *, control, 0), " & " 221 (BC_2, DAI_P15, input, X), " & " 222 (BC_1, DAI_P16, output3, X, 223, 0, Z), " & " 223 (BC_1, *, control, 0), " & " 224 (BC_2, DAI_P16, input, X), " & " 225 (BC_1, DAI_P17, output3, X, 226, 0, Z), " & " 226 (BC_1, *, control, 0), " & " 227 (BC_2, DAI_P17, input, X), " & " 228 (BC_1, DAI_P18, output3, X, 229, 0, Z), " & " 229 (BC_1, *, control, 0), " & " 230 (BC_2, DAI_P18, input, X), " & " 231 (BC_1, DAI_P19, output3, X, 232, 0, Z), " & " 232 (BC_1, *, control, 0), " & " 233 (BC_2, DAI_P19, input, X), " & " 234 (BC_1, DAI_P20, output3, X, 235, 0, Z), " & " 235 (BC_1, *, control, 0), " & " 236 (BC_2, DAI_P20, input, X), " & " 237 (BC_1, FLAG0, output3, X, 238, 0, Z), " & " 238 (BC_1, *, control, 0), " & " 239 (BC_2, FLAG0, input, X), " & " 240 (BC_1, FLAG1, output3, X, 241, 0, Z), " & " 241 (BC_1, *, control, 0), " & " 242 (BC_2, FLAG1, input, X), " & " 243 (BC_1, FLAG2, output3, X, 244, 0, Z), " & " 244 (BC_1, *, control, 0), " & " 245 (BC_2, FLAG2, input, X), " & " 246 (BC_1, FLAG3, output3, X, 247, 0, Z), " & " 247 (BC_1, *, control, 0), " & " 248 (BC_2, FLAG3, input, X), " & " 249 (BC_3, *, internal, X), " & " 250 (BC_3, *, internal, X), " & " 251 (BC_3, *, internal, X), " & " 252 (BC_3, *, internal, X), " & " 253 (BC_3, *, internal, X), " & " 254 (BC_3, *, internal, X), " & " 255 (BC_3, *, internal, X), " & " 256 (BC_3, *, internal, X), " & " 257 (BC_3, *, internal, X), " & " 258 (BC_3, *, internal, X), " & " 259 (BC_3, *, internal, X), " & " 260 (BC_3, *, internal, X), " & " 261 (BC_3, *, internal, X), " & " 262 (BC_3, *, internal, X), " & " 263 (BC_3, *, internal, X), " & " 264 (BC_3, *, internal, X), " & " 265 (BC_3, *, internal, X), " & " 266 (BC_3, *, internal, X), " & " 267 (BC_3, *, internal, X), " & " 268 (BC_3, *, internal, X), " & " 269 (BC_3, *, internal, X), " & " 270 (BC_3, *, internal, X), " & " 271 (BC_3, *, internal, X), " & " 272 (BC_2, AMI_ACK, input, X), " & " 273 (BC_1, AMI_MS1_B, output3, X, 274, 0, Z), " & " 274 (BC_1, *, control, 0), " & " 275 (BC_3, *, internal, X), " & " 276 (BC_1, AMI_MS0_B, output3, X, 277, 0, Z), " & " 277 (BC_1, *, control, 0), " & " 278 (BC_3, *, internal, X), " & " 279 (BC_1, AMI_WR_B, output3, X, 280, 0, Z), " & " 280 (BC_1, *, control, 0), " & " 281 (BC_3, *, internal, X), " & " 282 (BC_1, AMI_ADDR23, output3, X, 283, 0, Z), " & " 283 (BC_1, *, control, 0), " & " 284 (BC_2, AMI_ADDR23, input, X), " & " 285 (BC_1, AMI_ADDR22, output3, X, 286, 0, Z), " & " 286 (BC_1, *, control, 0), " & " 287 (BC_2, AMI_ADDR22, input, X), " & " 288 (BC_1, AMI_ADDR21, output3, X, 289, 0, Z), " & " 289 (BC_1, *, control, 0), " & " 290 (BC_2, AMI_ADDR21, input, X), " & " 291 (BC_1, AMI_ADDR20, output3, X, 292, 0, Z), " & " 292 (BC_1, *, control, 0), " & " 293 (BC_2, AMI_ADDR20, input, X), " & " 294 (BC_1, AMI_ADDR19, output3, X, 295, 0, Z), " & " 295 (BC_1, *, control, 0), " & " 296 (BC_2, AMI_ADDR19, input, X), " & " 297 (BC_1, AMI_ADDR18, output3, X, 298, 0, Z), " & " 298 (BC_1, *, control, 0), " & " 299 (BC_2, AMI_ADDR18, input, X), " & " 300 (BC_1, AMI_ADDR17, output3, X, 301, 0, Z), " & " 301 (BC_1, *, control, 0), " & " 302 (BC_2, AMI_ADDR17, input, X), " & " 303 (BC_1, AMI_ADDR16, output3, X, 304, 0, Z), " & " 304 (BC_1, *, control, 0), " & " 305 (BC_2, AMI_ADDR16, input, X), " & " 306 (BC_1, AMI_ADDR15, output3, X, 307, 0, Z), " & " 307 (BC_1, *, control, 0), " & " 308 (BC_2, AMI_ADDR15, input, X), " & " 309 (BC_1, AMI_ADDR14, output3, X, 310, 0, Z), " & " 310 (BC_1, *, control, 0), " & " 311 (BC_2, AMI_ADDR14, input, X), " & " 312 (BC_1, AMI_ADDR13, output3, X, 313, 0, Z), " & " 313 (BC_1, *, control, 0), " & " 314 (BC_2, AMI_ADDR13, input, X), " & " 315 (BC_1, AMI_ADDR12, output3, X, 316, 0, Z), " & " 316 (BC_1, *, control, 0), " & " 317 (BC_2, AMI_ADDR12, input, X), " & " 318 (BC_1, AMI_ADDR11, output3, X, 319, 0, Z), " & " 319 (BC_1, *, control, 0), " & " 320 (BC_2, AMI_ADDR11, input, X), " & " 321 (BC_1, AMI_ADDR10, output3, X, 322, 0, Z), " & " 322 (BC_1, *, control, 0), " & " 323 (BC_2, AMI_ADDR10, input, X), " & " 324 (BC_1, AMI_ADDR09, output3, X, 325, 0, Z), " & " 325 (BC_1, *, control, 0), " & " 326 (BC_2, AMI_ADDR09, input, X), " & " 327 (BC_1, AMI_ADDR08, output3, X, 328, 0, Z), " & " 328 (BC_1, *, control, 0), " & " 329 (BC_2, AMI_ADDR08, input, X), " & " 330 (BC_1, AMI_ADDR07, output3, X, 331, 0, Z), " & " 331 (BC_1, *, control, 0), " & " 332 (BC_2, AMI_ADDR07, input, X), " & " 333 (BC_1, AMI_ADDR06, output3, X, 334, 0, Z), " & " 334 (BC_1, *, control, 0), " & " 335 (BC_2, AMI_ADDR06, input, X), " & " 336 (BC_1, AMI_ADDR05, output3, X, 337, 0, Z), " & " 337 (BC_1, *, control, 0), " & " 338 (BC_2, AMI_ADDR05, input, X), " & " 339 (BC_1, AMI_ADDR04, output3, X, 340, 0, Z), " & " 340 (BC_1, *, control, 0), " & " 341 (BC_2, AMI_ADDR04, input, X), " & " 342 (BC_1, AMI_ADDR03, output3, X, 343, 0, Z), " & " 343 (BC_1, *, control, 0), " & " 344 (BC_2, AMI_ADDR03, input, X), " & " 345 (BC_1, AMI_ADDR02, output3, X, 346, 0, Z), " & " 346 (BC_1, *, control, 0), " & " 347 (BC_2, AMI_ADDR02, input, X), " & " 348 (BC_1, AMI_ADDR01, output3, X, 349, 0, Z), " & " 349 (BC_1, *, control, 0), " & " 350 (BC_2, AMI_ADDR01, input, X), " & " 351 (BC_1, AMI_ADDR0, output3, X, 352, 0, Z), " & " 352 (BC_1, *, control, 0), " & " 353 (BC_2, AMI_ADDR0, input, X), " & " 354 (BC_1, AMI_DATA7, output3, X, 355, 0, Z), " & " 355 (BC_1, *, control, 0), " & " 356 (BC_2, AMI_DATA7, input, X), " & " 357 (BC_1, AMI_DATA6, output3, X, 358, 0, Z), " & " 358 (BC_1, *, control, 0), " & " 359 (BC_2, AMI_DATA6, input, X), " & " 360 (BC_1, AMI_DATA5, output3, X, 361, 0, Z), " & " 361 (BC_1, *, control, 0), " & " 362 (BC_2, AMI_DATA5, input, X), " & " 363 (BC_1, AMI_DATA4, output3, X, 364, 0, Z), " & " 364 (BC_1, *, control, 0), " & " 365 (BC_2, AMI_DATA4, input, X), " & " 366 (BC_1, AMI_DATA3, output3, X, 367, 0, Z), " & " 367 (BC_1, *, control, 0), " & " 368 (BC_2, AMI_DATA3, input, X), " & " 369 (BC_1, AMI_DATA2, output3, X, 370, 0, Z), " & " 370 (BC_1, *, control, 0), " & " 371 (BC_2, AMI_DATA2, input, X), " & " 372 (BC_1, AMI_DATA1, output3, X, 373, 0, Z), " & " 373 (BC_1, *, control, 0), " & " 374 (BC_2, AMI_DATA1, input, X), " & " 375 (BC_1, AMI_DATA0, output3, X, 376, 0, Z), " & " 376 (BC_1, *, control, 0), " & " 377 (BC_2, AMI_DATA0, input, X), " & " 378 (BC_1, LACK_1, output3, X, 379, 0, Z), " & " 379 (BC_1, *, control, 0), " & " 380 (BC_2, LACK_1, input, X), " & " 381 (BC_1, LDAT1_7, output3, X, 382, 0, Z), " & " 382 (BC_1, *, control, 0), " & " 383 (BC_2, LDAT1_7, input, X), " & " 384 (BC_1, LCLK_1, output3, X, 385, 0, Z), " & " 385 (BC_1, *, control, 0), " & " 386 (BC_2, LCLK_1, input, X), " & " 387 (BC_1, LDAT1_6, output3, X, 388, 0, Z), " & " 388 (BC_1, *, control, 0), " & " 389 (BC_2, LDAT1_6, input, X), " & " 390 (BC_1, LDAT1_5, output3, X, 391, 0, Z), " & " 391 (BC_1, *, control, 0), " & " 392 (BC_2, LDAT1_5, input, X), " & " 393 (BC_1, LDAT1_4, output3, X, 394, 0, Z), " & " 394 (BC_1, *, control, 0), " & " 395 (BC_2, LDAT1_4, input, X), " & " 396 (BC_1, LDAT1_3, output3, X, 397, 0, Z), " & " 397 (BC_1, *, control, 0), " & " 398 (BC_2, LDAT1_3, input, X), " & " 399 (BC_1, LDAT1_2, output3, X, 400, 0, Z), " & " 400 (BC_1, *, control, 0), " & " 401 (BC_2, LDAT1_2, input, X), " & " 402 (BC_1, LDAT1_1, output3, X, 403, 0, Z), " & " 403 (BC_1, *, control, 0), " & " 404 (BC_2, LDAT1_1, input, X), " & " 405 (BC_1, LDAT1_0, output3, X, 406, 0, Z), " & " 406 (BC_1, *, control, 0), " & " 407 (BC_2, LDAT1_0, input, X), " & " 408 (BC_1, LACK_0, output3, X, 409, 0, Z), " & " 409 (BC_1, *, control, 0), " & " 410 (BC_2, LACK_0, input, X), " & " 411 (BC_1, LCLK_0, output3, X, 412, 0, Z), " & " 412 (BC_1, *, control, 0), " & " 413 (BC_2, LCLK_0, input, X), " & " 414 (BC_1, LDAT0_7, output3, X, 415, 0, Z), " & " 415 (BC_1, *, control, 0), " & " 416 (BC_2, LDAT0_7, input, X), " & " 417 (BC_1, LDAT0_6, output3, X, 418, 0, Z), " & " 418 (BC_1, *, control, 0), " & " 419 (BC_2, LDAT0_6, input, X), " & " 420 (BC_1, LDAT0_5, output3, X, 421, 0, Z), " & " 421 (BC_1, *, control, 0), " & " 422 (BC_2, LDAT0_5, input, X), " & " 423 (BC_1, LDAT0_4, output3, X, 424, 0, Z), " & " 424 (BC_1, *, control, 0), " & " 425 (BC_2, LDAT0_4, input, X), " & " 426 (BC_1, LDAT0_3, output3, X, 427, 0, Z), " & " 427 (BC_1, *, control, 0), " & " 428 (BC_2, LDAT0_3, input, X), " & " 429 (BC_1, LDAT0_2, output3, X, 430, 0, Z), " & " 430 (BC_1, *, control, 0), " & " 431 (BC_2, LDAT0_2, input, X), " & " 432 (BC_1, LDAT0_1, output3, X, 433, 0, Z), " & " 433 (BC_1, *, control, 0), " & " 434 (BC_2, LDAT0_1, input, X), " & " 435 (BC_1, LDAT0_0, output3, X, 436, 0, Z), " & " 436 (BC_1, *, control, 0), " & " 437 (BC_2, LDAT0_0, input, X), " & " 438 (BC_1, DDR2_BA2, output3, X, 439, 0, Z), " & " 439 (BC_1, *, control, 0), " & " 440 (BC_3, *, internal, X), " & " 441 (BC_1, DDR2_BA1, output3, X, 442, 0, Z), " & " 442 (BC_1, *, control, 0), " & " 443 (BC_3, *, internal, X), " & " 444 (BC_1, DDR2_BA0, output3, X, 445, 0, Z), " & " 445 (BC_1, *, control, 0), " & " 446 (BC_3, *, internal, X), " & " 447 (BC_1, DDR2_ADDR15, output3, X, 448, 0, Z), " & " 448 (BC_1, *, control, 0), " & " 449 (BC_3, *, internal, X), " & " 450 (BC_1, DDR2_ADDR14, output3, X, 451, 0, Z), " & " 451 (BC_1, *, control, 0), " & " 452 (BC_3, *, internal, X), " & " 453 (BC_1, DDR2_ADDR13, output3, X, 454, 0, Z), " & " 454 (BC_1, *, control, 0), " & " 455 (BC_3, *, internal, X), " & " 456 (BC_1, DDR2_ADDR12, output3, X, 457, 0, Z), " & " 457 (BC_1, *, control, 0), " & " 458 (BC_3, *, internal, X), " & " 459 (BC_1, DDR2_ADDR11, output3, X, 460, 0, Z), " & " 460 (BC_1, *, control, 0), " & " 461 (BC_3, *, internal, X), " & " 462 (BC_1, DDR2_ADDR10, output3, X, 463, 0, Z), " & " 463 (BC_1, *, control, 0), " & " 464 (BC_3, *, internal, X), " & " 465 (BC_1, DDR2_ADDR09, output3, X, 466, 0, Z), " & " 466 (BC_1, *, control, 0), " & " 467 (BC_3, *, internal, X), " & " 468 (BC_1, DDR2_ADDR08, output3, X, 469, 0, Z), " & " 469 (BC_1, *, control, 0), " & " 470 (BC_3, *, internal, X), " & " 471 (BC_1, DDR2_ADDR07, output3, X, 472, 0, Z), " & " 472 (BC_1, *, control, 0), " & " 473 (BC_3, *, internal, X), " & " 474 (BC_1, DDR2_ADDR06, output3, X, 475, 0, Z), " & " 475 (BC_1, *, control, 0), " & " 476 (BC_3, *, internal, X), " & " 477 (BC_1, DDR2_ADDR05, output3, X, 478, 0, Z), " & " 478 (BC_1, *, control, 0), " & " 479 (BC_3, *, internal, X), " & " 480 (BC_1, DDR2_ADDR04, output3, X, 481, 0, Z), " & " 481 (BC_1, *, control, 0), " & " 482 (BC_3, *, internal, X), " & " 483 (BC_1, DDR2_ADDR03, output3, X, 484, 0, Z), " & " 484 (BC_1, *, control, 0), " & " 485 (BC_3, *, internal, X), " & " 486 (BC_1, DDR2_ADDR02, output3, X, 487, 0, Z), " & " 487 (BC_1, *, control, 0), " & " 488 (BC_3, *, internal, X), " & " 489 (BC_1, DDR2_ADDR01, output3, X, 490, 0, Z), " & " 490 (BC_1, *, control, 0), " & " 491 (BC_3, *, internal, X), " & " 492 (BC_1, DDR2_ADDR0, output3, X, 493, 0, Z), " & " 493 (BC_1, *, control, 0), " & " 494 (BC_3, *, internal, X), " & " 495 (BC_1, DDR2_CLK1, output3, X, 496, 0, Z), " & " 496 (BC_1, *, control, 0), " & " 497 (BC_3, *, internal, X), " & " 498 (BC_1, DDR2_DM1, output3, X, 499, 0, Z), " & " 499 (BC_1, *, control, 0), " & " 500 (BC_3, *, internal, X), " & " 501 (BC_1, DDR2_DATA15, output3, X, 502, 0, Z), " & " 502 (BC_1, *, control, 0), " & " 503 (BC_2, DDR2_DATA15, input, X), " & " 504 (BC_1, DDR2_DATA14, output3, X, 505, 0, Z), " & " 505 (BC_1, *, control, 0), " & " 506 (BC_2, DDR2_DATA14, input, X), " & " 507 (BC_1, DDR2_DATA13, output3, X, 508, 0, Z), " & " 508 (BC_1, *, control, 0), " & " 509 (BC_2, DDR2_DATA13, input, X), " & " 510 (BC_1, DDR2_DATA12, output3, X, 511, 0, Z), " & " 511 (BC_1, *, control, 0), " & " 512 (BC_2, DDR2_DATA12, input, X), " & " 513 (BC_1, DDR2_DQS1, output3, X, 514, 0, Z), " & " 514 (BC_1, *, control, 0), " & " 515 (BC_2, DDR2_DQS1, input, X), " & " 516 (BC_1, DDR2_DATA11, output3, X, 517, 0, Z), " & " 517 (BC_1, *, control, 0), " & " 518 (BC_2, DDR2_DATA11, input, X), " & " 519 (BC_1, DDR2_DATA10, output3, X, 520, 0, Z), " & " 520 (BC_1, *, control, 0), " & " 521 (BC_2, DDR2_DATA10, input, X), " & " 522 (BC_1, DDR2_DATA09, output3, X, 523, 0, Z), " & " 523 (BC_1, *, control, 0), " & " 524 (BC_2, DDR2_DATA09, input, X), " & " 525 (BC_1, DDR2_DATA08, output3, X, 526, 0, Z), " & " 526 (BC_1, *, control, 0), " & " 527 (BC_2, DDR2_DATA08, input, X), " & " 528 (BC_1, DDR2_DATA07, output3, X, 529, 0, Z), " & " 529 (BC_1, *, control, 0), " & " 530 (BC_2, DDR2_DATA07, input, X), " & " 531 (BC_1, DDR2_DATA06, output3, X, 532, 0, Z), " & " 532 (BC_1, *, control, 0), " & " 533 (BC_2, DDR2_DATA06, input, X), " & " 534 (BC_1, DDR2_DATA05, output3, X, 535, 0, Z), " & " 535 (BC_1, *, control, 0), " & " 536 (BC_2, DDR2_DATA05, input, X), " & " 537 (BC_1, DDR2_DATA04, output3, X, 538, 0, Z), " & " 538 (BC_1, *, control, 0), " & " 539 (BC_2, DDR2_DATA04, input, X), " & " 540 (BC_1, DDR2_CLK0, output3, X, 541, 0, Z), " & " 541 (BC_1, *, control, 0), " & " 542 (BC_3, *, internal, X), " & " 543 (BC_1, DDR2_DQS0, output3, X, 544, 0, Z), " & " 544 (BC_1, *, control, 0), " & " 545 (BC_2, DDR2_DQS0, input, X), " & " 546 (BC_1, DDR2_DATA03, output3, X, 547, 0, Z), " & " 547 (BC_1, *, control, 0), " & " 548 (BC_2, DDR2_DATA03, input, X), " & " 549 (BC_1, DDR2_DATA02, output3, X, 550, 0, Z), " & " 550 (BC_1, *, control, 0), " & " 551 (BC_2, DDR2_DATA02, input, X), " & " 552 (BC_1, DDR2_DATA01, output3, X, 553, 0, Z), " & " 553 (BC_1, *, control, 0), " & " 554 (BC_2, DDR2_DATA01, input, X), " & " 555 (BC_1, DDR2_DATA0, output3, X, 556, 0, Z), " & " 556 (BC_1, *, control, 0), " & " 557 (BC_2, DDR2_DATA0, input, X), " & " 558 (BC_1, DDR2_DM0, output3, X, 559, 0, Z), " & " 559 (BC_1, *, control, 0), " & " 560 (BC_3, *, internal, X), " & " 561 (BC_1, DDR2_CS0_B, output3, X, 562, 0, Z), " & " 562 (BC_1, *, control, 0), " & " 563 (BC_3, *, internal, X), " & " 564 (BC_3, *, internal, X)"; end ADSP_21467;