--//***************************************************************************** --// --// lm3s2948_ra2_bga_v1p0.bsdl - Boundary Scan Description Language (BSDL) file --// for the Texas Instruments LM3S2948 Stellaris microcontroller. --// --// Version 1.0 - 02/19/2010 - Initial Release of BSDL entity --// - LM3S2948, Revision A2, 108-ball BGA --// --// --// Copyright (c) 2010 Texas Instruments, Inc. All rights reserved. --// --// Software License Agreement --// --// Texas Instruments, Inc. (TI) is supplying this software for use solely and --// exclusively on TI's Stellaris Family of microcontroller products. --// --// The software is owned by TI and/or its suppliers, and is protected under --// applicable copyright laws. All rights are reserved. Any use in violation --// of the foregoing restrictions may subject the user to criminal sanctions --// under applicable laws, as well as to civil liability for the breach of the --// terms and conditions of this license. --// --// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED --// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF --// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. --// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR --// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. --// --//***************************************************************************** entity LM3S2948 is generic (PHYSICAL_PIN_MAP : string := "BGA_108"); port ( ADC0: linkage bit; ADC1: linkage bit; ADC2: linkage bit; ADC3: linkage bit; ADC4: linkage bit; ADC5: linkage bit; ADC6: linkage bit; ADC7: linkage bit; CMOD0: in bit; CMOD1: in bit; GND: linkage bit_vector(0 to 12); GNDA: linkage bit_vector(0 to 1); HIB: linkage bit; LDO: linkage bit; NC: linkage bit_vector(0 to 7); OSC0: linkage bit; OSC1: linkage bit; PA0_U0Rx: inout bit; PA1_U0Tx: inout bit; PA2_SSI0Clk: inout bit; PA3_SSI0Fss: inout bit; PA4_SSI0Rx: inout bit; PA5_SSI0Tx: inout bit; PA6_CCP1: inout bit; PA7_CCP4: inout bit; PB0_CCP0: inout bit; PB1_CCP2: inout bit; PB2_I2C0SCL: inout bit; PB3_I2C0SDA: inout bit; PB4: inout bit; PB5: inout bit; PB6: inout bit; PC4_CCP5: inout bit; PC5: inout bit; PC6: inout bit; PC7: inout bit; PD0_CAN0Rx: inout bit; PD1_CAN0Tx: inout bit; PD2_U1Rx: inout bit; PD3_U1Tx: inout bit; PE0_SSI1Clk: inout bit; PE1_SSI1Fss: inout bit; PE2_SSI1Rx: inout bit; PE3_SSI1Tx: inout bit; PF0_CAN1Rx: inout bit; PF1_CAN1Tx: inout bit; PF2: inout bit; PF3: inout bit; PF4_C0o: inout bit; PF5: inout bit; PF6: inout bit; PF7: inout bit; PG0_U2Rx: inout bit; PG1_U2Tx: inout bit; PG2: inout bit; PG3: inout bit; PG4_CCP3: inout bit; PG5: inout bit; PG6: inout bit; PG7: inout bit; PH0_CCP6: inout bit; PH1_CCP7: inout bit; PH2: inout bit; PH3: inout bit; RST: in bit; TCK: in bit; TDI: in bit; TDO: out bit; TMS: in bit; TRST: in bit; VBAT: linkage bit; VDD25: linkage bit_vector(0 to 3); VDD33: linkage bit_vector(0 to 7); VDDA: linkage bit_vector(0 to 1); WAKE: linkage bit; XOSC0: linkage bit; XOSC1: linkage bit ); use STD_1149_1_1994.all; -- Get Std 1149.1-1994 attributes and definitions attribute COMPONENT_CONFORMANCE of LM3S2948 : entity is "STD_1149_1_1993"; attribute PIN_MAP of LM3S2948 : entity is PHYSICAL_PIN_MAP; constant BGA_108: PIN_MAP_STRING := "ADC1: A1, " & "ADC4: A2, " & "ADC5: A3, " & "ADC7: A4, " & "PB4: A6, " & "PB6: A7, " & "TRST: A8, " & "TCK: A9, " & "TDO: A10, " & "PE0_SSI1Clk: A11, " & "PE3_SSI1Tx: A12, " & "ADC0: B1, " & "ADC3: B2, " & "ADC2: B3, " & "ADC6: B4, " & "PB5: B7, " & "TDI: B8, " & "TMS: B9, " & "CMOD1: B10, " & "PE2_SSI1Rx: B11, " & "PE1_SSI1Fss: B12, " & "PH1_CCP7: C8, " & "PH0_CCP6: C9, " & "PG7: C10, " & "PB2_I2C0SCL: C11, " & "PB3_I2C0SDA: C12, " & "PH3: D10, " & "PH2: D11, " & "PB1_CCP2: D12, " & "LDO: E3, " & "CMOD0: E11, " & "PB0_CCP0: E12, " & "PD0_CAN0Rx: G1, " & "PD1_CAN0Tx: G2, " & "PD3_U1Tx: H1, " & "PD2_U1Rx: H2, " & "RST: H11, " & "PF1_CAN1Tx: H12, " & "PG2: J1, " & "PG3: J2, " & "PF2: J11, " & "PF3: J12, " & "PG0_U2Rx: K1, " & "PG1_U2Tx: K2, " & "PG4_CCP3: K3, " & "PF7: K4, " & "XOSC0: K11, " & "XOSC1: K12, " & "PC4_CCP5: L1, " & "PC7: L2, " & "PA0_U0Rx: L3, " & "PA3_SSI0Fss: L4, " & "PA4_SSI0Rx: L5, " & "PA6_CCP1: L6, " & "PG6: L7, " & "PF5: L8, " & "PF4_C0o: L9, " & "OSC0: L11, " & "VBAT: L12, " & "PC5: M1, " & "PC6: M2, " & "PA1_U0Tx: M3, " & "PA2_SSI0Clk: M4, " & "PA5_SSI0Tx: M5, " & "PA7_CCP4: M6, " & "PG5: M7, " & "PF6: M8, " & "PF0_CAN1Rx: M9, " & "WAKE: M10, " & "OSC1: M11, " & "HIB: M12, " & "GND: ( B6, C4, C5, F10, F11, F12, H3, J3, J10, K5, K6, K10, L10 ), " & "GNDA: ( A5, B5 ), " & "NC: ( C1, C2, D1, D2, E1, E2, F1, F2 ), " & "VDD25: ( C3, D3, F3, G3 ), " & "VDD33: (E10, G10, G11, G12, H10, K7, K8, K9 ), " & "VDDA: ( C6, C7 ) " ; attribute TAP_SCAN_RESET of TRST : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH); attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute INSTRUCTION_LENGTH of LM3S2948 : entity is 4; attribute INSTRUCTION_OPCODE of LM3S2948 : entity is "EXTEST (0000)," & "INTEST (0001)," & "SAMPLE (0010)," & "BYPASS (0011)," & "BYPASS (0100)," & "BYPASS (0101)," & "BYPASS (0110)," & "BYPASS (0111)," & "ABORT (1000)," & "BYPASS (1001)," & "DPACC (1010)," & "APACC (1011)," & "BYPASS (1100)," & "BYPASS (1101)," & "IDCODE (1110)," & "BYPASS (1111)"; attribute INSTRUCTION_CAPTURE of LM3S2948 : entity is "0001"; attribute IDCODE_REGISTER of LM3S2948 : entity is "0011" & -- Version (Fourth Revision) "1011101000000000" & -- Part number (ARM Cortex M3) "01000111011" & -- Manufacturer Identity (ARM) "1"; -- Mandatory LSB -- IDCODE = 3BA00477 attribute INSTRUCTION_PRIVATE of LM3S2948 : entity is "ABORT, DPACC, APACC"; -- ARM Debug Access Port Instructions attribute BOUNDARY_LENGTH of LM3S2948 : entity is 144; attribute BOUNDARY_REGISTER of LM3S2948 : entity is -- num cell port function safe [ ccell disval rslt ] -- --- ---- -------------- -------- ---- ------ ------ ------ " 0 (BC_4, CMOD1, CLOCK, X ), " & " 1 (BC_1, *, CONTROL, 1 ), " & " 2 (BC_1, PE3_SSI1Tx, OUTPUT3, X , 1, 1, Z ), " & " 3 (BC_1, PE3_SSI1Tx, INPUT, X ), " & " 4 (BC_1, *, CONTROL, 1 ), " & " 5 (BC_1, PE2_SSI1Rx, OUTPUT3, X , 4, 1, Z ), " & " 6 (BC_1, PE2_SSI1Rx, INPUT, X ), " & " 7 (BC_1, *, CONTROL, 1 ), " & " 8 (BC_1, PE1_SSI1Fss, OUTPUT3, X , 7, 1, Z ), " & " 9 (BC_1, PE1_SSI1Fss, INPUT, X ), " & " 10 (BC_1, *, CONTROL, 1 ), " & " 11 (BC_1, PE0_SSI1Clk, OUTPUT3, X , 10, 1, Z ), " & " 12 (BC_1, PE0_SSI1Clk, INPUT, X ), " & " 13 (BC_1, *, CONTROL, 1 ), " & " 14 (BC_1, PB3_I2C0SDA, OUTPUT3, X , 13, 1, Z ), " & " 15 (BC_1, PB3_I2C0SDA, INPUT, X ), " & " 16 (BC_1, *, CONTROL, 1 ), " & " 17 (BC_1, PB2_I2C0SCL, OUTPUT3, X , 16, 1, Z ), " & " 18 (BC_1, PB2_I2C0SCL, INPUT, X ), " & " 19 (BC_1, *, CONTROL, 1 ), " & " 20 (BC_1, PB1_CCP2, OUTPUT3, X , 19, 1, Z ), " & " 21 (BC_1, PB1_CCP2, INPUT, X ), " & " 22 (BC_1, *, CONTROL, 1 ), " & " 23 (BC_1, PB0_CCP0, OUTPUT3, X , 22, 1, Z ), " & " 24 (BC_1, PB0_CCP0, INPUT, X ), " & " 25 (BC_4, CMOD0, CLOCK, X ), " & " 26 (BC_4, RST, CLOCK, X ), " & " 27 (BC_1, *, CONTROL, 1 ), " & " 28 (BC_1, PF1_CAN1Tx, OUTPUT3, X , 27, 1, Z ), " & " 29 (BC_1, PF1_CAN1Tx, INPUT, X ), " & " 30 (BC_1, *, CONTROL, 1 ), " & " 31 (BC_1, PF2, OUTPUT3, X , 30, 1, Z ), " & " 32 (BC_1, PF2, INPUT, X ), " & " 33 (BC_1, *, CONTROL, 1 ), " & " 34 (BC_1, PF3, OUTPUT3, X , 33, 1, Z ), " & " 35 (BC_1, PF3, INPUT, X ), " & " 36 (BC_1, *, CONTROL, 1 ), " & " 37 (BC_1, PF4_C0o, OUTPUT3, X , 36, 1, Z ), " & " 38 (BC_1, PF4_C0o, INPUT, X ), " & " 39 (BC_1, *, CONTROL, 1 ), " & " 40 (BC_1, PF0_CAN1Rx, OUTPUT3, X , 39, 1, Z ), " & " 41 (BC_1, PF0_CAN1Rx, INPUT, X ), " & " 42 (BC_1, *, CONTROL, 1 ), " & " 43 (BC_1, PF5, OUTPUT3, X , 42, 1, Z ), " & " 44 (BC_1, PF5, INPUT, X ), " & " 45 (BC_1, *, CONTROL, 1 ), " & " 46 (BC_1, PF6, OUTPUT3, X , 45, 1, Z ), " & " 47 (BC_1, PF6, INPUT, X ), " & " 48 (BC_1, *, CONTROL, 1 ), " & " 49 (BC_1, PF7, OUTPUT3, X , 48, 1, Z ), " & " 50 (BC_1, PF7, INPUT, X ), " & " 51 (BC_1, *, CONTROL, 1 ), " & " 52 (BC_1, PG4_CCP3, OUTPUT3, X , 51, 1, Z ), " & " 53 (BC_1, PG4_CCP3, INPUT, X ), " & " 54 (BC_1, *, CONTROL, 1 ), " & " 55 (BC_1, PG5, OUTPUT3, X , 54, 1, Z ), " & " 56 (BC_1, PG5, INPUT, X ), " & " 57 (BC_1, *, CONTROL, 1 ), " & " 58 (BC_1, PG6, OUTPUT3, X , 57, 1, Z ), " & " 59 (BC_1, PG6, INPUT, X ), " & " 60 (BC_1, *, CONTROL, 1 ), " & " 61 (BC_1, PG7, OUTPUT3, X , 60, 1, Z ), " & " 62 (BC_1, PG7, INPUT, X ), " & " 63 (BC_1, *, CONTROL, 1 ), " & " 64 (BC_1, PA7_CCP4, OUTPUT3, X , 63, 1, Z ), " & " 65 (BC_1, PA7_CCP4, INPUT, X ), " & " 66 (BC_1, *, CONTROL, 1 ), " & " 67 (BC_1, PA6_CCP1, OUTPUT3, X , 66, 1, Z ), " & " 68 (BC_1, PA6_CCP1, INPUT, X ), " & " 69 (BC_1, *, CONTROL, 1 ), " & " 70 (BC_1, PA5_SSI0Tx, OUTPUT3, X , 69, 1, Z ), " & " 71 (BC_1, PA5_SSI0Tx, INPUT, X ), " & " 72 (BC_1, *, CONTROL, 1 ), " & " 73 (BC_1, PA4_SSI0Rx, OUTPUT3, X , 72, 1, Z ), " & " 74 (BC_1, PA4_SSI0Rx, INPUT, X ), " & " 75 (BC_1, *, CONTROL, 1 ), " & " 76 (BC_1, PA3_SSI0Fss, OUTPUT3, X , 75, 1, Z ), " & " 77 (BC_1, PA3_SSI0Fss, INPUT, X ), " & " 78 (BC_1, *, CONTROL, 1 ), " & " 79 (BC_1, PA2_SSI0Clk, OUTPUT3, X , 78, 1, Z ), " & " 80 (BC_1, PA2_SSI0Clk, INPUT, X ), " & " 81 (BC_1, *, CONTROL, 1 ), " & " 82 (BC_1, PA1_U0Tx, OUTPUT3, X , 81, 1, Z ), " & " 83 (BC_1, PA1_U0Tx, INPUT, X ), " & " 84 (BC_1, *, CONTROL, 1 ), " & " 85 (BC_1, PA0_U0Rx, OUTPUT3, X , 84, 1, Z ), " & " 86 (BC_1, PA0_U0Rx, INPUT, X ), " & " 87 (BC_1, *, CONTROL, 1 ), " & " 88 (BC_1, PC4_CCP5, OUTPUT3, X , 87, 1, Z ), " & " 89 (BC_1, PC4_CCP5, INPUT, X ), " & " 90 (BC_1, *, CONTROL, 1 ), " & " 91 (BC_1, PC5, OUTPUT3, X , 90, 1, Z ), " & " 92 (BC_1, PC5, INPUT, X ), " & " 93 (BC_1, *, CONTROL, 1 ), " & " 94 (BC_1, PC6, OUTPUT3, X , 93, 1, Z ), " & " 95 (BC_1, PC6, INPUT, X ), " & " 96 (BC_1, *, CONTROL, 1 ), " & " 97 (BC_1, PC7, OUTPUT3, X , 96, 1, Z ), " & " 98 (BC_1, PC7, INPUT, X ), " & " 99 (BC_1, *, CONTROL, 1 ), " & " 100 (BC_1, PG0_U2Rx, OUTPUT3, X , 99, 1, Z ), " & " 101 (BC_1, PG0_U2Rx, INPUT, X ), " & " 102 (BC_1, *, CONTROL, 1 ), " & " 103 (BC_1, PG1_U2Tx, OUTPUT3, X , 102, 1, Z ), " & " 104 (BC_1, PG1_U2Tx, INPUT, X ), " & " 105 (BC_1, *, CONTROL, 1 ), " & " 106 (BC_1, PG2, OUTPUT3, X , 105, 1, Z ), " & " 107 (BC_1, PG2, INPUT, X ), " & " 108 (BC_1, *, CONTROL, 1 ), " & " 109 (BC_1, PG3, OUTPUT3, X , 108, 1, Z ), " & " 110 (BC_1, PG3, INPUT, X ), " & " 111 (BC_1, *, CONTROL, 1 ), " & " 112 (BC_1, PD3_U1Tx, OUTPUT3, X , 111, 1, Z ), " & " 113 (BC_1, PD3_U1Tx, INPUT, X ), " & " 114 (BC_1, *, CONTROL, 1 ), " & " 115 (BC_1, PD2_U1Rx, OUTPUT3, X , 114, 1, Z ), " & " 116 (BC_1, PD2_U1Rx, INPUT, X ), " & " 117 (BC_1, *, CONTROL, 1 ), " & " 118 (BC_1, PD1_CAN0Tx, OUTPUT3, X , 117, 1, Z ), " & " 119 (BC_1, PD1_CAN0Tx, INPUT, X ), " & " 120 (BC_1, *, CONTROL, 1 ), " & " 121 (BC_1, PD0_CAN0Rx, OUTPUT3, X , 120, 1, Z ), " & " 122 (BC_1, PD0_CAN0Rx, INPUT, X ), " & " 123 (BC_1, *, CONTROL, 1 ), " & " 124 (BC_1, PB4, OUTPUT3, X , 123, 1, Z ), " & " 125 (BC_1, PB4, INPUT, X ), " & " 126 (BC_1, *, CONTROL, 1 ), " & " 127 (BC_1, PB5, OUTPUT3, X , 126, 1, Z ), " & " 128 (BC_1, PB5, INPUT, X ), " & " 129 (BC_1, *, CONTROL, 1 ), " & " 130 (BC_1, PB6, OUTPUT3, X , 129, 1, Z ), " & " 131 (BC_1, PB6, INPUT, X ), " & " 132 (BC_1, *, CONTROL, 1 ), " & " 133 (BC_1, PH0_CCP6, OUTPUT3, X , 132, 1, Z ), " & " 134 (BC_1, PH0_CCP6, INPUT, X ), " & " 135 (BC_1, *, CONTROL, 1 ), " & " 136 (BC_1, PH1_CCP7, OUTPUT3, X , 135, 1, Z ), " & " 137 (BC_1, PH1_CCP7, INPUT, X ), " & " 138 (BC_1, *, CONTROL, 1 ), " & " 139 (BC_1, PH2, OUTPUT3, X , 138, 1, Z ), " & " 140 (BC_1, PH2, INPUT, X ), " & " 141 (BC_1, *, CONTROL, 1 ), " & " 142 (BC_1, PH3, OUTPUT3, X , 141, 1, Z ), " & " 143 (BC_1, PH3, INPUT, X ) " ; end LM3S2948;