--//***************************************************************************** --// --// lm3s3826_rc0_lqfp_v1p0.bsdl - Boundary Scan Description Language (BSDL) file --// for the Texas Instruments LM3S3826 Stellaris microcontroller. --// --// Version 1.0 - 02/24/2010 - Initial Release of BSDL entity --// - LM3S3826, Revision C0, 64-pin LQFP --// --// --// Copyright (c) 2010 Texas Instruments, Inc. All rights reserved. --// --// Software License Agreement --// --// Texas Instruments, Inc. (TI) is supplying this software for use solely and --// exclusively on TI's Stellaris Family of microcontroller products. --// --// The software is owned by TI and/or its suppliers, and is protected under --// applicable copyright laws. All rights are reserved. Any use in violation --// of the foregoing restrictions may subject the user to criminal sanctions --// under applicable laws, as well as to civil liability for the breach of the --// terms and conditions of this license. --// --// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED --// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF --// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. --// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR --// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. --// --//***************************************************************************** entity LM3S3826 is generic (PHYSICAL_PIN_MAP : string := "LQFP_64"); port ( GND: linkage bit_vector(0 to 8); GNDA: linkage bit; HIB: linkage bit; LDO: linkage bit; OSC0: linkage bit; OSC1: linkage bit; PA0_U0Rx: inout bit; PA1_U0Tx: inout bit; PA2_SSI0Clk: inout bit; PA3_SSI0Fss: inout bit; PA4_SSI0Rx: inout bit; PA5_SSI0Tx: inout bit; PA6: inout bit; PA7: inout bit; PB0: inout bit; PB1: inout bit; PB2_I2C0SCL: inout bit; PB3_I2C0SDA: inout bit; PB4: inout bit; PB5: inout bit; PB6: inout bit; PB7: inout bit; PC4: inout bit; PC5: inout bit; PC6: inout bit; PC7: inout bit; PD0: inout bit; PD1: inout bit; PD2: inout bit; PD3: inout bit; PE0: inout bit; PE1: inout bit; PE2: inout bit; PE3: inout bit; PE4: inout bit; RST: linkage bit; TCK: in bit; TDI: in bit; TDO: out bit; TMS: in bit; USB0DM: linkage bit; USB0DP: linkage bit; USB0RBIAS: linkage bit; VBAT: linkage bit; VDD: linkage bit_vector(0 to 3); VDDA: linkage bit; VDDC: linkage bit_vector(0 to 3); WAKE: linkage bit; XOSC0: linkage bit; XOSC1: linkage bit ); use STD_1149_1_1994.all; -- Get Std 1149.1-1994 attributes and definitions attribute COMPONENT_CONFORMANCE of LM3S3826 : entity is "STD_1149_1_1993"; attribute PIN_MAP of LM3S3826 : entity is PHYSICAL_PIN_MAP; constant LQFP_64: PIN_MAP_STRING := "PE3: 1, " & "PE2: 2, " & "VDDA: 3, " & "GNDA: 4, " & "PE1: 5, " & "PE0: 6, " & "LDO: 7, " & "PE4: 8, " & "PC4: 11, " & "PC5: 14, " & "PC6: 15, " & "PC7: 16, " & "PA0_U0Rx: 17, " & "PA1_U0Tx: 18, " & "PA2_SSI0Clk: 19, " & "PA3_SSI0Fss: 20, " & "PA4_SSI0Rx: 21, " & "PA5_SSI0Tx: 22, " & "PA6: 25, " & "PA7: 26, " & "PB3_I2C0SDA: 27, " & "OSC0: 30, " & "OSC1: 31, " & "WAKE: 32, " & "HIB: 33, " & "XOSC0: 34, " & "XOSC1: 35, " & "VBAT: 37, " & "RST: 40, " & "PB0: 41, " & "PB1: 42, " & "USB0DM: 45, " & "USB0DP: 46, " & "PB2_I2C0SCL: 47, " & "USB0RBIAS: 48, " & "TDO: 49, " & "TDI: 50, " & "TMS: 51, " & "TCK: 52, " & "PB7: 55, " & "PB6: 56, " & "PB5: 57, " & "PB4: 58, " & "PD0: 61, " & "PD1: 62, " & "PD2: 63, " & "PD3: 64, " & "GND: ( 10, 13, 24, 29, 36, 39, 44, 53, 60 ), " & "VDD: ( 12, 28, 43, 59 ), " & "VDDC: ( 9, 23, 38, 54 ) " ; attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH); attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute INSTRUCTION_LENGTH of LM3S3826 : entity is 4; attribute INSTRUCTION_OPCODE of LM3S3826 : entity is "EXTEST (0000)," & "INTEST (0001)," & "SAMPLE (0010)," & "BYPASS (0011)," & "BYPASS (0100)," & "BYPASS (0101)," & "BYPASS (0110)," & "BYPASS (0111)," & "ABORT (1000)," & "BYPASS (1001)," & "DPACC (1010)," & "APACC (1011)," & "BYPASS (1100)," & "BYPASS (1101)," & "IDCODE (1110)," & "BYPASS (1111)"; attribute INSTRUCTION_CAPTURE of LM3S3826 : entity is "0001"; attribute IDCODE_REGISTER of LM3S3826 : entity is "0100" & -- Version (Fifth Revision) "1011101000000000" & -- Part number (ARM Cortex M3) "01000111011" & -- Manufacturer Identity (ARM) "1"; -- Mandatory LSB -- IDCODE = 4BA00477 attribute INSTRUCTION_PRIVATE of LM3S3826 : entity is "ABORT, DPACC, APACC"; -- ARM Debug Access Port Instructions attribute BOUNDARY_LENGTH of LM3S3826 : entity is 87; attribute BOUNDARY_REGISTER of LM3S3826 : entity is -- num cell port function safe [ ccell disval rslt ] -- --- ---- -------------- -------- ---- ------ ------ ------ " 0 (BC_1, *, CONTROL, 1 ), " & " 1 (BC_1, PE1, OUTPUT3, X , 0, 1, Z ), " & " 2 (BC_1, PE1, INPUT, X ), " & " 3 (BC_1, *, CONTROL, 1 ), " & " 4 (BC_1, PE0, OUTPUT3, X , 3, 1, Z ), " & " 5 (BC_1, PE0, INPUT, X ), " & " 6 (BC_1, *, CONTROL, 1 ), " & " 7 (BC_1, PB2_I2C0SCL, OUTPUT3, X , 6, 1, Z ), " & " 8 (BC_1, PB2_I2C0SCL, INPUT, X ), " & " 9 (BC_1, *, CONTROL, 1 ), " & " 10 (BC_1, PB1, OUTPUT3, X , 9, 1, Z ), " & " 11 (BC_1, PB1, INPUT, X ), " & " 12 (BC_1, *, CONTROL, 1 ), " & " 13 (BC_1, PB0, OUTPUT3, X , 12, 1, Z ), " & " 14 (BC_1, PB0, INPUT, X ), " & " 15 (BC_1, *, CONTROL, 1 ), " & " 16 (BC_1, PB3_I2C0SDA, OUTPUT3, X , 15, 1, Z ), " & " 17 (BC_1, PB3_I2C0SDA, INPUT, X ), " & " 18 (BC_1, *, CONTROL, 1 ), " & " 19 (BC_1, PA7, OUTPUT3, X , 18, 1, Z ), " & " 20 (BC_1, PA7, INPUT, X ), " & " 21 (BC_1, *, CONTROL, 1 ), " & " 22 (BC_1, PA6, OUTPUT3, X , 21, 1, Z ), " & " 23 (BC_1, PA6, INPUT, X ), " & " 24 (BC_1, *, CONTROL, 1 ), " & " 25 (BC_1, PA5_SSI0Tx, OUTPUT3, X , 24, 1, Z ), " & " 26 (BC_1, PA5_SSI0Tx, INPUT, X ), " & " 27 (BC_1, *, CONTROL, 1 ), " & " 28 (BC_1, PA4_SSI0Rx, OUTPUT3, X , 27, 1, Z ), " & " 29 (BC_1, PA4_SSI0Rx, INPUT, X ), " & " 30 (BC_1, *, CONTROL, 1 ), " & " 31 (BC_1, PA3_SSI0Fss, OUTPUT3, X , 30, 1, Z ), " & " 32 (BC_1, PA3_SSI0Fss, INPUT, X ), " & " 33 (BC_1, *, CONTROL, 1 ), " & " 34 (BC_1, PA2_SSI0Clk, OUTPUT3, X , 33, 1, Z ), " & " 35 (BC_1, PA2_SSI0Clk, INPUT, X ), " & " 36 (BC_1, *, CONTROL, 1 ), " & " 37 (BC_1, PA1_U0Tx, OUTPUT3, X , 36, 1, Z ), " & " 38 (BC_1, PA1_U0Tx, INPUT, X ), " & " 39 (BC_1, *, CONTROL, 1 ), " & " 40 (BC_1, PA0_U0Rx, OUTPUT3, X , 39, 1, Z ), " & " 41 (BC_1, PA0_U0Rx, INPUT, X ), " & " 42 (BC_1, *, CONTROL, 1 ), " & " 43 (BC_1, PC4, OUTPUT3, X , 42, 1, Z ), " & " 44 (BC_1, PC4, INPUT, X ), " & " 45 (BC_1, *, CONTROL, 1 ), " & " 46 (BC_1, PC5, OUTPUT3, X , 45, 1, Z ), " & " 47 (BC_1, PC5, INPUT, X ), " & " 48 (BC_1, *, CONTROL, 1 ), " & " 49 (BC_1, PC6, OUTPUT3, X , 48, 1, Z ), " & " 50 (BC_1, PC6, INPUT, X ), " & " 51 (BC_1, *, CONTROL, 1 ), " & " 52 (BC_1, PC7, OUTPUT3, X , 51, 1, Z ), " & " 53 (BC_1, PC7, INPUT, X ), " & " 54 (BC_1, *, CONTROL, 1 ), " & " 55 (BC_1, PD3, OUTPUT3, X , 54, 1, Z ), " & " 56 (BC_1, PD3, INPUT, X ), " & " 57 (BC_1, *, CONTROL, 1 ), " & " 58 (BC_1, PD2, OUTPUT3, X , 57, 1, Z ), " & " 59 (BC_1, PD2, INPUT, X ), " & " 60 (BC_1, *, CONTROL, 1 ), " & " 61 (BC_1, PD1, OUTPUT3, X , 60, 1, Z ), " & " 62 (BC_1, PD1, INPUT, X ), " & " 63 (BC_1, *, CONTROL, 1 ), " & " 64 (BC_1, PD0, OUTPUT3, X , 63, 1, Z ), " & " 65 (BC_1, PD0, INPUT, X ), " & " 66 (BC_1, *, CONTROL, 1 ), " & " 67 (BC_1, PE4, OUTPUT3, X , 66, 1, Z ), " & " 68 (BC_1, PE4, INPUT, X ), " & " 69 (BC_1, *, CONTROL, 1 ), " & " 70 (BC_1, PE3, OUTPUT3, X , 69, 1, Z ), " & " 71 (BC_1, PE3, INPUT, X ), " & " 72 (BC_1, *, CONTROL, 1 ), " & " 73 (BC_1, PE2, OUTPUT3, X , 72, 1, Z ), " & " 74 (BC_1, PE2, INPUT, X ), " & " 75 (BC_1, *, CONTROL, 1 ), " & " 76 (BC_1, PB4, OUTPUT3, X , 75, 1, Z ), " & " 77 (BC_1, PB4, INPUT, X ), " & " 78 (BC_1, *, CONTROL, 1 ), " & " 79 (BC_1, PB5, OUTPUT3, X , 78, 1, Z ), " & " 80 (BC_1, PB5, INPUT, X ), " & " 81 (BC_1, *, CONTROL, 1 ), " & " 82 (BC_1, PB6, OUTPUT3, X , 81, 1, Z ), " & " 83 (BC_1, PB6, INPUT, X ), " & " 84 (BC_1, *, CONTROL, 1 ), " & " 85 (BC_1, PB7, OUTPUT3, X , 84, 1, Z ), " & " 86 (BC_1, PB7, INPUT, X ) " ; end LM3S3826;