-- ********************************************************************** -- -- FILE : zl30105qd.bsd -- generated by Cz.P. as zl30105 on Fri Apr 8 15:51:12 EDT 2005 -- using p.jtag.bsd rev 3.3 July 18, 2003 -- -- BSDL description for top level entity zl30105 -- Device : ZL30105 SDH/PDH System Synchronizer with Redundant Clocks -- Package : 64-pin TQFP -- -- Number of BSC cells: 58 -- -- ********************************************************************** -- Modification History: -- -- rev. 1.1: Fri Apr 8 15:51:12 EDT 2005 -- - Model good for all ZL30105QD* products -- -- Initial release: Thu Mar 11 14:15:14 EST 2004 -- ******************************************************************** -- -- IMPORTANT NOTICE -- -- This information is for modeling purposes only, and is not guaranteed. -- -- This information is provided "as is" without warranty of any kind. -- It may contain technical inaccuracies or typographical errors. -- -- ZARLINK and ZL30105 are trademarks of ZARLINK Semiconductor. ZARLINK -- products, marketed under trademarks, are protected under numerous US -- and foreign patents and pending applications, maskwork rights, and -- copyrights. -- -- ZARLINK reserves the right to make changes to any products and -- services at any time without notice. ZARLINK assumes no -- responsibility or liability arising out of the application or use of -- any information, product, or service described herein except as -- expressly agreed to in writing by ZARLINK Corporation. ZARLINK -- customers are advised to obtain the latest version of device -- specifications before relying on any published information and before -- placing orders for products or services. -- -- ******************************************************************** -- -- SPECIAL NOTES -- -- 1. All instruction opcodes other than those defined in this file -- should be considered PRIVATE. -- -- 2. Pins IC_GRD1.IC_GRD2 {52,62} should be tied to GROUND -- for normal operation. -- -- 3. Pin NC_OPEN1 {22} is an internal connect, and -- it should be kept open for normal operation. -- -- ******************************************************************** entity zl30105 is generic(PHYSICAL_PIN_MAP : string := "TQFP_PACKAGE"); port ( APPS_SEL0: in bit; APPS_SEL1: in bit; C16O_B: inout bit; C19O: inout bit; C1P5O: inout bit; C2O: inout bit; C3O: out bit; C4_65O_B: out bit; C6_8P4_34_44O: out bit; C8_32O: out bit; F16O_B: out bit; F2KO: inout bit; F4_65O_B: out bit; F8_32O: inout bit; FASTLOCK: in bit; HMS: in bit; HOLDOVER: out bit; IC_GRD1: linkage bit; IC_GRD2: linkage bit; IREF2_SYNC: in bit; LOCK: out bit; MODE_SEL0: in bit; MODE_SEL1: in bit; NC_OPEN1: linkage bit; OSCI: linkage bit; OSCO: linkage bit; OUT_SEL: in bit_vector (0 to 2); REF: in bit_vector (0 to 2); REF_FAIL: out bit_vector (0 to 2); REF_SEL0: inout bit; REF_SEL1: inout bit; RST_B: in bit; SEC_MSTR: in bit; TCK: in bit; TDI: in bit; TDO: out bit; TIECLR_B: in bit; TMS: in bit; TRST_B: in bit; AGND: linkage bit_vector (1 to 5); AVDD: linkage bit_vector (1 to 5); AVDD_CORE: linkage bit_vector (1 to 2); GND: linkage bit_vector (1 to 3); VDD: linkage bit_vector (1 to 2); VDDCORE: linkage bit_vector (1 to 2) ); use STD_1149_1_2001.all; attribute COMPONENT_CONFORMANCE of zl30105 : entity is "STD_1149_1_2001"; attribute PIN_MAP of zl30105 : entity is PHYSICAL_PIN_MAP; constant TQFP_PACKAGE : PIN_MAP_STRING := "APPS_SEL0 : 60 , " & "APPS_SEL1 : 24 , " & "C16O_B : 47 , " & "C19O : 39 , " & "C1P5O : 32 , " & "C2O : 46 , " & "C3O : 31 , " & "C4_65O_B : 42 , " & "C6_8P4_34_44O : 30 , " & "C8_32O : 43 , " & "F16O_B : 50 , " & "F2KO : 38 , " & "F4_65O_B : 49 , " & "F8_32O : 48 , " & "FASTLOCK : 64 , " & "HMS : 16 , " & "HOLDOVER : 4 , " & "IC_GRD1 : 52 , " & "IC_GRD2 : 62 , " & "IREF2_SYNC : 58 , " & "LOCK : 3 , " & "MODE_SEL0 : 17 , " & "MODE_SEL1 : 18 , " & "NC_OPEN1 : 22 , " & "OSCI : 21 , " & "OSCO : 20 , " & "OUT_SEL :(28 , " & -- OUT_SEL[0] "27 , " & -- OUT_SEL[1] "26 ), " & -- OUT_SEL[2] "REF :(55 , " & -- REF[0] "56 , " & -- REF[1] "57 ), " & -- REF[2] "REF_FAIL :(5 , " & -- REF_FAIL[0] "6 , " & -- REF_FAIL[1] "7 ), " & -- REF_FAIL[2] "REF_SEL0 : 53 , " & "REF_SEL1 : 54 , " & "RST_B : 19 , " & "SEC_MSTR : 59 , " & "TCK : 11 , " & "TDI : 15 , " & "TDO : 8 , " & "TIECLR_B : 63 , " & "TMS : 9 , " & "TRST_B : 10 , " & "AGND :(33, 40, 41, 51, 34)," & "AVDD :(29, 37, 44, 45, 36)," & "AVDD_CORE :(14, 35)," & "GND :(23, 1, 13)," & "VDD :(61, 25)," & "VDDCORE :(2, 12)"; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6,BOTH); attribute TAP_SCAN_RESET of TRST_B : signal is true; -- -- NOTE: All instruction opcodes other than those defined in this file -- should be considered PRIVATE. -- attribute INSTRUCTION_LENGTH of zl30105 : entity is 16; attribute INSTRUCTION_OPCODE of zl30105 : entity is "bypass (0000000000000000)," & "bypass (1111111111111111)," & "sample (1111111111111000)," & "preload (1111111111111000)," & "idcode (1111111111111110)," & "highz (1111111111001111)," & "clamp (1111111111101111)," & "extest (1111111111101000)"; attribute INSTRUCTION_CAPTURE of zl30105 : entity is "xxxxxxxxxxxxxx01"; attribute IDCODE_REGISTER of zl30105 : entity is "0001" & -- version "0111010110011001" & -- part number "00010100101" & -- manufacturer id "1"; attribute REGISTER_ACCESS of zl30105 : entity is "boundary (extest, sample, preload)," & "bypass (bypass, highz, clamp)," & "device_id (idcode)" ; attribute BOUNDARY_LENGTH of zl30105 : entity is 58; attribute BOUNDARY_REGISTER of zl30105 : entity is -- num cell port function safe ccel disval rslt " 0 ( BC_2, REF_FAIL(2), output3, X, 1, 1, Z) ," & " 1 ( BC_2, *, control, 1) ," & " 2 ( BC_2, REF_FAIL(1), output3, X, 3, 1, Z) ," & " 3 ( BC_2, *, control, 1) ," & " 4 ( BC_2, REF_FAIL(0), output3, X, 5, 1, Z) ," & " 5 ( BC_2, *, control, 1) ," & " 6 ( BC_2, HOLDOVER, output3, X, 7, 1, Z) ," & " 7 ( BC_2, *, control, 1) ," & " 8 ( BC_2, LOCK, output3, X, 9, 1, Z) ," & " 9 ( BC_2, *, control, 1) ," & " 10 ( BC_4, FASTLOCK, input, X) ," & " 11 ( BC_4, TIECLR_B, input, X) ," & " 12 ( BC_4, *, internal, X) ," & " 13 ( BC_4, APPS_SEL0, input, X) ," & " 14 ( BC_4, SEC_MSTR, input, X) ," & " 15 ( BC_4, IREF2_SYNC, input, X) ," & " 16 ( BC_4, REF(2), input, X) ," & " 17 ( BC_4, *, internal, X) ," & " 18 ( BC_4, REF(1), input, X) ," & " 19 ( BC_4, *, internal, X) ," & " 20 ( BC_4, REF(0), input, X) ," & " 21 ( BC_7, REF_SEL1, bidir, X, 22, 1, Z) ," & " 22 ( BC_2, *, control, 1) ," & " 23 ( BC_7, REF_SEL0, bidir, X, 24, 1, Z) ," & " 24 ( BC_2, *, control, 1) ," & " 25 ( BC_4, *, internal, X) ," & " 26 ( BC_2, F16O_B, output3, X, 27, 1, Z) ," & " 27 ( BC_2, *, control, 1) ," & " 28 ( BC_2, F4_65O_B, output3, X, 29, 1, Z) ," & " 29 ( BC_2, *, control, 1) ," & " 30 ( BC_7, F8_32O, bidir, X, 31, 1, Z) ," & " 31 ( BC_2, *, control, 1) ," & " 32 ( BC_7, C16O_B, bidir, X, 33, 1, Z) ," & " 33 ( BC_2, *, control, 1) ," & " 34 ( BC_7, C2O, bidir, X, 35, 1, Z) ," & " 35 ( BC_2, *, control, 1) ," & " 36 ( BC_2, C8_32O, output3, X, 37, 1, Z) ," & " 37 ( BC_2, *, control, 1) ," & " 38 ( BC_2, C4_65O_B, output3, X, 39, 1, Z) ," & " 39 ( BC_2, *, control, 1) ," & " 40 ( BC_7, C19O, bidir, X, 41, 1, Z) ," & " 41 ( BC_2, *, control, 1) ," & " 42 ( BC_7, F2KO, bidir, X, 43, 1, Z) ," & " 43 ( BC_2, *, control, 1) ," & " 44 ( BC_7, C1P5O, bidir, X, 45, 1, Z) ," & " 45 ( BC_2, *, control, 1) ," & " 46 ( BC_2, C3O, output3, X, 47, 1, Z) ," & " 47 ( BC_2, *, control, 1) ," & " 48 ( BC_2, C6_8P4_34_44O, output3, X, 49, 1, Z) ," & " 49 ( BC_2, *, control, 1) ," & " 50 ( BC_4, OUT_SEL(0), input, X) ," & " 51 ( BC_4, OUT_SEL(1), input, X) ," & " 52 ( BC_4, OUT_SEL(2), input, X) ," & " 53 ( BC_4, APPS_SEL1, input, X) ," & " 54 ( BC_4, RST_B, input, X) ," & " 55 ( BC_4, MODE_SEL1, input, X) ," & " 56 ( BC_4, MODE_SEL0, input, X) ," & " 57 ( BC_4, HMS, input, X) "; end zl30105; ------------- end of BSDL description for the zl30105 ----------