-- --------------------------------------------------------------------------- -- Copyright Message -- --------------------------------------------------------------------------- -- -- NXP Semiconductors confidential and proprietary. -- COPYRIGHT 2008 by NXP Semiconductors N.V. -- -- All rights are reserved. Reproduction in whole or in part is -- prohibited without the written consent of the copyright owner. -- -- --------------------------------------------------------------------------- -- Design Information -- --------------------------------------------------------------------------- -- -- File : $RCSfile: LPC32X0FET296_REVDASH_2008_10_13.BSDL.rca $ -- -- Author : $Author: usb10152 $ -- -- Description : LPCR32X0FET296_REVDASH_2008_10_13.BSDL -- -- --------------------------------------------------------------------------- -- $Id: LPC32X0FET296_REVDASH_2008_10_13.BSDL.rca 1.1 Mon Oct 13 20:24:55 2008 usb10152 Experimental $ -- $Source: /home/usb10152/bsdl/LPC32X0FET296_REVDASH_2008_10_13.BSDL.rca $ -- --------------------------------------------------------------------------- -- ------------------------------------------------------------------------------- -- Job Status: Pass -- -- File Name: LPC32X0FET296_REVDASH_2008_10_13.BSDL -- Timestamp: Monday, October 13, 2008 10:17 PM -- -- Results: Entity name: LPC32X0FET296 -- IEEE Std 1149.1-2001 (Version 2.0) -- Packaging option selected is TFBGA296. -- Inputs = 1 -- Outputs = 0 -- Bidirectionals = 201 -- Instruction Reg Length = 4 -- Boundary Reg Length = 403 -- -- BSDL compilation of 1086 lines completed without errors ------------------------------------------------------------------------------- entity LPC32X0FET296 is -- -- This section identifies the default device package selected. -- generic (PHYSICAL_PIN_MAP : string := "TFBGA296"); -- -- This section declares all the ports in the design. -- port (JTAG_TCK : in bit; JTAG_TDI : in bit; JTAG_TDO : out bit; JTAG_TMS : in bit; JTAG_NTRST : in bit; I2C1_SDA : inout bit; I2C1_SCL : inout bit; I2C2_SCL : inout bit; I2C2_SDA : inout bit; USB_I2C_SDA : inout bit; USB_I2C_SCL : inout bit; SYSX_IN : linkage bit; SYSX_OUT : linkage bit; RTCX_IN : linkage bit; RTCX_OUT : linkage bit; PLL397_LOOP : linkage bit; TS_XP : linkage bit; ADIN0_TS_XM : linkage bit; TS_YP : linkage bit; ADIN1_TS_YM : linkage bit; ADIN2_TS_AUX_IN : linkage bit; EMC_D31_P2_12 : inout bit; EMC_D30_P2_11 : inout bit; EMC_D29_P2_10 : inout bit; EMC_D28_P2_9 : inout bit; EMC_D27_P2_8 : inout bit; EMC_D26_P2_7 : inout bit; EMC_D25_P2_6 : inout bit; EMC_D24_P2_5 : inout bit; EMC_D23_P2_4 : inout bit; EMC_D22_P2_3 : inout bit; EMC_D21_P2_2 : inout bit; EMC_D20_P2_1 : inout bit; EMC_D19_P2_0 : inout bit; EMC_D18_EMC_CLK_N : inout bit; EMC_D17_EMC_DQS1 : inout bit; EMC_D16_EMC_DQS0 : inout bit; EMC_D15 : inout bit; EMC_D14 : inout bit; EMC_D13 : inout bit; EMC_D12 : inout bit; EMC_D11 : inout bit; EMC_D10 : inout bit; EMC_D9 : inout bit; EMC_D8 : inout bit; EMC_D7 : inout bit; EMC_D6 : inout bit; EMC_D5 : inout bit; EMC_D4 : inout bit; EMC_D3 : inout bit; EMC_D2 : inout bit; EMC_D1 : inout bit; EMC_D0 : inout bit; EMC_A23_P1_23 : inout bit; EMC_A22_P1_22 : inout bit; EMC_A21_P1_21 : inout bit; EMC_A20_P1_20 : inout bit; EMC_A19_P1_19 : inout bit; EMC_A18_P1_18 : inout bit; EMC_A17_P1_17 : inout bit; EMC_A16_P1_16 : inout bit; EMC_A15_P1_15 : inout bit; EMC_A14_P1_14 : inout bit; EMC_A13_P1_13 : inout bit; EMC_A12_P1_12 : inout bit; EMC_A11_P1_11 : inout bit; EMC_A10_P1_10 : inout bit; EMC_A9_P1_9 : inout bit; EMC_A8_P1_8 : inout bit; EMC_A7_P1_7 : inout bit; EMC_A6_P1_6 : inout bit; EMC_A5_P1_5 : inout bit; EMC_A4_P1_4 : inout bit; EMC_A3_P1_3 : inout bit; EMC_A2_P1_2 : inout bit; EMC_A1_P1_1 : inout bit; EMC_A0_P1_0 : inout bit; EMC_CLK : inout bit; EMC_CLKIN : inout bit; EMC_CKE0 : inout bit; EMC_CS0_N : inout bit; EMC_CS1_N : inout bit; EMC_CS2_N : inout bit; EMC_CS3_N : inout bit; EMC_DYCS0_N : inout bit; EMC_DYCS1_N : inout bit; EMC_RAS_N : inout bit; EMC_CAS_N : inout bit; EMC_WR_N : inout bit; EMC_DQM3 : inout bit; EMC_DQM2 : inout bit; EMC_DQM1 : inout bit; EMC_DQM0 : inout bit; EMC_BLS3 : inout bit; EMC_BLS2 : inout bit; EMC_BLS1 : inout bit; EMC_BLS0 : inout bit; EMC_OE_N : inout bit; P0_0_I2S1RX_CLK : inout bit; P0_1_I2S1RX_WS : inout bit; P0_2_I2S0RX_SDA_LCD_VD4 : inout bit; P0_3_I2S0RX_CLK_LCD_VD5 : inout bit; P0_4_I2S0RX_WS_LCD_VD6 : inout bit; P0_5_I2S0TX_SDA_LCD_VD7 : inout bit; P0_6_I2S0TX_CLK_LCD_VD12 : inout bit; P0_7_I2S0TX_WS_LCD_VD13 : inout bit; I2S1TX_WS_CAP3_0 : inout bit; I2S1TX_CLK_MAT3_0 : inout bit; I2S1TX_SDA_MAT3_1 : inout bit; SYSCLKEN_LCD_VD15 : inout bit; RESOUT_N : inout bit; ONSW : inout bit; HIGHCORE_LCD_VD17 : inout bit; DBGEN : in bit; TST_CLK2 : inout bit; USB_ATX_INT_N : inout bit; USB_OE_TP_N : inout bit; USB_DAT_VP_U5_RX : inout bit; USB_SE0_VM_U5_TX : inout bit; FLASH_IO7 : inout bit; FLASH_IO6 : inout bit; FLASH_IO5 : inout bit; FLASH_IO4 : inout bit; FLASH_IO3 : inout bit; FLASH_IO2 : inout bit; FLASH_IO1 : inout bit; FLASH_IO0 : inout bit; FLASH_ALE : inout bit; FLASH_CE_N : inout bit; FLASH_WR_N : inout bit; FLASH_RD_N : inout bit; FLASH_CLE : inout bit; FLASH_RDY : inout bit; MS_SCLK_MAT2_0 : inout bit; MS_BS_MAT2_1 : inout bit; MS_DIO0_MAT0_0 : inout bit; MS_DIO1_MAT0_1 : inout bit; MS_DIO2_MAT0_2 : inout bit; MS_DIO3_MAT0_3 : inout bit; GPI28_U3_RI : inout bit; GPI19_U4_RX : inout bit; GPI09_KEY_COL7_ENET_COL : inout bit; GPI08_KEY_COL6_SPI2_BUSY_ENE : inout bit; GPI07_CAP4_0_MCABORT : inout bit; GPI06_HSTIM_CAP_ENET_RXD2 : inout bit; GPI05_U3_DCD : inout bit; GPI04_SPI1_BUSY : inout bit; GPI03 : inout bit; GPI02_CAP2_0_ENET_RXD3 : inout bit; GPI01_SERVICE_N : inout bit; GPI00_I2S1RX_SDA : inout bit; GPO23_U2_HRTS_U3_RTS : inout bit; GPO22_U7_HRTS_LCD_VD14 : inout bit; GPO21_U4_TX_LCD_VD3 : inout bit; GPO20 : inout bit; GPO19 : inout bit; GPO18_MC0A_LCD_LP : inout bit; GPO17 : inout bit; GPO16_MC0B_LCD_ENAB_LCD_M : inout bit; GPO15_MC1A_LCD_FP : inout bit; GPO14 : inout bit; GPO13_MC1B_LCD_DCLK : inout bit; GPO12_MC2A_LCD_LE : inout bit; GPO11 : inout bit; GPO10_MC2B_LCD_PWR : inout bit; GPO09_LCD_VD9 : inout bit; GPO08_LCD_VD8 : inout bit; GPO07_LCD_VD2 : inout bit; GPO06_LCD_VD18 : inout bit; GPO05 : inout bit; GPO04 : inout bit; GPO03_LCD_VD1 : inout bit; GPO02_MAT1_0_LCD_VD0 : inout bit; GPO01 : inout bit; GPO00_TST_CLK1 : inout bit; GPIO05_SSEL0_LCD_MCFB0 : inout bit; GPIO04_SSEL1_LCD_VD22 : inout bit; GPIO03_KEY_ROW7_ENET_MDIO : inout bit; GPIO02_KEY_ROW6_ENET_MDC : inout bit; GPIO01 : inout bit; GPIO00 : inout bit; JTAG_RTCK : inout bit; U1_TX : inout bit; U1_RX_CAP1_0_GPI15 : inout bit; U2_TX_U3_DTR : inout bit; U2_RX_U3_DSR_GPI17 : inout bit; U2_HCTS_U3_CTS_GPI16 : inout bit; U3_TX : inout bit; U3_RX_GPI18 : inout bit; U5_TX : inout bit; U5_RX_GPI20 : inout bit; U6_IRTX : inout bit; U6_IRRX_GPI21 : inout bit; U7_TX_MAT1_1_LCD_VD11 : inout bit; U7_RX_CAP0_0_LCD_VD10_GPI23 : inout bit; U7_HCTS_CAP0_1_LCDCLKIN_GPI2 : inout bit; KEY_ROW5_ENET_TXD1 : inout bit; KEY_ROW4_ENET_TXD0 : inout bit; KEY_ROW3_ENET_TX_EN : inout bit; KEY_ROW2_ENET_TXD3 : inout bit; KEY_ROW1_ENET_TXD2 : inout bit; KEY_ROW0_ENET_TX_ER : inout bit; KEY_COL5_ENET_RXD1 : inout bit; KEY_COL4_ENET_RXD0 : inout bit; KEY_COL3_ENET_CRS : inout bit; KEY_COL2_ENET_RX_ER : inout bit; KEY_COL1_ENET_RX_CLK_ENET_RE : inout bit; KEY_COL0_ENET_TX_CLK : inout bit; PWM_OUT1_LCD_VD16 : inout bit; PWM_OUT2_LCD_VD19 : inout bit; SPI1_CLK_SCK0 : inout bit; SPI1_DATIO_MOSI0_MCFB2 : inout bit; SPI1_DATIN_MISO0_GPI25_MCFB1 : inout bit; SPI2_CLK_SCK1_LVD_VD23 : inout bit; SPI2_DATIO_MOSI1_LCD_VD20 : inout bit; SPI2_DATIN_MISO1_LCD_VD21_GP : inout bit; RESET_N : in bit; EMC_CKE1 : inout bit; VDD_AD : linkage bit_vector(1 to 2); VSS_AD : linkage bit; VDD_CORE : linkage bit_vector(1 to 7); VDD_COREFXD : linkage bit_vector(1 to 2); VDD_EMC : linkage bit_vector(1 to 11); VDD_IOA : linkage bit_vector(1 to 2); VDD_IOB : linkage bit; VDD_IOC : linkage bit_vector(1 to 4); VDD_IOD : linkage bit_vector(1 to 2); VDD_OSC : linkage bit; VDD_PLL397 : linkage bit; VDD_PLLHCLK : linkage bit; VDD_PLLUSB : linkage bit; VDD_FUSE : linkage bit; VDD_RTC : linkage bit; VDD_RTCCORE : linkage bit; VDD_RTCOSC : linkage bit; VSS_CORE : linkage bit_vector(1 to 9); VSS_EMC : linkage bit_vector(1 to 11); VSS_IOA : linkage bit; VSS_IOB : linkage bit; VSS_IOC : linkage bit_vector(1 to 3); VSS_IOD : linkage bit_vector(1 to 4); VSS_OSC : linkage bit; VSS_PLL397 : linkage bit; VSS_PLLHCLK : linkage bit; VSS_PLLUSB : linkage bit; VSS_RTCCORE : linkage bit; VSS_RTCOSC : linkage bit; NC : linkage bit_vector(1 to 3) ); use std_1149_1_2001.all; attribute COMPONENT_CONFORMANCE of LPC32X0FET296 : entity is "std_1149_1_2001"; attribute PIN_MAP of LPC32X0FET296 : entity is PHYSICAL_PIN_MAP; -- -- This section specifies the pin map for each port. -- constant TFBGA296 : PIN_MAP_STRING := "JTAG_TCK : H14," & "JTAG_TDI : J16," & "JTAG_TDO : J15," & "JTAG_TMS : G18," & "JTAG_NTRST : H17," & "I2C1_SDA : A5, " & "I2C1_SCL : B6, " & "I2C2_SCL : A3, " & "I2C2_SDA : E4, " & "USB_I2C_SDA : E6, " & "USB_I2C_SCL : E5, " & "SYSX_IN : T17," & "SYSX_OUT : R15," & "RTCX_IN : P16," & "RTCX_OUT : P17," & "PLL397_LOOP : R14," & "TS_XP : R13," & "ADIN0_TS_XM : U15," & "TS_YP : U16," & "ADIN1_TS_YM : T14," & "ADIN2_TS_AUX_IN : V16," & "EMC_D31_P2_12 : V14," & "EMC_D30_P2_11 : U12," & "EMC_D29_P2_10 : V13," & "EMC_D28_P2_9 : V12," & "EMC_D27_P2_8 : T11," & "EMC_D26_P2_7 : U11," & "EMC_D25_P2_6 : V11," & "EMC_D24_P2_5 : R10," & "EMC_D23_P2_4 : T10," & "EMC_D22_P2_3 : U10," & "EMC_D21_P2_2 : V10," & "EMC_D20_P2_1 : T9, " & "EMC_D19_P2_0 : U9, " & "EMC_D18_EMC_CLK_N : V9, " & "EMC_D17_EMC_DQS1 : R9, " & "EMC_D16_EMC_DQS0 : V8, " & "EMC_D15 : U8, " & "EMC_D14 : T8, " & "EMC_D13 : V7, " & "EMC_D12 : U7, " & "EMC_D11 : T7, " & "EMC_D10 : V6, " & "EMC_D9 : U6, " & "EMC_D8 : V5, " & "EMC_D7 : R8, " & "EMC_D6 : T6, " & "EMC_D5 : V4, " & "EMC_D4 : V3, " & "EMC_D3 : U5, " & "EMC_D2 : T5, " & "EMC_D1 : R7, " & "EMC_D0 : U4, " & "EMC_A23_P1_23 : J4, " & "EMC_A22_P1_22 : J3, " & "EMC_A21_P1_21 : J2, " & "EMC_A20_P1_20 : J1, " & "EMC_A19_P1_19 : K1, " & "EMC_A18_P1_18 : K2, " & "EMC_A17_P1_17 : K4, " & "EMC_A16_P1_16 : K3, " & "EMC_A15_P1_15 : L1, " & "EMC_A14_P1_14 : R2, " & "EMC_A13_P1_13 : R1, " & "EMC_A12_P1_12 : N4, " & "EMC_A11_P1_11 : P3, " & "EMC_A10_P1_10 : P2, " & "EMC_A9_P1_9 : P1, " & "EMC_A8_P1_8 : M4, " & "EMC_A7_P1_7 : N3, " & "EMC_A6_P1_6 : N2, " & "EMC_A5_P1_5 : N1, " & "EMC_A4_P1_4 : M3, " & "EMC_A3_P1_3 : M2, " & "EMC_A2_P1_2 : M1, " & "EMC_A1_P1_1 : L4, " & "EMC_A0_P1_0 : L3, " & "EMC_CLK : T3, " & "EMC_CLKIN : T4, " & "EMC_CKE0 : U3, " & "EMC_CS0_N : U13," & "EMC_CS1_N : R11," & "EMC_CS2_N : T12," & "EMC_CS3_N : V15," & "EMC_DYCS0_N : R6, " & "EMC_DYCS1_N : G1, " & "EMC_RAS_N : T2, " & "EMC_CAS_N : R5, " & "EMC_WR_N : R4, " & "EMC_DQM3 : P5, " & "EMC_DQM2 : T1, " & "EMC_DQM1 : P4, " & "EMC_DQM0 : R3, " & "EMC_BLS3 : P12," & "EMC_BLS2 : R12," & "EMC_BLS1 : T13," & "EMC_BLS0 : U14," & "EMC_OE_N : H1, " & "P0_0_I2S1RX_CLK : B5, " & "P0_1_I2S1RX_WS : D7, " & "P0_2_I2S0RX_SDA_LCD_VD4 : M17," & "P0_3_I2S0RX_CLK_LCD_VD5 : M18," & "P0_4_I2S0RX_WS_LCD_VD6 : L15," & "P0_5_I2S0TX_SDA_LCD_VD7 : L16," & "P0_6_I2S0TX_CLK_LCD_VD12 : L17," & "P0_7_I2S0TX_WS_LCD_VD13 : L18," & "I2S1TX_WS_CAP3_0 : B4, " & "I2S1TX_CLK_MAT3_0 : A4, " & "I2S1TX_SDA_MAT3_1 : E7, " & "SYSCLKEN_LCD_VD15 : G17," & "RESOUT_N : G4, " & "ONSW : M15," & "HIGHCORE_LCD_VD17 : H16," & "DBGEN : G14," & "TST_CLK2 : C6, " & "USB_ATX_INT_N : C4, " & "USB_OE_TP_N : D6, " & "USB_DAT_VP_U5_RX : D5, " & "USB_SE0_VM_U5_TX : C5, " & "FLASH_IO7 : E2, " & "FLASH_IO6 : G3, " & "FLASH_IO5 : G2, " & "FLASH_IO4 : H4, " & "FLASH_IO3 : E1, " & "FLASH_IO2 : F1, " & "FLASH_IO1 : H3, " & "FLASH_IO0 : H2, " & "FLASH_ALE : D2, " & "FLASH_CE_N : E3, " & "FLASH_WR_N : F2, " & "FLASH_RD_N : C1, " & "FLASH_CLE : F3, " & "FLASH_RDY : D1, " & "MS_SCLK_MAT2_0 : B7, " & "MS_BS_MAT2_1 : A6, " & "MS_DIO0_MAT0_0 : A8, " & "MS_DIO1_MAT0_1 : A7, " & "MS_DIO2_MAT0_2 : B8, " & "MS_DIO3_MAT0_3 : C8, " & "GPI28_U3_RI : N17," & "GPI19_U4_RX : B15," & "GPI09_KEY_COL7_ENET_COL : E12, " & "GPI08_KEY_COL6_SPI2_BUSY_ENE : B16," & "GPI07_CAP4_0_MCABORT : D13," & "GPI06_HSTIM_CAP_ENET_RXD2 : C7, " & "GPI05_U3_DCD : N16," & "GPI04_SPI1_BUSY : E13," & "GPI03 : F4, " & "GPI02_CAP2_0_ENET_RXD3 : C14," & "GPI01_SERVICE_N : C15," & "GPI00_I2S1RX_SDA : C16," & "GPO23_U2_HRTS_U3_RTS : M16," & "GPO22_U7_HRTS_LCD_VD14 : E10," & "GPO21_U4_TX_LCD_VD3 : A13," & "GPO20 : B2, " & "GPO19 : C2, " & "GPO18_MC0A_LCD_LP : D11," & "GPO17 : N18," & "GPO16_MC0B_LCD_ENAB_LCD_M : D10," & "GPO15_MC1A_LCD_FP : A14," & "GPO14 : D3, " & "GPO13_MC1B_LCD_DCLK : B13," & "GPO12_MC2A_LCD_LE : B12," & "GPO11 : E8, " & "GPO10_MC2B_LCD_PWR : E11," & "GPO09_LCD_VD9 : C12," & "GPO08_LCD_VD8 : C13," & "GPO07_LCD_VD2 : A15," & "GPO06_LCD_VD18 : A16," & "GPO05 : B3, " & "GPO04 : D8, " & "GPO03_LCD_VD1 : D12," & "GPO02_MAT1_0_LCD_VD0 : B14," & "GPO01 : D4, " & "GPO00_TST_CLK1 : C3, " & "GPIO05_SSEL0_LCD_MCFB0 : E9, " & "GPIO04_SSEL1_LCD_VD22 : B11," & "GPIO03_KEY_ROW7_ENET_MDIO : C11," & "GPIO02_KEY_ROW6_ENET_MDC : D9, " & "GPIO01 : A11," & "GPIO00 : A12," & "JTAG_RTCK : H18," & "U1_TX : K16," & "U1_RX_CAP1_0_GPI15 : K15," & "U2_TX_U3_DTR : K17," & "U2_RX_U3_DSR_GPI17 : K18," & "U2_HCTS_U3_CTS_GPI16 : J18," & "U3_TX : J17," & "U3_RX_GPI18 : J14," & "U5_TX : H15," & "U5_RX_GPI20 : F18," & "U6_IRTX : G16," & "U6_IRRX_GPI21 : F17," & "U7_TX_MAT1_1_LCD_VD11 : E18," & "U7_RX_CAP0_0_LCD_VD10_GPI23 : E17," & "U7_HCTS_CAP0_1_LCDCLKIN_GPI2 : G13," & "KEY_ROW5_ENET_TXD1 : C18," & "KEY_ROW4_ENET_TXD0 : C17," & "KEY_ROW3_ENET_TX_EN : D16," & "KEY_ROW2_ENET_TXD3 : F14," & "KEY_ROW1_ENET_TXD2 : E14," & "KEY_ROW0_ENET_TX_ER : E15," & "KEY_COL5_ENET_RXD1 : F16," & "KEY_COL4_ENET_RXD0 : G15," & "KEY_COL3_ENET_CRS : D18," & "KEY_COL2_ENET_RX_ER : D17," & "KEY_COL1_ENET_RX_CLK_ENET_RE : E16," & "KEY_COL0_ENET_TX_CLK : F15," & "PWM_OUT1_LCD_VD16 : D14," & "PWM_OUT2_LCD_VD19 : D15," & "SPI1_CLK_SCK0 : C9, " & "SPI1_DATIO_MOSI0_MCFB2 : B9, " & "SPI1_DATIN_MISO0_GPI25_MCFB1 : C10," & "SPI2_CLK_SCK1_LVD_VD23 : B10," & "SPI2_DATIO_MOSI1_LCD_VD20 : A9, " & "SPI2_DATIN_MISO1_LCD_VD21_GP : A10," & "RESET_N : M14," & "EMC_CKE1 : L2, " & "VDD_AD : (N12, N13)," & "VSS_AD : P13," & "VDD_CORE : (G7, G9, G11, J7, J12, M7, M11)," & "VDD_COREFXD : (L12, M13)," & "VDD_EMC : (J6, K6, K7, L6, M6, M8, N7, N8, N9, N10, N11)," & "VDD_IOA : (H13, J13)," & "VDD_IOB : F8, " & "VDD_IOC : (F7, G6, H6, J5)," & "VDD_IOD : (F13, F9)," & "VDD_OSC : T18," & "VDD_PLL397 : T16," & "VDD_PLLHCLK : R17," & "VDD_PLLUSB : P15," & "VDD_FUSE : N14," & "VDD_RTC : K14," & "VDD_RTCCORE : L13," & "VDD_RTCOSC : N15," & "VSS_CORE : (G8, G10, G12, H7, K12, L7, M9, M10, M12)," & "VSS_EMC : (K5, L5, M5, N5, N6, P6, P7, P8, P9, P10, P11), " & "VSS_IOA : K13," & "VSS_IOB : F6, " & "VSS_IOC : (F5, G5, H5)," & "VSS_IOD : (F10, F11, F12, H12)," & "VSS_OSC : P14," & "VSS_PLL397 : T15," & "VSS_PLLHCLK : R18," & "VSS_PLLUSB : R16," & "VSS_RTCCORE : L14," & "VSS_RTCOSC : P18," & "NC : (B17, U17, U2)"; -- -- This section specifies the TAP ports. For the TAP TCK port, the parameters in the brackets are: -- First Field : Maximum TCK frequency. -- Second Field : Allowable states TCK may be stopped in. -- attribute TAP_SCAN_CLOCK of JTAG_TCK : signal is (10.0e6, both); attribute TAP_SCAN_IN of JTAG_TDI : signal is true; attribute TAP_SCAN_MODE of JTAG_TMS : signal is true; attribute TAP_SCAN_OUT of JTAG_TDO : signal is true; attribute TAP_SCAN_RESET of JTAG_NTRST : signal is true; -- -- Specifies the compliance enable patterns for the design. It lists a set of -- design ports and the values that they should be set to, in order to enable -- compliance to IEEE Std 1149.1 -- attribute COMPLIANCE_PATTERNS of LPC32X0FET296 : entity is "(DBGEN) (1)"; -- -- Specifies the number of bits in the instruction register. -- attribute INSTRUCTION_LENGTH of LPC32X0FET296 : entity is 4; -- -- Specifies the boundary-scan instructions implemented in the design and their -- opcodes. -- attribute INSTRUCTION_OPCODE of LPC32X0FET296 : entity is "BYPASS (1111)," & "EXTEST (0000)," & "INTEST (0011)," & "SAMPLE (0001)," & "PRELOAD (0010)," & "HIGHZ (0101)," & "CLAMP (0110)," & "IDCODE (0100)"; -- -- Specifies the bit pattern that is loaded into the instruction register when -- the TAP controller passes through the Capture-IR state. The standard mandates -- that the two LSBs must be "01". The remaining bits are design specific. -- attribute INSTRUCTION_CAPTURE of LPC32X0FET296 : entity is "0001"; -- -- Specifies the bit pattern that is loaded into the DEVICE_ID register during -- the IDCODE instruction when the TAP controller passes through the Capture-DR -- state. -- attribute IDCODE_REGISTER of LPC32X0FET296 : entity is "0000" & -- version "1000110100100100" & -- part number "00000010101" & -- manufacturer "1"; -- mandatory -- -- This section specifies the test data register placed between TDI and TDO for -- each implemented instruction. -- attribute REGISTER_ACCESS of LPC32X0FET296 : entity is "BYPASS (BYPASS)," & "BOUNDARY (EXTEST)," & "BOUNDARY (INTEST)," & "BOUNDARY (SAMPLE)," & "BOUNDARY (PRELOAD)," & "BYPASS (HIGHZ)," & "BYPASS (CLAMP)," & "DEVICE_ID (IDCODE)"; -- -- Specifies the length of the boundary scan register. -- attribute BOUNDARY_LENGTH of LPC32X0FET296 : entity is 403; -- -- The following list specifies the characteristics of each cell in the boundary -- scan register from TDI to TDO. The following is a description of the label -- fields : -- num : Is the cell number. -- cell : Is the cell type as defined by the standard. -- port : Is the design port name. Control cells do not have a port -- name. -- function : Is the function of the cell as defined by the standard. Is one -- of input, output2, output3, bidir, control or controlr. -- safe : Specifies the value that the BSR cell should be loaded with -- for safe operation when the software might otherwise choose a -- random value. -- ccell : The control cell number. Specifies the control cell that -- drives the output enable for this port. -- disval : Specifies the value that is loaded into the control cell to -- disable the output enable for the corresponding port. -- rslt : Resulting state. Shows the state of the driver when it is -- disabled. -- attribute BOUNDARY_REGISTER of LPC32X0FET296 : entity is -- -- num cell port function safe [ccell disval rslt] -- "402 (BC_1, *, CONTROL, 1)," & "401 (BC_7, EMC_D31_P2_12, BIDIR, X, 402, 1, Z)," & "400 (BC_1, *, CONTROL, 1)," & "399 (BC_7, EMC_D30_P2_11, BIDIR, X, 400, 1, Z)," & "398 (BC_1, *, CONTROL, 1)," & "397 (BC_7, EMC_D29_P2_10, BIDIR, X, 398, 1, Z)," & "396 (BC_1, *, CONTROL, 1)," & "395 (BC_7, EMC_D28_P2_9, BIDIR, X, 396, 1, Z)," & "394 (BC_1, *, CONTROL, 1)," & "393 (BC_7, EMC_D27_P2_8, BIDIR, X, 394, 1, Z)," & "392 (BC_1, *, CONTROL, 1)," & "391 (BC_7, EMC_D26_P2_7, BIDIR, X, 392, 1, Z)," & "390 (BC_1, *, CONTROL, 1)," & "389 (BC_7, EMC_D25_P2_6, BIDIR, X, 390, 1, Z)," & "388 (BC_1, *, CONTROL, 1)," & "387 (BC_7, EMC_D24_P2_5, BIDIR, X, 388, 1, Z)," & "386 (BC_1, *, CONTROL, 1)," & "385 (BC_7, EMC_D23_P2_4, BIDIR, X, 386, 1, Z)," & "384 (BC_1, *, CONTROL, 1)," & "383 (BC_7, EMC_D22_P2_3, BIDIR, X, 384, 1, Z)," & "382 (BC_1, *, CONTROL, 1)," & "381 (BC_7, EMC_D21_P2_2, BIDIR, X, 382, 1, Z)," & "380 (BC_1, *, CONTROL, 1)," & "379 (BC_7, EMC_D20_P2_1, BIDIR, X, 380, 1, Z)," & "378 (BC_1, *, CONTROL, 1)," & "377 (BC_7, EMC_D19_P2_0, BIDIR, X, 378, 1, Z)," & "376 (BC_1, *, CONTROL, 1)," & "375 (BC_7, EMC_D18_EMC_CLK_N, BIDIR, X, 376, 1, Z)," & "374 (BC_1, *, CONTROL, 1)," & "373 (BC_7, EMC_D17_EMC_DQS1, BIDIR, X, 374, 1, Z)," & "372 (BC_1, *, CONTROL, 1)," & "371 (BC_7, EMC_D16_EMC_DQS0, BIDIR, X, 372, 1, Z)," & "370 (BC_1, *, CONTROL, 1)," & "369 (BC_7, EMC_D15, BIDIR, X, 370, 1, Z)," & "368 (BC_1, *, CONTROL, 1)," & "367 (BC_7, EMC_D14, BIDIR, X, 368, 1, Z)," & "366 (BC_1, *, CONTROL, 1)," & "365 (BC_7, EMC_D13, BIDIR, X, 366, 1, Z)," & "364 (BC_1, *, CONTROL, 1)," & "363 (BC_7, EMC_D12, BIDIR, X, 364, 1, Z)," & "362 (BC_1, *, CONTROL, 1)," & "361 (BC_7, EMC_D11, BIDIR, X, 362, 1, Z)," & "360 (BC_1, *, CONTROL, 1)," & "359 (BC_7, EMC_D10, BIDIR, X, 360, 1, Z)," & "358 (BC_1, *, CONTROL, 1)," & "357 (BC_7, EMC_D9, BIDIR, X, 358, 1, Z)," & "356 (BC_1, *, CONTROL, 1)," & "355 (BC_7, EMC_D8, BIDIR, X, 356, 1, Z)," & "354 (BC_1, *, CONTROL, 1)," & "353 (BC_7, EMC_D7, BIDIR, X, 354, 1, Z)," & "352 (BC_1, *, CONTROL, 1)," & "351 (BC_7, EMC_D6, BIDIR, X, 352, 1, Z)," & "350 (BC_1, *, CONTROL, 1)," & "349 (BC_7, EMC_D5, BIDIR, X, 350, 1, Z)," & "348 (BC_1, *, CONTROL, 1)," & "347 (BC_7, EMC_D4, BIDIR, X, 348, 1, Z)," & "346 (BC_1, *, CONTROL, 1)," & "345 (BC_7, EMC_D3, BIDIR, X, 346, 1, Z)," & "344 (BC_1, *, CONTROL, 1)," & "343 (BC_7, EMC_D2, BIDIR, X, 344, 1, Z)," & "342 (BC_1, *, CONTROL, 1)," & "341 (BC_7, EMC_D1, BIDIR, X, 342, 1, Z)," & "340 (BC_1, *, CONTROL, 1)," & "339 (BC_7, EMC_D0, BIDIR, X, 340, 1, Z)," & "338 (BC_1, *, CONTROL, 1)," & "337 (BC_7, EMC_A23_P1_23, BIDIR, X, 338, 1, Z)," & "336 (BC_1, *, CONTROL, 1)," & "335 (BC_7, EMC_A22_P1_22, BIDIR, X, 336, 1, Z)," & "334 (BC_1, *, CONTROL, 1)," & "333 (BC_7, EMC_A21_P1_21, BIDIR, X, 334, 1, Z)," & "332 (BC_1, *, CONTROL, 1)," & "331 (BC_7, EMC_A20_P1_20, BIDIR, X, 332, 1, Z)," & "330 (BC_1, *, CONTROL, 1)," & "329 (BC_7, EMC_A19_P1_19, BIDIR, X, 330, 1, Z)," & "328 (BC_1, *, CONTROL, 1)," & "327 (BC_7, EMC_A18_P1_18, BIDIR, X, 328, 1, Z)," & "326 (BC_1, *, CONTROL, 1)," & "325 (BC_7, EMC_A17_P1_17, BIDIR, X, 326, 1, Z)," & "324 (BC_1, *, CONTROL, 1)," & "323 (BC_7, EMC_A16_P1_16, BIDIR, X, 324, 1, Z)," & "322 (BC_1, *, CONTROL, 1)," & "321 (BC_7, EMC_A15_P1_15, BIDIR, X, 322, 1, Z)," & "320 (BC_1, *, CONTROL, 1)," & "319 (BC_7, EMC_A14_P1_14, BIDIR, X, 320, 1, Z)," & "318 (BC_1, *, CONTROL, 1)," & "317 (BC_7, EMC_A13_P1_13, BIDIR, X, 318, 1, Z)," & "316 (BC_1, *, CONTROL, 1)," & "315 (BC_7, EMC_A12_P1_12, BIDIR, X, 316, 1, Z)," & "314 (BC_1, *, CONTROL, 1)," & "313 (BC_7, EMC_A11_P1_11, BIDIR, X, 314, 1, Z)," & "312 (BC_1, *, CONTROL, 1)," & "311 (BC_7, EMC_A10_P1_10, BIDIR, X, 312, 1, Z)," & "310 (BC_1, *, CONTROL, 1)," & "309 (BC_7, EMC_A9_P1_9, BIDIR, X, 310, 1, Z)," & "308 (BC_1, *, CONTROL, 1)," & "307 (BC_7, EMC_A8_P1_8, BIDIR, X, 308, 1, Z)," & "306 (BC_1, *, CONTROL, 1)," & "305 (BC_7, EMC_A7_P1_7, BIDIR, X, 306, 1, Z)," & "304 (BC_1, *, CONTROL, 1)," & "303 (BC_7, EMC_A6_P1_6, BIDIR, X, 304, 1, Z)," & "302 (BC_1, *, CONTROL, 1)," & "301 (BC_7, EMC_A5_P1_5, BIDIR, X, 302, 1, Z)," & "300 (BC_1, *, CONTROL, 1)," & "299 (BC_7, EMC_A4_P1_4, BIDIR, X, 300, 1, Z)," & "298 (BC_1, *, CONTROL, 1)," & "297 (BC_7, EMC_A3_P1_3, BIDIR, X, 298, 1, Z)," & "296 (BC_1, *, CONTROL, 1)," & "295 (BC_7, EMC_A2_P1_2, BIDIR, X, 296, 1, Z)," & "294 (BC_1, *, CONTROL, 1)," & "293 (BC_7, EMC_A1_P1_1, BIDIR, X, 294, 1, Z)," & "292 (BC_1, *, CONTROL, 1)," & "291 (BC_7, EMC_A0_P1_0, BIDIR, X, 292, 1, Z)," & "290 (BC_1, *, CONTROL, 1)," & "289 (BC_7, EMC_CLK, BIDIR, X, 290, 1, Z)," & "288 (BC_1, *, CONTROL, 1)," & "287 (BC_7, EMC_CLKIN, BIDIR, X, 288, 1, Z)," & "286 (BC_1, *, CONTROL, 1)," & "285 (BC_7, EMC_CKE0, BIDIR, X, 286, 1, Z)," & "284 (BC_1, *, CONTROL, 1)," & "283 (BC_7, EMC_CS0_N, BIDIR, X, 284, 1, Z)," & "282 (BC_1, *, CONTROL, 1)," & "281 (BC_7, EMC_CS1_N, BIDIR, X, 282, 1, Z)," & "280 (BC_1, *, CONTROL, 1)," & "279 (BC_7, EMC_CS2_N, BIDIR, X, 280, 1, Z)," & "278 (BC_1, *, CONTROL, 1)," & "277 (BC_7, EMC_CS3_N, BIDIR, X, 278, 1, Z)," & "276 (BC_1, *, CONTROL, 1)," & "275 (BC_7, EMC_DYCS0_N, BIDIR, X, 276, 1, Z)," & "274 (BC_1, *, CONTROL, 1)," & "273 (BC_7, EMC_DYCS1_N, BIDIR, X, 274, 1, Z)," & "272 (BC_1, *, CONTROL, 1)," & "271 (BC_7, EMC_RAS_N, BIDIR, X, 272, 1, Z)," & "270 (BC_1, *, CONTROL, 1)," & "269 (BC_7, EMC_CAS_N, BIDIR, X, 270, 1, Z)," & "268 (BC_1, *, CONTROL, 1)," & "267 (BC_7, EMC_WR_N, BIDIR, X, 268, 1, Z)," & "266 (BC_1, *, CONTROL, 1)," & "265 (BC_7, EMC_DQM3, BIDIR, X, 266, 1, Z)," & "264 (BC_1, *, CONTROL, 1)," & "263 (BC_7, EMC_DQM2, BIDIR, X, 264, 1, Z)," & "262 (BC_1, *, CONTROL, 1)," & "261 (BC_7, EMC_DQM1, BIDIR, X, 262, 1, Z)," & "260 (BC_1, *, CONTROL, 1)," & "259 (BC_7, EMC_DQM0, BIDIR, X, 260, 1, Z)," & "258 (BC_1, *, CONTROL, 1)," & "257 (BC_7, EMC_BLS3, BIDIR, X, 258, 1, Z)," & "256 (BC_1, *, CONTROL, 1)," & "255 (BC_7, EMC_BLS2, BIDIR, X, 256, 1, Z)," & "254 (BC_1, *, CONTROL, 1)," & "253 (BC_7, EMC_BLS1, BIDIR, X, 254, 1, Z)," & "252 (BC_1, *, CONTROL, 1)," & "251 (BC_7, EMC_BLS0, BIDIR, X, 252, 1, Z)," & "250 (BC_1, *, CONTROL, 1)," & "249 (BC_7, EMC_OE_N, BIDIR, X, 250, 1, Z)," & "248 (BC_1, *, CONTROL, 1)," & "247 (BC_7, P0_0_I2S1RX_CLK, BIDIR, X, 248, 1, Z)," & "246 (BC_1, *, CONTROL, 1)," & "245 (BC_7, P0_1_I2S1RX_WS, BIDIR, X, 246, 1, Z)," & "244 (BC_1, *, CONTROL, 1)," & "243 (BC_7, P0_2_I2S0RX_SDA_LCD_VD4, BIDIR, X, 244, 1, Z)," & "242 (BC_1, *, CONTROL, 1)," & "241 (BC_7, P0_3_I2S0RX_CLK_LCD_VD5, BIDIR, X, 242, 1, Z)," & "240 (BC_1, *, CONTROL, 1)," & "239 (BC_7, P0_4_I2S0RX_WS_LCD_VD6, BIDIR, X, 240, 1, Z)," & "238 (BC_1, *, CONTROL, 1)," & "237 (BC_7, P0_5_I2S0TX_SDA_LCD_VD7, BIDIR, X, 238, 1, Z)," & "236 (BC_1, *, CONTROL, 1)," & "235 (BC_7, P0_6_I2S0TX_CLK_LCD_VD12, BIDIR, X, 236, 1, Z)," & "234 (BC_1, *, CONTROL, 1)," & "233 (BC_7, P0_7_I2S0TX_WS_LCD_VD13, BIDIR, X, 234, 1, Z)," & "232 (BC_1, *, CONTROL, 1)," & "231 (BC_7, I2S1TX_WS_CAP3_0, BIDIR, X, 232, 1, Z)," & "230 (BC_1, *, CONTROL, 1)," & "229 (BC_7, I2S1TX_CLK_MAT3_0, BIDIR, X, 230, 1, Z)," & "228 (BC_1, *, CONTROL, 1)," & "227 (BC_7, I2S1TX_SDA_MAT3_1, BIDIR, X, 228, 1, Z)," & "226 (BC_1, *, CONTROL, 1)," & "225 (BC_7, SYSCLKEN_LCD_VD15, BIDIR, X, 226, 1, Z)," & "224 (BC_1, *, CONTROL, 1)," & "223 (BC_7, RESOUT_N, BIDIR, X, 224, 1, Z)," & "222 (BC_1, *, CONTROL, 1)," & "221 (BC_7, ONSW, BIDIR, X, 222, 1, Z)," & "220 (BC_1, *, CONTROL, 1)," & "219 (BC_7, HIGHCORE_LCD_VD17, BIDIR, X, 220, 1, Z)," & "218 (BC_1, *, CONTROL, 1)," & "217 (BC_7, TST_CLK2, BIDIR, X, 218, 1, Z)," & "216 (BC_1, *, CONTROL, 1)," & "215 (BC_7, USB_ATX_INT_N, BIDIR, X, 216, 1, Z)," & "214 (BC_1, *, CONTROL, 1)," & "213 (BC_7, USB_OE_TP_N, BIDIR, X, 214, 1, Z)," & "212 (BC_1, *, CONTROL, 1)," & "211 (BC_7, USB_DAT_VP_U5_RX, BIDIR, X, 212, 1, Z)," & "210 (BC_1, *, CONTROL, 1)," & "209 (BC_7, USB_SE0_VM_U5_TX, BIDIR, X, 210, 1, Z)," & "208 (BC_1, *, CONTROL, 1)," & "207 (BC_7, FLASH_IO7, BIDIR, X, 208, 1, Z)," & "206 (BC_1, *, CONTROL, 1)," & "205 (BC_7, FLASH_IO6, BIDIR, X, 206, 1, Z)," & "204 (BC_1, *, CONTROL, 1)," & "203 (BC_7, FLASH_IO5, BIDIR, X, 204, 1, Z)," & "202 (BC_1, *, CONTROL, 1)," & "201 (BC_7, FLASH_IO4, BIDIR, X, 202, 1, Z)," & "200 (BC_1, *, CONTROL, 1)," & "199 (BC_7, FLASH_IO3, BIDIR, X, 200, 1, Z)," & "198 (BC_1, *, CONTROL, 1)," & "197 (BC_7, FLASH_IO2, BIDIR, X, 198, 1, Z)," & "196 (BC_1, *, CONTROL, 1)," & "195 (BC_7, FLASH_IO1, BIDIR, X, 196, 1, Z)," & "194 (BC_1, *, CONTROL, 1)," & "193 (BC_7, FLASH_IO0, BIDIR, X, 194, 1, Z)," & "192 (BC_1, *, CONTROL, 1)," & "191 (BC_7, FLASH_ALE, BIDIR, X, 192, 1, Z)," & "190 (BC_1, *, CONTROL, 1)," & "189 (BC_7, FLASH_CE_N, BIDIR, X, 190, 1, Z)," & "188 (BC_1, *, CONTROL, 1)," & "187 (BC_7, FLASH_WR_N, BIDIR, X, 188, 1, Z)," & "186 (BC_1, *, CONTROL, 1)," & "185 (BC_7, FLASH_RD_N, BIDIR, X, 186, 1, Z)," & "184 (BC_1, *, CONTROL, 1)," & "183 (BC_7, FLASH_CLE, BIDIR, X, 184, 1, Z)," & "182 (BC_1, *, CONTROL, 1)," & "181 (BC_7, FLASH_RDY, BIDIR, X, 182, 1, Z)," & "180 (BC_1, *, CONTROL, 1)," & "179 (BC_7, MS_SCLK_MAT2_0, BIDIR, X, 180, 1, Z)," & "178 (BC_1, *, CONTROL, 1)," & "177 (BC_7, MS_BS_MAT2_1, BIDIR, X, 178, 1, Z)," & "176 (BC_1, *, CONTROL, 1)," & "175 (BC_7, MS_DIO0_MAT0_0, BIDIR, X, 176, 1, Z)," & "174 (BC_1, *, CONTROL, 1)," & "173 (BC_7, MS_DIO1_MAT0_1, BIDIR, X, 174, 1, Z)," & "172 (BC_1, *, CONTROL, 1)," & "171 (BC_7, MS_DIO2_MAT0_2, BIDIR, X, 172, 1, Z)," & "170 (BC_1, *, CONTROL, 1)," & "169 (BC_7, MS_DIO3_MAT0_3, BIDIR, X, 170, 1, Z)," & "168 (BC_1, *, CONTROL, 1)," & "167 (BC_7, GPI28_U3_RI, BIDIR, X, 168, 1, Z)," & "166 (BC_1, *, CONTROL, 1)," & "165 (BC_7, GPI19_U4_RX, BIDIR, X, 166, 1, Z)," & "164 (BC_1, *, CONTROL, 1)," & "163 (BC_7, GPI09_KEY_COL7_ENET_COL, BIDIR, X, 164, 1, Z)," & "162 (BC_1, *, CONTROL, 1)," & "161 (BC_7, GPI08_KEY_COL6_SPI2_BUSY_ENE, BIDIR, X, 162, 1, Z)," & "160 (BC_1, *, CONTROL, 1)," & "159 (BC_7, GPI07_CAP4_0_MCABORT, BIDIR, X, 160, 1, Z)," & "158 (BC_1, *, CONTROL, 1)," & "157 (BC_7, GPI06_HSTIM_CAP_ENET_RXD2, BIDIR, X, 158, 1, Z)," & "156 (BC_1, *, CONTROL, 1)," & "155 (BC_7, GPI05_U3_DCD, BIDIR, X, 156, 1, Z)," & "154 (BC_1, *, CONTROL, 1)," & "153 (BC_7, GPI04_SPI1_BUSY, BIDIR, X, 154, 1, Z)," & "152 (BC_1, *, CONTROL, 1)," & "151 (BC_7, GPI03, BIDIR, X, 152, 1, Z)," & "150 (BC_1, *, CONTROL, 1)," & "149 (BC_7, GPI02_CAP2_0_ENET_RXD3, BIDIR, X, 150, 1, Z)," & "148 (BC_1, *, CONTROL, 1)," & "147 (BC_7, GPI01_SERVICE_N, BIDIR, X, 148, 1, Z)," & "146 (BC_1, *, CONTROL, 1)," & "145 (BC_7, GPI00_I2S1RX_SDA, BIDIR, X, 146, 1, Z)," & "144 (BC_1, *, CONTROL, 1)," & "143 (BC_7, GPO23_U2_HRTS_U3_RTS, BIDIR, X, 144, 1, Z)," & "142 (BC_1, *, CONTROL, 1)," & "141 (BC_7, GPO22_U7_HRTS_LCD_VD14, BIDIR, X, 142, 1, Z)," & "140 (BC_1, *, CONTROL, 1)," & "139 (BC_7, GPO21_U4_TX_LCD_VD3, BIDIR, X, 140, 1, Z)," & "138 (BC_1, *, CONTROL, 1)," & "137 (BC_7, GPO20, BIDIR, X, 138, 1, Z)," & "136 (BC_1, *, CONTROL, 1)," & "135 (BC_7, GPO19, BIDIR, X, 136, 1, Z)," & "134 (BC_1, *, CONTROL, 1)," & "133 (BC_7, GPO18_MC0A_LCD_LP, BIDIR, X, 134, 1, Z)," & "132 (BC_1, *, CONTROL, 1)," & "131 (BC_7, GPO17, BIDIR, X, 132, 1, Z)," & "130 (BC_1, *, CONTROL, 1)," & "129 (BC_7, GPO16_MC0B_LCD_ENAB_LCD_M, BIDIR, X, 130, 1, Z)," & "128 (BC_1, *, CONTROL, 1)," & "127 (BC_7, GPO15_MC1A_LCD_FP, BIDIR, X, 128, 1, Z)," & "126 (BC_1, *, CONTROL, 1)," & "125 (BC_7, GPO14, BIDIR, X, 126, 1, Z)," & "124 (BC_1, *, CONTROL, 1)," & "123 (BC_7, GPO13_MC1B_LCD_DCLK, BIDIR, X, 124, 1, Z)," & "122 (BC_1, *, CONTROL, 1)," & "121 (BC_7, GPO12_MC2A_LCD_LE, BIDIR, X, 122, 1, Z)," & "120 (BC_1, *, CONTROL, 1)," & "119 (BC_7, GPO11, BIDIR, X, 120, 1, Z)," & "118 (BC_1, *, CONTROL, 1)," & "117 (BC_7, GPO10_MC2B_LCD_PWR, BIDIR, X, 118, 1, Z)," & "116 (BC_1, *, CONTROL, 1)," & "115 (BC_7, GPO09_LCD_VD9, BIDIR, X, 116, 1, Z)," & "114 (BC_1, *, CONTROL, 1)," & "113 (BC_7, GPO08_LCD_VD8, BIDIR, X, 114, 1, Z)," & "112 (BC_1, *, CONTROL, 1)," & "111 (BC_7, GPO07_LCD_VD2, BIDIR, X, 112, 1, Z)," & "110 (BC_1, *, CONTROL, 1)," & "109 (BC_7, GPO06_LCD_VD18, BIDIR, X, 110, 1, Z)," & "108 (BC_1, *, CONTROL, 1)," & "107 (BC_7, GPO05, BIDIR, X, 108, 1, Z)," & "106 (BC_1, *, CONTROL, 1)," & "105 (BC_7, GPO04, BIDIR, X, 106, 1, Z)," & "104 (BC_1, *, CONTROL, 1)," & "103 (BC_7, GPO03_LCD_VD1, BIDIR, X, 104, 1, Z)," & "102 (BC_1, *, CONTROL, 1)," & "101 (BC_7, GPO02_MAT1_0_LCD_VD0, BIDIR, X, 102, 1, Z)," & "100 (BC_1, *, CONTROL, 1)," & "99 (BC_7, GPO01, BIDIR, X, 100, 1, Z)," & "98 (BC_1, *, CONTROL, 1)," & "97 (BC_7, GPO00_TST_CLK1, BIDIR, X, 98, 1, Z)," & "96 (BC_1, *, CONTROL, 1)," & "95 (BC_7, GPIO05_SSEL0_LCD_MCFB0, BIDIR, X, 96, 1, Z)," & "94 (BC_1, *, CONTROL, 1)," & "93 (BC_7, GPIO04_SSEL1_LCD_VD22, BIDIR, X, 94, 1, Z)," & "92 (BC_1, *, CONTROL, 1)," & "91 (BC_7, GPIO03_KEY_ROW7_ENET_MDIO, BIDIR, X, 92, 1, Z)," & "90 (BC_1, *, CONTROL, 1)," & "89 (BC_7, GPIO02_KEY_ROW6_ENET_MDC, BIDIR, X, 90, 1, Z)," & "88 (BC_1, *, CONTROL, 1)," & "87 (BC_7, GPIO01, BIDIR, X, 88, 1, Z)," & "86 (BC_1, *, CONTROL, 1)," & "85 (BC_7, GPIO00, BIDIR, X, 86, 1, Z)," & "84 (BC_1, *, CONTROL, 1)," & "83 (BC_7, JTAG_RTCK, BIDIR, X, 84, 1, Z)," & "82 (BC_1, *, CONTROL, 1)," & "81 (BC_7, U1_TX, BIDIR, X, 82, 1, Z)," & "80 (BC_1, *, CONTROL, 1)," & "79 (BC_7, U1_RX_CAP1_0_GPI15, BIDIR, X, 80, 1, Z)," & "78 (BC_1, *, CONTROL, 1)," & "77 (BC_7, U2_TX_U3_DTR, BIDIR, X, 78, 1, Z)," & "76 (BC_1, *, CONTROL, 1)," & "75 (BC_7, U2_RX_U3_DSR_GPI17, BIDIR, X, 76, 1, Z)," & "74 (BC_1, *, CONTROL, 1)," & "73 (BC_7, U2_HCTS_U3_CTS_GPI16, BIDIR, X, 74, 1, Z)," & "72 (BC_1, *, CONTROL, 1)," & "71 (BC_7, U3_TX, BIDIR, X, 72, 1, Z)," & "70 (BC_1, *, CONTROL, 1)," & "69 (BC_7, U3_RX_GPI18, BIDIR, X, 70, 1, Z)," & "68 (BC_1, *, CONTROL, 1)," & "67 (BC_7, U5_TX, BIDIR, X, 68, 1, Z)," & "66 (BC_1, *, CONTROL, 1)," & "65 (BC_7, U5_RX_GPI20, BIDIR, X, 66, 1, Z)," & "64 (BC_1, *, CONTROL, 1)," & "63 (BC_7, U6_IRTX, BIDIR, X, 64, 1, Z)," & "62 (BC_1, *, CONTROL, 1)," & "61 (BC_7, U6_IRRX_GPI21, BIDIR, X, 62, 1, Z)," & "60 (BC_1, *, CONTROL, 1)," & "59 (BC_7, U7_TX_MAT1_1_LCD_VD11, BIDIR, X, 60, 1, Z)," & "58 (BC_1, *, CONTROL, 1)," & "57 (BC_7, U7_RX_CAP0_0_LCD_VD10_GPI23, BIDIR, X, 58, 1, Z)," & "56 (BC_1, *, CONTROL, 1)," & "55 (BC_7, U7_HCTS_CAP0_1_LCDCLKIN_GPI2, BIDIR, X, 56, 1, Z)," & "54 (BC_1, *, CONTROL, 1)," & "53 (BC_7, KEY_ROW5_ENET_TXD1, BIDIR, X, 54, 1, Z)," & "52 (BC_1, *, CONTROL, 1)," & "51 (BC_7, KEY_ROW4_ENET_TXD0, BIDIR, X, 52, 1, Z)," & "50 (BC_1, *, CONTROL, 1)," & "49 (BC_7, KEY_ROW3_ENET_TX_EN, BIDIR, X, 50, 1, Z)," & "48 (BC_1, *, CONTROL, 1)," & "47 (BC_7, KEY_ROW2_ENET_TXD3, BIDIR, X, 48, 1, Z)," & "46 (BC_1, *, CONTROL, 1)," & "45 (BC_7, KEY_ROW1_ENET_TXD2, BIDIR, X, 46, 1, Z)," & "44 (BC_1, *, CONTROL, 1)," & "43 (BC_7, KEY_ROW0_ENET_TX_ER, BIDIR, X, 44, 1, Z)," & "42 (BC_1, *, CONTROL, 1)," & "41 (BC_7, KEY_COL5_ENET_RXD1, BIDIR, X, 42, 1, Z)," & "40 (BC_1, *, CONTROL, 1)," & "39 (BC_7, KEY_COL4_ENET_RXD0, BIDIR, X, 40, 1, Z)," & "38 (BC_1, *, CONTROL, 1)," & "37 (BC_7, KEY_COL3_ENET_CRS, BIDIR, X, 38, 1, Z)," & "36 (BC_1, *, CONTROL, 1)," & "35 (BC_7, KEY_COL2_ENET_RX_ER, BIDIR, X, 36, 1, Z)," & "34 (BC_1, *, CONTROL, 1)," & "33 (BC_7, KEY_COL1_ENET_RX_CLK_ENET_RE, BIDIR, X, 34, 1, Z)," & "32 (BC_1, *, CONTROL, 1)," & "31 (BC_7, KEY_COL0_ENET_TX_CLK, BIDIR, X, 32, 1, Z)," & "30 (BC_1, *, CONTROL, 1)," & "29 (BC_7, PWM_OUT1_LCD_VD16, BIDIR, X, 30, 1, Z)," & "28 (BC_1, *, CONTROL, 1)," & "27 (BC_7, PWM_OUT2_LCD_VD19, BIDIR, X, 28, 1, Z)," & "26 (BC_1, *, CONTROL, 1)," & "25 (BC_7, SPI1_CLK_SCK0, BIDIR, X, 26, 1, Z)," & "24 (BC_1, *, CONTROL, 1)," & "23 (BC_7, SPI1_DATIO_MOSI0_MCFB2, BIDIR, X, 24, 1, Z)," & "22 (BC_1, *, CONTROL, 1)," & "21 (BC_7, SPI1_DATIN_MISO0_GPI25_MCFB1, BIDIR, X, 22, 1, Z)," & "20 (BC_1, *, CONTROL, 1)," & "19 (BC_7, SPI2_CLK_SCK1_LVD_VD23, BIDIR, X, 20, 1, Z)," & "18 (BC_1, *, CONTROL, 1)," & "17 (BC_7, SPI2_DATIO_MOSI1_LCD_VD20, BIDIR, X, 18, 1, Z)," & "16 (BC_1, *, CONTROL, 1)," & "15 (BC_7, SPI2_DATIN_MISO1_LCD_VD21_GP, BIDIR, X, 16, 1, Z)," & "14 (BC_1, RESET_N, INPUT, X)," & "13 (BC_1, I2C1_SDA, INPUT, X)," & "12 (BC_1, I2C1_SDA, OUTPUT2, 1, 12, 1, WEAK1)," & "11 (BC_1, I2C1_SCL, INPUT, X)," & "10 (BC_1, I2C1_SCL, OUTPUT2, 1, 10, 1, WEAK1)," & "9 (BC_1, I2C2_SCL, INPUT, X)," & "8 (BC_1, I2C2_SCL, OUTPUT2, 1, 8, 1, WEAK1)," & "7 (BC_1, I2C2_SDA, INPUT, X)," & "6 (BC_1, I2C2_SDA, OUTPUT2, 1, 6, 1, WEAK1)," & "5 (BC_1, USB_I2C_SDA, INPUT, X)," & "4 (BC_1, USB_I2C_SDA, OUTPUT2, 1, 4, 1, WEAK1)," & "3 (BC_1, USB_I2C_SCL, INPUT, X)," & "2 (BC_1, USB_I2C_SCL, OUTPUT2, 1, 2, 1, WEAK1)," & "1 (BC_7, EMC_CKE1, BIDIR, X, 0, 1, Z)," & "0 (BC_1, *, CONTROL, 1)"; end LPC32X0FET296;