------------------------------------------------------------------------ -- A T M E L A V R M I C R O C O N T R O L L E R S -- ------------------------------------------------------------------------ -- BSDL file -- -- File Name: ATMEGA2561.BSD -- File Revision: 1.0 -- Date created: 2004-10-26 -- Created by: Atmel Corporation -- Support: avr@atmel.com -- -- Device: ATmega2561 -- Rev A -- Package: 64 pin TQFP (default) -- 64 pin MLF -- -- Visit http://www.atmel.com for an updated list of BSDL files. -- -- entity ATmega2561 is generic (PHYSICAL_PIN_MAP : string := " TQFP ") ; port ( RESET : in bit ; VCC : linkage bit_vector(0 to 1) ; GND : linkage bit_vector(0 to 2) ; XTAL1 : linkage bit ; XTAL2 : linkage bit ; PA : inout bit_vector(0 to 7) ; PB : inout bit_vector(0 to 7) ; PC : inout bit_vector(0 to 7) ; PD : inout bit_vector(0 to 7) ; PE : inout bit_vector(0 to 7) ; PF : inout bit_vector(0 to 3) ; TCK : in bit ; TMS : in bit ; TDO : out bit ; TDI : in bit ; PG : inout bit_vector(0 to 5) ; AREF : linkage bit ; AVCC : linkage bit ); use STD_1149_1_1994.all ; attribute COMPONENT_CONFORMANCE of ATmega2561 : entity is " STD_1149_1_1993 "; attribute PIN_MAP of ATmega2561 : entity is PHYSICAL_PIN_MAP ; constant TQFP : PIN_MAP_STRING:= " RESET : 20 , " & " VCC : (21,52) , " & " GND : (22,53,63) , " & " XTAL1 : 24 , " & " XTAL2 : 23 , " & " PA : (51,50,49,48,47,46,45,44) , " & " PB : (10,11,12,13,14,15,16,17) , " & " PC : (35,36,37,38,39,40,41,42) , " & " PD : (25,26,27,28,29,30,31,32) , " & " PE : (2,3,4,5,6,7,8,9) , " & " PF : (61,60,59,58) , " & " TCK : 57 , " & " TMS : 56 , " & " TDO : 55 , " & " TDI : 54 , " & " PG : (33,34,43,18,19,1) , " & " AREF : 62 , " & " AVCC : 64 " ; constant MLF : PIN_MAP_STRING:= " RESET : 20 , " & " VCC : (21,52) , " & " GND : (22,53,63) , " & " XTAL1 : 24 , " & " XTAL2 : 23 , " & " PA : (51,50,49,48,47,46,45,44) , " & " PB : (10,11,12,13,14,15,16,17) , " & " PC : (35,36,37,38,39,40,41,42) , " & " PD : (25,26,27,28,29,30,31,32) , " & " PE : (2,3,4,5,6,7,8,9) , " & " PF : (61,60,59,58) , " & " TCK : 57 , " & " TMS : 56 , " & " TDO : 55 , " & " TDI : 54 , " & " PG : (33,34,43,18,19,1) , " & " AREF : 62 , " & " AVCC : 64 " ; attribute TAP_SCAN_IN of TDI : signal is true ; attribute TAP_SCAN_OUT of TDO : signal is true ; attribute TAP_SCAN_MODE of TMS : signal is true ; attribute TAP_SCAN_CLOCK of TCK : signal is (8.0e6, BOTH) ; attribute INSTRUCTION_LENGTH of ATmega2561 : entity is 4 ; attribute INSTRUCTION_OPCODE of ATmega2561 : entity is " EXTEST ( 0000 )," & " IDCODE ( 0001 )," & " SAMPLE ( 0010 )," & " PRIVATE0 ( 1000 )," & " PRIVATE1 ( 1001 )," & " PRIVATE2 ( 1010 )," & " PRIVATE3 ( 1011 )," & " AVR_RESET ( 1100 )," & " BYPASS ( 1111 )" ; attribute INSTRUCTION_CAPTURE of ATmega2561 : entity is " 0001 "; attribute INSTRUCTION_PRIVATE of ATmega2561 : entity is " PRIVATE0 ," & " PRIVATE1 ," & " PRIVATE2 ," & " PRIVATE3 " ; attribute IDCODE_REGISTER of ATmega2561 : entity is "0100" & "1001100000000010" & "00000011111" & "1" ; attribute REGISTER_ACCESS of ATmega2561 : entity is " BOUNDARY ( AVR_RESET )" ; attribute BOUNDARY_LENGTH of ATmega2561 : entity is 101 ; attribute BOUNDARY_REGISTER of ATmega2561 : entity is -- num cell port func safe [ccell dis rslt] " 100 ( BC_7 , PG(5) , bidir , X , 99 , 0 , Z )," & " 99 ( BC_1 , * , control , 0 )," & " 98 ( BC_7 , PE(0) , bidir , X , 97 , 0 , Z )," & " 97 ( BC_1 , * , control , 0 )," & " 96 ( BC_7 , PE(1) , bidir , X , 95 , 0 , Z )," & " 95 ( BC_1 , * , control , 0 )," & " 94 ( BC_7 , PE(2) , bidir , X , 93 , 0 , Z )," & " 93 ( BC_1 , * , control , 0 )," & " 92 ( BC_7 , PE(3) , bidir , X , 91 , 0 , Z )," & " 91 ( BC_1 , * , control , 0 )," & " 90 ( BC_7 , PE(4) , bidir , X , 89 , 0 , Z )," & " 89 ( BC_1 , * , control , 0 )," & " 88 ( BC_7 , PE(5) , bidir , X , 87 , 0 , Z )," & " 87 ( BC_1 , * , control , 0 )," & " 86 ( BC_7 , PE(6) , bidir , X , 85 , 0 , Z )," & " 85 ( BC_1 , * , control , 0 )," & " 84 ( BC_7 , PE(7) , bidir , X , 83 , 0 , Z )," & " 83 ( BC_1 , * , control , 0 )," & " 82 ( BC_7 , PB(0) , bidir , X , 81 , 0 , Z )," & " 81 ( BC_1 , * , control , 0 )," & " 80 ( BC_7 , PB(1) , bidir , X , 79 , 0 , Z )," & " 79 ( BC_1 , * , control , 0 )," & " 78 ( BC_7 , PB(2) , bidir , X , 77 , 0 , Z )," & " 77 ( BC_1 , * , control , 0 )," & " 76 ( BC_7 , PB(3) , bidir , X , 75 , 0 , Z )," & " 75 ( BC_1 , * , control , 0 )," & " 74 ( BC_7 , PB(4) , bidir , X , 73 , 0 , Z )," & " 73 ( BC_1 , * , control , 0 )," & " 72 ( BC_7 , PB(5) , bidir , X , 71 , 0 , Z )," & " 71 ( BC_1 , * , control , 0 )," & " 70 ( BC_7 , PB(6) , bidir , X , 69 , 0 , Z )," & " 69 ( BC_1 , * , control , 0 )," & " 68 ( BC_7 , PB(7) , bidir , X , 67 , 0 , Z )," & " 67 ( BC_1 , * , control , 0 )," & " 66 ( BC_7 , PG(3) , bidir , X , 65 , 0 , Z )," & " 65 ( BC_1 , * , control , 0 )," & " 64 ( BC_7 , PG(4) , bidir , X , 63 , 0 , Z )," & " 63 ( BC_1 , * , control , 0 )," & " 62 ( BC_4 , RESET , observe_only , X )," & " 61 ( BC_7 , PD(0) , bidir , X , 60 , 0 , Z )," & " 60 ( BC_1 , * , control , 0 )," & " 59 ( BC_7 , PD(1) , bidir , X , 58 , 0 , Z )," & " 58 ( BC_1 , * , control , 0 )," & " 57 ( BC_7 , PD(2) , bidir , X , 56 , 0 , Z )," & " 56 ( BC_1 , * , control , 0 )," & " 55 ( BC_7 , PD(3) , bidir , X , 54 , 0 , Z )," & " 54 ( BC_1 , * , control , 0 )," & " 53 ( BC_7 , PD(4) , bidir , X , 52 , 0 , Z )," & " 52 ( BC_1 , * , control , 0 )," & " 51 ( BC_7 , PD(5) , bidir , X , 50 , 0 , Z )," & " 50 ( BC_1 , * , control , 0 )," & " 49 ( BC_7 , PD(6) , bidir , X , 48 , 0 , Z )," & " 48 ( BC_1 , * , control , 0 )," & " 47 ( BC_7 , PD(7) , bidir , X , 46 , 0 , Z )," & " 46 ( BC_1 , * , control , 0 )," & " 45 ( BC_7 , PG(0) , bidir , X , 44 , 0 , Z )," & " 44 ( BC_1 , * , control , 0 )," & " 43 ( BC_7 , PG(1) , bidir , X , 42 , 0 , Z )," & " 42 ( BC_1 , * , control , 0 )," & " 41 ( BC_7 , PC(0) , bidir , X , 40 , 0 , Z )," & " 40 ( BC_1 , * , control , 0 )," & " 39 ( BC_7 , PC(1) , bidir , X , 38 , 0 , Z )," & " 38 ( BC_1 , * , control , 0 )," & " 37 ( BC_7 , PC(2) , bidir , X , 36 , 0 , Z )," & " 36 ( BC_1 , * , control , 0 )," & " 35 ( BC_7 , PC(3) , bidir , X , 34 , 0 , Z )," & " 34 ( BC_1 , * , control , 0 )," & " 33 ( BC_7 , PC(4) , bidir , X , 32 , 0 , Z )," & " 32 ( BC_1 , * , control , 0 )," & " 31 ( BC_7 , PC(5) , bidir , X , 30 , 0 , Z )," & " 30 ( BC_1 , * , control , 0 )," & " 29 ( BC_7 , PC(6) , bidir , X , 28 , 0 , Z )," & " 28 ( BC_1 , * , control , 0 )," & " 27 ( BC_7 , PC(7) , bidir , X , 26 , 0 , Z )," & " 26 ( BC_1 , * , control , 0 )," & " 25 ( BC_7 , PG(2) , bidir , X , 24 , 0 , Z )," & " 24 ( BC_1 , * , control , 0 )," & " 23 ( BC_7 , PA(7) , bidir , X , 22 , 0 , Z )," & " 22 ( BC_1 , * , control , 0 )," & " 21 ( BC_7 , PA(6) , bidir , X , 20 , 0 , Z )," & " 20 ( BC_1 , * , control , 0 )," & " 19 ( BC_7 , PA(5) , bidir , X , 18 , 0 , Z )," & " 18 ( BC_1 , * , control , 0 )," & " 17 ( BC_7 , PA(4) , bidir , X , 16 , 0 , Z )," & " 16 ( BC_1 , * , control , 0 )," & " 15 ( BC_7 , PA(3) , bidir , X , 14 , 0 , Z )," & " 14 ( BC_1 , * , control , 0 )," & " 13 ( BC_7 , PA(2) , bidir , X , 12 , 0 , Z )," & " 12 ( BC_1 , * , control , 0 )," & " 11 ( BC_7 , PA(1) , bidir , X , 10 , 0 , Z )," & " 10 ( BC_1 , * , control , 0 )," & " 9 ( BC_7 , PA(0) , bidir , X , 8 , 0 , Z )," & " 8 ( BC_1 , * , control , 0 )," & " 7 ( BC_7 , PF(3) , bidir , X , 6 , 0 , Z )," & " 6 ( BC_1 , * , control , 0 )," & " 5 ( BC_7 , PF(2) , bidir , X , 4 , 0 , Z )," & " 4 ( BC_1 , * , control , 0 )," & " 3 ( BC_7 , PF(1) , bidir , X , 2 , 0 , Z )," & " 2 ( BC_1 , * , control , 0 )," & " 1 ( BC_7 , PF(0) , bidir , X , 0 , 0 , Z )," & " 0 ( BC_1 , * , control , 0 )" ; end ATmega2561 ;