-- *****************************************************************************
-- BSDL file for design top
-- Created by Synopsys Version I-2013.12-SP3 (Apr 18, 2014)
-- Designer:
-- Company:
-- Date: Thu Feb 5 23:41:59 2015
-- *****************************************************************************
entity top is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "BGA289");
-- This section declares all the ports in the design.
port (
PD14 : in bit;
PD15 : in bit;
PD17 : in bit;
PD18 : in bit;
PA0 : inout bit;
PA1 : inout bit;
PA10 : inout bit;
PA11 : inout bit;
PA12 : inout bit;
PA13 : inout bit;
PA14 : inout bit;
PA15 : inout bit;
PA16 : inout bit;
PA17 : inout bit;
PA18 : inout bit;
PA19 : inout bit;
PA2 : inout bit;
PA20 : inout bit;
PA21 : inout bit;
PA22 : inout bit;
PA23 : inout bit;
PA24 : inout bit;
PA25 : inout bit;
PA26 : inout bit;
PA27 : inout bit;
PA28 : inout bit;
PA29 : inout bit;
PA3 : inout bit;
PA30 : inout bit;
PA31 : inout bit;
PA4 : inout bit;
PA5 : inout bit;
PA6 : inout bit;
PA7 : inout bit;
PA8 : inout bit;
PA9 : inout bit;
PB0 : inout bit;
PB1 : inout bit;
PB10 : inout bit;
PB11 : inout bit;
PB12 : inout bit;
PB13 : inout bit;
PB14 : inout bit;
PB15 : inout bit;
PB16 : inout bit;
PB17 : inout bit;
PB18 : inout bit;
PB19 : inout bit;
PB2 : inout bit;
PB20 : inout bit;
PB21 : inout bit;
PB22 : inout bit;
PB23 : inout bit;
PB24 : inout bit;
PB25 : inout bit;
PB26 : inout bit;
PB27 : inout bit;
PB28 : inout bit;
PB29 : inout bit;
PB3 : inout bit;
PB30 : inout bit;
PB31 : inout bit;
PB4 : inout bit;
PB5 : inout bit;
PB6 : inout bit;
PB7 : inout bit;
PB8 : inout bit;
PB9 : inout bit;
PC0 : inout bit;
PC1 : inout bit;
PC10 : inout bit;
PC11 : inout bit;
PC12 : inout bit;
PC13 : inout bit;
PC14 : inout bit;
PC15 : inout bit;
PC16 : inout bit;
PC17 : inout bit;
PC18 : inout bit;
PC19 : inout bit;
PC2 : inout bit;
PC20 : inout bit;
PC21 : inout bit;
PC22 : inout bit;
PC23 : inout bit;
PC24 : inout bit;
PC25 : inout bit;
PC26 : inout bit;
PC27 : inout bit;
PC28 : inout bit;
PC29 : inout bit;
PC3 : inout bit;
PC30 : inout bit;
PC31 : inout bit;
PC4 : inout bit;
PC5 : inout bit;
PC6 : inout bit;
PC7 : inout bit;
PC8 : inout bit;
PC9 : inout bit;
PD0 : inout bit;
PD1 : inout bit;
PD10 : inout bit;
PD11 : inout bit;
PD12 : inout bit;
PD13 : inout bit;
PD19 : inout bit;
PD2 : inout bit;
PD20 : inout bit;
PD21 : inout bit;
PD22 : inout bit;
PD23 : inout bit;
PD24 : inout bit;
PD25 : inout bit;
PD26 : inout bit;
PD27 : inout bit;
PD28 : inout bit;
PD29 : inout bit;
PD3 : inout bit;
PD30 : inout bit;
PD31 : inout bit;
PD4 : inout bit;
PD5 : inout bit;
PD6 : inout bit;
PD7 : inout bit;
PD8 : inout bit;
PD9 : inout bit;
DDR_D : inout bit_vector (0 to 31);
DDR_DQS : inout bit_vector (0 to 3);
DDR_DQSN : inout bit_vector (0 to 3);
DDR_CAS : out bit;
DDR_CKE : out bit;
DDR_CLK : out bit;
DDR_CLKN : out bit;
DDR_CS : out bit;
DDR_RAS : out bit;
DDR_RESETN : out bit;
DDR_WE : out bit;
PD16 : out bit;
DDR_A : out bit_vector (0 to 13);
DDR_BA : out bit_vector (0 to 2);
DDR_DQM : out bit_vector (0 to 3);
-- ADVREFN : linkage bit;
ADVREFP : linkage bit;
CLK_AUDIO : linkage bit;
COMPN : linkage bit;
COMPP : linkage bit;
DDR_CAL : linkage bit;
DDR_VREF : linkage bit; -- DDR_VREFB0 : linkage bit;
-- DDR_VREFB1 : linkage bit;
-- DDR_VREFB2 : linkage bit;
-- DDR_VREFB3 : linkage bit;
-- DDR_VREFCM : linkage bit;
HHSDMA : linkage bit;
HHSDMB : linkage bit;
HHSDMSTRC : linkage bit;
HHSDPA : linkage bit;
HHSDPB : linkage bit;
HHSDPDATC : linkage bit;
JTAGSEL : in bit;
NRST : linkage bit;
RXD : linkage bit;
SDCAL : linkage bit;
SHDN : linkage bit;
TST : in bit;
VBG : linkage bit;
WKUP : linkage bit;
XIN : linkage bit;
XIN32 : linkage bit;
XOUT : linkage bit;
XOUT32 : linkage bit;
-- tst_drst_ana : linkage bit; -- NC Port
-- tst_drst_ddr : linkage bit; -- NC Port
-- tst_drst_iop0 : linkage bit; -- NC Port
-- tst_drst_iop1 : linkage bit; -- NC Port
-- tst_drst_iop2 : linkage bit; -- NC Port
-- tst_drst_isi : linkage bit; -- NC Port
-- tst_drst_osc : linkage bit; -- NC Port
-- tst_drst_sdhc : linkage bit; -- NC Port
-- tst_lft_plla : linkage bit; -- NC Port
-- tst_lft_utmi : linkage bit; -- NC Port
-- tst_por_1v2 : linkage bit; -- NC Port
-- tst_por_1v8 : linkage bit; -- NC Port
-- tst_por_bu : linkage bit; -- NC Port
-- tst_psw_bu : linkage bit; -- NC Port
-- tst_psw_fuse : linkage bit; -- NC Port
PIOBU : linkage bit_vector (0 to 7)
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of top: entity is "STD_1149_1_1993";
attribute PIN_MAP of top: entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information is
-- extracted from the port-to-pin map file that was read in using the
-- "read_pin_map" command.
constant BGA289: PIN_MAP_STRING :=
"PD14 : K4," &
"PD15 : K7," &
"PD17 : K2," &
"PD18 : J5," &
"PA0 : U11," &
"PA1 : P10," &
"PA10 : U13," &
"PA11 : P15," &
"PA12 : N15," &
"PA13 : P16," &
"PA14 : M14," &
"PA15 : N16," &
"PA16 : M10," &
"PA17 : N17," &
"PA18 : U14," &
"PA19 : T14," &
"PA2 : T11," &
"PA20 : P12," &
"PA21 : R13," &
"PA22 : U15," &
"PA23 : U16," &
"PA24 : T15," &
"PA25 : U17," &
"PA26 : P13," &
"PA27 : T16," &
"PA28 : R16," &
"PA29 : T17," &
"PA3 : R10," &
"PA30 : R15," &
"PA31 : R17," &
"PA4 : U12," &
"PA5 : T12," &
"PA6 : R12," &
"PA7 : T13," &
"PA8 : N10," &
"PA9 : N11," &
"PB0 : J8," &
"PB1 : A8," &
"PB10 : H8," &
"PB11 : B5," &
"PB12 : D6," &
"PB13 : B4," &
"PB14 : C5," &
"PB15 : H7," &
"PB16 : D5," &
"PB17 : C4," &
"PB18 : A3," &
"PB19 : D4," &
"PB2 : A7," &
"PB20 : B3," &
"PB21 : A2," &
"PB22 : C3," &
"PB23 : A1," &
"PB24 : E5," &
"PB25 : B2," &
"PB26 : E4," &
"PB27 : B1," &
"PB28 : C2," &
"PB29 : D3," &
"PB3 : A6," &
"PB30 : D2," &
"PB31 : C1," &
"PB4 : B6," &
"PB5 : B7," &
"PB6 : C7," &
"PB7 : C6," &
"PB8 : A5," &
"PB9 : A4," &
"PC0 : P17," &
"PC1 : N12," &
"PC10 : E3," &
"PC11 : E2," &
"PC12 : E1," &
"PC13 : F3," &
"PC14 : F5," &
"PC15 : F2," &
"PC16 : G6," &
"PC17 : F1," &
"PC18 : H6," &
"PC19 : G2," &
"PC2 : N14," &
"PC20 : G3," &
"PC21 : G1," &
"PC22 : H2," &
"PC23 : G5," &
"PC24 : H1," &
"PC25 : H5," &
"PC26 : J9," &
"PC27 : H9," &
"PC28 : E8," &
"PC29 : G8," &
"PC3 : M15," &
"PC30 : F8," &
"PC31 : D8," &
"PC4 : M11," &
"PC5 : L10," &
"PC6 : K10," &
"PC7 : M16," &
"PC8 : J10," &
"PC9 : D1," &
"PD0 : G10," &
"PD1 : E10," &
"PD10 : J3," &
"PD11 : M1," &
"PD12 : K8," &
"PD13 : L2," &
"PD19 : K6," &
"PD2 : G9," &
"PD20 : M2," &
"PD21 : N1," &
"PD22 : L4," &
"PD23 : M3," &
"PD24 : L7," &
"PD25 : L6," &
"PD26 : N2," &
"PD27 : L8," &
"PD28 : M4," &
"PD29 : N3," &
"PD3 : K1," &
"PD30 : L9," &
"PD31 : M7," &
"PD4 : J6," &
"PD5 : J4," &
"PD6 : J2," &
"PD7 : J7," &
"PD8 : J1," &
"PD9 : K9," &
"DDR_D : (B12, A12, C12, A13, A14, C13, A15, B15, G17, G16, " &
"H17, K17, K16, J13, K14, K15, B8, B9, C9, A9, A10, D10, B11, A11, " &
"J12, H10, J11, K11, L13, L11, L12, M17)," &
"DDR_DQS : (B13, J17, C10, L17)," &
"DDR_DQSN : (B14, J16, B10, L16)," &
"DDR_CAS : G12," &
"DDR_CKE : F16," &
"DDR_CLK : E17," &
"DDR_CLKN : D17," &
"DDR_CS : G13," &
"DDR_RAS : F13," &
"DDR_RESETN : E16," &
"DDR_WE : F15," &
"PD16 : L1," &
"DDR_A : (F12, C17, B17, B16, C16, G14, F14, F11, C14, D13, " &
"C15, A16, A17, G11)," &
"DDR_BA : (H12, H13, F17)," &
"DDR_DQM : (C11, G15, C8, H11)," &
"ADVREFP : M6," &
"CLK_AUDIO : U3," &
"COMPN : U1," &
"COMPP : T1," &
"DDR_CAL : E13," &
"HHSDMA : R8," &
"HHSDMB : U9," &
"HHSDMSTRC : U10," &
"HHSDPA : T8," &
"HHSDPB : U8," &
"HHSDPDATC : T9," &
"JTAGSEL : T2," &
"NRST : U2," &
"RXD : N4," &
"SDCAL : T10," &
"SHDN : R1," &
"TST : P3," &
"VBG : R6," &
"WKUP : P4," &
"XIN : U7," &
"XIN32 : P1," &
"XOUT : U6," &
"XOUT32 : P2," &
"PIOBU : (R3, N8, R2, R5, R4, P5, P6, M8)";
-- This section specifies the differential IO port groupings.
attribute PORT_GROUPING of top: entity is
"Differential_Voltage ( " &
"(DDR_CLK,DDR_CLKN))";
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in
-- the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of PD14: signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of PD15: signal is true;
attribute TAP_SCAN_MODE of PD17: signal is true;
attribute TAP_SCAN_OUT of PD16: signal is true;
attribute TAP_SCAN_RESET of PD18: signal is true;
-- Specifies the compliance enable patterns for the design. It lists a set of
-- design ports and the values that they should be set to, in order to enable
-- compliance to IEEE Std 1149.1
attribute COMPLIANCE_PATTERNS of top: entity is
"(JTAGSEL, TST) (10)";
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of top: entity is 4;
-- Specifies the boundary-scan instructions implemented in the design and their
-- opcodes.
attribute INSTRUCTION_OPCODE of top: entity is
"BYPASS (1111, 0001, 0101, 0110, 1100, 0111, 1101, 1000, 1001, 1011, " &
"1110)," &
"EXTEST (0000)," &
"SAMPLE (0100)," &
"INTEST (0010)," &
"IDCODE (0011)," &
"RUNBIST (1010)";
-- Specifies the bit pattern that is loaded into the instruction register when
-- the TAP controller passes through the Capture-IR state. The standard mandates
-- that the two LSBs must be "01". The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of top: entity is "0001";
-- Specifies the bit pattern that is loaded into the DEVICE_ID register during
-- the IDCODE instruction when the TAP controller passes through the Capture-DR
-- state.
attribute IDCODE_REGISTER of top: entity is
"0000" &
-- 4-bit version number
"0101101100111111" &
-- 16-bit part number
"00000011111" &
-- 11-bit identity of the manufacturer
"1";
-- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI and TDO for
-- each implemented instruction.
attribute REGISTER_ACCESS of top: entity is
"BYPASS (BYPASS)," &
"BOUNDARY (EXTEST, SAMPLE, INTEST)," &
"DEVICE_ID (IDCODE)," &
"UTDR1[41] (RUNBIST)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of top: entity is 374;
-- The following list specifies the characteristics of each cell in the boundary
-- scan register from TDI to TDO. The following is a description of the label
-- fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not have a port
-- name.
-- function: Is the function of the cell as defined by the standard. Is one
-- of input, output2, output3, bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be loaded with
-- for safe operation when the software might otherwise choose a
-- random value.
-- ccell : The control cell number. Specifies the control cell that
-- drives the output enable for this port.
-- disval : Specifies the value that is loaded into the control cell to
-- disable the output enable for the corresponding port.
-- rslt : Resulting state. Shows the state of the driver when it is
-- disabled.
attribute BOUNDARY_REGISTER of top: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"373 (BC_1, *, control, 1), " &
"372 (BC_7, PD13, bidir, X, 373, 1, Z), " &
"371 (BC_1, *, control, 1), " &
"370 (BC_7, PD12, bidir, X, 371, 1, Z), " &
"369 (BC_1, *, control, 1), " &
"368 (BC_7, PD11, bidir, X, 369, 1, Z), " &
"367 (BC_1, *, control, 1), " &
"366 (BC_7, PD19, bidir, X, 367, 1, Z), " &
"365 (BC_1, *, control, 1), " &
"364 (BC_7, PD20, bidir, X, 365, 1, Z), " &
"363 (BC_1, *, control, 1), " &
"362 (BC_7, PD24, bidir, X, 363, 1, Z), " &
"361 (BC_1, *, control, 1), " &
"360 (BC_7, PD21, bidir, X, 361, 1, Z), " &
"359 (BC_1, *, control, 1), " &
"358 (BC_7, PD25, bidir, X, 359, 1, Z), " &
"357 (BC_1, *, control, 1), " &
"356 (BC_7, PD26, bidir, X, 357, 1, Z), " &
"355 (BC_1, *, control, 1), " &
"354 (BC_7, PD22, bidir, X, 355, 1, Z), " &
"353 (BC_1, *, control, 1), " &
"352 (BC_7, PD27, bidir, X, 353, 1, Z), " &
"351 (BC_1, *, control, 1), " &
"350 (BC_7, PD23, bidir, X, 351, 1, Z), " &
"349 (BC_1, *, control, 1), " &
"348 (BC_7, PD28, bidir, X, 349, 1, Z), " &
"347 (BC_1, *, control, 1), " &
"346 (BC_7, PD30, bidir, X, 347, 1, Z), " &
"345 (BC_1, *, control, 1), " &
"344 (BC_7, PD29, bidir, X, 345, 1, Z), " &
"343 (BC_1, *, control, 1), " &
"342 (BC_7, PD31, bidir, X, 343, 1, Z), " &
"341 (BC_1, *, control, 1), " &
"340 (BC_7, PA0, bidir, X, 341, 1, Z), " &
"339 (BC_1, *, control, 1), " &
"338 (BC_7, PA1, bidir, X, 339, 1, Z), " &
"337 (BC_1, *, control, 1), " &
"336 (BC_7, PA2, bidir, X, 337, 1, Z), " &
"335 (BC_1, *, control, 1), " &
"334 (BC_7, PA3, bidir, X, 335, 1, Z), " &
"333 (BC_1, *, control, 1), " &
"332 (BC_7, PA4, bidir, X, 333, 1, Z), " &
"331 (BC_1, *, control, 1), " &
"330 (BC_7, PA5, bidir, X, 331, 1, Z), " &
"329 (BC_1, *, control, 1), " &
"328 (BC_7, PA6, bidir, X, 329, 1, Z), " &
"327 (BC_1, *, control, 1), " &
"326 (BC_7, PA7, bidir, X, 327, 1, Z), " &
"325 (BC_1, *, control, 1), " &
"324 (BC_7, PA8, bidir, X, 325, 1, Z), " &
"323 (BC_1, *, control, 1), " &
"322 (BC_7, PA9, bidir, X, 323, 1, Z), " &
"321 (BC_1, *, control, 1), " &
"320 (BC_7, PA10, bidir, X, 321, 1, Z), " &
"319 (BC_1, *, control, 1), " &
"318 (BC_7, PA18, bidir, X, 319, 1, Z), " &
"317 (BC_1, *, control, 1), " &
"316 (BC_7, PA20, bidir, X, 317, 1, Z), " &
"315 (BC_1, *, control, 1), " &
"314 (BC_7, PA19, bidir, X, 315, 1, Z), " &
"313 (BC_1, *, control, 1), " &
"312 (BC_7, PA21, bidir, X, 313, 1, Z), " &
"311 (BC_1, *, control, 1), " &
"310 (BC_7, PA22, bidir, X, 311, 1, Z), " &
"309 (BC_1, *, control, 1), " &
"308 (BC_7, PA23, bidir, X, 309, 1, Z), " &
"307 (BC_1, *, control, 1), " &
"306 (BC_7, PA24, bidir, X, 307, 1, Z), " &
"305 (BC_1, *, control, 1), " &
"304 (BC_7, PA25, bidir, X, 305, 1, Z), " &
"303 (BC_1, *, control, 1), " &
"302 (BC_7, PA26, bidir, X, 303, 1, Z), " &
"301 (BC_1, *, control, 1), " &
"300 (BC_7, PA27, bidir, X, 301, 1, Z), " &
"299 (BC_1, *, control, 1), " &
"298 (BC_7, PA28, bidir, X, 299, 1, Z), " &
"297 (BC_1, *, control, 1), " &
"296 (BC_7, PA30, bidir, X, 297, 1, Z), " &
"295 (BC_1, *, control, 1), " &
"294 (BC_7, PA29, bidir, X, 295, 1, Z), " &
"293 (BC_1, *, control, 1), " &
"292 (BC_7, PA31, bidir, X, 293, 1, Z), " &
"291 (BC_1, *, control, 1), " &
"290 (BC_7, PC0, bidir, X, 291, 1, Z), " &
"289 (BC_1, *, control, 1), " &
"288 (BC_7, PA11, bidir, X, 289, 1, Z), " &
"287 (BC_1, *, control, 1), " &
"286 (BC_7, PC1, bidir, X, 287, 1, Z), " &
"285 (BC_1, *, control, 1), " &
"284 (BC_7, PA13, bidir, X, 285, 1, Z), " &
"283 (BC_1, *, control, 1), " &
"282 (BC_7, PA12, bidir, X, 283, 1, Z), " &
"281 (BC_1, *, control, 1), " &
"280 (BC_7, PC2, bidir, X, 281, 1, Z), " &
"279 (BC_1, *, control, 1), " &
"278 (BC_7, PA14, bidir, X, 279, 1, Z), " &
"277 (BC_1, *, control, 1), " &
"276 (BC_7, PA15, bidir, X, 277, 1, Z), " &
"275 (BC_1, *, control, 1), " &
"274 (BC_7, PC3, bidir, X, 275, 1, Z), " &
"273 (BC_1, *, control, 1), " &
"272 (BC_7, PC4, bidir, X, 273, 1, Z), " &
"271 (BC_1, *, control, 1), " &
"270 (BC_7, PA16, bidir, X, 271, 1, Z), " &
"269 (BC_1, *, control, 1), " &
"268 (BC_7, PA17, bidir, X, 269, 1, Z), " &
"267 (BC_1, *, control, 1), " &
"266 (BC_7, PC5, bidir, X, 267, 1, Z), " &
"265 (BC_1, *, control, 1), " &
"264 (BC_7, PC7, bidir, X, 265, 1, Z), " &
"263 (BC_1, *, control, 1), " &
"262 (BC_7, PC6, bidir, X, 263, 1, Z), " &
"261 (BC_1, *, control, 1), " &
"260 (BC_7, PC8, bidir, X, 261, 1, Z), " &
"259 (BC_1, *, control, 1), " &
"258 (BC_7, DDR_D(31), bidir, X, 259, 1, Z), " &
"257 (BC_1, *, control, 1), " &
"256 (BC_7, DDR_D(30), bidir, X, 257, 1, Z), " &
"255 (BC_1, *, control, 1), " &
"254 (BC_7, DDR_D(29), bidir, X, 255, 1, Z), " &
"253 (BC_1, *, control, 1), " &
"252 (BC_7, DDR_D(28), bidir, X, 253, 1, Z), " &
"251 (BC_1, *, control, 1), " &
"250 (BC_7, DDR_DQS(3), bidir, X, 251, 1, Z), " &
"249 (BC_1, *, control, 1), " &
"248 (BC_7, DDR_D(27), bidir, X, 249, 1, Z), " &
"247 (BC_1, *, control, 1), " &
"246 (BC_7, DDR_D(26), bidir, X, 247, 1, Z), " &
"245 (BC_1, *, control, 1), " &
"244 (BC_7, DDR_D(25), bidir, X, 245, 1, Z), " &
"243 (BC_1, *, control, 1), " &
"242 (BC_7, DDR_D(24), bidir, X, 243, 1, Z), " &
"241 (BC_0, *, control, 1), " &
"240 (BC_0, DDR_DQM(3), output3, X, 241, 1, Z), " &
"239 (BC_1, *, control, 1), " &
"238 (BC_7, DDR_D(15), bidir, X, 239, 1, Z), " &
"237 (BC_1, *, control, 1), " &
"236 (BC_7, DDR_D(14), bidir, X, 237, 1, Z), " &
"235 (BC_1, *, control, 1), " &
"234 (BC_7, DDR_D(13), bidir, X, 235, 1, Z), " &
"233 (BC_1, *, control, 1), " &
"232 (BC_7, DDR_D(12), bidir, X, 233, 1, Z), " &
"231 (BC_1, *, control, 1), " &
"230 (BC_7, DDR_DQS(1), bidir, X, 231, 1, Z), " &
"229 (BC_1, *, control, 1), " &
"228 (BC_7, DDR_D(11), bidir, X, 229, 1, Z), " &
"227 (BC_1, *, control, 1), " &
"226 (BC_7, DDR_D(10), bidir, X, 227, 1, Z), " &
"225 (BC_1, *, control, 1), " &
"224 (BC_7, DDR_D(9), bidir, X, 225, 1, Z), " &
"223 (BC_1, *, control, 1), " &
"222 (BC_7, DDR_D(8), bidir, X, 223, 1, Z), " &
"221 (BC_0, *, control, 1), " &
"220 (BC_0, DDR_DQM(1), output3, X, 221, 1, Z), " &
"219 (BC_0, *, control, 1), " &
"218 (BC_0, DDR_BA(2), output3, X, 219, 1, Z), " &
"217 (BC_0, *, control, 1), " &
"216 (BC_0, DDR_BA(1), output3, X, 217, 1, Z), " &
"215 (BC_0, *, control, 1), " &
"214 (BC_0, DDR_BA(0), output3, X, 215, 1, Z), " &
"213 (BC_0, *, control, 1), " &
"212 (BC_0, DDR_CKE, output3, X, 213, 1, Z), " &
"211 (BC_0, *, control, 1), " &
"210 (BC_0, DDR_CS, output3, X, 211, 1, Z), " &
"209 (BC_0, *, control, 1), " &
"208 (BC_0, DDR_A(13), output3, X, 209, 1, Z), " &
"207 (BC_0, *, control, 1), " &
"206 (BC_0, DDR_RESETN, output3, X, 207, 1, Z), " &
"205 (BC_0, *, control, 1), " &
"204 (BC_0, DDR_A(5), output3, X, 205, 1, Z), " &
"203 (BC_0, *, control, 1), " &
"202 (BC_0, DDR_A(6), output3, X, 203, 1, Z), " &
"201 (BC_0, *, control, 1), " &
"200 (BC_0, DDR_RAS, output3, X, 201, 1, Z), " &
"199 (BC_0, *, control, 1), " &
"198 (BC_0, DDR_CAS, output3, X, 199, 1, Z), " &
"197 (BC_0, *, control, 1), " &
"196 (BC_0, DDR_WE, output3, X, 197, 1, Z), " &
"195 (BC_0, *, control, 1), " &
"194 (BC_0, DDR_CLK, output3, X, 195, 1, Z), " &
"193 (BC_0, *, control, 1), " &
"192 (BC_0, DDR_A(0), output3, X, 193, 1, Z), " &
"191 (BC_0, *, control, 1), " &
"190 (BC_0, DDR_A(1), output3, X, 191, 1, Z), " &
"189 (BC_0, *, control, 1), " &
"188 (BC_0, DDR_A(2), output3, X, 189, 1, Z), " &
"187 (BC_0, *, control, 1), " &
"186 (BC_0, DDR_A(3), output3, X, 187, 1, Z), " &
"185 (BC_0, *, control, 1), " &
"184 (BC_0, DDR_A(4), output3, X, 185, 1, Z), " &
"183 (BC_0, *, control, 1), " &
"182 (BC_0, DDR_A(12), output3, X, 183, 1, Z), " &
"181 (BC_0, *, control, 1), " &
"180 (BC_0, DDR_A(11), output3, X, 181, 1, Z), " &
"179 (BC_0, *, control, 1), " &
"178 (BC_0, DDR_A(10), output3, X, 179, 1, Z), " &
"177 (BC_0, *, control, 1), " &
"176 (BC_0, DDR_A(9), output3, X, 177, 1, Z), " &
"175 (BC_0, *, control, 1), " &
"174 (BC_0, DDR_A(8), output3, X, 175, 1, Z), " &
"173 (BC_0, *, control, 1), " &
"172 (BC_0, DDR_A(7), output3, X, 173, 1, Z), " &
"171 (BC_1, *, control, 1), " &
"170 (BC_7, DDR_D(7), bidir, X, 171, 1, Z), " &
"169 (BC_1, *, control, 1), " &
"168 (BC_7, DDR_D(6), bidir, X, 169, 1, Z), " &
"167 (BC_1, *, control, 1), " &
"166 (BC_7, DDR_D(5), bidir, X, 167, 1, Z), " &
"165 (BC_1, *, control, 1), " &
"164 (BC_7, DDR_D(4), bidir, X, 165, 1, Z), " &
"163 (BC_1, *, control, 1), " &
"162 (BC_7, DDR_DQS(0), bidir, X, 163, 1, Z), " &
"161 (BC_1, *, control, 1), " &
"160 (BC_7, DDR_D(3), bidir, X, 161, 1, Z), " &
"159 (BC_1, *, control, 1), " &
"158 (BC_7, DDR_D(2), bidir, X, 159, 1, Z), " &
"157 (BC_1, *, control, 1), " &
"156 (BC_7, DDR_D(1), bidir, X, 157, 1, Z), " &
"155 (BC_1, *, control, 1), " &
"154 (BC_7, DDR_D(0), bidir, X, 155, 1, Z), " &
"153 (BC_0, *, control, 1), " &
"152 (BC_0, DDR_DQM(0), output3, X, 153, 1, Z), " &
"151 (BC_1, *, control, 1), " &
"150 (BC_7, DDR_D(23), bidir, X, 151, 1, Z), " &
"149 (BC_1, *, control, 1), " &
"148 (BC_7, DDR_D(22), bidir, X, 149, 1, Z), " &
"147 (BC_1, *, control, 1), " &
"146 (BC_7, DDR_D(21), bidir, X, 147, 1, Z), " &
"145 (BC_1, *, control, 1), " &
"144 (BC_7, DDR_D(20), bidir, X, 145, 1, Z), " &
"143 (BC_1, *, control, 1), " &
"142 (BC_7, DDR_DQS(2), bidir, X, 143, 1, Z), " &
"141 (BC_1, *, control, 1), " &
"140 (BC_7, DDR_D(19), bidir, X, 141, 1, Z), " &
"139 (BC_1, *, control, 1), " &
"138 (BC_7, DDR_D(18), bidir, X, 139, 1, Z), " &
"137 (BC_1, *, control, 1), " &
"136 (BC_7, DDR_D(17), bidir, X, 137, 1, Z), " &
"135 (BC_1, *, control, 1), " &
"134 (BC_7, DDR_D(16), bidir, X, 135, 1, Z), " &
"133 (BC_0, *, control, 1), " &
"132 (BC_0, DDR_DQM(2), output3, X, 133, 1, Z), " &
"131 (BC_1, *, control, 1), " &
"130 (BC_7, PD0, bidir, X, 131, 1, Z), " &
"129 (BC_1, *, control, 1), " &
"128 (BC_7, PD1, bidir, X, 129, 1, Z), " &
"127 (BC_1, *, control, 1), " &
"126 (BC_7, PD2, bidir, X, 127, 1, Z), " &
"125 (BC_1, *, control, 1), " &
"124 (BC_7, PC26, bidir, X, 125, 1, Z), " &
"123 (BC_1, *, control, 1), " &
"122 (BC_7, PC27, bidir, X, 123, 1, Z), " &
"121 (BC_1, *, control, 1), " &
"120 (BC_7, PC28, bidir, X, 121, 1, Z), " &
"119 (BC_1, *, control, 1), " &
"118 (BC_7, PC29, bidir, X, 119, 1, Z), " &
"117 (BC_1, *, control, 1), " &
"116 (BC_7, PC30, bidir, X, 117, 1, Z), " &
"115 (BC_1, *, control, 1), " &
"114 (BC_7, PC31, bidir, X, 115, 1, Z), " &
"113 (BC_1, *, control, 1), " &
"112 (BC_7, PB0, bidir, X, 113, 1, Z), " &
"111 (BC_1, *, control, 1), " &
"110 (BC_7, PB2, bidir, X, 111, 1, Z), " &
"109 (BC_1, *, control, 1), " &
"108 (BC_7, PB1, bidir, X, 109, 1, Z), " &
"107 (BC_1, *, control, 1), " &
"106 (BC_7, PB3, bidir, X, 107, 1, Z), " &
"105 (BC_1, *, control, 1), " &
"104 (BC_7, PB4, bidir, X, 105, 1, Z), " &
"103 (BC_1, *, control, 1), " &
"102 (BC_7, PB5, bidir, X, 103, 1, Z), " &
"101 (BC_1, *, control, 1), " &
"100 (BC_7, PB6, bidir, X, 101, 1, Z), " &
"99 (BC_1, *, control, 1), " &
"98 (BC_7, PB8, bidir, X, 99, 1, Z), " &
"97 (BC_1, *, control, 1), " &
"96 (BC_7, PB7, bidir, X, 97, 1, Z), " &
"95 (BC_1, *, control, 1), " &
"94 (BC_7, PB10, bidir, X, 95, 1, Z), " &
"93 (BC_1, *, control, 1), " &
"92 (BC_7, PB9, bidir, X, 93, 1, Z), " &
"91 (BC_1, *, control, 1), " &
"90 (BC_7, PB11, bidir, X, 91, 1, Z), " &
"89 (BC_1, *, control, 1), " &
"88 (BC_7, PB12, bidir, X, 89, 1, Z), " &
"87 (BC_1, *, control, 1), " &
"86 (BC_7, PB14, bidir, X, 87, 1, Z), " &
"85 (BC_1, *, control, 1), " &
"84 (BC_7, PB13, bidir, X, 85, 1, Z), " &
"83 (BC_1, *, control, 1), " &
"82 (BC_7, PB15, bidir, X, 83, 1, Z), " &
"81 (BC_1, *, control, 1), " &
"80 (BC_7, PB16, bidir, X, 81, 1, Z), " &
"79 (BC_1, *, control, 1), " &
"78 (BC_7, PB17, bidir, X, 79, 1, Z), " &
"77 (BC_1, *, control, 1), " &
"76 (BC_7, PB19, bidir, X, 77, 1, Z), " &
"75 (BC_1, *, control, 1), " &
"74 (BC_7, PB18, bidir, X, 75, 1, Z), " &
"73 (BC_1, *, control, 1), " &
"72 (BC_7, PB20, bidir, X, 73, 1, Z), " &
"71 (BC_1, *, control, 1), " &
"70 (BC_7, PB21, bidir, X, 71, 1, Z), " &
"69 (BC_1, *, control, 1), " &
"68 (BC_7, PB23, bidir, X, 69, 1, Z), " &
"67 (BC_1, *, control, 1), " &
"66 (BC_7, PB22, bidir, X, 67, 1, Z), " &
"65 (BC_1, *, control, 1), " &
"64 (BC_7, PB25, bidir, X, 65, 1, Z), " &
"63 (BC_1, *, control, 1), " &
"62 (BC_7, PB24, bidir, X, 63, 1, Z), " &
"61 (BC_1, *, control, 1), " &
"60 (BC_7, PB26, bidir, X, 61, 1, Z), " &
"59 (BC_1, *, control, 1), " &
"58 (BC_7, PB28, bidir, X, 59, 1, Z), " &
"57 (BC_1, *, control, 1), " &
"56 (BC_7, PB27, bidir, X, 57, 1, Z), " &
"55 (BC_1, *, control, 1), " &
"54 (BC_7, PB30, bidir, X, 55, 1, Z), " &
"53 (BC_1, *, control, 1), " &
"52 (BC_7, PB29, bidir, X, 53, 1, Z), " &
"51 (BC_1, *, control, 1), " &
"50 (BC_7, PB31, bidir, X, 51, 1, Z), " &
"49 (BC_1, *, control, 1), " &
"48 (BC_7, PC9, bidir, X, 49, 1, Z), " &
"47 (BC_1, *, control, 1), " &
"46 (BC_7, PC11, bidir, X, 47, 1, Z), " &
"45 (BC_1, *, control, 1), " &
"44 (BC_7, PC10, bidir, X, 45, 1, Z), " &
"43 (BC_1, *, control, 1), " &
"42 (BC_7, PC12, bidir, X, 43, 1, Z), " &
"41 (BC_1, *, control, 1), " &
"40 (BC_7, PC13, bidir, X, 41, 1, Z), " &
"39 (BC_1, *, control, 1), " &
"38 (BC_7, PC14, bidir, X, 39, 1, Z), " &
"37 (BC_1, *, control, 1), " &
"36 (BC_7, PC15, bidir, X, 37, 1, Z), " &
"35 (BC_1, *, control, 1), " &
"34 (BC_7, PC17, bidir, X, 35, 1, Z), " &
"33 (BC_1, *, control, 1), " &
"32 (BC_7, PC16, bidir, X, 33, 1, Z), " &
"31 (BC_1, *, control, 1), " &
"30 (BC_7, PC19, bidir, X, 31, 1, Z), " &
"29 (BC_1, *, control, 1), " &
"28 (BC_7, PC18, bidir, X, 29, 1, Z), " &
"27 (BC_1, *, control, 1), " &
"26 (BC_7, PC20, bidir, X, 27, 1, Z), " &
"25 (BC_1, *, control, 1), " &
"24 (BC_7, PC21, bidir, X, 25, 1, Z), " &
"23 (BC_1, *, control, 1), " &
"22 (BC_7, PC22, bidir, X, 23, 1, Z), " &
"21 (BC_1, *, control, 1), " &
"20 (BC_7, PC23, bidir, X, 21, 1, Z), " &
"19 (BC_1, *, control, 1), " &
"18 (BC_7, PC24, bidir, X, 19, 1, Z), " &
"17 (BC_1, *, control, 1), " &
"16 (BC_7, PC25, bidir, X, 17, 1, Z), " &
"15 (BC_1, *, control, 1), " &
"14 (BC_7, PD10, bidir, X, 15, 1, Z), " &
"13 (BC_1, *, control, 1), " &
"12 (BC_7, PD9, bidir, X, 13, 1, Z), " &
"11 (BC_1, *, control, 1), " &
"10 (BC_7, PD8, bidir, X, 11, 1, Z), " &
"9 (BC_1, *, control, 1), " &
"8 (BC_7, PD7, bidir, X, 9, 1, Z), " &
"7 (BC_1, *, control, 1), " &
"6 (BC_7, PD6, bidir, X, 7, 1, Z), " &
"5 (BC_1, *, control, 1), " &
"4 (BC_7, PD5, bidir, X, 5, 1, Z), " &
"3 (BC_1, *, control, 1), " &
"2 (BC_7, PD4, bidir, X, 3, 1, Z), " &
"1 (BC_1, *, control, 1), " &
"0 (BC_7, PD3, bidir, X, 1, 1, Z) ";
end top;
