-- Part: IDT72V73260 (32Mbs, 16k x 16k, 3.3v)
-- Ver: 0.0 Fri Sep 14 11:53:18 EDT 2001
entity IDT72V73260 is
-- Generic parameter
generic (PHYSICAL_PIN_MAP: string := "BB144");
-- Logical port description
port (
A : in bit_vector(0 to 15);
CLK : in bit;
CSX : in bit;
D : inout bit_vector(0 to 15);
DSX : in bit;
DTAX : buffer bit;
FE : in bit;
FOI : in bit;
ODEX : in bit;
RESETX: in bit;
RWX : in bit;
RX : in bit_vector(0 to 31);
TCK : in bit;
TDI : in bit;
TDO : out bit;
TMS : in bit;
TRSTX : in bit;
TX : out bit_vector(0 to 31);
VCC : linkage bit_vector(0 to 15);
GND : linkage bit_vector(0 to 15);
DNC : linkage bit_vector(0 to 1)
);
-- Standard
use STD_1149_1_1994.all;
-- Component conformance
attribute COMPONENT_CONFORMANCE of IDT72V73260: entity is "STD_1149_1_1993";
-- Device package pin mappings
attribute PIN_MAP of IDT72V73260: entity is PHYSICAL_PIN_MAP;
-- Pin-port map for package BB144
constant BB144: PIN_MAP_STRING :=
"A : (E3, F1, F2, F3, G3, G2, G1, H3, H2, H1, J4, J3, J2, J1, K3, K2), " &
"CLK : A1, " &
"CSX : E1, " &
"D : (L7, K7, K6, L6, M6, K5, L5, M5, K4, L4, M4, L3, M3, M2, M1, L1), " &
"DSX : D4, " &
"DTAX : L2, " &
"FE : B2, " &
"FOI : B1, " &
"ODEX : A3, " &
"RESETX: A2, " &
"RWX : E2, " &
"RX : (B3, A4, B4, C4, A5, B5, C5, A6, " &
" B12, C12, C11, C10, D12, D11, D10, D9, " &
" E12, E11, E10, F12, F11, F10, G10, G11, " &
" M9, L9, K9, J9, M8, L8, K8, M7), " &
"TCK : D2, " &
"TDI : C3, " &
"TDO : D1, " &
"TMS : C2, " &
"TRSTX : D3, " &
"TX : (B6, C6, C7, B7, A7, C8, B8, A8, " &
" C9, B9, A9, B10, A10, B11, A11, A12, " &
" G12, H10, H11, H12, J10, J11, J12, K11, " &
" K12, L11, L12, M12, M11, M10, L10, K10)," &
"VCC : (E4, F4, G4, H4, J5, J6, J7, J8, " &
" E9, F9, G9, H9, D5, D6, D7, D8), " &
"GND : (E5, E6, E7, E8, F5, F6, F7, F8, " &
" G5, G6, G7, G8, H5, H6, H7, H8), " &
"DNC : (K1, C1) ";
-- Scan port identification
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of TRSTX : signal is true;
-- Instruction register description
attribute INSTRUCTION_LENGTH of IDT72V73260: entity is 4;
attribute INSTRUCTION_OPCODE of IDT72V73260: entity is
"SAMPLE (0001)," &
"EXTEST (0000)," &
"IDCODE (0010)," &
"HIGHZ (0100)," &
"CLAMP (0011)," &
"BYPASS (1111)," &
"PRIVATE (0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110)";
attribute INSTRUCTION_CAPTURE of IDT72V73260: entity is "0101";
attribute INSTRUCTION_PRIVATE of IDT72V73260: entity is "PRIVATE";
-- Optional register description
attribute IDCODE_REGISTER of IDT72V73260: entity is
"0000" & -- version
"0000010000110110" & -- part number
"00000110011" & -- manufacturer's identity
"1"; -- required by 1149.1
-- Register access description
attribute REGISTER_ACCESS of IDT72V73260: entity is
"BYPASS (BYPASS, HIGHZ, CLAMP), " &
"BOUNDARY (SAMPLE, EXTEST), " &
"DEVICE_ID (IDCODE)";
-- Boundary-Scan register description
attribute BOUNDARY_LENGTH of IDT72V73260: entity is 169;
attribute BOUNDARY_REGISTER of IDT72V73260: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"168 (BC_4, RX(0), input, X), " &
"167 (BC_4, RX(1), input, X), " &
"166 (BC_4, RX(2), input, X), " &
"165 (BC_4, RX(3), input, X), " &
"164 (BC_4, RX(4), input, X), " &
"163 (BC_4, RX(5), input, X), " &
"162 (BC_4, RX(6), input, X), " &
"161 (BC_4, RX(7), input, X), " &
"160 (BC_1, *, control, 0), " &
"159 (BC_1, TX(0), output3, X, 160, 0, Z)," &
"158 (BC_1, *, control, 0), " &
"157 (BC_1, TX(1), output3, X, 158, 0, Z)," &
"156 (BC_1, *, control, 0), " &
"155 (BC_1, TX(2), output3, X, 156, 0, Z)," &
"154 (BC_1, *, control, 0), " &
"153 (BC_1, TX(3), output3, X, 154, 0, Z)," &
"152 (BC_1, *, control, 0), " &
"151 (BC_1, TX(4), output3, X, 152, 0, Z)," &
"150 (BC_1, *, control, 0), " &
"149 (BC_1, TX(5), output3, X, 150, 0, Z)," &
"148 (BC_1, *, control, 0), " &
"147 (BC_1, TX(6), output3, X, 148, 0, Z)," &
"146 (BC_1, *, control, 0), " &
"145 (BC_1, TX(7), output3, X, 146, 0, Z)," &
"144 (BC_1, *, control, 0), " &
"143 (BC_1, TX(8), output3, X, 144, 0, Z)," &
"142 (BC_1, *, control, 0), " &
"141 (BC_1, TX(9), output3, X, 142, 0, Z)," &
"140 (BC_1, *, control, 0), " &
"139 (BC_1, TX(10), output3, X, 140, 0, Z)," &
"138 (BC_1, *, control, 0), " &
"137 (BC_1, TX(11), output3, X, 138, 0, Z)," &
"136 (BC_1, *, control, 0), " &
"135 (BC_1, TX(12), output3, X, 136, 0, Z)," &
"134 (BC_1, *, control, 0), " &
"133 (BC_1, TX(13), output3, X, 134, 0, Z)," &
"132 (BC_1, *, control, 0), " &
"131 (BC_1, TX(14), output3, X, 132, 0, Z)," &
"130 (BC_1, *, control, 0), " &
"129 (BC_1, TX(15), output3, X, 130, 0, Z)," &
"128 (BC_4, RX(8), input, X), " &
"127 (BC_4, RX(9), input, X), " &
"126 (BC_4, RX(10), input, X), " &
"125 (BC_4, RX(11), input, X), " &
"124 (BC_4, RX(12), input, X), " &
"123 (BC_4, RX(13), input, X), " &
"122 (BC_4, RX(14), input, X), " &
"121 (BC_4, RX(15), input, X), " &
"120 (BC_4, RX(16), input, X), " &
"119 (BC_4, RX(17), input, X), " &
"118 (BC_4, RX(18), input, X), " &
"117 (BC_4, RX(19), input, X), " &
"116 (BC_4, RX(20), input, X), " &
"115 (BC_4, RX(21), input, X), " &
"114 (BC_4, RX(22), input, X), " &
"113 (BC_4, RX(23), input, X), " &
"112 (BC_1, *, control, 0), " &
"111 (BC_1, TX(16), output3, X, 112, 0, Z)," &
"110 (BC_1, *, control, 0), " &
"109 (BC_1, TX(17), output3, X, 110, 0, Z)," &
"108 (BC_1, *, control, 0), " &
"107 (BC_1, TX(18), output3, X, 108, 0, Z)," &
"106 (BC_1, *, control, 0), " &
"105 (BC_1, TX(19), output3, X, 106, 0, Z)," &
"104 (BC_1, *, control, 0), " &
"103 (BC_1, TX(20), output3, X, 104, 0, Z)," &
"102 (BC_1, *, control, 0), " &
"101 (BC_1, TX(21), output3, X, 102, 0, Z)," &
"100 (BC_1, *, control, 0), " &
" 99 (BC_1, TX(22), output3, X, 100, 0, Z)," &
" 98 (BC_1, *, control, 0), " &
" 97 (BC_1, TX(23), output3, X, 98, 0, Z)," &
" 96 (BC_1, *, control, 0), " &
" 95 (BC_1, TX(24), output3, X, 96, 0, Z)," &
" 94 (BC_1, *, control, 0), " &
" 93 (BC_1, TX(25), output3, X, 94, 0, Z)," &
" 92 (BC_1, *, control, 0), " &
" 91 (BC_1, TX(26), output3, X, 92, 0, Z)," &
" 90 (BC_1, *, control, 0), " &
" 89 (BC_1, TX(27), output3, X, 90, 0, Z)," &
" 88 (BC_1, *, control, 0), " &
" 87 (BC_1, TX(28), output3, X, 88, 0, Z)," &
" 86 (BC_1, *, control, 0), " &
" 85 (BC_1, TX(29), output3, X, 86, 0, Z)," &
" 84 (BC_1, *, control, 0), " &
" 83 (BC_1, TX(30), output3, X, 84, 0, Z)," &
" 82 (BC_1, *, control, 0), " &
" 81 (BC_1, TX(31), output3, X, 82, 0, Z)," &
" 80 (BC_4, RX(24), input, X), " &
" 79 (BC_4, RX(25), input, X), " &
" 78 (BC_4, RX(26), input, X), " &
" 77 (BC_4, RX(27), input, X), " &
" 76 (BC_4, RX(28), input, X), " &
" 75 (BC_4, RX(29), input, X), " &
" 74 (BC_4, RX(30), input, X), " &
" 73 (BC_4, RX(31), input, X), " &
" 72 (BC_1, *, control, 0), " &
" 71 (BC_1, D(0), output3, X, 72, 0, Z)," &
" 70 (BC_4, D(0), input, X), " &
" 69 (BC_1, *, control, 0), " &
" 68 (BC_1, D(1), output3, X, 69, 0, Z), " &
" 67 (BC_4, D(1), input, X), " &
" 66 (BC_1, *, control, 0), " &
" 65 (BC_1, D(2), output3, X, 66, 0, Z), " &
" 64 (BC_4, D(2), input, X), " &
" 63 (BC_1, *, control, 0), " &
" 62 (BC_1, D(3), output3, X, 63, 0, Z), " &
" 61 (BC_4, D(3), input, X), " &
" 60 (BC_1, *, control, 0), " &
" 59 (BC_1, D(4), output3, X, 60, 0, Z), " &
" 58 (BC_4, D(4), input, X), " &
" 57 (BC_1, *, control, 0), " &
" 56 (BC_1, D(5), output3, X, 57, 0, Z), " &
" 55 (BC_4, D(5), input, X), " &
" 54 (BC_1, *, control, 0), " &
" 53 (BC_1, D(6), output3, X, 54, 0, Z), " &
" 52 (BC_4, D(6), input, X), " &
" 51 (BC_1, *, control, 0), " &
" 50 (BC_1, D(7), output3, X, 51, 0, Z), " &
" 49 (BC_4, D(7), input, X), " &
" 48 (BC_1, *, control, 0), " &
" 47 (BC_1, D(8), output3, X, 48, 0, Z), " &
" 46 (BC_4, D(8), input, X), " &
" 45 (BC_1, *, control, 0), " &
" 44 (BC_1, D(9), output3, X, 45, 0, Z), " &
" 43 (BC_4, D(9), input, X), " &
" 42 (BC_1, *, control, 0), " &
" 41 (BC_1, D(10), output3, X, 42, 0, Z), " &
" 40 (BC_4, D(10), input, X), " &
" 39 (BC_1, *, control, 0), " &
" 38 (BC_1, D(11), output3, X, 39, 0, Z), " &
" 37 (BC_4, D(11), input, X), " &
" 36 (BC_1, *, control, 0), " &
" 35 (BC_1, D(12), output3, X, 36, 0, Z), " &
" 34 (BC_4, D(12), input, X), " &
" 33 (BC_1, *, control, 0), " &
" 32 (BC_1, D(13), output3, X, 33, 0, Z), " &
" 31 (BC_4, D(13), input, X), " &
" 30 (BC_1, *, control, 0), " &
" 29 (BC_1, D(14), output3, X, 30, 0, Z), " &
" 28 (BC_4, D(14), input, X), " &
" 27 (BC_1, *, control, 0), " &
" 26 (BC_1, D(15), output3, X, 27, 0, Z), " &
" 25 (BC_4, D(15), input, X), " &
" 24 (BC_1, DTAX, output2, X), " &
" 23 (BC_4, A(15), input, X), " &
" 22 (BC_4, A(14), input, X), " &
" 21 (BC_4, A(13), input, X), " &
" 20 (BC_4, A(12), input, X), " &
" 19 (BC_4, A(11), input, X), " &
" 18 (BC_4, A(10), input, X), " &
" 17 (BC_4, A(9), input, X), " &
" 16 (BC_4, A(8), input, X), " &
" 15 (BC_4, A(7), input, X), " &
" 14 (BC_4, A(6), input, X), " &
" 13 (BC_4, A(5), input, X), " &
" 12 (BC_4, A(4), input, X), " &
" 11 (BC_4, A(3), input, X), " &
" 10 (BC_4, A(2), input, X), " &
" 9 (BC_4, A(1), input, X), " &
" 8 (BC_4, A(0), input, X), " &
" 7 (BC_4, RWX, input, X), " &
" 6 (BC_4, CSX, input, X), " &
" 5 (BC_4, DSX, input, X), " &
" 4 (BC_4, FE, input, X), " &
" 3 (BC_4, FOI, input, X), " &
" 2 (BC_4, CLK, clock, X), " &
" 1 (BC_4, RESETX, input, X), " &
" 0 (BC_4, ODEX, input, X) ";
end IDT72V73260;
