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BSDL File: ADSP_BF561_256_MBGA Download View details  


----------------------------------------------------------------------
-- BSDL for ADSP_BF561 Digital Signal Processor in mBGA Package
-- 
-- 
--
-- Revision : 0.1 Release Date 05/17/2004
----------------------------------------------------------------------
entity ADSP_BF561_256_MBGA is 
        generic (PHYSICAL_PIN_MAP : string:="PBGA_PACKAGE");
     
     port( ADDR:        out          bit_vector(2 to 25);
          DATA:        inout         bit_vector(0 to 31);
          AMS_B:        out          bit_vector(0 to 3);

          AOE_B:        out          bit;
          ARDY:         in           bit;
          ARE_B:        out          bit;
          AWE_B:        out          bit;
          ABE_B:        out          bit_vector(0 to 3);
          BG_B:         buffer       bit;
          BGH_B:        buffer       bit;
          BMODE:        in           bit_vector(0 to 1);
          BR_B:         in           bit;
          BY_PASS:      in           bit;
          PPI1_DATA:    inout        bit_vector(0 to 15);     
          PPI2_DATA:    inout        bit_vector(0 to 15);
          DR0PRI:       inout        bit;
          DR0SEC:       inout        bit;     
          DR1PRI:       inout        bit;
          DR1SEC:       inout        bit;
          DT0PRI:       inout        bit;
          DT0SEC:       inout        bit;
          DT1PRI:       inout        bit;
          DT1SEC:       inout        bit;
          MISO:         inout        bit;
          MOSI:         inout        bit;     
          NMI_0:        in           bit;
          NMI_1:        in           bit;
          PF:           inout        bit_vector(0 to 15);
          RESET_B:      in           bit;
          RFS0:       inout          bit;
          RFS1:       inout          bit;     
          RSCLK0:     inout          bit;     
          RSCLK1:     inout          bit;
          TSCLK0:     inout          bit;     
          TSCLK1:     inout          bit;     
          RX:         inout          bit;     
          TX:         inout          bit;
          SA10:       out            bit;
          SCAS_B:     out            bit;
          SCK:        inout          bit;     
          SCKE:       out            bit;
          SLEEP:      out            bit;
          SMS_B:      out          bit_vector(0 to 3);
          SRAS_B:     out          bit;     
          SWE_B:      out          bit;
          SCLK0:      out          bit;
          SCLK1:      out          bit;
          TCK:        in           bit;
          TDI:        in           bit;
          TDO:        out          bit;
          TMS:        in           bit;
          TRST_B:     in           bit;
          EMU_B:      out          bit;
          TEST:       in           bit;
          TFS0:       inout        bit;
          TFS1:       inout        bit;
          PPI1_CLK:   in           bit;
          PPI2_CLK:   in           bit;
          PPI1_SYNC1: inout        bit;
          PPI1_SYNC2: inout        bit;
          PPI1_SYNC3: inout        bit;
          PPI2_SYNC1: inout       bit;
          PPI2_SYNC2: inout       bit;
          PPI2_SYNC3: inout       bit;
          VDD_INT: linkage        bit_vector(0 to 8);
          GND_INT: linkage        bit_vector(0 to 6);
          VDD_EXT: linkage        bit_vector(0 to 18);
          CLKIN: linkage          bit;
          XTAL:  linkage          bit;
          VREF_FLT: linkage       bit;
          VREG: linkage           bit;
          PSMON_VDD: linkage      bit;
          PSMON_GND: linkage      bit;
          GND_EXT: linkage        bit_vector(0 to 19));
          
          use STD_1149_1_1990.all;

 attribute PIN_MAP of ADSP_BF561_256_MBGA: entity is PHYSICAL_PIN_MAP;
     
 constant PBGA_PACKAGE: PIN_MAP_STRING:=
          "ADDR:   (D13,G11,B15,G10,B14,C14,F11,D7,A6,C6," &
                    "B5,E6,A5,E5,B4,F6,B3,C4,A3,F5,B2,D4,A2,C3)," & 
          "DATA:   (B16,C15,E12,C16,E14,D15,D16,E15,F13,F15," &
	           "F12,F16,F14,G15,G13,G12," &
                   "H12,H15,H13,H16,H14,J15,J13,J16,K14,K15," &
		   "K13,L15,K12,L16,J12,M15)," &          
          "AMS_B:      (C8,B7,E7,A7)," &  
          "AOE_B:      C7," &
          "ARDY:   D9," &
          "ARE_B:  B8," &
          "AWE_B:  A8," &
          "ABE_B:  (E11,B13,A14,A15)," &
          "BG_B:   A13," &
          "BGH_B:  C12," &
            "BY_PASS:  G4," &
          "SLEEP:  T11," &
          "BMODE:  (M10,N10)," &
          "BR_B:      B12," &
          "DR0PRI: L12," &
          "DR0SEC: P16," &                    
          "DR1PRI: M12," &
          "DR1SEC: T14," &
          "DT0PRI: M16," &
          "DT0SEC: N15," &                    
          "DT1PRI: R15," &
          "DT1SEC: T15," &
          "MISO:      R12," &
          "MOSI:   N11," &
          "NMI_0:   P11," &
          "NMI_1:   R9," &
          "PF:      (P4,N5,T4,M6,R5,P6,T5,M7,R6,N6," &
	            "R7,P7,T7,N8,R8,P8)," &
          "PPI1_CLK: C2,"  &
          "PPI2_CLK: B1,"  &
          "PPI1_DATA: (L1,J5,J3,J4,K2,H5,K1,H4,K3," &
	              "H3,F4,E2,E3,D1,G5,D2)," &
          "PPI1_SYNC1: E4," &
          "PPI1_SYNC2: C1," &
          "PPI1_SYNC3: D3," &
          "PPI2_DATA: (R4,N4,R3,N3,T2,P3,R2,R1,P1,M3," &
	               "N2,L6,N1,M2,K5,M1)," &
          "PPI2_SYNC1: K4," &
          "PPI2_SYNC2: L2," &
          "PPI2_SYNC3: L4," &
          "RFS0:   R16," &
          "RFS1:   N13," &
          "RESET_B: F3, " &
          "RSCLK0: P15," &
          "RSCLK1: P13," &          
          "TSCLK0: N16," &
          "TSCLK1: R14," &
          "RX:     T13," &
          "TX:      R13," &
          "SA10:   D11," &
          "SCAS_B: D10," &
          "SCK:    M11," &
          "SCKE:   B10," &
          "SMS_B:  (E9,B9,C9,A10)," &
          "SRAS_B: C10," &
          "SWE_B:  E10," &
          "SCLK0:  A11," &
          "SCLK1:      A12," &
          "TCK:       T9,"  &
          "TDO:    N9,"  &
          "TMS:    T10," &
          "EMU_B:  R11," &
          "TEST:   M9,"  &
          "TFS0:   L13," &
          "TFS1:   P14," &
          "TRST_B:  P10," &
          "TDI:    R10," &
          "VDD_INT: (H7,F7,E8,G9,H11,J10,J9,K8,J8)," &
          "GND_INT: (G6,F8,F10,L11,L9,L7,K7)," &
          "VDD_EXT: (T1,L5,F2,A1,A4,B6,A9,B11,D12,A16," &
	            "E16,G16,K16,M14,T16,T12,T8,T6,T3), " &
          "GND_EXT: (M4,L3,E1,N7,D5,D6,D8,C11,C13,D14," &
	            "E13,G14,J14,L14,N14,P12,P9,P5,P2), " &
          "CLKIN: F1," &
          "XTAL:  G1," &
          "VREF_FLT: J2, " &
          "VREG: J1, " & 
          "PSMON_VDD: M13, " &
          "PSMON_GND: M5 ";
          
     attribute TAP_SCAN_IN   of TDI  :       signal is true;
        attribute TAP_SCAN_MODE of TMS  :       signal is true;
        attribute TAP_SCAN_OUT  of TDO  :       signal is true;
        attribute TAP_SCAN_RESET of TRST_B :    signal is true;
        attribute TAP_SCAN_CLOCK of TCK :       signal is (50.0e6,
BOTH);

        attribute INSTRUCTION_LENGTH of ADSP_BF561_256_MBGA:     entity
is 5;

        -- Unspecified opcodes assigned to Bypass.
        attribute INSTRUCTION_OPCODE of ADSP_BF561_256_MBGA:     entity
is 
          "BYPASS         (11111)," &
          "EXTEST         (00000)," &
          "SAMPLE         (10000)," &
          "IDCODE         (00010)," &
          "MEMBIST        (01010)," &
          "EMULATION      (00100,10100,01000,11110,01100)," &
          "CUSTOMER_KEY     (10110)," &
          "TESTKEY     (00110)"; 
          
           
        attribute INSTRUCTION_CAPTURE of ADSP_BF561_256_MBGA: entity is 
          "00001";

        attribute INSTRUCTION_PRIVATE of ADSP_BF561_256_MBGA: entity is 
          "EMULATION," &
          "MEMBIST," &
          "CUSTOMER_KEY," &
          "TESTKEY" ;
     
     attribute IDCODE_REGISTER of ADSP_BF561_256_MBGA: entity is
          
          "0011" &          -- Version
          "0010011110100101" &     -- Part number
          "00001100101" &          -- ADI manufacturing code
          "1";               -- Required bit          

        attribute BOUNDARY_CELLS of ADSP_BF561_256_MBGA:  entity is 
          "BC_1, BC_2, BC_3, BC_4";
        -- BC_1: output, control; BC_2: input; 
        -- BC_3: internal; BC_4: clock;
        attribute BOUNDARY_LENGTH of ADSP_BF561_256_MBGA: entity is 355;

        attribute BOUNDARY_REGISTER of ADSP_BF561_256_MBGA: entity is 
        --num cell port function safe [ccell disval rslt ]

"0    ( BC_2,NMI_1,input,X),"&
-- PADRING tlpad_pf
"1    ( BC_2,PF(15),input,X),"&
"2    ( BC_1,PF(15),output3,X,3,0,Z),"&
"3    ( BC_1,*,control,0    ),"&
"4    ( BC_2,PF(14),input,X),"&
"5    ( BC_1,PF(14),output3,X,6,0,Z),"&
"6    ( BC_1,*,control,0),"&
"7    ( BC_2,PF(13),input,X),"&
"8    ( BC_1,PF(13),output3,X,9,0,Z),"&
"9    ( BC_1,*,control,0),"&
"10   ( BC_2,PF(12),input,X),"&
"11   ( BC_1,PF(12),output3,X,12,0,Z),"&
"12   ( BC_1,*,control,0),"&
"13   ( BC_2,PF(11),input,X),"&
"14   ( BC_1,PF(11),output3,X,15,0,Z),"&
"15   ( BC_1,*,control,0),"&
"16   ( BC_2,PF(10),input,X),"&
"17   ( BC_1,PF(10),output3,X,18,0,Z),"&
"18   ( BC_1,*,control,0),"&
"19   ( BC_2,PF(9),input,X),"&
"20   ( BC_1,PF(9),output3,X,21,0,Z),"&
"21   ( BC_1,*,control,0),"&
"22   ( BC_2,PF(8),input,X),"&
"23   ( BC_1,PF(8),output3,X,24,0,Z),"&
"24   ( BC_1,*,control,0),"&
"25   ( BC_2,PF(7),input,X),"&
"26   ( BC_1,PF(7),output3,X,27,0,Z),"&
"27   ( BC_1,*,control,0),"&
"28   ( BC_2,PF(6),input,X),"&
"29   ( BC_1,PF(6),output3,X,30,0,Z),"&
"30   ( BC_1,*,control,0),"&
"31   ( BC_2,PF(5),input,X),"&
"32   ( BC_1,PF(5),output3,X,33,0,Z),"&
"33   ( BC_1,*,control,0),"&
"34   ( BC_2,PF(4),input,X),"&
"35   ( BC_1,PF(4),output3,X,36,0,Z),"&
"36   ( BC_1,*,control,0),"&
"37   ( BC_2,PF(3),input,X),"&
"38   ( BC_1,PF(3),output3,X,39,0,Z),"&
"39   ( BC_1,*,control,0),"&
"40   ( BC_2,PF(2),input,X),"&
"41   ( BC_1,PF(2),output3,X,42,0,Z),"&
"42   ( BC_1,*,control,0),"&
"43   ( BC_2,PF(1),input,X),"&
"44   ( BC_1,PF(1),output3,X,45,0,Z),"&
"45   ( BC_1,*,control,0),"&
"46   ( BC_2,PF(0),input,X),"&
"47   ( BC_1,PF(0),output3,X,48,0,Z),"&
"48   ( BC_1,*,control,0),"&
-- PADRING tlpad_ppi2data
"49   ( BC_2,PPI2_DATA(0),input,X),"&
"50   ( BC_1,PPI2_DATA(0), output3,X,51,0,Z),"&
"51   ( BC_1,*,control,0),"&
"52   ( BC_2,PPI2_DATA(1),input,X),"&
"53   ( BC_1,PPI2_DATA(1), output3,X,54,0,Z),"&
"54   ( BC_1,*,control,0),"&
"55   ( BC_2,PPI2_DATA(2),input,X),"&
"56   ( BC_1,PPI2_DATA(2), output3,X,57,0,Z),"&
"57   ( BC_1,*,control,0),"&
"58   ( BC_2,PPI2_DATA(3),input,X),"&
"59   ( BC_1,PPI2_DATA(3), output3,X,60,0,Z),"&
"60   ( BC_1,*,control,0),"&
"61   ( BC_2,PPI2_DATA(4),input,X),"&
"62   ( BC_1,PPI2_DATA(4), output3,X,63,0,Z),"&
"63   ( BC_1,*,control,0),"&
"64   ( BC_2,PPI2_DATA(5),input,X),"&
"65   ( BC_1,PPI2_DATA(5), output3,X,66,0,Z),"&
"66   ( BC_1,*,control,0),"&
"67   ( BC_2,PPI2_DATA(6),input,X),"&
"68   ( BC_1,PPI2_DATA(6), output3,X,69,0,Z),"&
"69   ( BC_1,*,control,0),"&
"70   ( BC_2,PPI2_DATA(7),input,X),"&
"71   ( BC_1,PPI2_DATA(7), output3,X,72,0,Z),"&
"72   ( BC_1,*,control,0),"&
"73   ( BC_2,PPI2_DATA(8),input,X),"&
"74   ( BC_1,PPI2_DATA(8), output3,X,75,0,Z),"&
"75   ( BC_1,*,control,0),"&
"76   ( BC_2,PPI2_DATA(9),input,X),"&
"77   ( BC_1,PPI2_DATA(9), output3,X,78,0,Z),"&
"78   ( BC_1,*,control,0),"&
"79   ( BC_2,PPI2_DATA(10),input,X),"&
"80   ( BC_1,PPI2_DATA(10), output3,X,81,0,Z),"&
"81   ( BC_1,*,control,0),"&
"82   ( BC_2,PPI2_DATA(11),input,X),"&
"83   ( BC_1,PPI2_DATA(11), output3,X,84,0,Z),"&
"84   ( BC_1,*,control,0),"&
"85   ( BC_2,PPI2_DATA(12),input,X),"&
"86   ( BC_1,PPI2_DATA(12), output3,X,87,0,Z),"&
"87   ( BC_1,*,control,0),"&
"88   ( BC_2,PPI2_DATA(13),input,X),"&
"89   ( BC_1,PPI2_DATA(13), output3,X,90,0,Z),"&
"90   ( BC_1,*,control,0),"&
"91   ( BC_2,PPI2_DATA(14),input,X),"&
"92   ( BC_1,PPI2_DATA(14), output3,X,93,0,Z),"&
"93   ( BC_1,*,control,0),"&
"94   ( BC_2,PPI2_DATA(15),input,X),"&
"95   ( BC_1,PPI2_DATA(15), output3,X,96,0,Z),"&
"96   ( BC_1,*,control,0),"&
-- PADRING tlpad_ppisync
"97   ( BC_2,PPI2_SYNC1,input,X),"&
"98   ( BC_1,PPI2_SYNC1, output3,X,99,0,Z),"&
"99   ( BC_1,*,control,0),"&
"100  ( BC_2,PPI2_SYNC2,input,X),"&
"101  ( BC_1,PPI2_SYNC2, output3,X,102,0,Z),"&
"102  ( BC_1,*,control,0),"&
"103  ( BC_2,PPI2_SYNC3,input,X),"&
"104  ( BC_1,PPI2_SYNC3, output3,X,105,0,Z),"&
"105  ( BC_1,*,control,0),"&
-- PADRING tlpad_ppi1
"106  ( BC_2,PPI1_DATA(0),input,X),"&
"107  ( BC_1,PPI1_DATA(0), output3,X,108,0,Z),"&
"108  ( BC_1,*,control,0),"&
"109  ( BC_2,PPI1_DATA(1),input,X),"&
"110  ( BC_1,PPI1_DATA(1), output3,X,111,0,Z),"&
"111  ( BC_1,*,control,0),"&
"112  ( BC_2,PPI1_DATA(2),input,X),"&
"113  ( BC_1,PPI1_DATA(2), output3,X,114,0,Z),"&
"114  ( BC_1,*,control,0),"&
"115  ( BC_2,PPI1_DATA(3),input,X),"&
"116  ( BC_1,PPI1_DATA(3), output3,X,117,0,Z),"&
"117  ( BC_1,*,control,0),"&
"118  ( BC_2,PPI1_DATA(4),input,X),"&
"119  ( BC_1,PPI1_DATA(4), output3,X,120,0,Z),"&
"120  ( BC_1,*,control,0),"&
"121  ( BC_2,PPI1_DATA(5),input,X),"&
"122  ( BC_1,PPI1_DATA(5), output3,X,123,0,Z),"&
"123  ( BC_1,*,control,0),"&
"124  ( BC_2,PPI1_DATA(6),input,X),"&
"125  ( BC_1,PPI1_DATA(6), output3,X,126,0,Z),"&
"126  ( BC_1,*,control,0),"&
"127  ( BC_2,PPI1_DATA(7),input,X),"&
"128  ( BC_1,PPI1_DATA(7), output3,X,129,0,Z),"&
"129  ( BC_1,*,control,0),"&
"130  ( BC_2,PPI1_DATA(8),input,X),"&
"131  ( BC_1,PPI1_DATA(8), output3,X,132,0,Z),"&
"132  ( BC_1,*,control,0),"&
"133  ( BC_2,PPI1_DATA(9),input,X),"&
"134  ( BC_1,PPI1_DATA(9), output3,X,135,0,Z),"&
"135  ( BC_1,*,control,0),"&
"136  ( BC_2,BY_PASS,input,X),"&
"137  ( BC_2,RESET_B,input,X),"&
"138  ( BC_2,PPI1_DATA(10),input,X),"&
"139  ( BC_1,PPI1_DATA(10), output3,X,140,0,Z),"&
"140  ( BC_1,*,control,0),"&
"141  ( BC_2,PPI1_DATA(11),input,X),"&
"142  ( BC_1,PPI1_DATA(11), output3,X,143,0,Z),"&
"143  ( BC_1,*,control,0),"&
"144  ( BC_2,PPI1_DATA(12),input,X),"&
"145  ( BC_1,PPI1_DATA(12), output3,X,146,0,Z),"&
"146  ( BC_1,*,control,0),"&
"147  ( BC_2,PPI1_DATA(13),input,X),"&
"148  ( BC_1,PPI1_DATA(13), output3,X,149,0,Z),"&
"149  ( BC_1,*,control,0),"&
"150  ( BC_2,PPI1_DATA(14),input,X),"&
"151  ( BC_1,PPI1_DATA(14), output3,X,152,0,Z),"&
"152  ( BC_1,*,control,0),"&
"153  ( BC_2,PPI1_DATA(15),input,X),"&
"154  ( BC_1,PPI1_DATA(15), output3,X,155,0,Z),"&
"155  ( BC_1,*,control,0),"&
"156  ( BC_2,PPI1_SYNC1,input,X),"&
"157  ( BC_1,PPI1_SYNC1, output3,X,158,0,Z),"&
"158  ( BC_1,*,control,0),"&
"159  ( BC_2,PPI1_SYNC2,input,X),"&
"160  ( BC_1,PPI1_SYNC2, output3,X,161,0,Z),"&
"161  ( BC_1,*,control,0),"&
"162  ( BC_2,PPI1_SYNC3,input,X),"&
"163  ( BC_1,PPI1_SYNC3, output3,X,164,0,Z),"&
"164  ( BC_1,*,control,0),"&
"165  ( BC_2,PPI1_CLK,input,X),"&
"166  ( BC_2,PPI2_CLK,input,X),"&
-- PADRING tlpad_addrhi (18)
"167  ( BC_1,ADDR(25),output3,X,175,0,Z),"&
"168  ( BC_1,ADDR(24),output3,X,175,0,Z),"&
"169  ( BC_1,ADDR(23),output3,X,175,0,Z),"&
"170  ( BC_1,ADDR(22),output3,X,175,0,Z),"&
"171  ( BC_1,ADDR(21),output3,X,175,0,Z),"&
"172  ( BC_1,ADDR(20),output3,X,175,0,Z),"&
"173  ( BC_1,ADDR(19),output3,X,175,0,Z),"&
"174  ( BC_1,ADDR(18),output3,X,175,0,Z),"&
"175  ( BC_1,*,control,0),"&
"176  ( BC_1,ADDR(17),output3,X,175,0,Z),"&
"177  ( BC_1,ADDR(16),output3,X,175,0,Z),"&
"178  ( BC_1,ADDR(15),output3,X,175,0,Z),"&
"179  ( BC_1,ADDR(14),output3,X,175,0,Z),"&
"180  ( BC_1,ADDR(13),output3,X,175,0,Z),"&
"181  ( BC_1,ADDR(12),output3,X,175,0,Z),"&
"182  ( BC_1,ADDR(11),output3,X,175,0,Z),"&
"183  ( BC_1,ADDR(10),output3,X,175,0,Z),"&
"184  ( BC_1,ADDR(9),output3,X,175,0,Z),"&
-- PADRING tlpad_amc (9)
"185  ( BC_1,AMS_B(3),output3,X,189,0,Z),"&
"186  ( BC_1,AMS_B(2),output3,X,189,0,Z),"&
"187  ( BC_1,AMS_B(1),output3,X,189,0,Z),"&
"188  ( BC_1,AMS_B(0),output3,X,189,0,Z),"&
"189  ( BC_1,*,control,0),"&
"190  ( BC_1,AWE_B,output3,X,189,0,Z),"&
"191  ( BC_1,AOE_B,output3,X,189,0,Z),"&
"192  ( BC_1,ARE_B,output3,X,189,0,Z),"&
"193  ( BC_2,ARDY,input,X),"&
-- PADRING tlpad_sdc (19)
"194  ( BC_1,*,control,0),"&
"195  ( BC_1,SMS_B(0),output3,X,194,0,Z),"&
"196  ( BC_1,SMS_B(1),output3,X,194,0,Z),"&
"197  ( BC_1,SMS_B(2),output3,X,194,0,Z),"&
"198  ( BC_1,SMS_B(3),output3,X,194,0,Z),"&
"199  ( BC_1,SRAS_B,output3,X,194,0,Z),"&
"200  ( BC_1,SCKE,output3,X,194,0,Z),"&
"201  ( BC_1,SCAS_B,output3,X,194,0,Z),"&
"202  ( BC_1,SWE_B,output3,X,194,0,Z),"&
"203  ( BC_1,SCLK0,output3,X,194,0,Z),"&
"204  ( BC_1,SCLK1,output3,X,194,0,Z),"&
"205  ( BC_1,SA10,output3,X,194,0,Z),"&
"206  ( BC_2,BR_B,input,X),"&
"207  ( BC_1,BG_B,output2,X),"&
"208  ( BC_1,BGH_B,output2,X),"&
"209  ( BC_1,ABE_B(0),output3,X,219,0,Z),"&
"210  ( BC_1,ABE_B(1),output3,X,219,0,Z),"&
"211  ( BC_1,ABE_B(2),output3,X,219,0,Z),"&
"212  ( BC_1,ABE_B(3),output3,X,219,0,Z),"&
-- PADRING tlpad_addrlo (8)
"213  ( BC_1,ADDR(8),output3,X,219,0,Z),"&
"214  ( BC_1,ADDR(7),output3,X,219,0,Z),"&
"215  ( BC_1,ADDR(6),output3,X,219,0,Z),"&
"216  ( BC_1,ADDR(5),output3,X,219,0,Z),"&
"217  ( BC_1,ADDR(4),output3,X,219,0,Z),"&
"218  ( BC_1,ADDR(3),output3,X,219,0,Z),"&
"219  ( BC_1,*,control,0),"&
"220  ( BC_1,ADDR(2),output3,X,219,0,Z),"&
-- PADRING tlpad_datalo (33)
"221  ( BC_1,*,control,0),"&
"222  ( BC_2,DATA(0),input,X),"&
"223  ( BC_1,DATA(0),output3,X,221,0,Z),"&
"224  ( BC_2,DATA(1),input,X),"&
"225  ( BC_1,DATA(1),output3,X,221,0,Z),"&
"226  ( BC_2,DATA(2),input,X),"&
"227  ( BC_1,DATA(2),output3,X,221,0,Z),"&
"228  ( BC_2,DATA(3),input,X),"&
"229  ( BC_1,DATA(3),output3,X,221,0,Z),"&
"230  ( BC_2,DATA(4),input,X),"&
"231  ( BC_1,DATA(4),output3,X,221,0,Z),"&
"232  ( BC_2,DATA(5),input,X),"&
"233  ( BC_1,DATA(5),output3,X,221,0,Z),"&
"234  ( BC_2,DATA(6),input,X),"&
"235  ( BC_1,DATA(6),output3,X,221,0,Z),"&
"236  ( BC_2,DATA(7),input,X),"&
"237  ( BC_1,DATA(7),output3,X,221,0,Z),"&
"238  ( BC_2,DATA(8),input,X),"&
"239  ( BC_1,DATA(8),output3,X,221,0,Z),"&
"240  ( BC_2,DATA(9),input,X),"&
"241  ( BC_1,DATA(9),output3,X,221,0,Z),"&
"242  ( BC_2,DATA(10),input,X),"&
"243  ( BC_1,DATA(10),output3,X,221,0,Z),"&
"244  ( BC_2,DATA(11),input,X),"&
"245  ( BC_1,DATA(11),output3,X,221,0,Z),"&
"246  ( BC_2,DATA(12),input,X),"&
"247  ( BC_1,DATA(12),output3,X,221,0,Z),"&
"248  ( BC_2,DATA(13),input,X),"&
"249  ( BC_1,DATA(13),output3,X,221,0,Z),"&
"250  ( BC_2,DATA(14),input,X),"&
"251  ( BC_1,DATA(14),output3,X,221,0,Z),"&
"252  ( BC_2,DATA(15),input,X),"&
"253  ( BC_1,DATA(15),output3,X,221,0,Z),"&
-- PADRING tlpad_datahi (33)
"254  ( BC_1,*,control,0),"&
"255  ( BC_2,DATA(16),input,X),"&
"256  ( BC_1,DATA(16),output3,X, 254,0,Z),"&
"257  ( BC_2,DATA(17),input,X),"&
"258  ( BC_1,DATA(17),output3,X, 254,0,Z),"&
"259  ( BC_2,DATA(18),input,X),"&
"260  ( BC_1,DATA(18),output3,X, 254,0,Z),"&
"261  ( BC_2,DATA(19),input,X),"&
"262  ( BC_1,DATA(19),output3,X, 254,0,Z),"&
"263  ( BC_2,DATA(20),input,X),"&
"264  ( BC_1,DATA(20),output3,X, 254,0,Z),"&
"265  ( BC_2,DATA(21),input,X),"&
"266  ( BC_1,DATA(21),output3,X, 254,0,Z),"&
"267  ( BC_2,DATA(22),input,X),"&
"268  ( BC_1,DATA(22),output3,X, 254,0,Z),"&
"269  ( BC_2,DATA(23),input,X),"&
"270  ( BC_1,DATA(23),output3,X, 254,0,Z),"&
"271  ( BC_2,DATA(24),input,X),"&
"272  ( BC_1,DATA(24),output3,X, 254,0,Z),"&
"273  ( BC_2,DATA(25),input,X),"&
"274  ( BC_1,DATA(25),output3,X, 254,0,Z),"&
"275  ( BC_2,DATA(26),input,X),"&
"276  ( BC_1,DATA(26),output3,X, 254,0,Z),"&
"277  ( BC_2,DATA(27),input,X),"&
"278  ( BC_1,DATA(27),output3,X, 254,0,Z),"&
"279  ( BC_2,DATA(28),input,X),"&
"280  ( BC_1,DATA(28),output3,X, 254,0,Z),"&
"281  ( BC_2,DATA(29),input,X),"&
"282  ( BC_1,DATA(29),output3,X, 254,0,Z),"&
"283  ( BC_2,DATA(30),input,X),"&
"284  ( BC_1,DATA(30),output3,X, 254,0,Z),"&
"285  ( BC_2,DATA(31),input,X),"&
"286  ( BC_1,DATA(31),output3,X, 254,0,Z),"&
-- PADRING tlpad_sp0
"287  ( BC_2,DT0PRI,input,X),"&
"288  ( BC_1,DT0PRI,output3,X,289,0,Z),"&
"289  ( BC_1,*,control,0),"&
"290  ( BC_2,DT0SEC,input,X),"&
"291  ( BC_1,DT0SEC,output3,X,292,0,Z),"&
"292  ( BC_1,*,control,0),"&
"293  ( BC_2,TFS0,input,X),"&
"294  ( BC_1,TFS0,output3,X,295,0,Z),"&
"295  ( BC_1,*,control,0),"&
"296  ( BC_2,TSCLK0,input,X),"&
"297  ( BC_1,TSCLK0,output3,X,298,0,Z),"&
"298  ( BC_1,*,control,0),"&
"299  ( BC_2,DR0PRI,input,X),"&
"300  ( BC_1,DR0PRI,output3,X,301,0,Z),"&
"301  ( BC_1,*,control,0),"&
"302  ( BC_2,DR0SEC,input,X),"&
"303  ( BC_1,DR0SEC,output3,X,304,0,Z),"&
"304  ( BC_1,*,control,0),"&
"305  ( BC_2,RFS0,input,X),"&
"306  ( BC_1,RFS0,output3,X,307,0,Z),"&
"307  ( BC_1,*,control,0),"&
"308  ( BC_2,RSCLK0,input,X),"&
"309  ( BC_1,RSCLK0,output3,X,310,0,Z),"&
"310  ( BC_1,*,control,0),"&
-- PADRING tlpad_spi1
"311  ( BC_2,DT1PRI,input,X),"&
"312  ( BC_1,DT1PRI,output3,X,313,0,Z),"&
"313  ( BC_1,*,control,0),"&
"314  ( BC_2,DT1SEC,input,X),"&
"315  ( BC_1,DT1SEC,output3,X,316,0,Z),"&
"316  ( BC_1,*,control,0),"&
"317  ( BC_2,TFS1,input,X),"&
"318  ( BC_1,TFS1,output3,X,319,0,Z),"&
"319  ( BC_1,*,control,0),"&
"320  ( BC_2,TSCLK1,input,X),"&
"321  ( BC_1,TSCLK1,output3,X,322,0,Z),"&
"322  ( BC_1,*,control,0),"&
"323  ( BC_2,DR1PRI,input,X),"&
"324  ( BC_1,DR1PRI,output3,X,325,0,Z),"&
"325  ( BC_1,*,control,0),"&
"326  ( BC_2,DR1SEC,input,X),"&
"327  ( BC_1,DR1SEC,output3,X,328,0,Z),"&
"328  ( BC_1,*,control,0),"&
"329  ( BC_2,RFS1,input,X),"&
"330  ( BC_1,RFS1,output3,X,331,0,Z),"&
"331  ( BC_1,*,control,0),"&
"332  ( BC_2,RSCLK1,input,X),"&
"333  ( BC_1,RSCLK1,output3,X,334,0,Z),"&
"334  ( BC_1,*,control,0),"&
-- PADRING tlpad_uart
"335  ( BC_2,TX,input,X),"&
"336  ( BC_1,TX,output3,X,337,0,Z),"&
"337  ( BC_1,*,control,0),"&
"338  ( BC_2,RX,input,X),"&
"339  ( BC_1,RX,output3,X,340,0,Z),"&
"340  ( BC_1,*,control,0),"&
-- PADRING tlpad_spi
"341  ( BC_2,SCK,input,X),"&
"342  ( BC_1,SCK,output3,X,343,0,Z),"&
"343  ( BC_1,*,control,0),"&
"344  ( BC_2,MOSI,input,X),"&
"345  ( BC_1,MOSI,output3,X,346,0,Z),"&
"346  ( BC_1,*,control,0),"&
"347  ( BC_2,MISO,input,X),"&
"348  ( BC_1,MISO,output3,X,349,0,Z),"&
"349  ( BC_1,*,control,0),"&
-- PADRING tlpad_sys 
"350  ( BC_2,NMI_0,input,X),"&
"351  ( BC_1,SLEEP,output2,X),"&
"352  ( BC_2,BMODE(0),input,X),"&
"353  ( BC_2,BMODE(1),input,X),"&
-- PADRING tlpad_test
"354  ( BC_2,TEST,input,X)";
end ADSP_BF561_256_MBGA;

This library contains 7818 BSDL files (for 6184 distinct entities) from 66 vendors
Last BSDL model (LCMXO3L_6900C_XXBG256) was added on Nov 21, 2017 16:30
info@bsdl.info