-- *****************************************************************************
-- BSDL file for design pictus_top_wrapper
-- Created by Bernopsys Version 0815-SP314 (Sep 17, 2008)
-- Designer:
-- Company:
-- Date: Thu Dec 6 09:31:41 2007
-- *****************************************************************************
--============================================================================--
-- IMPORTANT NOTICE --
-- This information is provided on an AS IS basis and without warranty. --
-- IN NO EVENT SHALL FREESCALE BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL --
-- DAMAGES ARISING FROM USE OF THIS INFORMATION. THIS DISCLAIMER OF --
-- WARRANTY EXTENDS TO THE USER OF THE INFORMATION, AND TO THEIR CUSTOMERS --
-- OR USERS OF PRODUCTS AND IS IN LIEU OF ALL WARRANTIES WHETHER EXPRESS, --
-- IMPLIED, OR STATUTORY, INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY --
-- OR FITNESS FOR PARTICULAR PURPOSE. --
-- --
-- FREESCALE does not represent or warrant that the information furnished --
-- hereunder is free of infringement of any third party patents, --
-- copyrights, trade secrets, or other intellectual property rights. --
-- FREESCALE does not represent or warrant that the information is free of --
-- defect, or that it meets any particular standard, requirements or need --
-- of the user of the infomation or their customers. --
-- --
-- FREESCALE reserves the right to change the information in this file --
-- without notice. The latest version of the file is available on the --
-- Freescale Freeware Data Services Bulletin Board system at (512)891-FREE --
-- (3733). Modem settings are 8-bit data, no parity, and one start and one --
-- stop bit. Asynchronous transmission rates to 9600 bits per second are --
-- supported. --
-- --
--============================================================================--
-- BSDL file for PICTUS 512K CUT 3.1 (FSL CUT 2.2)
entity pictus_top_wrapper is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "QFP_144");
-- This section declares all the ports in the design.
port (
PAD_0 : inout bit;
PAD_1 : inout bit;
PAD_2 : inout bit;
PAD_3 : inout bit;
PAD_4 : inout bit;
PAD_5 : inout bit;
PAD_6 : inout bit;
PAD_7 : inout bit;
PAD_8 : inout bit;
PAD_9 : inout bit;
PAD_10 : inout bit;
PAD_11 : inout bit;
PAD_12 : inout bit;
PAD_13 : inout bit;
PAD_14 : inout bit;
PAD_15 : inout bit;
PAD_16 : inout bit;
PAD_17 : inout bit;
PAD_18 : inout bit;
PAD_19 : inout bit;
PAD_20 : out bit; -- TDO
PAD_21 : in bit; -- TDI
PAD_22 : inout bit;
PAD_23 : linkage bit;
PAD_24 : linkage bit;
PAD_25 : linkage bit;
PAD_26 : linkage bit;
PAD_27 : linkage bit;
PAD_28 : linkage bit;
PAD_29 : linkage bit;
PAD_30 : linkage bit;
PAD_31 : linkage bit;
PAD_32 : linkage bit;
PAD_33 : linkage bit;
PAD_34 : linkage bit;
PAD_35 : inout bit;
PAD_36 : inout bit;
PAD_37 : inout bit;
PAD_38 : inout bit;
PAD_39 : inout bit;
PAD_40 : inout bit;
PAD_41 : inout bit;
PAD_42 : inout bit;
PAD_43 : inout bit;
PAD_44 : inout bit;
PAD_45 : inout bit;
PAD_46 : inout bit;
PAD_47 : inout bit;
PAD_48 : inout bit;
PAD_49 : inout bit;
PAD_50 : inout bit;
PAD_51 : inout bit;
PAD_52 : inout bit;
PAD_53 : inout bit;
PAD_54 : inout bit;
PAD_55 : inout bit;
PAD_56 : inout bit;
PAD_57 : inout bit;
PAD_58 : inout bit;
PAD_59 : inout bit;
PAD_60 : inout bit;
PAD_61 : inout bit;
PAD_62 : inout bit;
PAD_63 : linkage bit;
PAD_64 : linkage bit;
PAD_65 : linkage bit;
PAD_66 : linkage bit;
PAD_67 : linkage bit;
PAD_68 : linkage bit;
PAD_69 : linkage bit;
PAD_70 : linkage bit;
PAD_71 : linkage bit;
PAD_72 : linkage bit;
PAD_73 : linkage bit;
PAD_74 : linkage bit;
PAD_75 : linkage bit;
PAD_76 : linkage bit;
PAD_77 : inout bit;
PAD_78 : inout bit;
PAD_79 : inout bit;
PAD_80 : inout bit;
PAD_81 : inout bit;
PAD_82 : inout bit;
PAD_83 : inout bit;
PAD_84 : inout bit;
PAD_85 : inout bit;
PAD_86 : inout bit;
PAD_87 : inout bit;
PAD_88 : inout bit;
PAD_89 : inout bit;
PAD_90 : inout bit;
PAD_91 : inout bit;
PAD_92 : inout bit;
PAD_93 : inout bit;
PAD_94 : inout bit;
PAD_95 : inout bit;
PAD_96 : inout bit;
PAD_97 : inout bit;
PAD_98 : inout bit;
PAD_99 : inout bit;
PAD_100 : inout bit;
PAD_101 : inout bit;
PAD_102 : inout bit;
PAD_103 : inout bit;
PAD_104 : inout bit;
PAD_105 : inout bit;
PAD_106 : inout bit;
PAD_107 : inout bit;
TCK : in bit;
TMS : in bit;
BCTRL : linkage bit;
EXTAL : linkage bit;
XTAL : linkage bit;
MDO0 : linkage bit;
NMI : linkage bit;
RESET_B : linkage bit;
VPP_TEST : linkage bit;
VDD : linkage bit_vector (0 to 5);
VSS : linkage bit_vector (0 to 5);
VDD_1V2 : linkage bit_vector (0 to 3);
VSS_1V2 : linkage bit_vector (0 to 3);
VDD_REF_ADC0 : linkage bit;
VSS_REF_ADC0 : linkage bit;
VDD_REF_ADC1 : linkage bit;
VSS_REF_ADC1 : linkage bit;
VDD_VREG : linkage bit;
VDD_1V2_VREG : linkage bit;
VSS_1V2_VREG : linkage bit
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of pictus_top_wrapper: entity is
"STD_1149_1_2001";
attribute PIN_MAP of pictus_top_wrapper: entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information is
-- extracted from the port-to-pin map file that was read in using the
-- "read_pin_map" command.
constant QFP_144: PIN_MAP_STRING :=
"PAD_0 : 73 ," &
"PAD_1 : 74 ," &
"PAD_2 : 84 ," &
"PAD_3 : 92 ," &
"PAD_4 : 108," &
"PAD_5 : 14 ," &
"PAD_6 : 2 ," &
"PAD_7 : 10 ," &
"PAD_8 : 12 ," &
"PAD_9 : 134," &
"PAD_10 : 118," &
"PAD_11 : 120," &
"PAD_12 : 122," &
"PAD_13 : 136," &
"PAD_14 : 143," &
"PAD_15 : 144," &
"PAD_16 : 109," &
"PAD_17 : 110," &
"PAD_18 : 114," &
"PAD_19 : 116," &
"PAD_20 : 89 ," &
"PAD_21 : 86 ," &
"PAD_22 : 138," &
"PAD_23 : 43 ," &
"PAD_24 : 47 ," &
"PAD_25 : 52 ," &
"PAD_26 : 53 ," &
"PAD_27 : 54 ," &
"PAD_28 : 55 ," &
"PAD_29 : 60 ," &
"PAD_30 : 64 ," &
"PAD_31 : 62 ," &
"PAD_32 : 66 ," &
"PAD_33 : 41 ," &
"PAD_34 : 45 ," &
"PAD_35 : 16 ," &
"PAD_36 : 11 ," &
"PAD_37 : 13 ," &
"PAD_38 : 142," &
"PAD_39 : 15 ," &
"PAD_40 : 130," &
"PAD_41 : 123," &
"PAD_42 : 111," &
"PAD_43 : 80 ," &
"PAD_44 : 82 ," &
"PAD_45 : 101," &
"PAD_46 : 103," &
"PAD_47 : 124," &
"PAD_48 : 125," &
"PAD_49 : 3 ," &
"PAD_50 : 140," &
"PAD_51 : 128," &
"PAD_52 : 129," &
"PAD_53 : 33 ," &
"PAD_54 : 34 ," &
"PAD_55 : 37 ," &
"PAD_56 : 32 ," &
"PAD_57 : 26 ," &
"PAD_58 : 76 ," &
"PAD_59 : 78 ," &
"PAD_60 : 99 ," &
"PAD_61 : 95 ," &
"PAD_62 : 105," &
"PAD_63 : 58 ," &
"PAD_64 : 68 ," &
"PAD_65 : 39 ," &
"PAD_66 : 49 ," &
"PAD_67 : 40 ," &
"PAD_68 : 42 ," &
"PAD_69 : 44 ," &
"PAD_70 : 46 ," &
"PAD_71 : 48 ," &
"PAD_72 : 59 ," &
"PAD_73 : 61 ," &
"PAD_74 : 63 ," &
"PAD_75 : 65 ," &
"PAD_76 : 67 ," &
"PAD_77 : 117," &
"PAD_78 : 119," &
"PAD_79 : 121," &
"PAD_80 : 133," &
"PAD_81 : 135," &
"PAD_82 : 137," &
"PAD_83 : 139," &
"PAD_84 : 4 ," &
"PAD_85 : 5 ," &
"PAD_86 : 8 ," &
"PAD_87 : 19 ," &
"PAD_88 : 20 ," &
"PAD_89 : 23 ," &
"PAD_90 : 24 ," &
"PAD_91 : 25 ," &
"PAD_92 : 106," &
"PAD_93 : 112," &
"PAD_94 : 115," &
"PAD_95 : 113," &
"PAD_96 : 38 ," &
"PAD_97 : 141," &
"PAD_98 : 102," &
"PAD_99 : 104," &
"PAD_100 : 100," &
"PAD_101 : 85 ," &
"PAD_102 : 98 ," &
"PAD_103 : 83 ," &
"PAD_104 : 81 ," &
"PAD_105 : 79 ," &
"PAD_106 : 77 ," &
"PAD_107 : 75 ," &
"MDO0 : 9 ," &
"TCK : 88 ," &
"TMS : 87 ," &
"BCTRL : 69 ," &
"EXTAL : 30 ," &
"XTAL : 29 ," &
"NMI : 1 ," &
"RESET_B : 31 ," &
"VPP_TEST : 107," &
"VDD : (6,21,27,91,97,126) ," &
"VSS : (7,22,28,90,96,127) ," &
"VDD_1V2 : (18,36,93,131) ," &
"VSS_1V2 : (17,35,94,132) ," &
"VDD_REF_ADC0 : 50 ," &
"VSS_REF_ADC0 : 51 ," &
"VDD_REF_ADC1 : 56 ," &
"VSS_REF_ADC1 : 57 ," &
"VDD_VREG : 72 ," &
"VDD_1V2_VREG : 70 ," &
"VSS_1V2_VREG : 71 " ;
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in
-- the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of PAD_21 : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of PAD_20 : signal is true;
-- Specifies the compliance enable patterns for the design. It lists a set of
-- design ports and the values that they should be set to, in order to enable
-- compliance to IEEE Std 1149.1
-- attribute COMPLIANCE_PATTERNS of pictus_top_wrapper: entity is
-- "(VPP_TEST) (0)";
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of pictus_top_wrapper: entity is 5;
-- Specifies the boundary-scan instructions implemented in the design and their
-- opcodes.
attribute INSTRUCTION_OPCODE of pictus_top_wrapper: entity is
"BYPASS (11111)," &
"EXTEST (00100)," &
"SAMPLE (00011)," &
"PRELOAD (00010)," &
"IDCODE (00001)," &
"PRIVATE (00101, 00110, 00111, 01001, 01010, 01011, 01100," &
"10000, 10001, 10010, 10011, 10100, 10101, 10110," &
"10111, 11000, 11001, 11010, 11011, 11100, 11101," &
"11110)";
-- Specifies the bit pattern that is loaded into the instruction register when
-- the TAP controller passes through the Capture-IR state. The standard mandates
-- that the two LSBs must be "01". The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of pictus_top_wrapper: entity is "00001";
-- Specifies the bit pattern that is loaded into the instruction register when
-- the TAP controller passes through the Capture-IR state. The standard mandates
-- that the two LSBs must be "01". The remaining bits are design specific.
attribute INSTRUCTION_PRIVATE of pictus_top_wrapper: entity is
"PRIVATE";
-- Specifies the bit pattern that is loaded into the DEVICE_ID register during
-- the IDCODE instruction when the TAP controller passes through the Capture-DR
-- state.
attribute IDCODE_REGISTER of pictus_top_wrapper: entity is
"0010" &
-- 4-bit version number
"1010111000100001" &
-- 16-bit part number
"00000001110" &
-- 11-bit identity of the manufacturer
"1";
-- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI and TDO for
-- each implemented instruction.
attribute REGISTER_ACCESS of pictus_top_wrapper: entity is
"BYPASS (BYPASS)," &
"BOUNDARY (EXTEST, SAMPLE, PRELOAD)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of pictus_top_wrapper: entity is 190;
-- The following list specifies the characteristics of each cell in the boundary
-- scan register from TDI to TDO. The following is a description of the label
-- fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not have a port
-- name.
-- function: Is the function of the cell as defined by the standard. Is one
-- of input, output2, output3, bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be loaded with
-- for safe operation when the software might otherwise choose a
-- random value.
-- ccell : The control cell number. Specifies the control cell that
-- drives the output enable for this port.
-- disval : Specifies the value that is loaded into the control cell to
-- disable the output enable for the corresponding port.
-- rslt : Resulting state. Shows the state of the driver when it is
-- disabled.
attribute BOUNDARY_REGISTER of pictus_top_wrapper: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"189 (BC_7, PAD_101, bidir, X, 188, 0, Z), " &
"188 (BC_1, *, control, 0), " &
"187 (BC_7, PAD_2, bidir, X, 186, 0, Z), " &
"186 (BC_1, *, control, 0), " &
"185 (BC_7, PAD_103, bidir, X, 184, 0, Z), " &
"184 (BC_1, *, control, 0), " &
"183 (BC_7, PAD_44, bidir, X, 182, 0, Z), " &
"182 (BC_1, *, control, 0), " &
"181 (BC_7, PAD_104, bidir, X, 180, 0, Z), " &
"180 (BC_1, *, control, 0), " &
"179 (BC_7, PAD_43, bidir, X, 178, 0, Z), " &
"178 (BC_1, *, control, 0), " &
"177 (BC_7, PAD_105, bidir, X, 176, 0, Z), " &
"176 (BC_1, *, control, 0), " &
"175 (BC_7, PAD_59, bidir, X, 174, 0, Z), " &
"174 (BC_1, *, control, 0), " &
"173 (BC_7, PAD_106, bidir, X, 172, 0, Z), " &
"172 (BC_1, *, control, 0), " &
"171 (BC_7, PAD_58, bidir, X, 170, 0, Z), " &
"170 (BC_1, *, control, 0), " &
"169 (BC_7, PAD_107, bidir, X, 168, 0, Z), " &
"168 (BC_1, *, control, 0), " &
"167 (BC_7, PAD_1, bidir, X, 166, 0, Z), " &
"166 (BC_1, *, control, 0), " &
"165 (BC_7, PAD_0, bidir, X, 164, 0, Z), " &
"164 (BC_1, *, control, 0), " &
"163 (BC_3, *, internal, X), " &
"162 (BC_3, *, internal, X), " &
"161 (BC_3, *, internal, X), " &
"160 (BC_3, *, internal, X), " &
"159 (BC_3, *, internal, X), " &
"158 (BC_3, *, internal, X), " &
"157 (BC_3, *, internal, X), " &
"156 (BC_3, *, internal, X), " &
"155 (BC_3, *, internal, X), " &
"154 (BC_3, *, internal, X), " &
"153 (BC_3, *, internal, X), " &
"152 (BC_3, *, internal, X), " &
"151 (BC_3, *, internal, X), " &
"150 (BC_3, *, internal, X), " &
"149 (BC_3, *, internal, X), " &
"148 (BC_3, *, internal, X), " &
"147 (BC_3, *, internal, X), " &
"146 (BC_3, *, internal, X), " &
"145 (BC_3, *, internal, X), " &
"144 (BC_3, *, internal, X), " &
"143 (BC_3, *, internal, X), " &
"142 (BC_3, *, internal, X), " &
"141 (BC_3, *, internal, X), " &
"140 (BC_3, *, internal, X), " &
"139 (BC_3, *, internal, X), " &
"138 (BC_3, *, internal, X), " &
"137 (BC_7, PAD_96, bidir, X, 136, 0, Z), " &
"136 (BC_1, *, control, 0), " &
"135 (BC_7, PAD_55, bidir, X, 134, 0, Z), " &
"134 (BC_1, *, control, 0), " &
"133 (BC_7, PAD_54, bidir, X, 132, 0, Z), " &
"132 (BC_1, *, control, 0), " &
"131 (BC_7, PAD_53, bidir, X, 130, 0, Z), " &
"130 (BC_1, *, control, 0), " &
"129 (BC_7, PAD_56, bidir, X, 128, 0, Z), " &
"128 (BC_1, *, control, 0), " &
"127 (BC_7, PAD_57, bidir, X, 126, 0, Z), " &
"126 (BC_1, *, control, 0), " &
"125 (BC_7, PAD_91, bidir, X, 124, 0, Z), " &
"124 (BC_1, *, control, 0), " &
"123 (BC_7, PAD_90, bidir, X, 122, 0, Z), " &
"122 (BC_1, *, control, 0), " &
"121 (BC_7, PAD_89, bidir, X, 120, 0, Z), " &
"120 (BC_1, *, control, 0), " &
"119 (BC_3, *, internal, X), " &
"118 (BC_7, PAD_88, bidir, X, 117, 0, Z), " &
"117 (BC_1, *, control, 0), " &
"116 (BC_7, PAD_87, bidir, X, 115, 0, Z), " &
"115 (BC_1, *, control, 0), " &
"114 (BC_7, PAD_35, bidir, X, 113, 0, Z), " &
"113 (BC_1, *, control, 0), " &
"112 (BC_7, PAD_39, bidir, X, 111, 0, Z), " &
"111 (BC_1, *, control, 0), " &
"110 (BC_7, PAD_5, bidir, X, 109, 0, Z), " &
"109 (BC_1, *, control, 0), " &
"108 (BC_7, PAD_37, bidir, X, 107, 0, Z), " &
"107 (BC_1, *, control, 0), " &
"106 (BC_7, PAD_8, bidir, X, 105, 0, Z), " &
"105 (BC_1, *, control, 0), " &
"104 (BC_7, PAD_36, bidir, X, 103, 0, Z), " &
"103 (BC_1, *, control, 0), " &
"102 (BC_7, PAD_7, bidir, X, 101, 0, Z), " &
"101 (BC_1, *, control, 0), " &
"100 (BC_1, *, internal, X), " &
"99 (BC_1, *, internal, X), " &
"98 (BC_7, PAD_86, bidir, X, 97, 0, Z), " &
"97 (BC_1, *, control, 0), " &
"96 (BC_7, PAD_85, bidir, X, 95, 0, Z), " &
"95 (BC_1, *, control, 0), " &
"94 (BC_7, PAD_84, bidir, X, 93, 0, Z), " &
"93 (BC_1, *, control, 0), " &
"92 (BC_7, PAD_49, bidir, X, 91, 0, Z), " &
"91 (BC_1, *, control, 0), " &
"90 (BC_7, PAD_6, bidir, X, 89, 0, Z), " &
"89 (BC_1, *, control, 0), " &
"88 (BC_3, *, internal, X), " &
"87 (BC_7, PAD_15, bidir, X, 86, 0, Z), " &
"86 (BC_1, *, control, 0), " &
"85 (BC_7, PAD_14, bidir, X, 84, 0, Z), " &
"84 (BC_1, *, control, 0), " &
"83 (BC_7, PAD_38, bidir, X, 82, 0, Z), " &
"82 (BC_1, *, control, 0), " &
"81 (BC_7, PAD_97, bidir, X, 80, 0, Z), " &
"80 (BC_1, *, control, 0), " &
"79 (BC_7, PAD_50, bidir, X, 78, 0, Z), " &
"78 (BC_1, *, control, 0), " &
"77 (BC_7, PAD_83, bidir, X, 76, 0, Z), " &
"76 (BC_1, *, control, 0), " &
"75 (BC_7, PAD_22, bidir, X, 74, 0, Z), " &
"74 (BC_1, *, control, 0), " &
"73 (BC_7, PAD_82, bidir, X, 72, 0, Z), " &
"72 (BC_1, *, control, 0), " &
"71 (BC_7, PAD_13, bidir, X, 70, 0, Z), " &
"70 (BC_1, *, control, 0), " &
"69 (BC_7, PAD_81, bidir, X, 68, 0, Z), " &
"68 (BC_1, *, control, 0), " &
"67 (BC_7, PAD_9, bidir, X, 66, 0, Z), " &
"66 (BC_1, *, control, 0), " &
"65 (BC_7, PAD_80, bidir, X, 64, 0, Z), " &
"64 (BC_1, *, control, 0), " &
"63 (BC_7, PAD_40, bidir, X, 62, 0, Z), " &
"62 (BC_1, *, control, 0), " &
"61 (BC_7, PAD_52, bidir, X, 60, 0, Z), " &
"60 (BC_1, *, control, 0), " &
"59 (BC_7, PAD_51, bidir, X, 58, 0, Z), " &
"58 (BC_1, *, control, 0), " &
"57 (BC_7, PAD_48, bidir, X, 56, 0, Z), " &
"56 (BC_1, *, control, 0), " &
"55 (BC_7, PAD_47, bidir, X, 54, 0, Z), " &
"54 (BC_1, *, control, 0), " &
"53 (BC_7, PAD_41, bidir, X, 52, 0, Z), " &
"52 (BC_1, *, control, 0), " &
"51 (BC_7, PAD_12, bidir, X, 50, 0, Z), " &
"50 (BC_1, *, control, 0), " &
"49 (BC_7, PAD_79, bidir, X, 48, 0, Z), " &
"48 (BC_1, *, control, 0), " &
"47 (BC_7, PAD_11, bidir, X, 46, 0, Z), " &
"46 (BC_1, *, control, 0), " &
"45 (BC_7, PAD_78, bidir, X, 44, 0, Z), " &
"44 (BC_1, *, control, 0), " &
"43 (BC_7, PAD_10, bidir, X, 42, 0, Z), " &
"42 (BC_1, *, control, 0), " &
"41 (BC_7, PAD_77, bidir, X, 40, 0, Z), " &
"40 (BC_1, *, control, 0), " &
"39 (BC_7, PAD_19, bidir, X, 38, 0, Z), " &
"38 (BC_1, *, control, 0), " &
"37 (BC_7, PAD_94, bidir, X, 36, 0, Z), " &
"36 (BC_1, *, control, 0), " &
"35 (BC_7, PAD_18, bidir, X, 34, 0, Z), " &
"34 (BC_1, *, control, 0), " &
"33 (BC_7, PAD_95, bidir, X, 32, 0, Z), " &
"32 (BC_1, *, control, 0), " &
"31 (BC_7, PAD_93, bidir, X, 30, 0, Z), " &
"30 (BC_1, *, control, 0), " &
"29 (BC_7, PAD_42, bidir, X, 28, 0, Z), " &
"28 (BC_1, *, control, 0), " &
"27 (BC_7, PAD_17, bidir, X, 26, 0, Z), " &
"26 (BC_1, *, control, 0), " &
"25 (BC_7, PAD_16, bidir, X, 24, 0, Z), " &
"24 (BC_1, *, control, 0), " &
"23 (BC_7, PAD_4, bidir, X, 22, 0, Z), " &
"22 (BC_1, *, control, 0), " &
"21 (BC_7, PAD_92, bidir, X, 20, 0, Z), " &
"20 (BC_1, *, control, 0), " &
"19 (BC_7, PAD_62, bidir, X, 18, 0, Z), " &
"18 (BC_1, *, control, 0), " &
"17 (BC_7, PAD_99, bidir, X, 16, 0, Z), " &
"16 (BC_1, *, control, 0), " &
"15 (BC_7, PAD_46, bidir, X, 14, 0, Z), " &
"14 (BC_1, *, control, 0), " &
"13 (BC_7, PAD_98, bidir, X, 12, 0, Z), " &
"12 (BC_1, *, control, 0), " &
"11 (BC_7, PAD_45, bidir, X, 10, 0, Z), " &
"10 (BC_1, *, control, 0), " &
"9 (BC_7, PAD_100, bidir, X, 8, 0, Z), " &
"8 (BC_1, *, control, 0), " &
"7 (BC_7, PAD_60, bidir, X, 6, 0, Z), " &
"6 (BC_1, *, control, 0), " &
"5 (BC_7, PAD_102, bidir, X, 4, 0, Z), " &
"4 (BC_1, *, control, 0), " &
"3 (BC_7, PAD_61, bidir, X, 2, 0, Z), " &
"2 (BC_1, *, control, 0), " &
"1 (BC_7, PAD_3, bidir, X, 0, 0, Z), " &
"0 (BC_1, *, control, 0) ";
end pictus_top_wrapper;
