--*******************************************************************************************************
--** Copyright (c) 2002 Cypress Semiconductor
--** All rights reserved.
--**
--** File Name: 1487v33x72.bsdl
--** Release: 1.0
--** Last Updated: May 24, 2004:
--** Note:Newly Created
--**
--** Function: 1M x 72 Flow Through Sync SRAM, BSDL file for JTAG
--** Part #: CY7C1487v33
--**
--** Notes: CY7C1487v33 device is not IEEE 1149.1 compliant.
--**
--**
--** Ref CY7C1487v Datasheet at www.cypress.com/--**
--*******************************************************************************************************
entity CY7C1487v33x72 is
generic (PHYSICAL_PIN_MAP : string := "BGA");
port (
A: in bit_vector(0 to 19);
ADV_b: in bit;
BWS_A_b: in bit;
BWS_B_b: in bit;
BWS_C_b: in bit;
BWS_D_b: in bit;
BWS_E_b: in bit;
BWS_F_b: in bit;
BWS_G_b: in bit;
BWS_H_b: in bit;
CE1_b: in bit;
CE2: in bit;
CE3_b: in bit;
CLK: in bit;
DP_A: in bit;
DP_B: in bit;
DP_C: in bit;
DP_D: in bit;
DP_E: in bit;
DP_F: in bit;
DP_G: in bit;
DP_H: in bit;
DQ_A: in bit_vector(0 to 7);
DQ_B: in bit_vector(0 to 7);
DQ_C: in bit_vector(0 to 7);
DQ_D: in bit_vector(0 to 7);
DQ_E: in bit_vector(0 to 7);
DQ_F: in bit_vector(0 to 7);
DQ_G: in bit_vector(0 to 7);
DQ_H: in bit_vector(0 to 7);
OE_b: in bit;
MODE: in bit;
BWE_b: in bit;
GW_b: in bit;
ADSP_b: in bit;
ADSC_b: in bit;
TMS: in bit;
TDI: in bit;
TCK: in bit;
TDO: out bit;
ZZ: in bit;
VSSQ: linkage bit;
VDD: linkage bit_vector(0 to 13);
VSS: linkage bit_vector(0 to 29);
VDDQ: linkage bit_vector(0 to 23);
NC: linkage bit_vector(0 to 23)
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of CY7C1487v33x72 : entity is
"STD_1149_1_1993";
attribute PIN_MAP of CY7C1487v33x72 : entity is PHYSICAL_PIN_MAP;
constant BGA:PIN_MAP_STRING:=
"A: (W6,V6,V3,V4,U4,W5,U3,U9,V5,U5,U6,W7,V7,U7,V8,V9, " &
"A9,U8,B7,A3), " & --Address
"ADV_b: A7, " &
"BWS_A_b: C9, " &
"BWS_B_b: B8, " &
"BWS_C_b: B3, " &
"BWS_D_b: C4, " &
"BWS_E_b: C8, " &
"BWS_F_b: B9, " &
"BWS_G_b: B4, " &
"BWS_H_b: C3, " & --BYTE WRITE
"CE1_b: C6, " &
"CE2: A4, " &
"CE3_b: A8, " &
"CLK: K3, " & -- Clock
"DP_A: R10, " &
"DP_B: E11, " &
"DP_C: E2, " &
"DP_D: R1, " &
"DP_E: R11, " &
"DP_F: E10, " &
"DP_G: E1, " &
"DP_H: R2, " &
"DQ_A: (P11,P10,N11,N10,M11,M10,L11,L10), " &
"DQ_B: (D11,D10,C11,C10,B11,B10,A11,A10), " &
"DQ_C: (F1,F2,G1,G2,H1,H2,J1,J2), " &
"DQ_D: (T1,T2,U1,U2,V1,V2,W1,W2), " &
"DQ_E: (W11,W10,V11,V10,U11,U10,T11,T10), " &
"DQ_F: (J11,J10,H11,H10,G11,G10,F11,F10), " &
"DQ_G: (A1,A2,B1,B2,C1,C2,D1,D2), " &
"DQ_H: (L1,L2,M1,M2,N1,N2,P1,P2), " &
"BWE_b: B6, " &
"GW_b: D7, " &
"OE_b: D6, " &
"MODE: T6, " &
"TMS: W3, " &
"TDI: W4, " &
"TCK: W9, " &
"TDO: W8, " &
"ADSP_b: A5, " &
"ADSC_b: A6, " &
"ZZ: P6, "&
"VSSQ: H9, "&
"VDD: (E5,E6,E7,G5,G7,J5,J7,L5,L7, " &
" N5,N7,R5,R6,R7), " &
"VDDQ: (E3,E4,E8,E9,G3,G4,G8,G9,J3,J4,J8,J9, " &
" L3,L4,L8,L9,N3,N4,N8,N9,R3,R4,R8,R9), " &
"VSS: (D3,D9,F3,F4,F5,F7,F8,F9,H3,H4,H5,H7, " &
" H8,K5,K6,K7,M3,M4,M5,M7,M8,M9,P3,P4,P5,P7, " &
" P8,P9,T3,T9), " &
"NC: (B5,C5,C7,D4,D5,D8,F6,G6,H6,J6,K1, " &
" K2,K4,K8,K9,K10,K11,L6,M6,N6,T4,T5,T7,T8) ";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH);
attribute INSTRUCTION_LENGTH of CY7C1487v33x72 : entity is 3;
attribute INSTRUCTION_OPCODE of CY7C1487v33x72 : entity is
"EXTEST (000)," &
"IDCODE (001)," &
"SAMPLE (010)," & -- Sample-Z
"SAMPLD (100)," & -- Sample/Preload
"BYPASS (111) ";
attribute INSTRUCTION_CAPTURE of CY7C1487v33x72: entity is "001";
attribute IDCODE_REGISTER of CY7C1487v33x72 : entity is
"000" & -- version number
"01011000001110100" & -- Defines depth and width
"00000110100" & -- Manufacturer identity
"1"; -- ID register Presence indicator
attribute REGISTER_ACCESS of CY7C1487v33x72 : entity is
"BOUNDARY (EXTEST,SAMPLE,SAMPLD)," &
"BYPASS (BYPASS)";
attribute BOUNDARY_LENGTH of CY7C1487v33x72 : entity is 112;
attribute BOUNDARY_REGISTER of CY7C1487v33x72 : entity is
"0 (BC_4, DQ_G(0), input, X)," &
"1 (BC_4, DQ_G(1), input, X)," &
"2 (BC_4, DQ_G(2), input, X)," &
"3 (BC_4, DQ_G(3), input, X)," &
"4 (BC_4, DQ_G(4), input, X)," &
"5 (BC_4, DQ_G(5), input, X)," &
"6 (BC_4, DQ_G(6), input, X)," &
"7 (BC_4, DQ_G(7), input, X)," &
"8 (BC_4, DP_G, input, X)," &
"9 (BC_4, DP_C, input, X)," &
"10 (BC_4, DQ_C(0), input, X)," &
"11 (BC_4, DQ_C(1), input, X)," &
"12 (BC_4, DQ_C(2), input, X)," &
"13 (BC_4, DQ_C(3), input, X)," &
"14 (BC_4, DQ_C(4), input, X)," &
"15 (BC_4, DQ_C(5), input, X)," &
"16 (BC_4, DQ_C(6), input, X)," &
"17 (BC_4, DQ_C(7), input, X)," &
"18 (BC_4, DQ_H(0), input, X)," &
"19 (BC_4, DQ_H(1), input, X)," &
"20 (BC_4, DQ_H(2), input, X)," &
"21 (BC_4, DQ_H(3), input, X)," &
"22 (BC_4, DQ_H(4), input, X)," &
"23 (BC_4, DQ_H(5), input, X)," &
"24 (BC_4, DQ_H(6), input, X)," &
"25 (BC_4, DQ_H(7), input, X)," &
"26 (BC_4, DP_H, input, X)," &
"27 (BC_4, DP_D, input, X)," &
"28 (BC_4, DQ_D(0), input, X)," &
"29 (BC_4, DQ_D(1), input, X)," &
"30 (BC_4, DQ_D(2), input, X)," &
"31 (BC_4, DQ_D(3), input, X)," &
"32 (BC_4, DQ_D(4), input, X)," &
"33 (BC_4, DQ_D(5), input, X)," &
"34 (BC_4, DQ_D(6), input, X)," &
"35 (BC_4, DQ_D(7), input, X)," &
"36 (BC_4, Mode, input, X)," &
"37 (BC_4, A(2), input, X)," &
"38 (BC_4, A(3), input, X)," &
"39 (BC_4, A(4), input, X)," &
"40 (BC_4, A(5), input, X)," &
"41 (BC_4, A(1), input, X)," &
"42 (BC_4, A(0), input, X)," &
"43 (BC_4, A(6), input, X)," &
"44 (BC_4, A(7), input, X)," &
"45 (BC_4, A(8), input, X)," &
"46 (BC_4, A(9), input, X)," &
"47 (BC_4, A(10), input, X)," &
"48 (BC_4, A(11), input, X)," &
"49 (BC_4, A(12), input, X)," &
"50 (BC_4, A(13), input, X)," &
"51 (BC_4, A(14), input, X)," &
"52 (BC_4, A(15), input, X)," &
"53 (BC_4, DQ_E(0), input, X)," &
"54 (BC_4, DQ_E(1), input, X)," &
"55 (BC_4, DQ_E(2), input, X)," &
"56 (BC_4, DQ_E(3), input, X)," &
"57 (BC_4, DQ_E(4), input, X)," &
"58 (BC_4, DQ_E(5), input, X)," &
"59 (BC_4, DQ_E(6), input, X)," &
"60 (BC_4, DQ_E(7), input, X)," &
"61 (BC_4, DP_E, input, X)," &
"62 (BC_4, DP_A, input, X)," &
"63 (BC_4, DQ_A(0), input, X)," &
"64 (BC_4, DQ_A(1), input, X)," &
"65 (BC_4, DQ_A(2), input, X)," &
"66 (BC_4, DQ_A(3), input, X)," &
"67 (BC_4, DQ_A(4), input, X)," &
"68 (BC_4, DQ_A(5), input, X)," &
"69 (BC_4, DQ_A(6), input, X)," &
"70 (BC_4, DQ_A(7), input, X)," &
"71 (BC_4, ZZ, input, X)," &
"72 (BC_4, DQ_F(0), input, X)," &
"73 (BC_4, DQ_F(1), input, X)," &
"74 (BC_4, DQ_F(2), input, X)," &
"75 (BC_4, DQ_F(3), input, X)," &
"76 (BC_4, DQ_F(4), input, X)," &
"77 (BC_4, DQ_F(5), input, X)," &
"78 (BC_4, DQ_F(6), input, X)," &
"79 (BC_4, DQ_F(7), input, X)," &
"80 (BC_4, DP_F, input, X)," &
"81 (BC_4, DP_B, input, X)," &
"82 (BC_4, DQ_B(0), input, X)," &
"83 (BC_4, DQ_B(1), input, X)," &
"84 (BC_4, DQ_B(2), input, X)," &
"85 (BC_4, DQ_B(3), input, X)," &
"86 (BC_4, DQ_B(4), input, X)," &
"87 (BC_4, DQ_B(5), input, X)," &
"88 (BC_4, DQ_B(6), input, X)," &
"89 (BC_4, DQ_B(7), input, X)," &
"90 (BC_4, A(16), input, X)," &
"91 (BC_4, A(17), input, X)," &
"92 (BC_4, ADV_b, input, X)," &
"93 (BC_4, ADSP_b, input, X)," &
"94 (BC_4, ADSC_b, input, X)," &
"95 (BC_4, OE_b, input, X)," &
"96 (BC_4, BWE_b, input, X)," &
"97 (BC_4, GW_b, input, X)," &
"98 (BC_4, CLK, input, X)," &
"99 (BC_4, CE3_b, input, X)," &
"100 (BC_4, BWS_G_b, input, X)," &
"101 (BC_4, BWS_C_b, input, X)," &
"102 (BC_4, BWS_H_b, input, X)," &
"103 (BC_4, BWS_D_b, input, X)," &
"104 (BC_4, BWS_E_b, input, X)," &
"105 (BC_4, BWS_A_b, input, X)," &
"106 (BC_4, BWS_F_b, input, X)," &
"107 (BC_4, BWS_B_b, input, X)," &
"108 (BC_4, CE2, input, X)," &
"109 (BC_4, CE1_b, input, X)," &
"110 (BC_4, A(18), input, X)," &
"111 (BC_4, A(19), input, X)" ;
end CY7C1487v33x72;