This BSDL contains syntax errors!
-------------------------------------------------------------------------------
--
-- File Type: BSDL description for top level entity TMS320C6201
-- Date Created: Mon Apr 7 17:35:15 1997
-- Tool Version: BSDArchitect v8.5_4.3 Wed Oct 30 06:18:53 PST 1996
--
-- Manual changes by F. Walzer 11/97
-- now runs through the ASSET translator
-- no physical checks so far
--
-- More manual changes by A. Ley Dec 5 1997
-- Syntax and semantics verified against HP BSDL server
-- ( for info, see http://HPBScanCentral.invision1.com/ )
-- Still no physical checks have been made.
--
-- Further manual changes by A. Ley Jun 16 1997
-- [ add compliance enable ]
--
-------------------------------------------------------------------------------
entity TMS320C6201 is
generic(PHYSICAL_PIN_MAP : string := "GJL");
port (CLKIN : in bit;
CLKOUT1 : out bit;
CLKOUT2 : out bit;
CLKMODE0 : in bit;
CLKMODE1 : in bit;
PLLFREQ3 : in bit;
PLLFREQ2 : in bit;
PLLFREQ1 : in bit;
RSV2 : in bit;
PLLV : linkage bit;
PLLG : linkage bit;
PLLF : linkage bit;
RSV5 : linkage bit;
PMC : linkage bit;
RSV4 : in bit;
BOOTMODE4 : in bit;
BOOTMODE3 : in bit;
BOOTMODE2 : in bit;
BOOTMODE1 : in bit;
BOOTMODE0 : in bit;
TMS : in bit;
TDO : out bit;
TDI : in bit;
TCK : in bit;
TRST_NEG : in bit;
EMU0 : in bit; -- must be type in for compliance enable
-- non-JTAG type is inout
EMU1 : in bit; -- must be type in for compliance enable
-- non-JTAG type is inout
RSV0 : in bit;
RSV1 : in bit;
RSV3 : in bit;
RESET_NEG : in bit;
NMI : in bit;
EXT_INT7 : in bit;
EXT_INT6 : in bit;
EXT_INT5 : in bit;
EXT_INT4 : in bit;
IACK : out bit;
INUM3 : out bit;
INUM2 : out bit;
INUM1 : out bit;
INUM0 : out bit;
LENDIAN : in bit;
PD_NEG : out bit;
DMAC3 : out bit;
DMAC2 : out bit;
DMAC1 : out bit;
DMAC0 : out bit;
HINT_NEG : out bit;
HCNTRL1 : in bit;
HCNTRL0 : in bit;
HHWIL : in bit;
HBE1_NEG : in bit;
HBE0_NEG : in bit;
HRW_NEG : in bit;
HD : inout bit_vector(0 to 15);
HAS_NEG : in bit;
HCS_NEG : in bit;
HDS1_NEG : in bit;
HDS2_NEG : in bit;
HRDY_NEG : out bit;
CE3_NEG : out bit;
CE2_NEG : out bit;
CE1_NEG : out bit;
CE0_NEG : out bit;
BE3_NEG : out bit;
BE2_NEG : out bit;
BE1_NEG : out bit;
BE0_NEG : out bit;
EA : out bit_vector(2 to 21);
ED : inout bit_vector(0 to 31);
ARE_NEG : out bit;
ARDY : in bit;
AOE_NEG : out bit;
AWE_NEG : out bit;
SSADS_NEG : out bit;
SSOE_NEG : out bit;
SSWE_NEG : out bit;
SSCLK : out bit;
SDA10 : out bit;
SDRAS_NEG : out bit;
SDCAS_NEG : out bit;
SDWE_NEG : out bit;
SDCLK : out bit;
HOLD_NEG : in bit;
HOLDA_NEG : out bit;
TOUT1 : out bit;
TINP1 : in bit;
TOUT0 : out bit;
TINP0 : in bit;
CLKS1 : in bit;
CLKR1 : inout bit;
CLKX1 : inout bit;
DR1 : in bit;
DX1 : out bit;
FSR1 : inout bit;
FSX1 : inout bit;
CLKS0 : in bit;
CLKR0 : inout bit;
CLKX0 : inout bit;
DR0 : in bit;
DX0 : out bit;
FSR0 : inout bit;
FSX0 : inout bit;
RSV6 : in bit;
RSV7 : in bit;
RSV8 : in bit;
NC : linkage bit_vector(1 to 12);
VDD3V : linkage bit_vector(1 to 40);
VDD2V : linkage bit_vector(1 to 56);
GND : linkage bit_vector(1 to 76));
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of TMS320C6201 : entity is "STD_1149_1_1993";
attribute PIN_MAP of TMS320C6201 : entity is PHYSICAL_PIN_MAP;
constant GJL : PIN_MAP_STRING :=
"CLKIN : B9 ,"&
"CLKOUT1 : AC18,"&
"CLKOUT2 : AC16,"&
"CLKMODE1 : D8 ,"&
"CLKMODE0 : C7 ,"&
"PLLFREQ3 : A9 ,"&
"PLLFREQ2 : D11 ,"&
"PLLFREQ1 : B10 ,"&
"RSV2 : C11 ,"&
"PLLV : B11 ,"&
"PLLG : C12 ,"&
"PLLF : D12 ,"&
"RSV5 : A7 ,"&
"RSV4 : D9 ,"&
"BOOTMODE4 : C8 ,"&
"BOOTMODE3 : B6 ,"&
"BOOTMODE2 : D7 ,"&
"BOOTMODE1 : C6 ,"&
"BOOTMODE0 : B5 ,"&
"TMS : L3 ,"&
"TDO : U4 ,"&
"TDI : T2 ,"&
"TCK : R3 ,"&
"TRST_NEG : R4 ,"&
"EMU1 : V3 ,"&
"EMU0 : W2 ,"&
"RSV0 : T3 ,"&
"RSV1 : F1 ,"&
"RSV3 : D10 ,"&
"RESET_NEG : K2 ,"&
"NMI : L2 ,"&
"EXT_INT7 : U2 ,"&
"EXT_INT6 : T4 ,"&
"EXT_INT5 : V1 ,"&
"EXT_INT4 : V2 ,"&
"IACK : Y1 ,"&
"INUM3 : V4 ,"&
"INUM2 : Y2 ,"&
"INUM1 : AA1 ,"&
"INUM0 : W4 ,"&
"LENDIAN : G2 ,"&
"PD_NEG : E2 ,"&
"DMAC3 : E1 ,"&
"DMAC2 : F2 ,"&
"DMAC1 : G3 ,"&
"DMAC0 : H4 ,"&
"HINT_NEG : J26 ,"&
"HCNTRL1 : G24 ,"&
"HCNTRL0 : F25 ,"&
"HHWIL : E26 ,"&
"HBE1_NEG : F24 ,"&
"HBE0_NEG : E25 ,"&
"HRW_NEG : B22 ,"&
"HD :(A20 ,C18 ,D17 ,B18 ,A18 ,D16 ,B17 ,C16 ,"&
"B16 ,D15 ,C15 ,B15 ,D14 ,C13 ,D13 ,A12 ),"&
"HAS_NEG : C20 ,"&
"HCS_NEG : B21 ,"&
"HDS1_NEG : C21 ,"&
"HDS2_NEG : D20 ,"&
"HRDY_NEG : J25 ,"&
"CE3_NEG : AD20,"&
"CE2_NEG : AA24,"&
"CE1_NEG : AB26,"&
"CE0_NEG : AA25,"&
"BE3_NEG : Y24 ,"&
"BE2_NEG : W23 ,"&
"BE1_NEG : AA26,"&
"BE0_NEG : W25 ,"&
"EA :(V24 ,U23 ,V25 ,V26 ,T23 ,U25 ,T24 ,T25 ,"&
"R23 ,R24 ,R25 ,P23 ,P24 ,N23 ,M24 ,M25 ,"&
"M23 ,L25 ,L24 ,K25 ),"&
"ED :(AD16,AE16,AD15,AE15,AC14,AD14,AC13 ,AE12,"&
"AD12,AC12,AE11,AD11,AE10,AC11 ,AF9 ,AE9 ,"&
"AC10 ,AD9 ,AF7 ,AC9 ,AD8 ,AC8 ,AD7 ,AE6 ,"&
"AC7 ,AD6 ,AE5 ,AB2 ,AA3 ,AB1 ,AA2 ,Y3 ),"&
"ARE_NEG : V23 ,"&
"ARDY : Y26 ,"&
"AOE_NEG : AB25,"&
"AWE_NEG : AE22,"&
"SSADS_NEG : AD19,"&
"SSOE_NEG : AD18,"&
"SSWE_NEG : AF18,"&
"SSCLK : AC15,"&
"SDA10 : AC19,"&
"SDRAS_NEG : AD21,"&
"SDCAS_NEG : AC20,"&
"SDWE_NEG : AE21,"&
"SDCLK : AC17,"&
"HOLD_NEG : Y25 ,"&
"HOLDA_NEG : C9 ,"&
"TOUT1 : K23 ,"&
"TINP1 : L23 ,"&
"TOUT0 : M4 ,"&
"TINP0 : H2 ,"&
"CLKS1 : F26 ,"&
"CLKR1 : H25 ,"&
"CLKX1 : J24 ,"&
"DR1 : H23 ,"&
"DX1 : G25 ,"&
"FSR1 : J23 ,"&
"FSX1 : G26 ,"&
"CLKS0 : L4 ,"&
"CLKR0 : M2 ,"&
"CLKX0 : M3 ,"&
"DR0 : J1 ,"&
"DX0 : P4 ,"&
"FSR0 : N3 ,"&
"FSX0 : N4 ,"&
"RSV6 : D18 ,"&
"RSV7 : C19 ,"&
"RSV8 : D19 ,"&
"NC :(AF20,AE18,AE17,J4 ,J3 ,G1 ,K4 ,J2 ,R2 ),"&
"VDD3V :(A5 ,A11 ,A16 ,A22 ,B7 ,B8 ,B19 ,B20 ,C10 ,C14 ,"&
"C17 ,G4 ,G23 ,H3 ,H24 ,K3 ,K24 ,L1 ,L26 ,N24 ,"&
"P3 ,T1 ,T26 ,U3 ,U24 ,W3 ,W24 ,Y4 ,Y23 ,AD10,"&
"AD13,AD17,AE7 ,AE8 ,AE19,AE20,AF5 ,AF11,AF16,AF22),"&
"VDD2V :(A1 ,A2 ,A3 ,A24 ,A25 ,A26 ,B1 ,B2 ,B3 ,B24 ,"&
"B25 ,B26 ,C1 ,C2 ,C3 ,C4 ,C23 ,C24 ,C25 ,C26 ,"&
"D3 ,D4 ,D5 ,D22 ,D23 ,D24 ,E4 ,E23 ,AB4 ,AB23,"&
"AC3 ,AC4 ,AC5 ,AC22,AC23,AC24,AD1 ,AD2 ,AD3 ,AD4 ,"&
"AD23,AD24,AD25,AD26,AE1 ,AE2 ,AE3 ,AE24,AE25,AE26,"&
"AF1 ,AF2 ,AF3 ,AF24,AF25,AF26),"&
"GND :(A4 ,A6 ,A8 ,A10 ,A13 ,A14 ,A15 ,A17 ,A19 ,A21 ,"&
"A23 ,B4 ,B12 ,B13 ,B14 ,B23 ,C5 ,C22 ,D1 ,D2 ,"&
"D6 ,D21 ,D25 ,D26 ,E3 ,E24 ,F4 ,F23 ,H1 ,H26 ,"&
"K1 ,K26 ,M1 ,M26 ,N1 ,N2 ,N25 ,N26 ,P1 ,P2 ,"&
"P25 ,P26 ,R1 ,R26 ,U1 ,U26 ,W1 ,W26 ,AA4 ,AA23,"&
"AB3 ,AB24,AC1 ,AC2 ,AC6 ,AC21,AC25,AC26,AD5 ,AD22,"&
"AE4 ,AE13,AE14,AE23,AF4 ,AF6 ,AF8 ,AF10,AF12,AF13,"&
"AF14,AF15,AF17,AF19,AF21,AF23 )";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (20.0e6,BOTH);
attribute TAP_SCAN_RESET of TRST_NEG : signal is true;
attribute COMPLIANCE_PATTERNS of TMS320C6201 : entity is "(EMU1,EMU0)(00)";
attribute INSTRUCTION_LENGTH of TMS320C6201 : entity is 4;
attribute INSTRUCTION_OPCODE of TMS320C6201 : entity is
"idcode (0100),"&
"int_scan (0111),"&
"extest (0000),"&
"sample (0001),"&
"bypass (1111)";
attribute INSTRUCTION_CAPTURE of TMS320C6201 : entity is "0001";
attribute IDCODE_REGISTER of TMS320C6201 : entity is
"00110000000001000100000000101111";
attribute REGISTER_ACCESS of TMS320C6201 : entity is
"INTSCAN_REG[1] (int_scan)";
-- NOTE: Dummy value is used for register length.
attribute BOUNDARY_LENGTH of TMS320C6201 : entity is 247;
attribute BOUNDARY_REGISTER of TMS320C6201 : entity is
-- num cell port function safe ccell disval rslt
"0 (BC_1, * , internal,X),"&
"1 (BC_4, RSV0 , input , X),"&
"2 (BC_4, EXT_INT7 , input , X),"&
"3 (BC_4, EXT_INT6 , input , X),"&
"4 (BC_4, EXT_INT5 , input , X),"&
"5 (BC_4, EXT_INT4 , input , X),"&
"6 (BC_1, * , internal, 1),"& -- control for EMU1
"7 (BC_1, * , internal, X),"& -- EMU1 input
"8 (BC_1, * , internal, X),"& --,6, 1, Z),"& -- EMU1 output3
"9 (BC_1, * , internal, 1),"& -- control for EMU0
"10 (BC_1, * , internal, X),"& -- EMU0 input
"11 (BC_1, * , internal, X),"& --,9, 1, Z),"& -- EMU0 output3
"12 (BC_1, * , control, 1),"&
"13 (BC_1, IACK , output3, X, 14, 1, Z),"&
"14 (BC_1, * , control, 1),"&
"15 (BC_1, INUM3 , output3, X, 12, 1, Z),"&
"16 (BC_1, INUM2 , output3, X, 12, 1, Z),"&
"17 (BC_1, INUM1 , output3, X, 12, 1, Z),"&
"18 (BC_1, INUM0 , output3, X, 12, 1, Z),"&
"19 (BC_1, ED(31) , input , X),"&
"20 (BC_1, ED(31) , output3, X, 25, 1, Z),"&
"21 (BC_1, ED(30) , input , X),"&
"22 (BC_1, ED(30) , output3, X, 25, 1, Z),"&
"23 (BC_1, ED(29) , input , X),"&
"24 (BC_1, ED(29) , output3, X, 25, 1, Z),"&
"25 (BC_1, * , control, 1),"&
"26 (BC_1, ED(28) , input , X),"&
"27 (BC_1, ED(28) , output3, X, 25, 1, Z),"&
"28 (BC_1, ED(27) , input , X),"&
"29 (BC_1, ED(27) , output3, X, 25, 1, Z),"&
"30 (BC_1, ED(26) , input , X),"&
"31 (BC_1, ED(26) , output3, X, 42, 1, Z),"&
"32 (BC_1, ED(25) , input , X),"&
"33 (BC_1, ED(25) , output3, X, 42, 1, Z),"&
"34 (BC_1, ED(24) , input , X),"&
"35 (BC_1, ED(24) , output3, X, 42, 1, Z),"&
"36 (BC_1, ED(23) , input , X),"&
"37 (BC_1, ED(23) , output3, X, 42, 1, Z),"&
"38 (BC_1, ED(22) , input , X),"&
"39 (BC_1, ED(22) , output3, X, 42, 1, Z),"&
"40 (BC_1, ED(21) , input , X),"&
"41 (BC_1, ED(21) , output3, X, 42, 1, Z),"&
"42 (BC_1, * , control, 1),"&
"43 (BC_1, ED(20) , input , X),"&
"44 (BC_1, ED(20) , output3, X, 42, 1, Z),"&
"45 (BC_1, ED(19) , input , X),"&
"46 (BC_1, ED(19) , output3, X, 42, 1, Z),"&
"47 (BC_1, ED(18) , input , X),"&
"48 (BC_1, ED(18) , output3, X, 42, 1, Z),"&
"49 (BC_1, ED(17) , input , X),"&
"50 (BC_1, ED(17) , output3, X, 42, 1, Z),"&
"51 (BC_1, ED(16) , input , X),"&
"52 (BC_1, ED(16) , output3, X, 42, 1, Z),"&
"53 (BC_1, ED(15) , input , X),"&
"54 (BC_1, ED(15) , output3, X, 42, 1, Z),"&
"55 (BC_1, ED(14) , input , X),"&
"56 (BC_1, ED(14) , output3, X, 42, 1, Z),"&
"57 (BC_1, ED(13) , input , X),"&
"58 (BC_1, ED(13) , output3, X, 71, 1, Z),"&
"59 (BC_1, ED(12) , input , X),"&
"60 (BC_1, ED(12) , output3, X, 71, 1, Z),"&
"61 (BC_1, ED(11) , input , X),"&
"62 (BC_1, ED(11) , output3, X, 71, 1, Z),"&
"63 (BC_1, ED(10) , input , X),"&
"64 (BC_1, ED(10) , output3, X, 71, 1, Z),"&
"65 (BC_1, ED(09) , input , X),"&
"66 (BC_1, ED(09) , output3, X, 71, 1, Z),"&
"67 (BC_1, ED(08) , input , X),"&
"68 (BC_1, ED(08) , output3, X, 71, 1, Z),"&
"69 (BC_1, ED(07) , input , X),"&
"70 (BC_1, ED(07) , output3, X, 71, 1, Z),"&
"71 (BC_1, * , control, 1),"&
"72 (BC_1, ED(06) , input , X),"&
"73 (BC_1, ED(06) , output3, X, 71, 1, Z),"&
"74 (BC_1, ED(05) , input , X),"&
"75 (BC_1, ED(05) , output3, X, 71, 1, Z),"&
"76 (BC_1, ED(04) , input , X),"&
"77 (BC_1, ED(04) , output3, X, 71, 1, Z),"&
"78 (BC_1, ED(03) , input , X),"&
"79 (BC_1, ED(03) , output3, X, 71, 1, Z),"&
"80 (BC_1, ED(02) , input , X),"&
"81 (BC_1, ED(02) , output3, X, 71, 1, Z),"&
"82 (BC_1, SSCLK , output3, X, 88, 1, Z),"&
"83 (BC_1, ED(01) , input , X),"&
"84 (BC_1, ED(01) , output3, X, 71, 1, Z),"&
"85 (BC_1, ED(00) , input , X),"&
"86 (BC_1, ED(00) , output3, X, 71, 1, Z),"&
"87 (BC_1, * , internal,X),"&
"88 (BC_1, * , control, 1),"&
"89 (BC_1, CLKOUT2 , output3, X, 88, 1, Z),"&
"90 (BC_1, SSWE_NEG , output3, X, 102, 1, Z),"&
"91 (BC_1, SDCLK , output3, X, 88, 1, Z),"&
"92 (BC_1, SSOE_NEG , output3, X, 102, 1, Z),"&
"93 (BC_1, CLKOUT1 , output3, X, 88, 1, Z),"&
"94 (BC_1, SSADS_NEG, output3, X, 102, 1, Z),"&
"95 (BC_1, SDA10 , output3, X, 102, 1, Z),"&
"96 (BC_1, CE3_NEG , output3, X, 102, 1, Z),"&
"97 (BC_1, SDWE_NEG , output3, X, 102, 1, Z),"&
"98 (BC_1, SDCAS_NEG, output3, X, 102, 1, Z),"&
"99 (BC_1, SDRAS_NEG, output3, X, 102, 1, Z),"&
"100 (BC_1, AWE_NEG , output3, X, 102, 1, Z),"&
"101 (BC_1, AOE_NEG , output3, X, 102, 1, Z),"&
"102 (BC_1, * , control, 1),"&
"103 (BC_1, CE2_NEG , output3, X, 102, 1, Z),"&
"104 (BC_1, CE1_NEG , output3, X, 102, 1, Z),"&
"105 (BC_1, CE0_NEG , output3, X, 102, 1, Z),"&
"106 (BC_1, BE3_NEG , output3, X, 102, 1, Z),"&
"107 (BC_1, BE2_NEG , output3, X, 102, 1, Z),"&
"108 (BC_1, BE1_NEG , output3, X, 102, 1, Z),"&
"109 (BC_1, HOLD_NEG , input , X),"&
"110 (BC_1, ARE_NEG , output3, X, 102, 1, Z),"&
"111 (BC_1, ARDY , input , X),"&
"112 (BC_1, BE0_NEG , output3, X, 102, 1, Z),"&
"113 (BC_1, EA(02) , output3, X, 118, 1, Z),"&
"114 (BC_1, EA(03) , output3, X, 118, 1, Z),"&
"115 (BC_1, EA(04) , output3, X, 118, 1, Z),"&
"116 (BC_1, EA(05) , output3, X, 118, 1, Z),"&
"117 (BC_1, EA(06) , output3, X, 118, 1, Z),"&
"118 (BC_1, * , control, 1),"&
"119 (BC_1, EA(07) , output3, X, 118, 1, Z),"&
"120 (BC_1, EA(08) , output3, X, 118, 1, Z),"&
"121 (BC_1, EA(09) , output3, X, 118, 1, Z),"&
"122 (BC_1, EA(10) , output3, X, 118, 1, Z),"&
"123 (BC_1, EA(11) , output3, X, 118, 1, Z),"&
"124 (BC_1, EA(12) , output3, X, 129, 1, Z),"&
"125 (BC_1, EA(13) , output3, X, 129, 1, Z),"&
"126 (BC_1, EA(14) , output3, X, 129, 1, Z),"&
"127 (BC_1, EA(15) , output3, X, 129, 1, Z),"&
"128 (BC_1, EA(17) , output3, X, 129, 1, Z),"&
"129 (BC_1, * , control, 1),"&
"130 (BC_1, EA(16) , output3, X, 129, 1, Z),"&
"131 (BC_1, EA(18) , output3, X, 129, 1, Z),"&
"132 (BC_1, EA(19) , output3, X, 129, 1, Z),"&
"133 (BC_1, EA(20) , output3, X, 129, 1, Z),"&
"134 (BC_1, EA(21) , output3, X, 129, 1, Z),"&
"135 (BC_1, TINP1 , input , X),"&
"136 (BC_1, HINT_NEG , output3, X, 137, 1, Z),"&
"137 (BC_1, * , control, 1),"&
"138 (BC_1, HRDY_NEG , output3, X, 137, 1, Z),"&
"139 (BC_1, * , control, 1),"&
"140 (BC_1, TOUT1 , output3, X, 139, 1, Z),"&
"141 (BC_1, CLKX1 , input , X),"&
"142 (BC_1, CLKX1 , output3, X, 143, 1, Z),"&
"143 (BC_1, * , control, 1),"&
"144 (BC_1, CLKR1 , input , X),"&
"145 (BC_1, CLKR1 , output3, X, 146, 1, Z),"&
"146 (BC_1, * , control, 1),"&
"147 (BC_1, FSX1 , input , X),"&
"148 (BC_1, FSX1 , output3, X, 149, 1, Z),"&
"149 (BC_1, * , control, 1),"&
"150 (BC_1, FSR1 , input , X),"&
"151 (BC_1, FSR1 , output3, X, 152, 1, Z),"&
"152 (BC_1, * , control, 1),"&
"153 (BC_1, DX1 , output3, X, 154, 1, Z),"&
"154 (BC_1, * , control, 1),"&
"155 (BC_1, CLKS1 , input , X),"&
"156 (BC_1, DR1 , input , X),"&
"157 (BC_1, HCNTRL1 , input , X),"&
"158 (BC_1, HCNTRL0 , input , X),"&
"159 (BC_1, HHWIL , input , X),"&
"160 (BC_1, HBE1_NEG , input , X),"&
"161 (BC_1, HBE0_NEG , input , X),"&
"162 (BC_1, HRW_NEG , input , X),"&
"163 (BC_4, HDS1_NEG , input , X),"&
"164 (BC_4, HDS2_NEG , input , X),"&
"165 (BC_4, HCS_NEG , input , X),"&
"166 (BC_4, HAS_NEG , input , X),"&
"167 (BC_1, RSV8 , input , X),"&
"168 (BC_1, RSV7 , input , X),"&
"169 (BC_1, RSV6 , input , X),"&
"170 (BC_1, HD(00) , input , X),"&
"171 (BC_1, HD(00) , output3, X, 184, 1, Z),"&
"172 (BC_1, HD(01) , input , X),"&
"173 (BC_1, HD(01) , output3, X, 184, 1, Z),"&
"174 (BC_1, HD(02) , input , X),"&
"175 (BC_1, HD(02) , output3, X, 184, 1, Z),"&
"176 (BC_1, HD(03) , input , X),"&
"177 (BC_1, HD(03) , output3, X, 184, 1, Z),"&
"178 (BC_1, HD(04) , input , X),"&
"179 (BC_1, HD(04) , output3, X, 184, 1, Z),"&
"180 (BC_1, HD(05) , input , X),"&
"181 (BC_1, HD(05) , output3, X, 184, 1, Z),"&
"182 (BC_1, HD(06) , input , X),"&
"183 (BC_1, HD(06) , output3, X, 184, 1, Z),"&
"184 (BC_1, * , control, 1),"&
"185 (BC_1, HD(07) , input , X),"&
"186 (BC_1, HD(07) , output3, X, 184, 1, Z),"&
"187 (BC_1, HD(08) , input , X),"&
"188 (BC_1, HD(08) , output3, X, 184, 1, Z),"&
"189 (BC_1, HD(09) , input , X),"&
"190 (BC_1, HD(09) , output3, X, 184, 1, Z),"&
"191 (BC_1, HD(10) , input , X),"&
"192 (BC_1, HD(10) , output3, X, 184, 1, Z),"&
"193 (BC_1, HD(11) , input , X),"&
"194 (BC_1, HD(11) , output3, X, 184, 1, Z),"&
"195 (BC_1, HD(12) , input , X),"&
"196 (BC_1, HD(12) , output3, X, 184, 1, Z),"&
"197 (BC_1, HD(13) , input , X),"&
"198 (BC_1, HD(13) , output3, X, 184, 1, Z),"&
"199 (BC_1, HD(14) , input , X),"&
"200 (BC_1, HD(14) , output3, X, 184, 1, Z),"&
"201 (BC_1, HD(15) , input , X),"&
"202 (BC_1, HD(15) , output3, X, 184, 1, Z),"&
"203 (BC_4, RSV2 , input , X),"&
"204 (BC_4, PLLFREQ1 , input , X),"&
"205 (BC_4, PLLFREQ2 , input , X),"&
"206 (BC_4, PLLFREQ3 , input , X),"&
"207 (BC_4, CLKIN , input , X),"&
"208 (BC_1, RSV3 , input , X),"&
"209 (BC_1, HOLDA_NEG, output3, X, 210, 1, Z),"&
"210 (BC_1, * , control, 1),"&
"211 (BC_1, RSV4 , input , X),"&
"212 (BC_1, BOOTMODE4, input , X),"&
"213 (BC_4, CLKMODE1 , input , X),"&
"214 (BC_4, CLKMODE0 , input , X),"&
"215 (BC_1, BOOTMODE3, input , X),"&
"216 (BC_1, BOOTMODE2, input , X),"&
"217 (BC_1, BOOTMODE1, input , X),"&
"218 (BC_1, BOOTMODE0, input , X),"&
"219 (BC_1, PD_NEG , output3, X, 12, 1, Z),"&
"220 (BC_1, DMAC3 , output3, X, 12, 1, Z),"&
"221 (BC_1, DMAC2 , output3, X, 12, 1, Z),"&
"222 (BC_1, DMAC1 , output3, X, 12, 1, Z),"&
"223 (BC_1, DMAC0 , output3, X, 12, 1, Z),"&
"224 (BC_4, RSV1 , input , X),"&
"225 (BC_1, LENDIAN , input , X),"&
"226 (BC_1, TINP0 , input , X),"&
"227 (BC_1, DR0 , input , X),"&
"228 (BC_1, CLKS0 , input , X),"&
"229 (BC_4, RESET_NEG, input , X),"&
"230 (BC_1, NMI , input , X),"&
"231 (BC_1, * , control, 1),"&
"232 (BC_1, TOUT0 , output3, X, 231, 1, Z),"&
"233 (BC_1, CLKX0 , input , X),"&
"234 (BC_1, CLKX0 , output3, X, 235, 1, Z),"&
"235 (BC_1, * , control, 1),"&
"236 (BC_1, CLKR0 , input , X),"&
"237 (BC_1, CLKR0 , output3, X, 238, 1, Z),"&
"238 (BC_1, * , control, 1),"&
"239 (BC_1, FSX0 , input , X),"&
"240 (BC_1, FSX0 , output3, X, 241, 1, Z),"&
"241 (BC_1, * , control, 1),"&
"242 (BC_1, FSR0 , input , X),"&
"243 (BC_1, FSR0 , output3, X, 244, 1, Z),"&
"244 (BC_1, * , control, 1),"&
"245 (BC_1, DX0 , output3, X, 246, 1, Z),"&
"246 (BC_1, * , control, 1)";
end TMS320C6201;