--
-- BSDL File created/edited by BCAD BSD Editor Version 3.1
--
--BSDE:Revision: 1.0
--BSDE:Description: A new device
entity MUSYCC is
generic (PHYSICAL_PIN_MAP : string := "CHIP_PACKAGE" );
port (
AD00: inout bit;
AD01: inout bit;
AD02: inout bit;
AD03: inout bit;
AD04: inout bit;
AD05: inout bit;
AD06: inout bit;
AD07: inout bit;
AD08: inout bit;
AD09: inout bit;
AD10: inout bit;
AD11: inout bit;
AD12: inout bit;
AD13: inout bit;
AD14: inout bit;
AD15: inout bit;
AD16: inout bit;
AD17: inout bit;
AD18: inout bit;
AD19: inout bit;
AD20: inout bit;
AD21: inout bit;
AD22: inout bit;
AD23: inout bit;
AD24: inout bit;
AD25: inout bit;
AD26: inout bit;
AD27: inout bit;
AD28: inout bit;
AD29: inout bit;
AD30: inout bit;
AD31: inout bit;
ALE_N: out bit;
BGACK_N: out bit;
CBE0_N: inout bit;
CBE1_N: inout bit;
CBE2_N: inout bit;
CBE3_N: inout bit;
DEVSEL_N: inout bit;
EAD00: inout bit;
EAD01: inout bit;
EAD02: inout bit;
EAD03: inout bit;
EAD04: inout bit;
EAD05: inout bit;
EAD06: inout bit;
EAD07: inout bit;
EAD08: inout bit;
EAD09: inout bit;
EAD10: inout bit;
EAD11: inout bit;
EAD12: inout bit;
EAD13: inout bit;
EAD14: inout bit;
EAD15: inout bit;
EAD16: inout bit;
EAD17: inout bit;
EAD18: inout bit;
EAD19: inout bit;
EAD20: inout bit;
EAD21: inout bit;
EAD22: inout bit;
EAD23: inout bit;
EAD24: inout bit;
EAD25: inout bit;
EAD26: inout bit;
EAD27: inout bit;
EAD28: inout bit;
EAD29: inout bit;
EAD30: inout bit;
EAD31: inout bit;
EBE0_N: out bit;
EBE1_N: out bit;
EBE2_N: out bit;
EBE3_N: out bit;
ECLK: out bit;
EINT_N: in bit;
FRAME_N: inout bit;
GNT_N: in bit;
HLDA: in bit;
HOLD: out bit;
IDSEL: in bit;
INTA_N: out bit;
INTB_N: out bit;
IRDY_N: inout bit;
PAR: inout bit;
PCLK: in bit;
PERR_N: inout bit;
PRST_N: in bit;
RCLK0: in bit;
RCLK1: in bit;
RCLK2: in bit;
RCLK3: in bit;
RDATA0: in bit;
RDATA1: in bit;
RDATA2: in bit;
RDATA3: in bit;
RD_N: out bit;
REQ_N: out bit;
ROOF0: in bit;
ROOF1: in bit;
ROOF2: in bit;
ROOF3: in bit;
RSYNC0: in bit;
RSYNC1: in bit;
RSYNC2: in bit;
RSYNC3: in bit;
SERR_N: out bit;
STOP_N: inout bit;
TCK: in bit;
TCLK0: in bit;
TCLK1: in bit;
TCLK2: in bit;
TCLK3: in bit;
TDATA0: out bit;
TDATA1: out bit;
TDATA2: out bit;
TDATA3: out bit;
TDI: in bit;
TDO: out bit;
TM0: in bit;
TM1: in bit;
TM2: in bit;
TMS: in bit;
TRDY_N: inout bit;
TRST_N: in bit;
TSYNC0: in bit;
TSYNC1: in bit;
TSYNC2: in bit;
TSYNC3: in bit;
VDD01: linkage bit;
VDD02: linkage bit;
VDD03: linkage bit;
VDD04: linkage bit;
VDD05: linkage bit;
VDD06: linkage bit;
VDD07: linkage bit;
VDD08: linkage bit;
VDD09: linkage bit;
VDD10: linkage bit;
VDD11: linkage bit;
VDD12: linkage bit;
VDD13: linkage bit;
VSS01: linkage bit;
VSS10: linkage bit;
VSS11: linkage bit;
VSS12: linkage bit;
VSS13: linkage bit;
VSS14: linkage bit;
VSS15: linkage bit;
VSS16: linkage bit;
VSS17: linkage bit;
VSS18: linkage bit;
VSS19: linkage bit;
WR_N: out bit
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of MUSYCC :
entity is "STD_1149_1_1993";
attribute PIN_MAP of MUSYCC : entity is PHYSICAL_PIN_MAP;
constant CHIP_PACKAGE: PIN_MAP_STRING:=
"AD00:88," &
"AD01:87," &
"AD02:86," &
"AD03:85," &
"AD04:84," &
"AD05:83," &
"AD06:82," &
"AD07:79," &
"AD08:77," &
"AD09:76," &
"AD10:75," &
"AD11:74," &
"AD12:73," &
"AD13:72," &
"AD14:71," &
"AD15:69," &
"AD16:56," &
"AD17:55," &
"AD18:54," &
"AD19:53," &
"AD20:52," &
"AD21:51," &
"AD22:49," &
"AD23:48," &
"AD24:45," &
"AD25:44," &
"AD26:43," &
"AD27:42," &
"AD28:39," &
"AD29:38," &
"AD30:37," &
"AD31:36," &
"ALE_N:151," &
"BGACK_N:155," &
"CBE0_N:78," &
"CBE1_N:68," &
"CBE2_N:57," &
"CBE3_N:46," &
"DEVSEL_N:63," &
"EAD00:111," &
"EAD01:112," &
"EAD02:113," &
"EAD03:114," &
"EAD04:115," &
"EAD05:116," &
"EAD06:117," &
"EAD07:118," &
"EAD08:119," &
"EAD09:122," &
"EAD10:123," &
"EAD11:124," &
"EAD12:125," &
"EAD13:126," &
"EAD14:127," &
"EAD15:128," &
"EAD16:129," &
"EAD17:131," &
"EAD18:132," &
"EAD19:133," &
"EAD20:134," &
"EAD21:135," &
"EAD22:136," &
"EAD23:137," &
"EAD24:138," &
"EAD25:139," &
"EAD26:142," &
"EAD27:143," &
"EAD28:144," &
"EAD29:145," &
"EAD30:146," &
"EAD31:147," &
"EBE0_N:159," &
"EBE1_N:158," &
"EBE2_N:157," &
"EBE3_N:156," &
"ECLK:148," &
"EINT_N:152," &
"FRAME_N:58," &
"GNT_N:34," &
"HLDA:154," &
"HOLD:153," &
"IDSEL:47," &
"INTA_N:27," &
"INTB_N:26," &
"IRDY_N:61," &
"PAR:67," &
"PCLK:29," &
"PERR_N:65," &
"PRST_N:31," &
"RCLK0:18," &
"RCLK1:13," &
"RCLK2:9," &
"RCLK3:4," &
"RDATA0:20," &
"RDATA1:16," &
"RDATA2:11," &
"RDATA3:7," &
"RD_N:150," &
"REQ_N:35," &
"ROOF0:17," &
"ROOF1:12," &
"ROOF2:8," &
"ROOF3:2," &
"RSYNC0:19," &
"RSYNC1:15," &
"RSYNC2:10," &
"RSYNC3:6," &
"SERR_N:66," &
"STOP_N:64," &
"TCK:21," &
"TCLK0:97," &
"TCLK1:101," &
"TCLK2:105," &
"TCLK3:109," &
"TDATA0:94," &
"TDATA1:99," &
"TDATA2:102," &
"TDATA3:106," &
"TDI:25," &
"TDO:24," &
"TM0:93," &
"TM1:92," &
"TM2:91," &
"TMS:23," &
"TRDY_N:62," &
"TRST_N:22," &
"TSYNC0:95," &
"TSYNC1:100," &
"TSYNC2:103," &
"TSYNC3:107," &
"VDD01:3," &
"VDD02:14," &
"VDD03:28," &
"VDD04:32," &
"VDD05:40," &
"VDD06:59," &
"VDD07:80," &
"VDD08:89," &
"VDD09:96," &
"VDD10:108," &
"VDD11:120," &
"VDD12:140," &
"VDD13:160," &
"VSS01:1," &
"VSS10:90," &
"VSS11:98," &
"VSS12:104," &
"VSS13:110," &
"VSS14:121," &
"VSS15:130," &
"VSS16:141," &
"VSS17:60," &
"VSS18:70," &
"VSS19:81," &
"WR_N:149";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (1.00e+06, LOW);
attribute TAP_SCAN_RESET of TRST_N : signal is true;
attribute INSTRUCTION_LENGTH of MUSYCC : entity is 2;
attribute INSTRUCTION_OPCODE of MUSYCC : entity is
"BYPASS ( 11)," &
"EXTEST ( 00)," &
"SAMPLE ( 01)" ;
attribute INSTRUCTION_CAPTURE of MUSYCC : entity is "01";
attribute REGISTER_ACCESS of MUSYCC : entity is
"BYPASS ( BYPASS)," &
"BOUNDARY ( EXTEST, SAMPLE)";
attribute BOUNDARY_LENGTH of MUSYCC : entity is 224;
attribute BOUNDARY_REGISTER of MUSYCC : entity is
" 0 (BC_1, EBE0_N, output3, X, 4, 1, Z)," &
" 1 (BC_1, EBE1_N, output3, X, 4, 1, Z)," &
" 2 (BC_1, EBE2_N, output3, X, 4, 1, Z)," &
" 3 (BC_1, EBE3_N, output3, X, 4, 1, Z)," &
" 4 (BC_1, *, controlr, 1)," &
" 5 (BC_1, BGACK_N, output3, X, 6, 1, Z)," &
" 6 (BC_1, *, controlr, 1)," &
" 7 (BC_4, HLDA, input, X)," &
" 8 (BC_1, HOLD, output3, X, 9, 1, Z)," &
" 9 (BC_1, *, controlr, 1)," &
" 10 (BC_4, EINT_N, input, X)," &
" 11 (BC_1, ALE_N, output3, X, 12, 1, Z)," &
" 12 (BC_1, *, controlr, 1)," &
" 13 (BC_1, RD_N, output3, X, 14, 1, Z)," &
" 14 (BC_1, *, controlr, 1)," &
" 15 (BC_1, WR_N, output3, X, 16, 1, Z)," &
" 16 (BC_1, *, controlr, 1)," &
" 17 (BC_1, ECLK, output3, X, 18, 1, Z)," &
" 18 (BC_1, *, controlr, 1)," &
" 19 (BC_1, EAD31, output3, X, 83, 1, Z)," &
" 20 (BC_4, EAD31, input, X)," &
" 21 (BC_1, EAD30, output3, X, 83, 1, Z)," &
" 22 (BC_4, EAD30, input, X)," &
" 23 (BC_1, EAD29, output3, X, 83, 1, Z)," &
" 24 (BC_4, EAD29, input, X)," &
" 25 (BC_1, EAD28, output3, X, 83, 1, Z)," &
" 26 (BC_4, EAD28, input, X)," &
" 27 (BC_1, EAD27, output3, X, 83, 1, Z)," &
" 28 (BC_4, EAD27, input, X)," &
" 29 (BC_1, EAD26, output3, X, 83, 1, Z)," &
" 30 (BC_4, EAD26, input, X)," &
" 31 (BC_1, EAD25, output3, X, 83, 1, Z)," &
" 32 (BC_4, EAD25, input, X)," &
" 33 (BC_1, EAD24, output3, X, 83, 1, Z)," &
" 34 (BC_4, EAD24, input, X)," &
" 35 (BC_1, EAD23, output3, X, 83, 1, Z)," &
" 36 (BC_4, EAD23, input, X)," &
" 37 (BC_1, EAD22, output3, X, 83, 1, Z)," &
" 38 (BC_4, EAD22, input, X)," &
" 39 (BC_1, EAD21, output3, X, 83, 1, Z)," &
" 40 (BC_4, EAD21, input, X)," &
" 41 (BC_1, EAD20, output3, X, 83, 1, Z)," &
" 42 (BC_4, EAD20, input, X)," &
" 43 (BC_1, EAD19, output3, X, 83, 1, Z)," &
" 44 (BC_4, EAD19, input, X)," &
" 45 (BC_1, EAD18, output3, X, 83, 1, Z)," &
" 46 (BC_4, EAD18, input, X)," &
" 47 (BC_1, EAD17, output3, X, 83, 1, Z)," &
" 48 (BC_4, EAD17, input, X)," &
" 49 (BC_1, EAD16, output3, X, 83, 1, Z)," &
" 50 (BC_4, EAD16, input, X)," &
" 51 (BC_1, EAD15, output3, X, 83, 1, Z)," &
" 52 (BC_4, EAD15, input, X)," &
" 53 (BC_1, EAD14, output3, X, 83, 1, Z)," &
" 54 (BC_4, EAD14, input, X)," &
" 55 (BC_1, EAD13, output3, X, 83, 1, Z)," &
" 56 (BC_4, EAD13, input, X)," &
" 57 (BC_1, EAD12, output3, X, 83, 1, Z)," &
" 58 (BC_4, EAD12, input, X)," &
" 59 (BC_1, EAD11, output3, X, 83, 1, Z)," &
" 60 (BC_4, EAD11, input, X)," &
" 61 (BC_1, EAD10, output3, X, 83, 1, Z)," &
" 62 (BC_4, EAD10, input, X)," &
" 63 (BC_1, EAD09, output3, X, 83, 1, Z)," &
" 64 (BC_4, EAD09, input, X)," &
" 65 (BC_1, EAD08, output3, X, 83, 1, Z)," &
" 66 (BC_4, EAD08, input, X)," &
" 67 (BC_1, EAD07, output3, X, 83, 1, Z)," &
" 68 (BC_4, EAD07, input, X)," &
" 69 (BC_1, EAD06, output3, X, 83, 1, Z)," &
" 70 (BC_4, EAD06, input, X)," &
" 71 (BC_1, EAD05, output3, X, 83, 1, Z)," &
" 72 (BC_4, EAD05, input, X)," &
" 73 (BC_1, EAD04, output3, X, 83, 1, Z)," &
" 74 (BC_4, EAD04, input, X)," &
" 75 (BC_1, EAD03, output3, X, 83, 1, Z)," &
" 76 (BC_4, EAD03, input, X)," &
" 77 (BC_1, EAD02, output3, X, 83, 1, Z)," &
" 78 (BC_4, EAD02, input, X)," &
" 79 (BC_1, EAD01, output3, X, 83, 1, Z)," &
" 80 (BC_4, EAD01, input, X)," &
" 81 (BC_1, EAD00, output3, X, 83, 1, Z)," &
" 82 (BC_4, EAD00, input, X)," &
" 83 (BC_1, *, controlr, 1)," &
" 84 (BC_4, TCLK3, clock, X)," &
" 85 (BC_4, TSYNC3, input, X)," &
" 86 (BC_1, TDATA3, output3, X, 87, 1, Z)," &
" 87 (BC_1, *, controlr, 1)," &
" 88 (BC_4, TCLK2, clock, X)," &
" 89 (BC_4, TSYNC2, input, X)," &
" 90 (BC_1, TDATA2, output3, X, 91, 1, Z)," &
" 91 (BC_1, *, controlr, 1)," &
" 92 (BC_4, TCLK1, clock, X)," &
" 93 (BC_4, TSYNC1, input, X)," &
" 94 (BC_1, TDATA1, output3, X, 95, 1, Z)," &
" 95 (BC_1, *, controlr, 1)," &
" 96 (BC_4, TCLK0, clock, X)," &
" 97 (BC_4, TSYNC0, input, X)," &
" 98 (BC_1, TDATA0, output3, X, 99, 1, Z)," &
" 99 (BC_1, *, controlr, 1)," &
" 100 (BC_4, TM0, input, X)," &
" 101 (BC_4, TM1, input, X)," &
" 102 (BC_4, TM2, input, X)," &
" 103 (BC_1, AD00, output3, X, 200, 1, Z)," &
" 104 (BC_4, AD00, input, X)," &
" 105 (BC_1, AD01, output3, X, 200, 1, Z)," &
" 106 (BC_4, AD01, input, X)," &
" 107 (BC_1, AD02, output3, X, 200, 1, Z)," &
" 108 (BC_4, AD02, input, X)," &
" 109 (BC_1, AD03, output3, X, 200, 1, Z)," &
" 110 (BC_4, AD03, input, X)," &
" 111 (BC_1, AD04, output3, X, 200, 1, Z)," &
" 112 (BC_4, AD04, input, X)," &
" 113 (BC_1, AD05, output3, X, 200, 1, Z)," &
" 114 (BC_4, AD05, input, X)," &
" 115 (BC_1, AD06, output3, X, 200, 1, Z)," &
" 116 (BC_4, AD06, input, X)," &
" 117 (BC_1, AD07, output3, X, 200, 1, Z)," &
" 118 (BC_4, AD07, input, X)," &
" 119 (BC_1, CBE0_N, output3, X, 200, 1, Z)," &
" 120 (BC_4, CBE0_N, input, X)," &
" 121 (BC_1, AD08, output3, X, 200, 1, Z)," &
" 122 (BC_4, AD08, input, X)," &
" 123 (BC_1, AD09, output3, X, 200, 1, Z)," &
" 124 (BC_4, AD09, input, X)," &
" 125 (BC_1, AD10, output3, X, 200, 1, Z)," &
" 126 (BC_4, AD10, input, X)," &
" 127 (BC_1, AD11, output3, X, 200, 1, Z)," &
" 128 (BC_4, AD11, input, X)," &
" 129 (BC_1, AD12, output3, X, 200, 1, Z)," &
" 130 (BC_4, AD12, input, X)," &
" 131 (BC_1, AD13, output3, X, 200, 1, Z)," &
" 132 (BC_4, AD13, input, X)," &
" 133 (BC_1, AD14, output3, X, 200, 1, Z)," &
" 134 (BC_4, AD14, input, X)," &
" 135 (BC_1, AD15, output3, X, 200, 1, Z)," &
" 136 (BC_4, AD15, input, X)," &
" 137 (BC_1, CBE1_N, output3, X, 183, 1, Z)," &
" 138 (BC_4, CBE1_N, input, X)," &
" 139 (BC_1, PAR, output3, X, 141, 1, Z)," &
" 140 (BC_4, PAR, input, X)," &
" 141 (BC_1, *, controlr, 1)," &
" 142 (BC_0, *, internal, X)," &
" 143 (BC_1, SERR_N, output2, X, 143, 1, Weak1)," &
" 144 (BC_1, PERR_N, output3, X, 146, 1, Z)," &
" 145 (BC_4, PERR_N, input, X)," &
" 146 (BC_1, *, controlr, 1)," &
" 147 (BC_1, STOP_N, output3, X, 149, 1, Z)," &
" 148 (BC_4, STOP_N, input, X)," &
" 149 (BC_1, *, controlr, 1)," &
" 150 (BC_1, DEVSEL_N, output3, X, 152, 1, Z)," &
" 151 (BC_4, DEVSEL_N, input, X)," &
" 152 (BC_1, *, controlr, 1)," &
" 153 (BC_1, TRDY_N, output3, X, 155, 1, Z)," &
" 154 (BC_4, TRDY_N, input, X)," &
" 155 (BC_1, *, controlr, 1)," &
" 156 (BC_1, IRDY_N, output3, X, 158, 1, Z)," &
" 157 (BC_4, IRDY_N, input, X)," &
" 158 (BC_1, *, controlr, 1)," &
" 159 (BC_1, FRAME_N, output3, X, 161, 1, Z)," &
" 160 (BC_4, FRAME_N, input, X)," &
" 161 (BC_1, *, controlr, 1)," &
" 162 (BC_1, CBE2_N, output3, X, 183, 1, Z)," &
" 163 (BC_4, CBE2_N, input, X)," &
" 164 (BC_1, AD16, output3, X, 200, 1, Z)," &
" 165 (BC_4, AD16, input, X)," &
" 166 (BC_1, AD17, output3, X, 200, 1, Z)," &
" 167 (BC_4, AD17, input, X)," &
" 168 (BC_1, AD18, output3, X, 200, 1, Z)," &
" 169 (BC_4, AD18, input, X)," &
" 170 (BC_1, AD19, output3, X, 200, 1, Z)," &
" 171 (BC_4, AD19, input, X)," &
" 172 (BC_1, AD20, output3, X, 200, 1, Z)," &
" 173 (BC_4, AD20, input, X)," &
" 174 (BC_1, AD21, output3, X, 200, 1, Z)," &
" 175 (BC_4, AD21, input, X)," &
" 176 (BC_1, AD22, output3, X, 200, 1, Z)," &
" 177 (BC_4, AD22, input, X)," &
" 178 (BC_1, AD23, output3, X, 200, 1, Z)," &
" 179 (BC_4, AD23, input, X)," &
" 180 (BC_1, IDSEL, input, X)," &
" 181 (BC_1, CBE3_N, output3, X, 183, 1, Z)," &
" 182 (BC_4, CBE3_N, input, X)," &
" 183 (BC_1, *, controlr, 1)," &
" 184 (BC_1, AD24, output3, X, 200, 1, Z)," &
" 185 (BC_4, AD24, input, X)," &
" 186 (BC_1, AD25, output3, X, 200, 1, Z)," &
" 187 (BC_4, AD25, input, X)," &
" 188 (BC_1, AD26, output3, X, 200, 1, Z)," &
" 189 (BC_4, AD26, input, X)," &
" 190 (BC_1, AD27, output3, X, 200, 1, Z)," &
" 191 (BC_4, AD27, input, X)," &
" 192 (BC_1, AD28, output3, X, 200, 1, Z)," &
" 193 (BC_4, AD28, input, X)," &
" 194 (BC_1, AD29, output3, X, 200, 1, Z)," &
" 195 (BC_4, AD29, input, X)," &
" 196 (BC_1, AD30, output3, X, 200, 1, Z)," &
" 197 (BC_4, AD30, input, X)," &
" 198 (BC_1, AD31, output3, X, 200, 1, Z)," &
" 199 (BC_4, AD31, input, X)," &
" 200 (BC_1, *, controlr, 1)," &
" 201 (BC_1, REQ_N, output3, X, 202, 1, Z)," &
" 202 (BC_1, *, controlr, 1)," &
" 203 (BC_4, GNT_N, input, X)," &
" 204 (BC_4, PRST_N, input, X)," &
" 205 (BC_4, PCLK, input, X)," &
" 206 (BC_1, INTA_N, output2, X, 206, 1, Weak1)," &
" 207 (BC_1, INTB_N, output2, X, 207, 1, Weak1)," &
" 208 (BC_4, RDATA0, input, X)," &
" 209 (BC_4, RSYNC0, input, X)," &
" 210 (BC_4, RCLK0, clock, X)," &
" 211 (BC_4, ROOF0, input, X)," &
" 212 (BC_4, RDATA1, input, X)," &
" 213 (BC_4, RSYNC1, input, X)," &
" 214 (BC_4, RCLK1, clock, X)," &
" 215 (BC_4, ROOF1, input, X)," &
" 216 (BC_4, RDATA2, input, X)," &
" 217 (BC_4, RSYNC2, input, X)," &
" 218 (BC_4, RCLK2, clock, X)," &
" 219 (BC_4, ROOF2, input, X)," &
" 220 (BC_4, RDATA3, input, X)," &
" 221 (BC_4, RSYNC3, input, X)," &
" 222 (BC_4, RCLK3, clock, X)," &
" 223 (BC_4, ROOF3, input, X)";
end MUSYCC;