BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: TMS320DM6433

----------------------------------------------------------------------
 --  TI TMS320DM6433 Fixed-Point DSP with Boundary Scan               --
 ----------------------------------------------------------------------
 --  Supported Devices: TMS320DM6433 Revision 1.0                     --
 ----------------------------------------------------------------------
 --  Created by    : Texas Instruments Incorporated                  --
 --  Documentation : TMS320DM6433 Users Guide                         --
 --  BSDL Revision : 0.1 originally created                          --
 --                                                                  --
 --  BSDL Status   : Preliminary                                     --
 --  Date Created  : 8/15/2007                                      --
 --                                                                  --
 ----------------------------------------------------------------------
 -------------------------------------------------------------------------------
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 -------------------------------------------------------------------
 
 
 entity TMS320DM6433 is
 
   generic(PHYSICAL_PIN_MAP : string := "ZDU");
 
   port(
       AD26             : inout bit;
       AD28             : inout bit;
       AD30             : inout bit;
       B0_LCDFIELD_EMA3_GP11: inout bit;
       B1_EMA2_CLE_GP8_AEAW0_PLLMS0: inout bit;
       B2_EMBA1_GP5_AEM0: inout bit;
       EMR_Wn_GP35      : inout bit;
       EMA20_PINTAn_EMD7_GP44: inout bit;
       EMA19_PREQn_EMD6_GP45: inout bit;
       EMA18_PRSTn_EMD5_GP46: inout bit;
       EMA17_AD31_EMD4_GP47: inout bit;
       EMA16_PGNTn_EMD3_GP48: inout bit;
       EMA15_AD29_EMD2_GP49: inout bit;
       MA14_AD27_EMD1_GP50: inout bit;
       EMA13_AD25_EMD0_GP51: inout bit;
       CLKOUT0_PWM2_GP84: inout bit;
       AHCLKR0_CLKR0_GP101: inout bit;
       AHCLKX0_GP108    : inout bit;
       ACLKR0_CLKX0_GP99: inout bit;
       ACLKX0_GP106     : inout bit;
       COUT0_EMD0_GP14  : inout bit;
       COUT1_EMD1_GP15  : inout bit;
       COUT2_EMD2_GP16  : inout bit;
       COUT3_EMD3_GP17  : inout bit;
       COUT4_EMD4_GP18  : inout bit;
       COUT5_EMD5_GP19  : inout bit;
       COUT6_EMD6_GP20  : inout bit;
       COUT7_EMD7_GP21  : inout bit;
       DDRA0            : inout bit;
       DDRA1            : inout bit;
       DDRA2            : inout bit;
       DDRA3            : inout bit;
       DDRA4            : inout bit;
       DDRA5            : inout bit;
       DDRA6            : inout bit;
       DDRA7            : inout bit;
       DDRA8            : inout bit;
       DDRA9            : inout bit;
       DDRA10           : inout bit;
       DDRA11           : inout bit;
       DDRA12           : inout bit;
       DDR_BA0          : inout bit;
       DDR_BA1          : inout bit;
       DDR_BA2          : inout bit;
       DDRCASn          : inout bit;
       DDRCKE           : inout bit;
       DDR_CLK          : inout bit;
       DDR_CLKn         : inout bit;
       DDRCSn           : inout bit;
       DDRD0            : inout bit;
       DDRD1            : inout bit;
       DDRD2            : inout bit;
       DDRD3            : inout bit;
       DDRD4            : inout bit;
       DDRD5            : inout bit;
       DDRD6            : inout bit;
       DDRD7            : inout bit;
       DDRD8            : inout bit;
       DDRD9            : inout bit;
       DDRD10           : inout bit;
       DDRD11           : inout bit;
       DDRD12           : inout bit;
       DDRD13           : inout bit;
       DDRD14           : inout bit;
       DDRD15           : inout bit;
       DDRD16           : inout bit;
       DDRD17           : inout bit;
       DDRD18           : inout bit;
       DDRD19           : inout bit;
       DDRD20           : inout bit;
       DDRD21           : inout bit;
       DDRD22           : inout bit;
       DDRD23           : inout bit;
       DDRD24           : inout bit;
       DDRD25           : inout bit;
       DDRD26           : inout bit;
       DDRD27           : inout bit;
       DDRD28           : inout bit;
       DDRD29           : inout bit;
       DDRD30           : inout bit;
       DDRD31           : inout bit;
       DDRDQM0          : inout bit;
       DDRDQM1          : inout bit;
       DDRDQM2          : inout bit;
       DDRDQM3          : inout bit;
       DDRDQS0          : inout bit;
       DDRDQS1          : inout bit;
       DDRDQS2          : inout bit;
       DDRDQS3          : inout bit;
       DDRRASn          : inout bit;
       DDRWEn           : inout bit;
       AFSR0_DR0_GP100  : inout bit;
       AMUTE0_GP110     : inout bit;
       AXR01_DX0_GP104  : inout bit;
       AFSX0_GP107      : inout bit;
       EMA5_AD19_GP96   : inout bit;
       EMA6_AD20_GP95   : inout bit;
       EMA7_AD22_GP94   : inout bit;
       EMA8_AD21_GP93   : inout bit;
       EMA9_PIDSEL_GP92 : inout bit;
       EMA10_AD23_GP91  : inout bit;
       EMA11_AD24_GP90  : inout bit;
       EMA12_PCBE3n_GP89: inout bit;
       EMA21_GP34       : inout bit;
       EMWAIT_RDY_BSYn  : inout bit;
       EMWEn            : inout bit;
       EMOEn            : inout bit;
       AXR03_FSR0_GP102 : inout bit;
       AXR00_GP105      : inout bit;
       AXR02_FSX0_GP103 : inout bit;
       AMUTEIN0_GP109   : inout bit;
       G0_EMCS2n_GP12   : inout bit;
       G1_EMA1_ALE_GP9_AEAW1_PLLMS1: inout bit;
       AD0_GP0          : inout bit;
       AD1_GP1          : inout bit;
       AD2_GP2          : inout bit;
       AD4_GP3          : inout bit;
       GP4_PWM1         : inout bit;
       VLYNQCLOCK_PCICLK_GP57: inout bit;
       URXD0_GP85       : inout bit;
       UTXD0_GP86       : inout bit;
       UCTS0_GP87       : inout bit;
       URTS0_PWM0_GP88  : inout bit;
       HASn_MDIO_AD3_GP83: inout bit;
       HCNTL0_MRXER_AD10_GP76: inout bit;
       HCNTL1_MTXEN_AD11_GP75: inout bit;
       HCSn_MDCLK_AD5_GP81: inout bit;
       HD0_VLYNQSCRUN_AD18_GP58: inout bit;
       HD1_VLYNQRXD0_AD16_GP59: inout bit;
       HD2_VLYNQRXD1_AD17_GP60: inout bit;
       HD3_VLYNQRXD2_PCBE2n_GP61: inout bit;
       HD4_VLYNQRXD3_PFRAMEn_GP62: inout bit;
       HD5_VLYNQTXD0_PIRDYn_GP63: inout bit;
       HD6_VLYNQTXD1_PTRDYn_GP64: inout bit;
       HD7_VLYNQTXD2_PDEVSELn_GP65: inout bit;
       HD8_VLYNQTXD3_PPERRn_GP66: inout bit;
       HD9_MCOL_PSTOPn_GP67: inout bit;
       HD10_MCRS_PSERRn_GP68: inout bit;
       HD11_MTXD3_PCBE1n_GP69: inout bit;
       HD12_MTXD2_PPAR_GP70: inout bit;
       HD13_MTXD1_AD14_GP71: inout bit;
       HD14_MTXD0_AD15_GP72: inout bit;
       HD15_MTXCLK_AD12_GP73: inout bit;
       GP52             : inout bit;
       HDS1n_MRXD1_AD7_GP79: inout bit;
       HDS2n_MRXD0_AD9_GP78: inout bit;
       HHWIL_MRXDV_AD13_GP74: inout bit;
       HINTn_MRXD3_AD6_GP82: inout bit;
       HRDYn_MRXD2_PCBE0n_GP80: inout bit;
       HR_Wn_MRXCLK_AD8_GP77: inout bit;
       HSYNC_EMCS5n_GP33: inout bit;
       SCL              : inout bit;
       SDA              : inout bit;
       LCDOE_EMCS3n_GP13: inout bit;
       GP54             : inout bit;
       R0_EMA4_GP10_AEAW2_PLLMS2: inout bit;
       R1_EMA0_GP7_AEM2 : inout bit;
       R2_EMBA0_GP6_AEM1: inout bit;
       TINP0L_GP98      : inout bit;
       TINP1L_GP56      : inout bit;
       CLKS0_TOUT0L_GP97: inout bit;
       TOUT1L_GP55      : inout bit;
       VCLK_GP31        : inout bit;
       GP53             : inout bit;
       VPBECLK_GP30     : inout bit;
       VSYNC_EMCS4n_GP32: inout bit;
       GP36             : inout bit;
       GP37             : inout bit;
       GP38             : inout bit;
       GP39             : inout bit;
       GP40             : inout bit;
       GP41             : inout bit;
       GP42             : inout bit;
       GP43             : inout bit;
       YOUT0_GP22_BOOTMODE0: inout bit;
       YOUT1_GP23_BOOTMODE1: inout bit;
       YOUT2_GP24_BOOTMODE2: inout bit;
       YOUT3_GP25_BOOTMODE3: inout bit;
       YOUT4_GP26_FASTBOOT: inout bit;
       YOUT5_GP27       : inout bit;
       YOUT6_GP28       : inout bit;
       YOUT7_GP29       : inout bit;
       RESETn           : in bit;
       TRSTn            : in bit;
       TCK              : in bit;
       TDI              : in bit;
       TMS              : in bit;
       TDO              : out bit;
       EMU0             : in bit; -- B.8.10.3.d compliance pins must be type in
       EMU1             : in bit; -- B.8.10.3.d compliance pins must be type in
       PORn             : in bit;
       PCIEN            : in bit;
       RESETOUTn        : out bit;
 --    MXI_CLKIN        : in bit;
 --    MXO              : out bit;
 --    RSV2             : in bit;
 --    RSV3             : out bit;
 --    RSV4             : out bit;
 --    RSV5             : out bit;
 --    DACIOUTA         : out bit;
 --    DACIOUTB         : out bit;
 --    DACIOUTC         : out bit;
 --    DACIOUTD         : out bit;
 --    DDRZN            : out bit;
 --    DDRZP            : out bit;
 --    DACRBIAS         : inout bit;
 --    DACVREF          : in bit;
 --    DDRVREF		: in bit;
 
       VSS              : linkage bit_vector(1 to 86);
       VDD              : linkage bit_vector(1 to 82));
 
    use STD_1149_1_2001.all; -- Get standard attributes and definitions
 
 attribute COMPONENT_CONFORMANCE of TMS320DM6433: entity is
 "STD_1149_1_2001";
 
     attribute PIN_MAP of TMS320DM6433: entity is PHYSICAL_PIN_MAP;
     constant ZDU : PIN_MAP_STRING :=
      "AD26                          :D12," &
      "AD28                          :D13," &
      "AD30                          :D14," &
      "B0_LCDFIELD_EMA3_GP11         :D21," &
      "B1_EMA2_CLE_GP8_AEAW0_PLLMS0  :A20," &
      "B2_EMBA1_GP5_AEM0             :C20," &
      "EMR_Wn_GP35                   :C17," &
      "EMA20_PINTAn_EMD7_GP44        :C15," &
      "EMA19_PREQn_EMD6_GP45         :C14," &
      "EMA18_PRSTn_EMD5_GP46         :A14," &
      "EMA17_AD31_EMD4_GP47          :B14," &
      "EMA16_PGNTn_EMD3_GP48         :B13," &
      "EMA15_AD29_EMD2_GP49          :C13," &
      "MA14_AD27_EMD1_GP50           :A13," &
      "EMA13_AD25_EMD0_GP51          :A12," &
      "CLKOUT0_PWM2_GP84             :R1," &
      "AHCLKR0_CLKR0_GP101           :K1," &
      "AHCLKX0_GP108                 :H1," &
      "ACLKR0_CLKX0_GP99             :J1," &
      "ACLKX0_GP106                  :G1," &
      "COUT0_EMD0_GP14               :E21," &
      "COUT1_EMD1_GP15               :G20," &
      "COUT2_EMD2_GP16               :E22," &
      "COUT3_EMD3_GP17               :F20," &
      "COUT4_EMD4_GP18               :G21," &
      "COUT5_EMD5_GP19               :F22," &
      "COUT6_EMD6_GP20               :F21," &
      "COUT7_EMD7_GP21               :H20," &
      "DDRA0                         :AB15," &
      "DDRA1                         :AB14," &
      "DDRA2                         :Y14," &
      "DDRA3                         :AA14," &
      "DDRA4                         :AB13," &
      "DDRA5                         :Y13," &
      "DDRA6                         :AA13," &
      "DDRA7                         :AB12," &
      "DDRA8                         :Y12," &
      "DDRA9                         :AA12," &
      "DDRA10                        :AB11," &
      "DDRA11                        :AA11," &
      "DDRA12                        :AA10," &
      "DDR_BA0                       :AA9," &
      "DDR_BA1                       :AB9," &
      "DDR_BA2                       :AB10," &
      "DDRCASn                       :Y9," &
      "DDRCKE                        :AA8," &
      "DDR_CLK                       :AB7," &
      "DDR_CLKn                      :AB8," &
      "DDRCSn                        :Y11," &
      "DDRD0                         :Y1," &
      "DDRD1                         :Y2," &
      "DDRD2                         :W2," &
      "DDRD3                         :AA2," &
      "DDRD4                         :AA3," &
      "DDRD5                         :Y3," &
      "DDRD6                         :AB3," &
      "DDRD7                         :W4," &
      "DDRD8                         :AB4," &
      "DDRD9                         :W5," &
      "DDRD10                        :AA5," &
      "DDRD11                        :Y5," &
      "DDRD12                        :AB5," &
      "DDRD13                        :AA6," &
      "DDRD14                        :Y6," &
      "DDRD15                        :AB6," &
      "DDRD16                        :AA16," &
      "DDRD17                        :Y16," &
      "DDRD18                        :AB16," &
      "DDRD19                        :AA17," &
      "DDRD20                        :Y17," &
      "DDRD21                        :AB17," &
      "DDRD22                        :AB18," &
      "DDRD23                        :AA19," &
      "DDRD24                        :Y19," &
      "DDRD25                        :AB19," &
      "DDRD26                        :AA20," &
      "DDRD27                        :Y20," &
      "DDRD28                        :AB20," &
      "DDRD29                        :Y21," &
      "DDRD30                        :AA21," &
      "DDRD31                        :Y22," &
      "DDRDQM0                       :Y4," &
      "DDRDQM1                       :Y7," &
      "DDRDQM2                       :Y15," &
      "DDRDQM3                       :Y18," &
      "DDRDQS0                       :AA4," &
      "DDRDQS1                       :AA7," &
      "DDRDQS2                       :AA15," &
      "DDRDQS3                       :AA18," &
      "DDRRASn                       :Y8," &
      "DDRWEn                        :Y10," &
      "AFSR0_DR0_GP100               :K3," &
      "AMUTE0_GP110                  :H3," &
      "AXR01_DX0_GP104               :K2," &
      "AFSX0_GP107                   :G2," &
      "EMA5_AD19_GP96                :A10," &
      "EMA6_AD20_GP95                :B10," &
      "EMA7_AD22_GP94                :C10," &
      "EMA8_AD21_GP93                :A11," &
      "EMA9_PIDSEL_GP92              :C11," &
      "EMA10_AD23_GP91               :B11," &
      "EMA11_AD24_GP90               :C12," &
      "EMA12_PCBE3n_GP89             :B12," &
      "EMA21_GP34                    :C16," &
      "EMWAIT_RDY_BSYn               :D20," &
      "EMWEn                         :C19," &
      "EMOEn                         :D19," &
      "AXR03_FSR0_GP102              :J3," &
      "AXR00_GP105                   :H2," &
      "AXR02_FSX0_GP103              :J2," &
      "AMUTEIN0_GP109                :G3," &
      "G0_EMCS2n_GP12                :C22," &
      "G1_EMA1_ALE_GP9_AEAW1_PLLMS1  :B20," &
      "AD0_GP0                       :E1," &
      "AD1_GP1                       :E2," &
      "AD2_GP2                       :F1," &
      "AD4_GP3                       :F2," &
      "GP4_PWM1                      :F3," &
      "VLYNQCLOCK_PCICLK_GP57        :A8," &
      "URXD0_GP85                    :M2," &
      "UTXD0_GP86                    :N1," &
      "UCTS0_GP87                    :P1," &
      "URTS0_PWM0_GP88               :M3," &
      "HASn_MDIO_AD3_GP83            :C1," &
      "HCNTL0_MRXER_AD10_GP76        :B2," &
      "HCNTL1_MTXEN_AD11_GP75        :C4," &
      "HCSn_MDCLK_AD5_GP81           :D1," &
      "HD0_VLYNQSCRUN_AD18_GP58      :B9," &
      "HD1_VLYNQRXD0_AD16_GP59       :C9," &
      "HD2_VLYNQRXD1_AD17_GP60       :A9," &
      "HD3_VLYNQRXD2_PCBE2n_GP61     :B8," &
      "HD4_VLYNQRXD3_PFRAMEn_GP62    :C8," &
      "HD5_VLYNQTXD0_PIRDYn_GP63     :A7," &
      "HD6_VLYNQTXD1_PTRDYn_GP64     :C7," &
      "HD7_VLYNQTXD2_PDEVSELn_GP65   :B7," &
      "HD8_VLYNQTXD3_PPERRn_GP66     :A6," &
      "HD9_MCOL_PSTOPn_GP67          :C6," &
      "HD10_MCRS_PSERRn_GP68         :B6," &
      "HD11_MTXD3_PCBE1n_GP69        :A5," &
      "HD12_MTXD2_PPAR_GP70          :C5," &
      "HD13_MTXD1_AD14_GP71          :B4," &
      "HD14_MTXD0_AD15_GP72          :B5," &
      "HD15_MTXCLK_AD12_GP73         :A4," &
      "GP52                          :A19," &
      "HDS1n_MRXD1_AD7_GP79          :B3," &
      "HDS2n_MRXD0_AD9_GP78          :C2," &
      "HHWIL_MRXDV_AD13_GP74         :D3," &
      "HINTn_MRXD3_AD6_GP82          :D2," &
      "HRDYn_MRXD2_PCBE0n_GP80       :C3," &
      "HR_Wn_MRXCLK_AD8_GP77         :A3," &
      "HSYNC_EMCS5n_GP33             :J22," &
      "SCL                           :N2," &
      "SDA                           :P2," &
      "LCDOE_EMCS3n_GP13             :D22," &
      "GP54                          :A18," &
      "R0_EMA4_GP10_AEAW2_PLLMS2     :B21," &
      "R1_EMA0_GP7_AEM2              :C21," &
      "R2_EMBA0_GP6_AEM1             :E20," &
      "TINP0L_GP98                   :L2," &
      "TINP1L_GP56                   :P3," &
      "CLKS0_TOUT0L_GP97             :L3," &
      "TOUT1L_GP55                   :N3," &
      "VCLK_GP31                     :G22," &
      "GP53                          :A17," &
      "VPBECLK_GP30                  :K22," &
      "VSYNC_EMCS4n_GP32             :H22," &
      "GP36                          :B19," &
      "GP37                          :B18," &
      "GP38                          :B17," &
      "GP39                          :A16," &
      "GP40                          :C18," &
      "GP41                          :B16," &
      "GP42                          :B15," &
      "GP43                          :A15," &
      "YOUT0_GP22_BOOTMODE0          :J20," &
      "YOUT1_GP23_BOOTMODE1          :K20," &
      "YOUT2_GP24_BOOTMODE2          :L20," &
      "YOUT3_GP25_BOOTMODE3          :H21," &
      "YOUT4_GP26_FASTBOOT           :K19," &
      "YOUT5_GP27                    :L19," &
      "YOUT6_GP28                    :J21," &
      "YOUT7_GP29                    :K21," &
      "PCIEN                         :W3," &
      "PORn                          :R2," &
      "RESETn                        :R3," &
      "RESETOUTn                     :T3," &
      "TRSTn                         :V2," &
      "TCK                           :U1," &
      "TDI                           :U3," &
      "TMS                           :V3," &
      "TDO                           :U2," &
      "EMU0                          :T1," &
      "EMU1                          :T2," &
 --   "MXI_CLKIN                     :N22," &
 --   "MXO                           :M22," &
 --   "RSV2                          :L4," &
 --   "RSV3                          :M4," &
 --   "RSV4                          :P19," &
 --   "RSV5                          :W16," &
 --   "DACIOUTA                      :V21," &
 --   "DACIOUTB                      :U22," &
 --   "DACIOUTC                      :T21," &
 --   "DACIOUTD                      :T22," &
 --   "DDRZN                         :W12," &
 --   "DDRZP                         :W13," &
 --   "DACRBIAS                      :U21," &
 --   "DACVREF                       :V22," &
 --   "DDRVREF			     :W18," &
 
      "VSS                 :(W8, W6, W22, W21, W20, W10, W1, V9, V7, V5, V19, V17, V15, V13, V11, U4, U19," &
                           "U18, T5, T18, R4, R22, R21, R20, R19, R18, P9, P5, P21, P14, N4, N18, N13, N12," &
                           "N11, N10, M5, M19, M13, M12, M11, M1, L22, L18, L12, L11, L10, K5, K13, K12, K11," &
                           "K10, J9, J4, J18, J14, H5, H19, G4, G18, F5, F19, E8, E6, E4, E18, E16, E14, E12," &
                           "E10, D9, D7, D5, D17, D15, D11, B22, AB2, AB1, AA22, A22, A1, T19, M21, W15, U20)," &
      "VDD                 :(T4, R5, P4, P22, P20, P18, N5, N19, M20, M18, L5, L21, L1, K4, K18, J5, J19, H4," &
                           "H18, G5, G19, F4, F18, E9, E7, E5, E3, E19, E17, E15, E13, E11, D8, D6, D18, D16," &
                           "D10, B1, A21, A2, W9, W7, W19, W17, W11, V8, V6, V4, V18, V16, V14, V12, V10, V1," &
                           "U5, N21, AB22, AB21, AA1, P11, P10, N9, M9, M10, L9, K9, J11, J10, P13, P12, N14," &
                           "M14, L14, L13, K14, J13, J12, D4, T20, V20, W14, N20)";
 
 -- *********************************************************
     attribute TAP_SCAN_IN    of TDI      : signal is true;
     attribute TAP_SCAN_MODE  of TMS      : signal is true;
     attribute TAP_SCAN_OUT   of TDO      : signal is true;
     attribute TAP_SCAN_RESET of TRSTn    : signal is true;
     attribute TAP_SCAN_CLOCK of TCK      : signal is (20.00e6, BOTH);
 
     attribute COMPLIANCE_PATTERNS of TMS320DM6433: entity is "(EMU1,EMU0,PORn)(111)";
 
     attribute INSTRUCTION_LENGTH of TMS320DM6433: entity is 6;
     attribute INSTRUCTION_OPCODE of TMS320DM6433: entity is
               "EXTEST    (011000), " &
               "BYPASS    (111111), " &
               "HIGHZ     (011110), " &
               "PRELOAD   (011100), " &
               "IDCODE    (000100), " &
               "SAMPLE    (011011), " &
               "PRIVATE   (000000,  " &
               "           000001,  " &
               "           000010,  " &
               "           000011,  " &
               "           000101,  " &
               "           000110,  " &
               "           000111,  " &
               "           001000,  " &
               "           001001,  " &
               "           001010,  " &
               "           001011,  " &
               "           001100,  " &
               "           001101,  " &
               "           001110,  " &
               "           001111,  " &
               "           010000,  " &
               "           010001,  " &
               "           010010,  " &
               "           010011,  " &
               "           010100,  " &
               "           010101,  " &
               "           010110,  " &
               "           010111,  " &
               "           011001,  " &
               "           011010,  " &
               "           011101,  " &
               "           011111,  " &
               "           100000,  " &
               "           100001,  " &
               "           100010,  " &
               "           100011,  " &
               "           100100,  " &
               "           100101,  " &
               "           100110,  " &
               "           100111,  " &
               "           101000,  " &
               "           101001,  " &
               "           101010,  " &
               "           101011,  " &
               "           101100,  " &
               "           101101,  " &
               "           101110,  " &
               "           101111,  " &
               "           110000,  " &
               "           110001,  " &
               "           110010,  " &
               "           110011,  " &
               "           110100,  " &
               "           110101,  " &
               "           110110,  " &
               "           110111,  " &
               "           111000,  " &
               "           111001,  " &
               "           111010,  " &
               "           111011,  " &
               "           111100,  " &
               "           111101,  " &
               "           111110)  " ;
 
     attribute INSTRUCTION_CAPTURE of TMS320DM6433: entity is "XXXX01";
    
     attribute INSTRUCTION_PRIVATE of TMS320DM6433: entity is "PRIVATE";
 
 --  Do not support SAMPLE on DDR outputs
 --  Do not support INTEST on DDR inputs
 
     attribute IDCODE_REGISTER of TMS320DM6433: entity is
               "0000" &                 -- Version number
               "1011011100100001" &     -- Part number -- C64LC pin package ID
               "00000010111" &          -- Manufacturer ID  -- Texas Instruments
               "1";                     -- Required by IEEE Std. 
 
     attribute REGISTER_ACCESS of TMS320DM6433: entity is
               "BOUNDARY (EXTEST, PRELOAD, SAMPLE)," &
               "BYPASS   (BYPASS, HIGHZ)  " ;
 
 attribute BOUNDARY_LENGTH   of TMS320DM6433: entity is 550;
 attribute BOUNDARY_REGISTER of TMS320DM6433: entity is
 
 --- num      cell                  port    function  safe ccell disval rslt
 
    "0   (bc_1,           PCIEN,  input,  X)," & 
    "1   (bc_1,               *,   control,  1)," & 
    "2   (bc_1,        RESETOUTn,  output3,  X,      1,   1,   Z)," & 
    "3   (bc_1,           RESETn,  input,  X)," & 
    "4   (bc_4,               *,   internal,  0)," & 
    "5   (bc_1,              SDA,  output2,  1,      5,   1,   Weak1)," & 
    "6   (bc_1,              SDA,  input,  X)," & 
    "7   (bc_1,               *,   control,  1)," & 
    "8   (bc_1,      TINP1L_GP56,  output3,  X,      7,   1,   Z)," & 
    "9   (bc_1,      TINP1L_GP56,  input,  X)," & 
    "10  (bc_4,               *,   internal,  0)," & 
    "11  (bc_1,              SCL,  output2,  1,     11,   1,   Weak1)," & 
    "12  (bc_1,              SCL,  input,  X)," & 
    "13  (bc_1,               *,   control,  1)," & 
    "14  (bc_1,  URTS0_PWM0_GP88,  output3,  X,     13,   1,   Z)," & 
    "15  (bc_1,  URTS0_PWM0_GP88,  input,  X)," & 
    "16  (bc_1,               *,   control,  1)," & 
    "17  (bc_1,CLKOUT0_PWM2_GP84,  output3,  X,     16,   1,   Z)," & 
    "18  (bc_1,CLKOUT0_PWM2_GP84,  input,  X)," & 
    "19  (bc_1,               *,   control,  1)," & 
    "20  (bc_1,       URXD0_GP85,  output3,  X,     19,   1,   Z)," & 
    "21  (bc_1,       URXD0_GP85,  input,  X)," & 
    "22  (bc_1,               *,   control,  1)," & 
    "23  (bc_1,      TOUT1L_GP55,  output3,  X,     22,   1,   Z)," & 
    "24  (bc_1,      TOUT1L_GP55,  input,  X)," & 
    "25  (bc_1,               *,   control,  1)," & 
    "26  (bc_1,       UCTS0_GP87,  output3,  X,     25,   1,   Z)," & 
    "27  (bc_1,       UCTS0_GP87,  input,  X)," & 
    "28  (bc_1,               *,   control,  1)," & 
    "29  (bc_1,       UTXD0_GP86,  output3,  X,     28,   1,   Z)," & 
    "30  (bc_1,       UTXD0_GP86,  input,  X)," & 
    "31  (bc_1,               *,   control,  1)," & 
    "32  (bc_1,      TINP0L_GP98,  output3,  X,     31,   1,   Z)," & 
    "33  (bc_1,      TINP0L_GP98,  input,  X)," & 
    "34  (bc_1,               *,   control,  1)," & 
    "35  (bc_1,CLKS0_TOUT0L_GP97,  output3,  X,     34,   1,   Z)," & 
    "36  (bc_1,CLKS0_TOUT0L_GP97,  input,  X)," & 
    "37  (bc_1,               *,   control,  1)," & 
    "38  (bc_1,AHCLKR0_CLKR0_GP101,  output3,  X,     37,   1,   Z)," & 
    "39  (bc_1,AHCLKR0_CLKR0_GP101,  input,  X)," & 
    "40  (bc_1,               *,   control,  1)," & 
    "41  (bc_1,  AXR01_DX0_GP104,  output3,  X,     40,   1,   Z)," & 
    "42  (bc_1,  AXR01_DX0_GP104,  input,  X)," & 
    "43  (bc_1,               *,   control,  1)," & 
    "44  (bc_1, AXR02_FSX0_GP103,  output3,  X,     43,   1,   Z)," & 
    "45  (bc_1, AXR02_FSX0_GP103,  input,  X)," & 
    "46  (bc_1,               *,   control,  1)," & 
    "47  (bc_1,      AXR00_GP105,  output3,  X,     46,   1,   Z)," & 
    "48  (bc_1,      AXR00_GP105,  input,  X)," & 
    "49  (bc_1,               *,   control,  1)," & 
    "50  (bc_1,  AFSR0_DR0_GP100,  output3,  X,     49,   1,   Z)," & 
    "51  (bc_1,  AFSR0_DR0_GP100,  input,  X)," & 
    "52  (bc_1,               *,   control,  1)," & 
    "53  (bc_1,ACLKR0_CLKX0_GP99,  output3,  X,     52,   1,   Z)," & 
    "54  (bc_1,ACLKR0_CLKX0_GP99,  input,  X)," & 
    "55  (bc_1,               *,   control,  1)," & 
    "56  (bc_1,     AMUTE0_GP110,  output3,  X,     55,   1,   Z)," & 
    "57  (bc_1,     AMUTE0_GP110,  input,  X)," & 
    "58  (bc_1,               *,   control,  1)," & 
    "59  (bc_1,    AHCLKX0_GP108,  output3,  X,     58,   1,   Z)," & 
    "60  (bc_1,    AHCLKX0_GP108,  input,  X)," & 
    "61  (bc_1,               *,   control,  1)," & 
    "62  (bc_1, AXR03_FSR0_GP102,  output3,  X,     61,   1,   Z)," & 
    "63  (bc_1, AXR03_FSR0_GP102,  input,  X)," & 
    "64  (bc_1,               *,   control,  1)," & 
    "65  (bc_1,      AFSX0_GP107,  output3,  X,     64,   1,   Z)," & 
    "66  (bc_1,      AFSX0_GP107,  input,  X)," & 
    "67  (bc_1,               *,   control,  1)," & 
    "68  (bc_1,     ACLKX0_GP106,  output3,  X,     67,   1,   Z)," & 
    "69  (bc_1,     ACLKX0_GP106,  input,  X)," & 
    "70  (bc_1,               *,   control,  1)," & 
    "71  (bc_1,   AMUTEIN0_GP109,  output3,  X,     70,   1,   Z)," & 
    "72  (bc_1,   AMUTEIN0_GP109,  input,  X)," & 
    "73  (bc_1,               *,   control,  1)," & 
    "74  (bc_1,         GP4_PWM1,  output3,  X,     73,   1,   Z)," & 
    "75  (bc_1,         GP4_PWM1,  input,  X)," & 
    "76  (bc_1,               *,   control,  1)," & 
    "77  (bc_1,          AD0_GP0,  output3,  X,     76,   1,   Z)," & 
    "78  (bc_1,          AD0_GP0,  input,  X)," & 
    "79  (bc_1,               *,   control,  1)," & 
    "80  (bc_1,HCSn_MDCLK_AD5_GP81,  output3,  X,     79,   1,   Z)," & 
    "81  (bc_1,HCSn_MDCLK_AD5_GP81,  input,  X)," & 
    "82  (bc_1,               *,   control,  1)," & 
    "83  (bc_1,          AD1_GP1,  output3,  X,     82,   1,   Z)," & 
    "84  (bc_1,          AD1_GP1,  input,  X)," & 
    "85  (bc_1,               *,   control,  1)," & 
    "86  (bc_1,HINTn_MRXD3_AD6_GP82,  output3,  X,     85,   1,   Z)," & 
    "87  (bc_1,HINTn_MRXD3_AD6_GP82,  input,  X)," & 
    "88  (bc_1,               *,   control,  1)," & 
    "89  (bc_1,          AD2_GP2,  output3,  X,     88,   1,   Z)," & 
    "90  (bc_1,          AD2_GP2,  input,  X)," & 
    "91  (bc_1,               *,   control,  1)," & 
    "92  (bc_1,HDS2n_MRXD0_AD9_GP78,  output3,  X,     91,   1,   Z)," & 
    "93  (bc_1,HDS2n_MRXD0_AD9_GP78,  input,  X)," & 
    "94  (bc_1,               *,   control,  1)," & 
    "95  (bc_1,          AD4_GP3,  output3,  X,     94,   1,   Z)," & 
    "96  (bc_1,          AD4_GP3,  input,  X)," & 
    "97  (bc_1,               *,   control,  1)," & 
    "98  (bc_1,HHWIL_MRXDV_AD13_GP74,  output3,  X,     97,   1,   Z)," & 
    "99  (bc_1,HHWIL_MRXDV_AD13_GP74,  input,  X)," & 
    "100 (bc_1,               *,   control,  1)," & 
    "101 (bc_1,HASn_MDIO_AD3_GP83,  output3,  X,    100,   1,   Z)," & 
    "102 (bc_1,HASn_MDIO_AD3_GP83,  input,  X)," & 
    "103 (bc_1,               *,   control,  1)," & 
    "104 (bc_1,HD11_MTXD3_PCBE1n_GP69,  output3,  X,    103,   1,   Z)," & 
    "105 (bc_1,HD11_MTXD3_PCBE1n_GP69,  input,  X)," & 
    "106 (bc_1,               *,   control,  1)," & 
    "107 (bc_1,HRDYn_MRXD2_PCBE0n_GP80,  output3,  X,    106,   1,   Z)," & 
    "108 (bc_1,HRDYn_MRXD2_PCBE0n_GP80,  input,  X)," & 
    "109 (bc_1,               *,   control,  1)," & 
    "110 (bc_1,HCNTL0_MRXER_AD10_GP76,  output3,  X,    109,   1,   Z)," & 
    "111 (bc_1,HCNTL0_MRXER_AD10_GP76,  input,  X)," & 
    "112 (bc_1,               *,   control,  1)," & 
    "113 (bc_1,HCNTL1_MTXEN_AD11_GP75,  output3,  X,    112,   1,   Z)," & 
    "114 (bc_1,HCNTL1_MTXEN_AD11_GP75,  input,  X)," & 
    "115 (bc_1,               *,   control,  1)," & 
    "116 (bc_1,HDS1n_MRXD1_AD7_GP79,  output3,  X,    115,   1,   Z)," & 
    "117 (bc_1,HDS1n_MRXD1_AD7_GP79,  input,  X)," & 
    "118 (bc_1,               *,   control,  1)," & 
    "119 (bc_1,HD14_MTXD0_AD15_GP72,  output3,  X,    118,   1,   Z)," & 
    "120 (bc_1,HD14_MTXD0_AD15_GP72,  input,  X)," & 
    "121 (bc_1,               *,   control,  1)," & 
    "122 (bc_1,HD13_MTXD1_AD14_GP71,  output3,  X,    121,   1,   Z)," & 
    "123 (bc_1,HD13_MTXD1_AD14_GP71,  input,  X)," & 
    "124 (bc_1,               *,   control,  1)," & 
    "125 (bc_1,HD12_MTXD2_PPAR_GP70,  output3,  X,    124,   1,   Z)," & 
    "126 (bc_1,HD12_MTXD2_PPAR_GP70,  input,  X)," & 
    "127 (bc_1,               *,   control,  1)," & 
    "128 (bc_1,HR_Wn_MRXCLK_AD8_GP77,  output3,  X,    127,   1,   Z)," & 
    "129 (bc_1,HR_Wn_MRXCLK_AD8_GP77,  input,  X)," & 
    "130 (bc_1,               *,   control,  1)," & 
    "131 (bc_1,HD6_VLYNQTXD1_PTRDYn_GP64,  output3,  X,    130,   1,   Z)," & 
    "132 (bc_1,HD6_VLYNQTXD1_PTRDYn_GP64,  input,  X)," & 
    "133 (bc_1,               *,   control,  1)," & 
    "134 (bc_1,HD10_MCRS_PSERRn_GP68,  output3,  X,    133,   1,   Z)," & 
    "135 (bc_1,HD10_MCRS_PSERRn_GP68,  input,  X)," & 
    "136 (bc_1,               *,   control,  1)," & 
    "137 (bc_1,HD1_VLYNQRXD0_AD16_GP59,  output3,  X,    136,   1,   Z)," & 
    "138 (bc_1,HD1_VLYNQRXD0_AD16_GP59,  input,  X)," & 
    "139 (bc_1,               *,   control,  1)," & 
    "140 (bc_1,HD15_MTXCLK_AD12_GP73,  output3,  X,    139,   1,   Z)," & 
    "141 (bc_1,HD15_MTXCLK_AD12_GP73,  input,  X)," & 
    "142 (bc_1,               *,   control,  1)," & 
    "143 (bc_1,HD9_MCOL_PSTOPn_GP67,  output3,  X,    142,   1,   Z)," & 
    "144 (bc_1,HD9_MCOL_PSTOPn_GP67,  input,  X)," & 
    "145 (bc_1,               *,   control,  1)," & 
    "146 (bc_1,HD7_VLYNQTXD2_PDEVSELn_GP65,  output3,  X,    145,   1,   Z)," & 
    "147 (bc_1,HD7_VLYNQTXD2_PDEVSELn_GP65,  input,  X)," & 
    "148 (bc_1,               *,   control,  1)," & 
    "149 (bc_1,HD4_VLYNQRXD3_PFRAMEn_GP62,  output3,  X,    148,   1,   Z)," & 
    "150 (bc_1,HD4_VLYNQRXD3_PFRAMEn_GP62,  input,  X)," & 
    "151 (bc_1,               *,   control,  1)," & 
    "152 (bc_1,HD8_VLYNQTXD3_PPERRn_GP66,  output3,  X,    151,   1,   Z)," & 
    "153 (bc_1,HD8_VLYNQTXD3_PPERRn_GP66,  input,  X)," & 
    "154 (bc_1,               *,   control,  1)," & 
    "155 (bc_1,   EMA6_AD20_GP95,  output3,  X,    154,   1,   Z)," & 
    "156 (bc_1,   EMA6_AD20_GP95,  input,  X)," & 
    "157 (bc_1,               *,   control,  1)," & 
    "158 (bc_1,HD5_VLYNQTXD0_PIRDYn_GP63,  output3,  X,    157,   1,   Z)," & 
    "159 (bc_1,HD5_VLYNQTXD0_PIRDYn_GP63,  input,  X)," & 
    "160 (bc_1,               *,   control,  1)," & 
    "161 (bc_1,HD3_VLYNQRXD2_PCBE2n_GP61,  output3,  X,    160,   1,   Z)," & 
    "162 (bc_1,HD3_VLYNQRXD2_PCBE2n_GP61,  input,  X)," & 
    "163 (bc_1,               *,   control,  1)," & 
    "164 (bc_1,VLYNQCLOCK_PCICLK_GP57,  output3,  X,    163,   1,   Z)," & 
    "165 (bc_1,VLYNQCLOCK_PCICLK_GP57,  input,  X)," & 
    "166 (bc_1,               *,   control,  1)," & 
    "167 (bc_1,HD0_VLYNQSCRUN_AD18_GP58,  output3,  X,    166,   1,   Z)," & 
    "168 (bc_1,HD0_VLYNQSCRUN_AD18_GP58,  input,  X)," & 
    "169 (bc_1,               *,   control,  1)," & 
    "170 (bc_1,   EMA5_AD19_GP96,  output3,  X,    169,   1,   Z)," & 
    "171 (bc_1,   EMA5_AD19_GP96,  input,  X)," & 
    "172 (bc_1,               *,   control,  1)," & 
    "173 (bc_1,HD2_VLYNQRXD1_AD17_GP60,  output3,  X,    172,   1,   Z)," & 
    "174 (bc_1,HD2_VLYNQRXD1_AD17_GP60,  input,  X)," & 
    "175 (bc_1,               *,   control,  1)," & 
    "176 (bc_1, EMA9_PIDSEL_GP92,  output3,  X,    175,   1,   Z)," & 
    "177 (bc_1, EMA9_PIDSEL_GP92,  input,  X)," & 
    "178 (bc_1,               *,   control,  1)," & 
    "179 (bc_1,   EMA8_AD21_GP93,  output3,  X,    178,   1,   Z)," & 
    "180 (bc_1,   EMA8_AD21_GP93,  input,  X)," & 
    "181 (bc_1,               *,   control,  1)," & 
    "182 (bc_1,   EMA7_AD22_GP94,  output3,  X,    181,   1,   Z)," & 
    "183 (bc_1,   EMA7_AD22_GP94,  input,  X)," & 
    "184 (bc_1,               *,   control,  1)," & 
    "185 (bc_1,  EMA10_AD23_GP91,  output3,  X,    184,   1,   Z)," & 
    "186 (bc_1,  EMA10_AD23_GP91,  input,  X)," & 
    "187 (bc_1,               *,   control,  1)," & 
    "188 (bc_1,  EMA11_AD24_GP90,  output3,  X,    187,   1,   Z)," & 
    "189 (bc_1,  EMA11_AD24_GP90,  input,  X)," & 
    "190 (bc_1,               *,   control,  1)," & 
    "191 (bc_1,            AD26,  output3,  X,    190,   1,   Z)," & 
    "192 (bc_1,            AD26,  input,  X)," & 
    "193 (bc_1,               *,   control,  1)," & 
    "194 (bc_1,EMA13_AD25_EMD0_GP51,  output3,  X,    193,   1,   Z)," & 
    "195 (bc_1,EMA13_AD25_EMD0_GP51,  input,  X)," & 
    "196 (bc_1,               *,   control,  1)," & 
    "197 (bc_1,EMA12_PCBE3n_GP89,  output3,  X,    196,   1,   Z)," & 
    "198 (bc_1,EMA12_PCBE3n_GP89,  input,  X)," & 
    "199 (bc_1,               *,   control,  1)," & 
    "200 (bc_1,MA14_AD27_EMD1_GP50,  output3,  X,    199,   1,   Z)," & 
    "201 (bc_1,MA14_AD27_EMD1_GP50,  input,  X)," & 
    "202 (bc_1,               *,   control,  1)," & 
    "203 (bc_1,EMA16_PGNTn_EMD3_GP48,  output3,  X,    202,   1,   Z)," & 
    "204 (bc_1,EMA16_PGNTn_EMD3_GP48,  input,  X)," & 
    "205 (bc_1,               *,   control,  1)," & 
    "206 (bc_1,EMA15_AD29_EMD2_GP49,  output3,  X,    205,   1,   Z)," & 
    "207 (bc_1,EMA15_AD29_EMD2_GP49,  input,  X)," & 
    "208 (bc_1,               *,   control,  1)," & 
    "209 (bc_1,EMA18_PRSTn_EMD5_GP46,  output3,  X,    208,   1,   Z)," & 
    "210 (bc_1,EMA18_PRSTn_EMD5_GP46,  input,  X)," & 
    "211 (bc_1,               *,   control,  1)," & 
    "212 (bc_1,EMA17_AD31_EMD4_GP47,  output3,  X,    211,   1,   Z)," & 
    "213 (bc_1,EMA17_AD31_EMD4_GP47,  input,  X)," & 
    "214 (bc_1,               *,   control,  1)," & 
    "215 (bc_1,            AD28,  output3,  X,    214,   1,   Z)," & 
    "216 (bc_1,            AD28,  input,  X)," & 
    "217 (bc_1,               *,   control,  1)," & 
    "218 (bc_1,EMA19_PREQn_EMD6_GP45,  output3,  X,    217,   1,   Z)," & 
    "219 (bc_1,EMA19_PREQn_EMD6_GP45,  input,  X)," & 
    "220 (bc_1,               *,   control,  1)," & 
    "221 (bc_1,            AD30,  output3,  X,    220,   1,   Z)," & 
    "222 (bc_1,            AD30,  input,  X)," & 
    "223 (bc_1,               *,   control,  1)," & 
    "224 (bc_1,EMA20_PINTAn_EMD7_GP44,  output3,  X,    223,   1,   Z)," & 
    "225 (bc_1,EMA20_PINTAn_EMD7_GP44,  input,  X)," & 
    "226 (bc_1,               *,   control,  1)," & 
    "227 (bc_1,       EMA21_GP34,  output3,  X,    226,   1,   Z)," & 
    "228 (bc_1,       EMA21_GP34,  input,  X)," & 
    "229 (bc_1,               *,   control,  1)," & 
    "230 (bc_1,             GP43,  output3,  X,    229,   1,   Z)," & 
    "231 (bc_1,             GP43,  input,  X)," & 
    "232 (bc_1,               *,   control,  1)," & 
    "233 (bc_1,             GP53,  output3,  X,    232,   1,   Z)," & 
    "234 (bc_1,             GP53,  input,  X)," & 
    "235 (bc_1,               *,   control,  1)," & 
    "236 (bc_1,             GP42,  output3,  X,    235,   1,   Z)," & 
    "237 (bc_1,             GP42,  input,  X)," & 
    "238 (bc_1,               *,   control,  1)," & 
    "239 (bc_1,             GP41,  output3,  X,    238,   1,   Z)," & 
    "240 (bc_1,             GP41,  input,  X)," & 
    "241 (bc_1,               *,   control,  1)," & 
    "242 (bc_1,             GP39,  output3,  X,    241,   1,   Z)," & 
    "243 (bc_1,             GP39,  input,  X)," & 
    "244 (bc_1,               *,   control,  1)," & 
    "245 (bc_1,             GP54,  output3,  X,    244,   1,   Z)," & 
    "246 (bc_1,             GP54,  input,  X)," & 
    "247 (bc_1,               *,   control,  1)," & 
    "248 (bc_1,      EMR_Wn_GP35,  output3,  X,    247,   1,   Z)," & 
    "249 (bc_1,      EMR_Wn_GP35,  input,  X)," & 
    "250 (bc_1,               *,   control,  1)," & 
    "251 (bc_1,             GP52,  output3,  X,    250,   1,   Z)," & 
    "252 (bc_1,             GP52,  input,  X)," & 
    "253 (bc_1,               *,   control,  1)," & 
    "254 (bc_1,             GP38,  output3,  X,    253,   1,   Z)," & 
    "255 (bc_1,             GP38,  input,  X)," & 
    "256 (bc_1,               *,   control,  1)," & 
    "257 (bc_1,             GP37,  output3,  X,    256,   1,   Z)," & 
    "258 (bc_1,             GP37,  input,  X)," & 
    "259 (bc_1,               *,   control,  1)," & 
    "260 (bc_1,             GP40,  output3,  X,    259,   1,   Z)," & 
    "261 (bc_1,             GP40,  input,  X)," & 
    "262 (bc_1,               *,   control,  1)," & 
    "263 (bc_1,            EMWEn,  output3,  X,    262,   1,   Z)," & 
    "264 (bc_1,            EMWEn,  input,  X)," & 
    "265 (bc_1,               *,   control,  1)," & 
    "266 (bc_1,             GP36,  output3,  X,    265,   1,   Z)," & 
    "267 (bc_1,             GP36,  input,  X)," & 
    "268 (bc_1,               *,   control,  1)," & 
    "269 (bc_1,B1_EMA2_CLE_GP8_AEAW0_PLLMS0,  output3,  X,    268,   1,   Z)," & 
    "270 (bc_1,B1_EMA2_CLE_GP8_AEAW0_PLLMS0,  input,  X)," & 
    "271 (bc_1,               *,   control,  1)," & 
    "272 (bc_1,G1_EMA1_ALE_GP9_AEAW1_PLLMS1,  output3,  X,    271,   1,   Z)," & 
    "273 (bc_1,G1_EMA1_ALE_GP9_AEAW1_PLLMS1,  input,  X)," & 
    "274 (bc_1,               *,   control,  1)," & 
    "275 (bc_1,R0_EMA4_GP10_AEAW2_PLLMS2,  output3,  X,    274,   1,   Z)," & 
    "276 (bc_1,R0_EMA4_GP10_AEAW2_PLLMS2,  input,  X)," & 
    "277 (bc_1,               *,   control,  1)," & 
    "278 (bc_1,            EMOEn,  output3,  X,    277,   1,   Z)," & 
    "279 (bc_1,            EMOEn,  input,  X)," & 
    "280 (bc_1,               *,   control,  1)," & 
    "281 (bc_1, R1_EMA0_GP7_AEM2,  output3,  X,    280,   1,   Z)," & 
    "282 (bc_1, R1_EMA0_GP7_AEM2,  input,  X)," & 
    "283 (bc_1,               *,   control,  1)," & 
    "284 (bc_1,B2_EMBA1_GP5_AEM0,  output3,  X,    283,   1,   Z)," & 
    "285 (bc_1,B2_EMBA1_GP5_AEM0,  input,  X)," & 
    "286 (bc_1,               *,   control,  1)," & 
    "287 (bc_1,  COUT0_EMD0_GP14,  output3,  X,    286,   1,   Z)," & 
    "288 (bc_1,  COUT0_EMD0_GP14,  input,  X)," & 
    "289 (bc_1,               *,   control,  1)," & 
    "290 (bc_1,  COUT2_EMD2_GP16,  output3,  X,    289,   1,   Z)," & 
    "291 (bc_1,  COUT2_EMD2_GP16,  input,  X)," & 
    "292 (bc_1,               *,   control,  1)," & 
    "293 (bc_1,  COUT3_EMD3_GP17,  output3,  X,    292,   1,   Z)," & 
    "294 (bc_1,  COUT3_EMD3_GP17,  input,  X)," & 
    "295 (bc_1,               *,   control,  1)," & 
    "296 (bc_1,B0_LCDFIELD_EMA3_GP11,  output3,  X,    295,   1,   Z)," & 
    "297 (bc_1,B0_LCDFIELD_EMA3_GP11,  input,  X)," & 
    "298 (bc_1,               *,   control,  1)," & 
    "299 (bc_1,  COUT6_EMD6_GP20,  output3,  X,    298,   1,   Z)," & 
    "300 (bc_1,  COUT6_EMD6_GP20,  input,  X)," & 
    "301 (bc_1,               *,   control,  1)," & 
    "302 (bc_1,LCDOE_EMCS3n_GP13,  output3,  X,    301,   1,   Z)," & 
    "303 (bc_1,LCDOE_EMCS3n_GP13,  input,  X)," & 
    "304 (bc_1,               *,   control,  1)," & 
    "305 (bc_1,  EMWAIT_RDY_BSYn,  output3,  X,    304,   1,   Z)," & 
    "306 (bc_1,  EMWAIT_RDY_BSYn,  input,  X)," & 
    "307 (bc_1,               *,   control,  1)," & 
    "308 (bc_1,  COUT1_EMD1_GP15,  output3,  X,    307,   1,   Z)," & 
    "309 (bc_1,  COUT1_EMD1_GP15,  input,  X)," & 
    "310 (bc_1,               *,   control,  1)," & 
    "311 (bc_1,R2_EMBA0_GP6_AEM1,  output3,  X,    310,   1,   Z)," & 
    "312 (bc_1,R2_EMBA0_GP6_AEM1,  input,  X)," & 
    "313 (bc_1,               *,   control,  1)," & 
    "314 (bc_1,  COUT4_EMD4_GP18,  output3,  X,    313,   1,   Z)," & 
    "315 (bc_1,  COUT4_EMD4_GP18,  input,  X)," & 
    "316 (bc_1,               *,   control,  1)," & 
    "317 (bc_1,YOUT0_GP22_BOOTMODE0,  output3,  X,    316,   1,   Z)," & 
    "318 (bc_1,YOUT0_GP22_BOOTMODE0,  input,  X)," & 
    "319 (bc_1,               *,   control,  1)," & 
    "320 (bc_1,YOUT3_GP25_BOOTMODE3,  output3,  X,    319,   1,   Z)," & 
    "321 (bc_1,YOUT3_GP25_BOOTMODE3,  input,  X)," & 
    "322 (bc_1,               *,   control,  1)," & 
    "323 (bc_1,   G0_EMCS2n_GP12,  output3,  X,    322,   1,   Z)," & 
    "324 (bc_1,   G0_EMCS2n_GP12,  input,  X)," & 
    "325 (bc_1,               *,   control,  1)," & 
    "326 (bc_1,  COUT5_EMD5_GP19,  output3,  X,    325,   1,   Z)," & 
    "327 (bc_1,  COUT5_EMD5_GP19,  input,  X)," & 
    "328 (bc_1,               *,   control,  1)," & 
    "329 (bc_1,        VCLK_GP31,  output3,  X,    328,   1,   Z)," & 
    "330 (bc_1,        VCLK_GP31,  input,  X)," & 
    "331 (bc_1,               *,   control,  1)," & 
    "332 (bc_1,  COUT7_EMD7_GP21,  output3,  X,    331,   1,   Z)," & 
    "333 (bc_1,  COUT7_EMD7_GP21,  input,  X)," & 
    "334 (bc_1,               *,   control,  1)," & 
    "335 (bc_1,YOUT1_GP23_BOOTMODE1,  output3,  X,    334,   1,   Z)," & 
    "336 (bc_1,YOUT1_GP23_BOOTMODE1,  input,  X)," & 
    "337 (bc_1,               *,   control,  1)," & 
    "338 (bc_1,VSYNC_EMCS4n_GP32,  output3,  X,    337,   1,   Z)," & 
    "339 (bc_1,VSYNC_EMCS4n_GP32,  input,  X)," & 
    "340 (bc_1,               *,   control,  1)," & 
    "341 (bc_1,YOUT4_GP26_FASTBOOT,  output3,  X,    340,   1,   Z)," & 
    "342 (bc_1,YOUT4_GP26_FASTBOOT,  input,  X)," & 
    "343 (bc_1,               *,   control,  1)," & 
    "344 (bc_1,       YOUT6_GP28,  output3,  X,    343,   1,   Z)," & 
    "345 (bc_1,       YOUT6_GP28,  input,  X)," & 
    "346 (bc_1,               *,   control,  1)," & 
    "347 (bc_1,HSYNC_EMCS5n_GP33,  output3,  X,    346,   1,   Z)," & 
    "348 (bc_1,HSYNC_EMCS5n_GP33,  input,  X)," & 
    "349 (bc_1,               *,   control,  1)," & 
    "350 (bc_1,YOUT2_GP24_BOOTMODE2,  output3,  X,    349,   1,   Z)," & 
    "351 (bc_1,YOUT2_GP24_BOOTMODE2,  input,  X)," & 
    "352 (bc_1,               *,   control,  1)," & 
    "353 (bc_1,       YOUT7_GP29,  output3,  X,    352,   1,   Z)," & 
    "354 (bc_1,       YOUT7_GP29,  input,  X)," & 
    "355 (bc_1,               *,   control,  1)," & 
    "356 (bc_1,     VPBECLK_GP30,  output3,  X,    355,   1,   Z)," & 
    "357 (bc_1,     VPBECLK_GP30,  input,  X)," & 
    "358 (bc_1,               *,   control,  1)," & 
    "359 (bc_1,       YOUT5_GP27,  output3,  X,    358,   1,   Z)," & 
    "360 (bc_1,       YOUT5_GP27,  input,  X)," & 
    "361 (bc_1,               *,   control,  1)," & 
    "362 (bc_1,           DDRD31,  output3,  X,    361,   1,   Z)," & 
    "363 (bc_1,           DDRD31,  input,  X)," & 
    "364 (bc_1,               *,   control,  1)," & 
    "365 (bc_1,           DDRD30,  output3,  X,    364,   1,   Z)," & 
    "366 (bc_1,           DDRD30,  input,  X)," & 
    "367 (bc_1,               *,   control,  1)," & 
    "368 (bc_1,           DDRD29,  output3,  X,    367,   1,   Z)," & 
    "369 (bc_1,           DDRD29,  input,  X)," & 
    "370 (bc_1,               *,   control,  1)," & 
    "371 (bc_1,           DDRD28,  output3,  X,    370,   1,   Z)," & 
    "372 (bc_1,           DDRD28,  input,  X)," & 
    "373 (bc_1,               *,   control,  1)," & 
    "374 (bc_1,          DDRDQM3,  output3,  X,    373,   1,   Z)," & 
    "375 (bc_1,          DDRDQM3,  input,  X)," & 
    "376 (bc_1,               *,   control,  1)," & 
    "377 (bc_1,          DDRDQS3,  output3,  X,    376,   1,   Z)," & 
    "378 (bc_1,          DDRDQS3,  input,  X)," & 
    "379 (bc_1,               *,   control,  1)," & 
    "380 (bc_1,           DDRD27,  output3,  X,    379,   1,   Z)," & 
    "381 (bc_1,           DDRD27,  input,  X)," & 
    "382 (bc_1,               *,   control,  1)," & 
    "383 (bc_1,           DDRD26,  output3,  X,    382,   1,   Z)," & 
    "384 (bc_1,           DDRD26,  input,  X)," & 
    "385 (bc_1,               *,   control,  1)," & 
    "386 (bc_1,           DDRD25,  output3,  X,    385,   1,   Z)," & 
    "387 (bc_1,           DDRD25,  input,  X)," & 
    "388 (bc_1,               *,   control,  1)," & 
    "389 (bc_1,           DDRD24,  output3,  X,    388,   1,   Z)," & 
    "390 (bc_1,           DDRD24,  input,  X)," & 
    "391 (bc_1,               *,   control,  1)," & 
    "392 (bc_1,           DDRD23,  output3,  X,    391,   1,   Z)," & 
    "393 (bc_1,           DDRD23,  input,  X)," & 
    "394 (bc_1,               *,   control,  1)," & 
    "395 (bc_1,           DDRD22,  output3,  X,    394,   1,   Z)," & 
    "396 (bc_1,           DDRD22,  input,  X)," & 
    "397 (bc_1,               *,   control,  1)," & 
    "398 (bc_1,           DDRD21,  output3,  X,    397,   1,   Z)," & 
    "399 (bc_1,           DDRD21,  input,  X)," & 
    "400 (bc_1,               *,   control,  1)," & 
    "401 (bc_1,           DDRD20,  output3,  X,    400,   1,   Z)," & 
    "402 (bc_1,           DDRD20,  input,  X)," & 
    "403 (bc_1,               *,   control,  1)," & 
    "404 (bc_1,          DDRDQS2,  output3,  X,    403,   1,   Z)," & 
    "405 (bc_1,          DDRDQS2,  input,  X)," & 
    "406 (bc_1,               *,   control,  1)," & 
    "407 (bc_1,          DDRDQM2,  output3,  X,    406,   1,   Z)," & 
    "408 (bc_1,          DDRDQM2,  input,  X)," & 
    "409 (bc_1,               *,   control,  1)," & 
    "410 (bc_1,           DDRD19,  output3,  X,    409,   1,   Z)," & 
    "411 (bc_1,           DDRD19,  input,  X)," & 
    "412 (bc_1,               *,   control,  1)," & 
    "413 (bc_1,           DDRD18,  output3,  X,    412,   1,   Z)," & 
    "414 (bc_1,           DDRD18,  input,  X)," & 
    "415 (bc_1,               *,   control,  1)," & 
    "416 (bc_1,           DDRD17,  output3,  X,    415,   1,   Z)," & 
    "417 (bc_1,           DDRD17,  input,  X)," & 
    "418 (bc_1,               *,   control,  1)," & 
    "419 (bc_1,           DDRD16,  output3,  X,    418,   1,   Z)," & 
    "420 (bc_1,           DDRD16,  input,  X)," & 
    "421 (bc_1,               *,   control,  1)," & 
    "422 (bc_1,            DDRA0,  output3,  X,    421,   1,   Z)," & 
    "423 (bc_1,            DDRA0,  input,  X)," & 
    "424 (bc_1,               *,   control,  1)," & 
    "425 (bc_1,            DDRA1,  output3,  X,    424,   1,   Z)," & 
    "426 (bc_1,            DDRA1,  input,  X)," & 
    "427 (bc_1,               *,   control,  1)," & 
    "428 (bc_1,            DDRA2,  output3,  X,    427,   1,   Z)," & 
    "429 (bc_1,            DDRA2,  input,  X)," & 
    "430 (bc_1,               *,   control,  1)," & 
    "431 (bc_1,            DDRA3,  output3,  X,    430,   1,   Z)," & 
    "432 (bc_1,            DDRA3,  input,  X)," & 
    "433 (bc_1,               *,   control,  1)," & 
    "434 (bc_1,            DDRA4,  output3,  X,    433,   1,   Z)," & 
    "435 (bc_1,            DDRA4,  input,  X)," & 
    "436 (bc_1,               *,   control,  1)," & 
    "437 (bc_1,            DDRA5,  output3,  X,    436,   1,   Z)," & 
    "438 (bc_1,            DDRA5,  input,  X)," & 
    "439 (bc_1,               *,   control,  1)," & 
    "440 (bc_1,            DDRA6,  output3,  X,    439,   1,   Z)," & 
    "441 (bc_1,            DDRA6,  input,  X)," & 
    "442 (bc_1,               *,   control,  1)," & 
    "443 (bc_1,            DDRA7,  output3,  X,    442,   1,   Z)," & 
    "444 (bc_1,            DDRA7,  input,  X)," & 
    "445 (bc_1,               *,   control,  1)," & 
    "446 (bc_1,            DDRA8,  output3,  X,    445,   1,   Z)," & 
    "447 (bc_1,            DDRA8,  input,  X)," & 
    "448 (bc_1,               *,   control,  1)," & 
    "449 (bc_1,            DDRA9,  output3,  X,    448,   1,   Z)," & 
    "450 (bc_1,            DDRA9,  input,  X)," & 
    "451 (bc_1,               *,   control,  1)," & 
    "452 (bc_1,           DDRA10,  output3,  X,    451,   1,   Z)," & 
    "453 (bc_1,           DDRA10,  input,  X)," & 
    "454 (bc_1,               *,   control,  1)," & 
    "455 (bc_1,           DDRA11,  output3,  X,    454,   1,   Z)," & 
    "456 (bc_1,           DDRA11,  input,  X)," & 
    "457 (bc_1,               *,   control,  1)," & 
    "458 (bc_1,           DDRA12,  output3,  X,    457,   1,   Z)," & 
    "459 (bc_1,           DDRA12,  input,  X)," & 
    "460 (bc_1,               *,   control,  1)," & 
    "461 (bc_1,           DDR_BA0, output3,  X,    460,   1,   Z)," & 
    "462 (bc_1,           DDR_BA0, input,  X)," & 
    "463 (bc_1,               *,   control,  1)," & 
    "464 (bc_1,           DDR_BA1, output3,  X,    463,   1,   Z)," & 
    "465 (bc_1,           DDR_BA1, input,  X)," & 
    "466 (bc_1,               *,   control,  1)," & 
    "467 (bc_1,           DDR_BA2, output3,  X,    466,   1,   Z)," & 
    "468 (bc_1,           DDR_BA2, input,  X)," & 
    "469 (bc_1,               *,   control,  1)," & 
    "470 (bc_1,         DDR_CLKn,  output3,  X,    469,   1,   Z)," & 
    "471 (bc_1,         DDR_CLKn,  input,  X)," & 
    "472 (bc_1,               *,   control,  1)," & 
    "473 (bc_1,          DDR_CLK,  output3,  X,    472,   1,   Z)," & 
    "474 (bc_1,          DDR_CLK,  input,  X)," & 
    "475 (bc_1,               *,   control,  1)," & 
    "476 (bc_1,           DDRCKE,  output3,  X,    475,   1,   Z)," & 
    "477 (bc_1,           DDRCKE,  input,  X)," & 
    "478 (bc_1,               *,   control,  1)," & 
    "479 (bc_1,           DDRCSn,  output3,  X,    478,   1,   Z)," & 
    "480 (bc_1,           DDRCSn,  input,  X)," & 
    "481 (bc_1,               *,   control,  1)," & 
    "482 (bc_1,           DDRWEn,  output3,  X,    481,   1,   Z)," & 
    "483 (bc_1,           DDRWEn,  input,  X)," & 
    "484 (bc_1,               *,   control,  1)," & 
    "485 (bc_1,          DDRRASn,  output3,  X,    484,   1,   Z)," & 
    "486 (bc_1,          DDRRASn,  input,  X)," & 
    "487 (bc_1,               *,   control,  1)," & 
    "488 (bc_1,          DDRCASn,  output3,  X,    487,   1,   Z)," & 
    "489 (bc_1,          DDRCASn,  input,  X)," & 
    "490 (bc_1,               *,   control,  1)," & 
    "491 (bc_1,           DDRD15,  output3,  X,    490,   1,   Z)," & 
    "492 (bc_1,           DDRD15,  input,  X)," & 
    "493 (bc_1,               *,   control,  1)," & 
    "494 (bc_1,           DDRD14,  output3,  X,    493,   1,   Z)," & 
    "495 (bc_1,           DDRD14,  input,  X)," & 
    "496 (bc_1,               *,   control,  1)," & 
    "497 (bc_1,           DDRD13,  output3,  X,    496,   1,   Z)," & 
    "498 (bc_1,           DDRD13,  input,  X)," & 
    "499 (bc_1,               *,   control,  1)," & 
    "500 (bc_1,           DDRD12,  output3,  X,    499,   1,   Z)," & 
    "501 (bc_1,           DDRD12,  input,  X)," & 
    "502 (bc_1,               *,   control,  1)," & 
    "503 (bc_1,          DDRDQM1,  output3,  X,    502,   1,   Z)," & 
    "504 (bc_1,          DDRDQM1,  input,  X)," & 
    "505 (bc_1,               *,   control,  1)," & 
    "506 (bc_1,          DDRDQS1,  output3,  X,    505,   1,   Z)," & 
    "507 (bc_1,          DDRDQS1,  input,  X)," & 
    "508 (bc_1,               *,   control,  1)," & 
    "509 (bc_1,           DDRD11,  output3,  X,    508,   1,   Z)," & 
    "510 (bc_1,           DDRD11,  input,  X)," & 
    "511 (bc_1,               *,   control,  1)," & 
    "512 (bc_1,           DDRD10,  output3,  X,    511,   1,   Z)," & 
    "513 (bc_1,           DDRD10,  input,  X)," & 
    "514 (bc_1,               *,   control,  1)," & 
    "515 (bc_1,            DDRD9,  output3,  X,    514,   1,   Z)," & 
    "516 (bc_1,            DDRD9,  input,  X)," & 
    "517 (bc_1,               *,   control,  1)," & 
    "518 (bc_1,            DDRD8,  output3,  X,    517,   1,   Z)," & 
    "519 (bc_1,            DDRD8,  input,  X)," & 
    "520 (bc_1,               *,   control,  1)," & 
    "521 (bc_1,            DDRD7,  output3,  X,    520,   1,   Z)," & 
    "522 (bc_1,            DDRD7,  input,  X)," & 
    "523 (bc_1,               *,   control,  1)," & 
    "524 (bc_1,            DDRD6,  output3,  X,    523,   1,   Z)," & 
    "525 (bc_1,            DDRD6,  input,  X)," & 
    "526 (bc_1,               *,   control,  1)," & 
    "527 (bc_1,            DDRD5,  output3,  X,    526,   1,   Z)," & 
    "528 (bc_1,            DDRD5,  input,  X)," & 
    "529 (bc_1,               *,   control,  1)," & 
    "530 (bc_1,            DDRD4,  output3,  X,    529,   1,   Z)," & 
    "531 (bc_1,            DDRD4,  input,  X)," & 
    "532 (bc_1,               *,   control,  1)," & 
    "533 (bc_1,          DDRDQS0,  output3,  X,    532,   1,   Z)," & 
    "534 (bc_1,          DDRDQS0,  input,  X)," & 
    "535 (bc_1,               *,   control,  1)," & 
    "536 (bc_1,          DDRDQM0,  output3,  X,    535,   1,   Z)," & 
    "537 (bc_1,          DDRDQM0,  input,  X)," & 
    "538 (bc_1,               *,   control,  1)," & 
    "539 (bc_1,            DDRD3,  output3,  X,    538,   1,   Z)," & 
    "540 (bc_1,            DDRD3,  input,  X)," & 
    "541 (bc_1,               *,   control,  1)," & 
    "542 (bc_1,            DDRD2,  output3,  X,    541,   1,   Z)," & 
    "543 (bc_1,            DDRD2,  input,  X)," & 
    "544 (bc_1,               *,   control,  1)," & 
    "545 (bc_1,            DDRD1,  output3,  X,    544,   1,   Z)," & 
    "546 (bc_1,            DDRD1,  input,  X)," & 
    "547 (bc_1,               *,   control,  1)," & 
    "548 (bc_1,            DDRD0,  output3,  X,    547,   1,   Z)," & 
    "549 (bc_1,            DDRD0,  input,  X)" ; 
 
     attribute DESIGN_WARNING of TMS320DM6433: entity is
               "According to simulation, BSD JTAG TAP may not work correctly unless   " &
               "device has completed Power on Reset sequence first. If the BSDL tool  " &
               "does not use TRSTn pin, please put a 10K Ohm pull up resistor on this pin. " ;
 
 end TMS320DM6433;