-- ===================================================================
-- $Id: DS34S132.bsdl.rca 1.2 Wed Feb 25 08:39:55 2009 pnani Experimental $
-- ===================================================================
-- Copyright (c) 2009 MAXIM Integrated Products
-- All Rights Reserved.
--
-- THIS MATERIAL IS CONSIDERED PROPRIETARY BY
-- MAXIM Integrated Products. UNAUTHORIZED ACCESS OR USE IS PROHIBITED.
-- ===================================================================
-- $RCSfile: DS34S132.bsdl.rca $
--
-- $Author: pnani $
-- ===================================================================
--
-- Abstract :
--
-- Detail :
--
-- Usage :
--
-- File usage :
-- Script name: "/design/telecom/DS31IP38/users/release/design/scripts/create_jtag_and_pads", Version 1.91
-- (This script is maintained in /design/telecom/DS31IP38/users/release)
-- BSDL Script name: "/design/telecom/DS31IP38/users/release/design/scripts/bsdl.pm", Version 1.35, Wed Nov 28 14:21:36 2007
-- (This script is maintained in /design/telecom/DS31IP38/users/release)
-- Library name:"/design/telecom/DS31IP38/users/release/design/scripts/library.tsmc_18.pm", Version 1.114
-- Pindef file: "DS34S132.pindef", Version unknown
--
--
--
-- This file was script-generated.
--
-- ===================================================================
-- ===================================================================
-- BSDL file for design DS34S132
-- Created by DS31IP38 JTAG generator
-- Date:
-- ***********************************************************************
entity DS34S132 is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "HSPBGA676");
-- This section declares all the ports in the design.
port (
AVDD : linkage bit;
AVSS : linkage bit;
CMNCLK : inout bit;
COL : inout bit;
CRS : inout bit;
CVDD : linkage bit;
CVSS : linkage bit;
DDRCLK : inout bit;
EPHYRST_N : inout bit;
ETHCLK : inout bit;
EXTCLK : inout bit_vector (0 to 1);
EXTINT : inout bit;
GTXCLK : inout bit;
HIZ_N : in bit;
JTCLK : in bit;
JTDI : in bit;
JTDO : out bit;
JTMS : in bit;
JTRST_N : in bit;
LIUCLK : inout bit;
MDC : inout bit;
MDIO : inout bit;
MT : inout bit_vector (0 to 15);
PA : inout bit_vector (1 to 13);
PALE : inout bit;
PCS_N : inout bit;
PD : inout bit_vector (0 to 31);
PINT_N : inout bit;
PRW : inout bit;
PRWCTRL : inout bit;
PTA_N : inout bit;
PWIDTH : inout bit;
RCLK0 : inout bit;
RCLK1 : inout bit;
RCLK10 : inout bit;
RCLK11 : inout bit;
RCLK12 : inout bit;
RCLK13 : inout bit;
RCLK14 : inout bit;
RCLK15 : inout bit;
RCLK16 : inout bit;
RCLK17 : inout bit;
RCLK18 : inout bit;
RCLK19 : inout bit;
RCLK2 : inout bit;
RCLK20 : inout bit;
RCLK21 : inout bit;
RCLK22 : inout bit;
RCLK23 : inout bit;
RCLK24 : inout bit;
RCLK25 : inout bit;
RCLK26 : inout bit;
RCLK27 : inout bit;
RCLK28 : inout bit;
RCLK29 : inout bit;
RCLK3 : inout bit;
RCLK30 : inout bit;
RCLK31 : inout bit;
RCLK4 : inout bit;
RCLK5 : inout bit;
RCLK6 : inout bit;
RCLK7 : inout bit;
RCLK8 : inout bit;
RCLK9 : inout bit;
RDAT0 : inout bit;
RDAT1 : inout bit;
RDAT10 : inout bit;
RDAT11 : inout bit;
RDAT12 : inout bit;
RDAT13 : inout bit;
RDAT14 : inout bit;
RDAT15 : inout bit;
RDAT16 : inout bit;
RDAT17 : inout bit;
RDAT18 : inout bit;
RDAT19 : inout bit;
RDAT2 : inout bit;
RDAT20 : inout bit;
RDAT21 : inout bit;
RDAT22 : inout bit;
RDAT23 : inout bit;
RDAT24 : inout bit;
RDAT25 : inout bit;
RDAT26 : inout bit;
RDAT27 : inout bit;
RDAT28 : inout bit;
RDAT29 : inout bit;
RDAT3 : inout bit;
RDAT30 : inout bit;
RDAT31 : inout bit;
RDAT4 : inout bit;
RDAT5 : inout bit;
RDAT6 : inout bit;
RDAT7 : inout bit;
RDAT8 : inout bit;
RDAT9 : inout bit;
REFCLK : inout bit;
RSIG0 : inout bit;
RSIG1 : inout bit;
RSIG10 : inout bit;
RSIG11 : inout bit;
RSIG12 : inout bit;
RSIG13 : inout bit;
RSIG14 : inout bit;
RSIG15 : inout bit;
RSIG16 : inout bit;
RSIG17 : inout bit;
RSIG18 : inout bit;
RSIG19 : inout bit;
RSIG2 : inout bit;
RSIG20 : inout bit;
RSIG21 : inout bit;
RSIG22 : inout bit;
RSIG23 : inout bit;
RSIG24 : inout bit;
RSIG25 : inout bit;
RSIG26 : inout bit;
RSIG27 : inout bit;
RSIG28 : inout bit;
RSIG29 : inout bit;
RSIG3 : inout bit;
RSIG30 : inout bit;
RSIG31 : inout bit;
RSIG4 : inout bit;
RSIG5 : inout bit;
RSIG6 : inout bit;
RSIG7 : inout bit;
RSIG8 : inout bit;
RSIG9 : inout bit;
RST_N : in bit;
RSYNC0 : inout bit;
RSYNC1 : inout bit;
RSYNC10 : inout bit;
RSYNC11 : inout bit;
RSYNC12 : inout bit;
RSYNC13 : inout bit;
RSYNC14 : inout bit;
RSYNC15 : inout bit;
RSYNC16 : inout bit;
RSYNC17 : inout bit;
RSYNC18 : inout bit;
RSYNC19 : inout bit;
RSYNC2 : inout bit;
RSYNC20 : inout bit;
RSYNC21 : inout bit;
RSYNC22 : inout bit;
RSYNC23 : inout bit;
RSYNC24 : inout bit;
RSYNC25 : inout bit;
RSYNC26 : inout bit;
RSYNC27 : inout bit;
RSYNC28 : inout bit;
RSYNC29 : inout bit;
RSYNC3 : inout bit;
RSYNC30 : inout bit;
RSYNC31 : inout bit;
RSYNC4 : inout bit;
RSYNC5 : inout bit;
RSYNC6 : inout bit;
RSYNC7 : inout bit;
RSYNC8 : inout bit;
RSYNC9 : inout bit;
RXCLK : inout bit;
RXD : inout bit_vector (0 to 7);
RXDV : inout bit;
RXERR : inout bit;
SDA : linkage bit_vector (0 to 13);
SDBA : linkage bit_vector (0 to 1);
SDCAS_N : linkage bit;
SDCLK : linkage bit;
SDCLKEN : linkage bit;
SDCLK_N : linkage bit;
SDCS_N : linkage bit;
SDDQ : linkage bit_vector (0 to 15);
SDLDM : linkage bit;
SDLDQS : linkage bit;
SDRAS_N : linkage bit;
SDUDM : linkage bit;
SDUDQS : linkage bit;
SDWE_N : linkage bit;
SMTI : linkage bit;
SMTO : linkage bit;
SYSCLK : inout bit;
TCLKO0 : inout bit;
TCLKO1 : inout bit;
TCLKO10 : inout bit;
TCLKO11 : inout bit;
TCLKO12 : inout bit;
TCLKO13 : inout bit;
TCLKO14 : inout bit;
TCLKO15 : inout bit;
TCLKO16 : inout bit;
TCLKO17 : inout bit;
TCLKO18 : inout bit;
TCLKO19 : inout bit;
TCLKO2 : inout bit;
TCLKO20 : inout bit;
TCLKO21 : inout bit;
TCLKO22 : inout bit;
TCLKO23 : inout bit;
TCLKO24 : inout bit;
TCLKO25 : inout bit;
TCLKO26 : inout bit;
TCLKO27 : inout bit;
TCLKO28 : inout bit;
TCLKO29 : inout bit;
TCLKO3 : inout bit;
TCLKO30 : inout bit;
TCLKO31 : inout bit;
TCLKO4 : inout bit;
TCLKO5 : inout bit;
TCLKO6 : inout bit;
TCLKO7 : inout bit;
TCLKO8 : inout bit;
TCLKO9 : inout bit;
TDAT0 : inout bit;
TDAT1 : inout bit;
TDAT10 : inout bit;
TDAT11 : inout bit;
TDAT12 : inout bit;
TDAT13 : inout bit;
TDAT14 : inout bit;
TDAT15 : inout bit;
TDAT16 : inout bit;
TDAT17 : inout bit;
TDAT18 : inout bit;
TDAT19 : inout bit;
TDAT2 : inout bit;
TDAT20 : inout bit;
TDAT21 : inout bit;
TDAT22 : inout bit;
TDAT23 : inout bit;
TDAT24 : inout bit;
TDAT25 : inout bit;
TDAT26 : inout bit;
TDAT27 : inout bit;
TDAT28 : inout bit;
TDAT29 : inout bit;
TDAT3 : inout bit;
TDAT30 : inout bit;
TDAT31 : inout bit;
TDAT4 : inout bit;
TDAT5 : inout bit;
TDAT6 : inout bit;
TDAT7 : inout bit;
TDAT8 : inout bit;
TDAT9 : inout bit;
TEST_N : in bit;
TSIG0 : inout bit;
TSIG1 : inout bit;
TSIG10 : inout bit;
TSIG11 : inout bit;
TSIG12 : inout bit;
TSIG13 : inout bit;
TSIG14 : inout bit;
TSIG15 : inout bit;
TSIG16 : inout bit;
TSIG17 : inout bit;
TSIG18 : inout bit;
TSIG19 : inout bit;
TSIG2 : inout bit;
TSIG20 : inout bit;
TSIG21 : inout bit;
TSIG22 : inout bit;
TSIG23 : inout bit;
TSIG24 : inout bit;
TSIG25 : inout bit;
TSIG26 : inout bit;
TSIG27 : inout bit;
TSIG28 : inout bit;
TSIG29 : inout bit;
TSIG3 : inout bit;
TSIG30 : inout bit;
TSIG31 : inout bit;
TSIG4 : inout bit;
TSIG5 : inout bit;
TSIG6 : inout bit;
TSIG7 : inout bit;
TSIG8 : inout bit;
TSIG9 : inout bit;
TSYNC0 : inout bit;
TSYNC1 : inout bit;
TSYNC10 : inout bit;
TSYNC11 : inout bit;
TSYNC12 : inout bit;
TSYNC13 : inout bit;
TSYNC14 : inout bit;
TSYNC15 : inout bit;
TSYNC16 : inout bit;
TSYNC17 : inout bit;
TSYNC18 : inout bit;
TSYNC19 : inout bit;
TSYNC2 : inout bit;
TSYNC20 : inout bit;
TSYNC21 : inout bit;
TSYNC22 : inout bit;
TSYNC23 : inout bit;
TSYNC24 : inout bit;
TSYNC25 : inout bit;
TSYNC26 : inout bit;
TSYNC27 : inout bit;
TSYNC28 : inout bit;
TSYNC29 : inout bit;
TSYNC3 : inout bit;
TSYNC30 : inout bit;
TSYNC31 : inout bit;
TSYNC4 : inout bit;
TSYNC5 : inout bit;
TSYNC6 : inout bit;
TSYNC7 : inout bit;
TSYNC8 : inout bit;
TSYNC9 : inout bit;
TXCLK : inout bit;
TXD : inout bit_vector (0 to 7);
TXEN : inout bit;
TXERR : inout bit;
VDD18 : linkage bit_vector (0 to 43);
VDD33 : linkage bit_vector (0 to 23);
VDDP : linkage bit_vector (0 to 2);
VDDQ : linkage bit_vector (0 to 9);
VREF : linkage bit;
VSS : linkage bit_vector (0 to 121);
VSSQ : linkage bit_vector (0 to 9)
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of DS34S132: entity is "STD_1149_1_1993";
attribute PIN_MAP of DS34S132: entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information
-- is extracted from the port-to-pin map file that was read in using
-- the "read_pin_map" command.
constant HSPBGA676: PIN_MAP_STRING :=
"AVDD : A6," &
"AVSS : A7," &
"CMNCLK : AC10," &
"COL : H24," &
"CRS : H25," &
"CVDD : AF9," &
"CVSS : AF8," &
"DDRCLK : B7," &
"EPHYRST_N : H26," &
"ETHCLK : B26," &
"EXTCLK : (AA10,Y11)," &
"EXTINT : H23," &
"GTXCLK : K26," &
"HIZ_N : D24," &
"JTCLK : A22," &
"JTDI : C22," &
"JTDO : D22," &
"JTMS : B22," &
"JTRST_N : B23," &
"LIUCLK : AF10," &
"MDC : D26," &
"MDIO : D25," &
"MT : (AF23,AE23,AD23,AF24,AE24,AF25,AD26,AD25,W21,W20,V20,U20,T20,R20,N22,N21)," &
"PA : (Y26,Y25,Y24,Y23,Y22,AA26,AA25,AA24,AA23,AA22,AB26,AB25,AB24)," &
"PALE : AB23," &
"PCS_N : W25," &
"PD : (N23,N24,P21,P22,P23,P24,P25,P26,R21,R22,R23,R24,R25,R26,T21,T22,T23,T24,T25,T26,U21,U22,U23,U24,U25,U26,V21,V22,V23,V24,V25,V26)," &
"PINT_N : N25," &
"PRW : W23," &
"PRWCTRL : W26," &
"PTA_N : W24," &
"PWIDTH : W22," &
"RCLK0 : D6," &
"RCLK1 : D5," &
"RCLK10 : R2," &
"RCLK11 : U3," &
"RCLK12 : R5," &
"RCLK13 : U4," &
"RCLK14 : V4," &
"RCLK15 : W5," &
"RCLK16 : Y5," &
"RCLK17 : AA5," &
"RCLK18 : AD4," &
"RCLK19 : AC6," &
"RCLK2 : F5," &
"RCLK20 : AC7," &
"RCLK21 : AC9," &
"RCLK22 : AB11," &
"RCLK23 : AB12," &
"RCLK24 : AB13," &
"RCLK25 : AC15," &
"RCLK26 : AC16," &
"RCLK27 : AC17," &
"RCLK28 : AB18," &
"RCLK29 : AB19," &
"RCLK3 : G5," &
"RCLK30 : AB20," &
"RCLK31 : AF22," &
"RCLK4 : H5," &
"RCLK5 : J4," &
"RCLK6 : K4," &
"RCLK7 : M5," &
"RCLK8 : K3," &
"RCLK9 : M2," &
"RDAT0 : E8," &
"RDAT1 : E7," &
"RDAT10 : R3," &
"RDAT11 : R4," &
"RDAT12 : P6," &
"RDAT13 : R6," &
"RDAT14 : T6," &
"RDAT15 : U6," &
"RDAT16 : V6," &
"RDAT17 : Y7," &
"RDAT18 : AB6," &
"RDAT19 : AA8," &
"RDAT2 : G7," &
"RDAT20 : AA9," &
"RDAT21 : AB9," &
"RDAT22 : AA11," &
"RDAT23 : AA13," &
"RDAT24 : AA14," &
"RDAT25 : AA15," &
"RDAT26 : AA16," &
"RDAT27 : AA17," &
"RDAT28 : Y18," &
"RDAT29 : AA20," &
"RDAT3 : J6," &
"RDAT30 : AA21," &
"RDAT31 : AD22," &
"RDAT4 : K6," &
"RDAT5 : L6," &
"RDAT6 : M6," &
"RDAT7 : N6," &
"RDAT8 : M4," &
"RDAT9 : M3," &
"REFCLK : AE9," &
"RSIG0 : F8," &
"RSIG1 : F7," &
"RSIG10 : P3," &
"RSIG11 : P4," &
"RSIG12 : P7," &
"RSIG13 : R7," &
"RSIG14 : T7," &
"RSIG15 : U7," &
"RSIG16 : V7," &
"RSIG17 : W7," &
"RSIG18 : AA7," &
"RSIG19 : Y8," &
"RSIG2 : H7," &
"RSIG20 : Y9," &
"RSIG21 : Y10," &
"RSIG22 : Y12," &
"RSIG23 : Y13," &
"RSIG24 : Y14," &
"RSIG25 : Y15," &
"RSIG26 : Y16," &
"RSIG27 : Y17," &
"RSIG28 : Y19," &
"RSIG29 : Y20," &
"RSIG3 : J7," &
"RSIG30 : Y21," &
"RSIG31 : AC22," &
"RSIG4 : K7," &
"RSIG5 : L7," &
"RSIG6 : M7," &
"RSIG7 : N7," &
"RSIG8 : N4," &
"RSIG9 : N3," &
"RST_N : A23," &
"RSYNC0 : D7," &
"RSYNC1 : E6," &
"RSYNC10 : P2," &
"RSYNC11 : T3," &
"RSYNC12 : P5," &
"RSYNC13 : T5," &
"RSYNC14 : U5," &
"RSYNC15 : V5," &
"RSYNC16 : W6," &
"RSYNC17 : Y6," &
"RSYNC18 : AC5," &
"RSYNC19 : AB7," &
"RSYNC2 : G6," &
"RSYNC20 : AB8," &
"RSYNC21 : AD8," &
"RSYNC22 : AB10," &
"RSYNC23 : AA12," &
"RSYNC24 : AB14," &
"RSYNC25 : AB15," &
"RSYNC26 : AB16," &
"RSYNC27 : AB17," &
"RSYNC28 : AA18," &
"RSYNC29 : AA19," &
"RSYNC3 : H6," &
"RSYNC30 : AB21," &
"RSYNC31 : AE22," &
"RSYNC4 : J5," &
"RSYNC5 : K5," &
"RSYNC6 : L5," &
"RSYNC7 : N5," &
"RSYNC8 : L3," &
"RSYNC9 : N2," &
"RXCLK : G26," &
"RXD : (F26,F25,F24,F23,E26,E25,E24,E23)," &
"RXDV : G25," &
"RXERR : G24," &
"SDA : (D19,C19,C20,B20,A20,B19,A19,B18,A18,D18,C18,B17,A17,B16)," &
"SDBA : (C17,D17)," &
"SDCAS_N : D15," &
"SDCLK : A16," &
"SDCLKEN : B15," &
"SDCLK_N : A15," &
"SDCS_N : D16," &
"SDDQ : (C9,C10,D10,C11,D11,C12,D12,D13,A13,B12,A12,A11,B11,B10,A10,A9)," &
"SDLDM : B14," &
"SDLDQS : C13," &
"SDRAS_N : C16," &
"SDUDM : A14," &
"SDUDQS : B13," &
"SDWE_N : C15," &
"SMTI : B8," &
"SMTO : C7," &
"SYSCLK : N26," &
"TCLKO0 : A4," &
"TCLKO1 : A2," &
"TCLKO10 : T1," &
"TCLKO11 : V1," &
"TCLKO12 : W1," &
"TCLKO13 : AA1," &
"TCLKO14 : AB1," &
"TCLKO15 : AC1," &
"TCLKO16 : AD1," &
"TCLKO17 : AE1," &
"TCLKO18 : AF2," &
"TCLKO19 : AF4," &
"TCLKO2 : B1," &
"TCLKO20 : AF6," &
"TCLKO21 : AF7," &
"TCLKO22 : AF12," &
"TCLKO23 : AF13," &
"TCLKO24 : AF14," &
"TCLKO25 : AF15," &
"TCLKO26 : AF16," &
"TCLKO27 : AF17," &
"TCLKO28 : AF18," &
"TCLKO29 : AF19," &
"TCLKO3 : C1," &
"TCLKO30 : AF20," &
"TCLKO31 : AF21," &
"TCLKO4 : D1," &
"TCLKO5 : E1," &
"TCLKO6 : F1," &
"TCLKO7 : H1," &
"TCLKO8 : J1," &
"TCLKO9 : L1," &
"TDAT0 : B5," &
"TDAT1 : B3," &
"TDAT10 : P1," &
"TDAT11 : V2," &
"TDAT12 : V3," &
"TDAT13 : Y2," &
"TDAT14 : Y3," &
"TDAT15 : AA3," &
"TDAT16 : AB3," &
"TDAT17 : AC3," &
"TDAT18 : AE3," &
"TDAT19 : AE5," &
"TDAT2 : D3," &
"TDAT20 : AD6," &
"TDAT21 : AE7," &
"TDAT22 : AE11," &
"TDAT23 : AD12," &
"TDAT24 : AD13," &
"TDAT25 : AD14," &
"TDAT26 : AD15," &
"TDAT27 : AE17," &
"TDAT28 : AD18," &
"TDAT29 : AD19," &
"TDAT3 : E3," &
"TDAT30 : AD20," &
"TDAT31 : AD21," &
"TDAT4 : F3," &
"TDAT5 : G3," &
"TDAT6 : G2," &
"TDAT7 : J3," &
"TDAT8 : J2," &
"TDAT9 : N1," &
"TEST_N : G23," &
"TSIG0 : C5," &
"TSIG1 : C4," &
"TSIG10 : T2," &
"TSIG11 : U2," &
"TSIG12 : T4," &
"TSIG13 : W3," &
"TSIG14 : W4," &
"TSIG15 : Y4," &
"TSIG16 : AA4," &
"TSIG17 : AB4," &
"TSIG18 : AE4," &
"TSIG19 : AD5," &
"TSIG2 : E4," &
"TSIG20 : AD7," &
"TSIG21 : AC8," &
"TSIG22 : AD11," &
"TSIG23 : AC12," &
"TSIG24 : AC13," &
"TSIG25 : AC14," &
"TSIG26 : AD16," &
"TSIG27 : AD17," &
"TSIG28 : AC18," &
"TSIG29 : AC19," &
"TSIG3 : F4," &
"TSIG30 : AC20," &
"TSIG31 : AC21," &
"TSIG4 : G4," &
"TSIG5 : H4," &
"TSIG6 : H3," &
"TSIG7 : L4," &
"TSIG8 : K2," &
"TSIG9 : L2," &
"TSYNC0 : B4," &
"TSYNC1 : A3," &
"TSYNC10 : R1," &
"TSYNC11 : U1," &
"TSYNC12 : W2," &
"TSYNC13 : Y1," &
"TSYNC14 : AA2," &
"TSYNC15 : AB2," &
"TSYNC16 : AC2," &
"TSYNC17 : AD2," &
"TSYNC18 : AF3," &
"TSYNC19 : AF5," &
"TSYNC2 : C2," &
"TSYNC20 : AE6," &
"TSYNC21 : AE8," &
"TSYNC22 : AC11," &
"TSYNC23 : AE12," &
"TSYNC24 : AE13," &
"TSYNC25 : AE14," &
"TSYNC26 : AE15," &
"TSYNC27 : AE16," &
"TSYNC28 : AE18," &
"TSYNC29 : AE19," &
"TSYNC3 : D2," &
"TSYNC30 : AE20," &
"TSYNC31 : AE21," &
"TSYNC4 : E2," &
"TSYNC5 : F2," &
"TSYNC6 : G1," &
"TSYNC7 : H2," &
"TSYNC8 : K1," &
"TSYNC9 : M1," &
"TXCLK : J26," &
"TXD : (L26,L25,L24,L23,K25,K24,J25,J24)," &
"TXEN : J23," &
"TXERR : K23," &
"VDD18 : (H10,H11,H12,H13,H14,H15,H16,H17,H18,H19,H8,H9,J19,J8,K19,K8,L19,L8,M19,M8,N19,N8,P19,P8,R19,R8,T19,T8,U19,U8,V19,V8,W10,W11,W12,W13,W14,W15,W16,W17,W18,W19,W8,W9)," &
"VDD33 : (A1,A26,AA6,AB22,AB5,AC23,AC4,AD24,AD3,AE2,AE25,AF1,AF26,B2,B25,C24,C3,D23,D4,E22,E5,F6,M25,M26)," &
"VDDP : (E11,E15,E18)," &
"VDDQ : (A21,B9,C21,D14,D20,D9,E12,E16,E19,F14)," &
"VREF : E14," &
"VSS : (A25,A5,AD10,AD9,AE10,AE26,AF11,B6,C25,C26,C6,D8,E21,F12,F18,F22,J10,J11,J12,J13,J14,J15,J16,J17,J18,J22,J9,K10,K11,K12,K13,K14,K15,K16,K17,K18,K22,K9,L10,L11,L12,L13,L14,L15,L16,L17,L18,L22,L9,M10,M11,M12,M13,M14,M15,M16,M17,M18,M22,M23,M24,M9,N10,N11,N12,N13,N14,N15,N16,N17,N18,N9,P10,P11,P12,P13,P14,P15,P16,P17,P18,P9,R10,R11,R12,R13,R14,R15,R16,R17,R18,R9,T10,T11,T12,T13,T14,T15,T16,T17,T18,T9,U10,U11,U12,U13,U14,U15,U16,U17,U18,U9,V10,V11,V12,V13,V14," &
"V15,V16,V17,V18,V9)," &
"VSSQ : (A8,B21,C14,C8,D21,E10,E13,E17,E20,F15) " ;
-- This section specifies the TAP ports.
-- For the TAP TCK port, the parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of JTCLK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of JTDI : signal is true;
attribute TAP_SCAN_MODE of JTMS : signal is true;
attribute TAP_SCAN_OUT of JTDO : signal is true;
attribute TAP_SCAN_RESET of JTRST_N : signal is true;
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of DS34S132: entity is 3;
-- Specifies the boundary-scan instructions implemented in the
-- design and their opcodes.
attribute INSTRUCTION_OPCODE of DS34S132: entity is
"BYPASS (111)," &
"EXTEST (000)," &
"SAMPLE (010)," &
"CLAMP (011)," &
"HIGHZ (100)," &
"USER1 (101)," &
"USER2 (110)," &
"IDCODE (001)";
-- Specifies the bit pattern that is loaded into the instruction
-- register when the TAP controller passes through the Capture-IR
-- state. The standard mandates that the two LSBs must be "01".
-- The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of DS34S132: entity is "001";
-- Specifies the bit pattern that is loaded into the DEVICE_ID
-- register during the IDCODE instruction when the TAP controller
-- passes through the Capture-DR state.
attribute IDCODE_REGISTER of DS34S132: entity is
"0001" & -- 4-bit version number
"0000000010011111" & -- 16-bit part number
"00010100001" & -- 11-bit identity of the manufacturer
"1"; -- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI
-- and TDO for each implemented instruction.
attribute REGISTER_ACCESS of DS34S132: entity is
"BYPASS (BYPASS, CLAMP, HIGHZ, USER1, USER2)," &
"BOUNDARY (EXTEST, SAMPLE)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of DS34S132: entity is 725;
-- The following list specifies the characteristics of each cell
-- in the boundary scan register from TDI to TDO.
-- The following is a description of the label fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not
-- have a port name.
-- function: Is the function of the cell as defined by the
-- standard. Is one of input, output2, output3,
-- bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be
-- loaded with for safe operation when the software
-- might otherwise choose a random value.
-- ccell : The control cell number. Specifies the control
-- cell that drives the output enable for this port.
-- disval : Specifies the value that is loaded into the
-- control cell to disable the output enable for
-- the corresponding port.
-- rslt : Resulting state. Shows the state of the driver
-- when it is disabled.
attribute BOUNDARY_REGISTER of DS34S132: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"724 (BC_1, *, controlr, 0), " &
"723 (BC_0, TCLKO2, bidir, X, 724 , 0, Z), " &
"722 (BC_1, *, controlr, 0), " &
"721 (BC_0, TSYNC2, bidir, X, 722 , 0, Z), " &
"720 (BC_1, *, controlr, 0), " &
"719 (BC_0, TDAT2, bidir, X, 720 , 0, Z), " &
"718 (BC_1, *, controlr, 0), " &
"717 (BC_0, TSIG2, bidir, X, 718 , 0, Z), " &
"716 (BC_1, *, controlr, 0), " &
"715 (BC_0, RCLK2, bidir, X, 716 , 0, Z), " &
"714 (BC_1, *, controlr, 0), " &
"713 (BC_0, RSYNC2, bidir, X, 714 , 0, Z), " &
"712 (BC_1, *, controlr, 0), " &
"711 (BC_0, RDAT2, bidir, X, 712 , 0, Z), " &
"710 (BC_1, *, controlr, 0), " &
"709 (BC_0, RSIG2, bidir, X, 710 , 0, Z), " &
"708 (BC_1, *, controlr, 0), " &
"707 (BC_0, TCLKO3, bidir, X, 708 , 0, Z), " &
"706 (BC_1, *, controlr, 0), " &
"705 (BC_0, TSYNC3, bidir, X, 706 , 0, Z), " &
"704 (BC_1, *, controlr, 0), " &
"703 (BC_0, TDAT3, bidir, X, 704 , 0, Z), " &
"702 (BC_1, *, controlr, 0), " &
"701 (BC_0, TSIG3, bidir, X, 702 , 0, Z), " &
"700 (BC_1, *, controlr, 0), " &
"699 (BC_0, RCLK3, bidir, X, 700 , 0, Z), " &
"698 (BC_1, *, controlr, 0), " &
"697 (BC_0, RSYNC3, bidir, X, 698 , 0, Z), " &
"696 (BC_1, *, controlr, 0), " &
"695 (BC_0, RDAT3, bidir, X, 696 , 0, Z), " &
"694 (BC_1, *, controlr, 0), " &
"693 (BC_0, RSIG3, bidir, X, 694 , 0, Z), " &
"692 (BC_1, *, controlr, 0), " &
"691 (BC_0, TCLKO4, bidir, X, 692 , 0, Z), " &
"690 (BC_1, *, controlr, 0), " &
"689 (BC_0, TSYNC4, bidir, X, 690 , 0, Z), " &
"688 (BC_1, *, controlr, 0), " &
"687 (BC_0, TDAT4, bidir, X, 688 , 0, Z), " &
"686 (BC_1, *, controlr, 0), " &
"685 (BC_0, TSIG4, bidir, X, 686 , 0, Z), " &
"684 (BC_1, *, controlr, 0), " &
"683 (BC_0, RCLK4, bidir, X, 684 , 0, Z), " &
"682 (BC_1, *, controlr, 0), " &
"681 (BC_0, RSYNC4, bidir, X, 682 , 0, Z), " &
"680 (BC_1, *, controlr, 0), " &
"679 (BC_0, RDAT4, bidir, X, 680 , 0, Z), " &
"678 (BC_1, *, controlr, 0), " &
"677 (BC_0, RSIG4, bidir, X, 678 , 0, Z), " &
"676 (BC_1, *, controlr, 0), " &
"675 (BC_0, TCLKO5, bidir, X, 676 , 0, Z), " &
"674 (BC_1, *, controlr, 0), " &
"673 (BC_0, TSYNC5, bidir, X, 674 , 0, Z), " &
"672 (BC_1, *, controlr, 0), " &
"671 (BC_0, TDAT5, bidir, X, 672 , 0, Z), " &
"670 (BC_1, *, controlr, 0), " &
"669 (BC_0, TSIG5, bidir, X, 670 , 0, Z), " &
"668 (BC_1, *, controlr, 0), " &
"667 (BC_0, RCLK5, bidir, X, 668 , 0, Z), " &
"666 (BC_1, *, controlr, 0), " &
"665 (BC_0, RSYNC5, bidir, X, 666 , 0, Z), " &
"664 (BC_1, *, controlr, 0), " &
"663 (BC_0, RDAT5, bidir, X, 664 , 0, Z), " &
"662 (BC_1, *, controlr, 0), " &
"661 (BC_0, RSIG5, bidir, X, 662 , 0, Z), " &
"660 (BC_1, *, controlr, 0), " &
"659 (BC_0, TCLKO6, bidir, X, 660 , 0, Z), " &
"658 (BC_1, *, controlr, 0), " &
"657 (BC_0, TSYNC6, bidir, X, 658 , 0, Z), " &
"656 (BC_1, *, controlr, 0), " &
"655 (BC_0, TDAT6, bidir, X, 656 , 0, Z), " &
"654 (BC_1, *, controlr, 0), " &
"653 (BC_0, TSIG6, bidir, X, 654 , 0, Z), " &
"652 (BC_1, *, controlr, 0), " &
"651 (BC_0, RCLK6, bidir, X, 652 , 0, Z), " &
"650 (BC_1, *, controlr, 0), " &
"649 (BC_0, RSYNC6, bidir, X, 650 , 0, Z), " &
"648 (BC_1, *, controlr, 0), " &
"647 (BC_0, RDAT6, bidir, X, 648 , 0, Z), " &
"646 (BC_1, *, controlr, 0), " &
"645 (BC_0, RSIG6, bidir, X, 646 , 0, Z), " &
"644 (BC_1, *, controlr, 0), " &
"643 (BC_0, TCLKO7, bidir, X, 644 , 0, Z), " &
"642 (BC_1, *, controlr, 0), " &
"641 (BC_0, TSYNC7, bidir, X, 642 , 0, Z), " &
"640 (BC_1, *, controlr, 0), " &
"639 (BC_0, TDAT7, bidir, X, 640 , 0, Z), " &
"638 (BC_1, *, controlr, 0), " &
"637 (BC_0, TSIG7, bidir, X, 638 , 0, Z), " &
"636 (BC_1, *, controlr, 0), " &
"635 (BC_0, RCLK7, bidir, X, 636 , 0, Z), " &
"634 (BC_1, *, controlr, 0), " &
"633 (BC_0, RSYNC7, bidir, X, 634 , 0, Z), " &
"632 (BC_1, *, controlr, 0), " &
"631 (BC_0, RDAT7, bidir, X, 632 , 0, Z), " &
"630 (BC_1, *, controlr, 0), " &
"629 (BC_0, RSIG7, bidir, X, 630 , 0, Z), " &
"628 (BC_1, *, controlr, 0), " &
"627 (BC_0, TCLKO8, bidir, X, 628 , 0, Z), " &
"626 (BC_1, *, controlr, 0), " &
"625 (BC_0, TSYNC8, bidir, X, 626 , 0, Z), " &
"624 (BC_1, *, controlr, 0), " &
"623 (BC_0, TDAT8, bidir, X, 624 , 0, Z), " &
"622 (BC_1, *, controlr, 0), " &
"621 (BC_0, TSIG8, bidir, X, 622 , 0, Z), " &
"620 (BC_1, *, controlr, 0), " &
"619 (BC_0, RCLK8, bidir, X, 620 , 0, Z), " &
"618 (BC_1, *, controlr, 0), " &
"617 (BC_0, RSYNC8, bidir, X, 618 , 0, Z), " &
"616 (BC_1, *, controlr, 0), " &
"615 (BC_0, RDAT8, bidir, X, 616 , 0, Z), " &
"614 (BC_1, *, controlr, 0), " &
"613 (BC_0, RSIG8, bidir, X, 614 , 0, Z), " &
"612 (BC_1, *, controlr, 0), " &
"611 (BC_0, TCLKO9, bidir, X, 612 , 0, Z), " &
"610 (BC_1, *, controlr, 0), " &
"609 (BC_0, TSYNC9, bidir, X, 610 , 0, Z), " &
"608 (BC_1, *, controlr, 0), " &
"607 (BC_0, TDAT9, bidir, X, 608 , 0, Z), " &
"606 (BC_1, *, controlr, 0), " &
"605 (BC_0, TSIG9, bidir, X, 606 , 0, Z), " &
"604 (BC_1, *, controlr, 0), " &
"603 (BC_0, RCLK9, bidir, X, 604 , 0, Z), " &
"602 (BC_1, *, controlr, 0), " &
"601 (BC_0, RSYNC9, bidir, X, 602 , 0, Z), " &
"600 (BC_1, *, controlr, 0), " &
"599 (BC_0, RDAT9, bidir, X, 600 , 0, Z), " &
"598 (BC_1, *, controlr, 0), " &
"597 (BC_0, RSIG9, bidir, X, 598 , 0, Z), " &
"596 (BC_1, *, controlr, 0), " &
"595 (BC_0, TCLKO10, bidir, X, 596 , 0, Z), " &
"594 (BC_1, *, controlr, 0), " &
"593 (BC_0, TSYNC10, bidir, X, 594 , 0, Z), " &
"592 (BC_1, *, controlr, 0), " &
"591 (BC_0, TDAT10, bidir, X, 592 , 0, Z), " &
"590 (BC_1, *, controlr, 0), " &
"589 (BC_0, TSIG10, bidir, X, 590 , 0, Z), " &
"588 (BC_1, *, controlr, 0), " &
"587 (BC_0, RCLK10, bidir, X, 588 , 0, Z), " &
"586 (BC_1, *, controlr, 0), " &
"585 (BC_0, RSYNC10, bidir, X, 586 , 0, Z), " &
"584 (BC_1, *, controlr, 0), " &
"583 (BC_0, RDAT10, bidir, X, 584 , 0, Z), " &
"582 (BC_1, *, controlr, 0), " &
"581 (BC_0, RSIG10, bidir, X, 582 , 0, Z), " &
"580 (BC_1, *, controlr, 0), " &
"579 (BC_0, TCLKO11, bidir, X, 580 , 0, Z), " &
"578 (BC_1, *, controlr, 0), " &
"577 (BC_0, TSYNC11, bidir, X, 578 , 0, Z), " &
"576 (BC_1, *, controlr, 0), " &
"575 (BC_0, TDAT11, bidir, X, 576 , 0, Z), " &
"574 (BC_1, *, controlr, 0), " &
"573 (BC_0, TSIG11, bidir, X, 574 , 0, Z), " &
"572 (BC_1, *, controlr, 0), " &
"571 (BC_0, RCLK11, bidir, X, 572 , 0, Z), " &
"570 (BC_1, *, controlr, 0), " &
"569 (BC_0, RSYNC11, bidir, X, 570 , 0, Z), " &
"568 (BC_1, *, controlr, 0), " &
"567 (BC_0, RDAT11, bidir, X, 568 , 0, Z), " &
"566 (BC_1, *, controlr, 0), " &
"565 (BC_0, RSIG11, bidir, X, 566 , 0, Z), " &
"564 (BC_1, *, controlr, 0), " &
"563 (BC_0, TCLKO12, bidir, X, 564 , 0, Z), " &
"562 (BC_1, *, controlr, 0), " &
"561 (BC_0, TSYNC12, bidir, X, 562 , 0, Z), " &
"560 (BC_1, *, controlr, 0), " &
"559 (BC_0, TDAT12, bidir, X, 560 , 0, Z), " &
"558 (BC_1, *, controlr, 0), " &
"557 (BC_0, TSIG12, bidir, X, 558 , 0, Z), " &
"556 (BC_1, *, controlr, 0), " &
"555 (BC_0, RCLK12, bidir, X, 556 , 0, Z), " &
"554 (BC_1, *, controlr, 0), " &
"553 (BC_0, RSYNC12, bidir, X, 554 , 0, Z), " &
"552 (BC_1, *, controlr, 0), " &
"551 (BC_0, RDAT12, bidir, X, 552 , 0, Z), " &
"550 (BC_1, *, controlr, 0), " &
"549 (BC_0, RSIG12, bidir, X, 550 , 0, Z), " &
"548 (BC_1, *, controlr, 0), " &
"547 (BC_0, TCLKO13, bidir, X, 548 , 0, Z), " &
"546 (BC_1, *, controlr, 0), " &
"545 (BC_0, TSYNC13, bidir, X, 546 , 0, Z), " &
"544 (BC_1, *, controlr, 0), " &
"543 (BC_0, TDAT13, bidir, X, 544 , 0, Z), " &
"542 (BC_1, *, controlr, 0), " &
"541 (BC_0, TSIG13, bidir, X, 542 , 0, Z), " &
"540 (BC_1, *, controlr, 0), " &
"539 (BC_0, RCLK13, bidir, X, 540 , 0, Z), " &
"538 (BC_1, *, controlr, 0), " &
"537 (BC_0, RSYNC13, bidir, X, 538 , 0, Z), " &
"536 (BC_1, *, controlr, 0), " &
"535 (BC_0, RDAT13, bidir, X, 536 , 0, Z), " &
"534 (BC_1, *, controlr, 0), " &
"533 (BC_0, RSIG13, bidir, X, 534 , 0, Z), " &
"532 (BC_1, *, controlr, 0), " &
"531 (BC_0, TCLKO14, bidir, X, 532 , 0, Z), " &
"530 (BC_1, *, controlr, 0), " &
"529 (BC_0, TSYNC14, bidir, X, 530 , 0, Z), " &
"528 (BC_1, *, controlr, 0), " &
"527 (BC_0, TDAT14, bidir, X, 528 , 0, Z), " &
"526 (BC_1, *, controlr, 0), " &
"525 (BC_0, TSIG14, bidir, X, 526 , 0, Z), " &
"524 (BC_1, *, controlr, 0), " &
"523 (BC_0, RCLK14, bidir, X, 524 , 0, Z), " &
"522 (BC_1, *, controlr, 0), " &
"521 (BC_0, RSYNC14, bidir, X, 522 , 0, Z), " &
"520 (BC_1, *, controlr, 0), " &
"519 (BC_0, RDAT14, bidir, X, 520 , 0, Z), " &
"518 (BC_1, *, controlr, 0), " &
"517 (BC_0, RSIG14, bidir, X, 518 , 0, Z), " &
"516 (BC_1, *, controlr, 0), " &
"515 (BC_0, TCLKO15, bidir, X, 516 , 0, Z), " &
"514 (BC_1, *, controlr, 0), " &
"513 (BC_0, TSYNC15, bidir, X, 514 , 0, Z), " &
"512 (BC_1, *, controlr, 0), " &
"511 (BC_0, TDAT15, bidir, X, 512 , 0, Z), " &
"510 (BC_1, *, controlr, 0), " &
"509 (BC_0, TSIG15, bidir, X, 510 , 0, Z), " &
"508 (BC_1, *, controlr, 0), " &
"507 (BC_0, RCLK15, bidir, X, 508 , 0, Z), " &
"506 (BC_1, *, controlr, 0), " &
"505 (BC_0, RSYNC15, bidir, X, 506 , 0, Z), " &
"504 (BC_1, *, controlr, 0), " &
"503 (BC_0, RDAT15, bidir, X, 504 , 0, Z), " &
"502 (BC_1, *, controlr, 0), " &
"501 (BC_0, RSIG15, bidir, X, 502 , 0, Z), " &
"500 (BC_1, *, controlr, 0), " &
"499 (BC_0, TCLKO16, bidir, X, 500 , 0, Z), " &
"498 (BC_1, *, controlr, 0), " &
"497 (BC_0, TSYNC16, bidir, X, 498 , 0, Z), " &
"496 (BC_1, *, controlr, 0), " &
"495 (BC_0, TDAT16, bidir, X, 496 , 0, Z), " &
"494 (BC_1, *, controlr, 0), " &
"493 (BC_0, TSIG16, bidir, X, 494 , 0, Z), " &
"492 (BC_1, *, controlr, 0), " &
"491 (BC_0, RCLK16, bidir, X, 492 , 0, Z), " &
"490 (BC_1, *, controlr, 0), " &
"489 (BC_0, RSYNC16, bidir, X, 490 , 0, Z), " &
"488 (BC_1, *, controlr, 0), " &
"487 (BC_0, RDAT16, bidir, X, 488 , 0, Z), " &
"486 (BC_1, *, controlr, 0), " &
"485 (BC_0, RSIG16, bidir, X, 486 , 0, Z), " &
"484 (BC_1, *, controlr, 0), " &
"483 (BC_0, TCLKO17, bidir, X, 484 , 0, Z), " &
"482 (BC_1, *, controlr, 0), " &
"481 (BC_0, TSYNC17, bidir, X, 482 , 0, Z), " &
"480 (BC_1, *, controlr, 0), " &
"479 (BC_0, TDAT17, bidir, X, 480 , 0, Z), " &
"478 (BC_1, *, controlr, 0), " &
"477 (BC_0, TSIG17, bidir, X, 478 , 0, Z), " &
"476 (BC_1, *, controlr, 0), " &
"475 (BC_0, RCLK17, bidir, X, 476 , 0, Z), " &
"474 (BC_1, *, controlr, 0), " &
"473 (BC_0, RSYNC17, bidir, X, 474 , 0, Z), " &
"472 (BC_1, *, controlr, 0), " &
"471 (BC_0, RDAT17, bidir, X, 472 , 0, Z), " &
"470 (BC_1, *, controlr, 0), " &
"469 (BC_0, RSIG17, bidir, X, 470 , 0, Z), " &
"468 (BC_1, *, controlr, 0), " &
"467 (BC_0, TCLKO18, bidir, X, 468 , 0, Z), " &
"466 (BC_1, *, controlr, 0), " &
"465 (BC_0, TSYNC18, bidir, X, 466 , 0, Z), " &
"464 (BC_1, *, controlr, 0), " &
"463 (BC_0, TDAT18, bidir, X, 464 , 0, Z), " &
"462 (BC_1, *, controlr, 0), " &
"461 (BC_0, TSIG18, bidir, X, 462 , 0, Z), " &
"460 (BC_1, *, controlr, 0), " &
"459 (BC_0, RCLK18, bidir, X, 460 , 0, Z), " &
"458 (BC_1, *, controlr, 0), " &
"457 (BC_0, RSYNC18, bidir, X, 458 , 0, Z), " &
"456 (BC_1, *, controlr, 0), " &
"455 (BC_0, RDAT18, bidir, X, 456 , 0, Z), " &
"454 (BC_1, *, controlr, 0), " &
"453 (BC_0, RSIG18, bidir, X, 454 , 0, Z), " &
"452 (BC_1, *, controlr, 0), " &
"451 (BC_0, TCLKO19, bidir, X, 452 , 0, Z), " &
"450 (BC_1, *, controlr, 0), " &
"449 (BC_0, TSYNC19, bidir, X, 450 , 0, Z), " &
"448 (BC_1, *, controlr, 0), " &
"447 (BC_0, TDAT19, bidir, X, 448 , 0, Z), " &
"446 (BC_1, *, controlr, 0), " &
"445 (BC_0, TSIG19, bidir, X, 446 , 0, Z), " &
"444 (BC_1, *, controlr, 0), " &
"443 (BC_0, RCLK19, bidir, X, 444 , 0, Z), " &
"442 (BC_1, *, controlr, 0), " &
"441 (BC_0, RSYNC19, bidir, X, 442 , 0, Z), " &
"440 (BC_1, *, controlr, 0), " &
"439 (BC_0, RDAT19, bidir, X, 440 , 0, Z), " &
"438 (BC_1, *, controlr, 0), " &
"437 (BC_0, RSIG19, bidir, X, 438 , 0, Z), " &
"436 (BC_1, *, controlr, 0), " &
"435 (BC_0, TCLKO20, bidir, X, 436 , 0, Z), " &
"434 (BC_1, *, controlr, 0), " &
"433 (BC_0, TSYNC20, bidir, X, 434 , 0, Z), " &
"432 (BC_1, *, controlr, 0), " &
"431 (BC_0, TDAT20, bidir, X, 432 , 0, Z), " &
"430 (BC_1, *, controlr, 0), " &
"429 (BC_0, TSIG20, bidir, X, 430 , 0, Z), " &
"428 (BC_1, *, controlr, 0), " &
"427 (BC_0, RCLK20, bidir, X, 428 , 0, Z), " &
"426 (BC_1, *, controlr, 0), " &
"425 (BC_0, RSYNC20, bidir, X, 426 , 0, Z), " &
"424 (BC_1, *, controlr, 0), " &
"423 (BC_0, RDAT20, bidir, X, 424 , 0, Z), " &
"422 (BC_1, *, controlr, 0), " &
"421 (BC_0, RSIG20, bidir, X, 422 , 0, Z), " &
"420 (BC_1, *, controlr, 0), " &
"419 (BC_0, TCLKO21, bidir, X, 420 , 0, Z), " &
"418 (BC_1, *, controlr, 0), " &
"417 (BC_0, TSYNC21, bidir, X, 418 , 0, Z), " &
"416 (BC_1, *, controlr, 0), " &
"415 (BC_0, TDAT21, bidir, X, 416 , 0, Z), " &
"414 (BC_1, *, controlr, 0), " &
"413 (BC_0, TSIG21, bidir, X, 414 , 0, Z), " &
"412 (BC_1, *, controlr, 0), " &
"411 (BC_0, RCLK21, bidir, X, 412 , 0, Z), " &
"410 (BC_1, *, controlr, 0), " &
"409 (BC_0, RSYNC21, bidir, X, 410 , 0, Z), " &
"408 (BC_1, *, controlr, 0), " &
"407 (BC_0, RDAT21, bidir, X, 408 , 0, Z), " &
"406 (BC_1, *, controlr, 0), " &
"405 (BC_0, RSIG21, bidir, X, 406 , 0, Z), " &
"404 (BC_1, *, controlr, 0), " &
"403 (BC_0, REFCLK, bidir, X, 404 , 0, Z), " &
"402 (BC_1, *, controlr, 0), " &
"401 (BC_0, LIUCLK, bidir, X, 402 , 0, Z), " &
"400 (BC_1, *, controlr, 0), " &
"399 (BC_0, EXTCLK(0), bidir, X, 400 , 0, Z), " &
"398 (BC_1, *, controlr, 0), " &
"397 (BC_0, EXTCLK(1), bidir, X, 398 , 0, Z), " &
"396 (BC_1, *, controlr, 0), " &
"395 (BC_0, CMNCLK, bidir, X, 396 , 0, Z), " &
"394 (BC_1, *, controlr, 0), " &
"393 (BC_0, TCLKO22, bidir, X, 394 , 0, Z), " &
"392 (BC_1, *, controlr, 0), " &
"391 (BC_0, TSYNC22, bidir, X, 392 , 0, Z), " &
"390 (BC_1, *, controlr, 0), " &
"389 (BC_0, TDAT22, bidir, X, 390 , 0, Z), " &
"388 (BC_1, *, controlr, 0), " &
"387 (BC_0, TSIG22, bidir, X, 388 , 0, Z), " &
"386 (BC_1, *, controlr, 0), " &
"385 (BC_0, RCLK22, bidir, X, 386 , 0, Z), " &
"384 (BC_1, *, controlr, 0), " &
"383 (BC_0, RSYNC22, bidir, X, 384 , 0, Z), " &
"382 (BC_1, *, controlr, 0), " &
"381 (BC_0, RDAT22, bidir, X, 382 , 0, Z), " &
"380 (BC_1, *, controlr, 0), " &
"379 (BC_0, RSIG22, bidir, X, 380 , 0, Z), " &
"378 (BC_1, *, controlr, 0), " &
"377 (BC_0, TCLKO23, bidir, X, 378 , 0, Z), " &
"376 (BC_1, *, controlr, 0), " &
"375 (BC_0, TSYNC23, bidir, X, 376 , 0, Z), " &
"374 (BC_1, *, controlr, 0), " &
"373 (BC_0, TDAT23, bidir, X, 374 , 0, Z), " &
"372 (BC_1, *, controlr, 0), " &
"371 (BC_0, TSIG23, bidir, X, 372 , 0, Z), " &
"370 (BC_1, *, controlr, 0), " &
"369 (BC_0, RCLK23, bidir, X, 370 , 0, Z), " &
"368 (BC_1, *, controlr, 0), " &
"367 (BC_0, RSYNC23, bidir, X, 368 , 0, Z), " &
"366 (BC_1, *, controlr, 0), " &
"365 (BC_0, RDAT23, bidir, X, 366 , 0, Z), " &
"364 (BC_1, *, controlr, 0), " &
"363 (BC_0, RSIG23, bidir, X, 364 , 0, Z), " &
"362 (BC_1, *, controlr, 0), " &
"361 (BC_0, TCLKO24, bidir, X, 362 , 0, Z), " &
"360 (BC_1, *, controlr, 0), " &
"359 (BC_0, TSYNC24, bidir, X, 360 , 0, Z), " &
"358 (BC_1, *, controlr, 0), " &
"357 (BC_0, TDAT24, bidir, X, 358 , 0, Z), " &
"356 (BC_1, *, controlr, 0), " &
"355 (BC_0, TSIG24, bidir, X, 356 , 0, Z), " &
"354 (BC_1, *, controlr, 0), " &
"353 (BC_0, RCLK24, bidir, X, 354 , 0, Z), " &
"352 (BC_1, *, controlr, 0), " &
"351 (BC_0, RSYNC24, bidir, X, 352 , 0, Z), " &
"350 (BC_1, *, controlr, 0), " &
"349 (BC_0, RDAT24, bidir, X, 350 , 0, Z), " &
"348 (BC_1, *, controlr, 0), " &
"347 (BC_0, RSIG24, bidir, X, 348 , 0, Z), " &
"346 (BC_1, *, controlr, 0), " &
"345 (BC_0, TCLKO25, bidir, X, 346 , 0, Z), " &
"344 (BC_1, *, controlr, 0), " &
"343 (BC_0, TSYNC25, bidir, X, 344 , 0, Z), " &
"342 (BC_1, *, controlr, 0), " &
"341 (BC_0, TDAT25, bidir, X, 342 , 0, Z), " &
"340 (BC_1, *, controlr, 0), " &
"339 (BC_0, TSIG25, bidir, X, 340 , 0, Z), " &
"338 (BC_1, *, controlr, 0), " &
"337 (BC_0, RCLK25, bidir, X, 338 , 0, Z), " &
"336 (BC_1, *, controlr, 0), " &
"335 (BC_0, RSYNC25, bidir, X, 336 , 0, Z), " &
"334 (BC_1, *, controlr, 0), " &
"333 (BC_0, RDAT25, bidir, X, 334 , 0, Z), " &
"332 (BC_1, *, controlr, 0), " &
"331 (BC_0, RSIG25, bidir, X, 332 , 0, Z), " &
"330 (BC_1, *, controlr, 0), " &
"329 (BC_0, TCLKO26, bidir, X, 330 , 0, Z), " &
"328 (BC_1, *, controlr, 0), " &
"327 (BC_0, TSYNC26, bidir, X, 328 , 0, Z), " &
"326 (BC_1, *, controlr, 0), " &
"325 (BC_0, TDAT26, bidir, X, 326 , 0, Z), " &
"324 (BC_1, *, controlr, 0), " &
"323 (BC_0, TSIG26, bidir, X, 324 , 0, Z), " &
"322 (BC_1, *, controlr, 0), " &
"321 (BC_0, RCLK26, bidir, X, 322 , 0, Z), " &
"320 (BC_1, *, controlr, 0), " &
"319 (BC_0, RSYNC26, bidir, X, 320 , 0, Z), " &
"318 (BC_1, *, controlr, 0), " &
"317 (BC_0, RDAT26, bidir, X, 318 , 0, Z), " &
"316 (BC_1, *, controlr, 0), " &
"315 (BC_0, RSIG26, bidir, X, 316 , 0, Z), " &
"314 (BC_1, *, controlr, 0), " &
"313 (BC_0, TCLKO27, bidir, X, 314 , 0, Z), " &
"312 (BC_1, *, controlr, 0), " &
"311 (BC_0, TSYNC27, bidir, X, 312 , 0, Z), " &
"310 (BC_1, *, controlr, 0), " &
"309 (BC_0, TDAT27, bidir, X, 310 , 0, Z), " &
"308 (BC_1, *, controlr, 0), " &
"307 (BC_0, TSIG27, bidir, X, 308 , 0, Z), " &
"306 (BC_1, *, controlr, 0), " &
"305 (BC_0, RCLK27, bidir, X, 306 , 0, Z), " &
"304 (BC_1, *, controlr, 0), " &
"303 (BC_0, RSYNC27, bidir, X, 304 , 0, Z), " &
"302 (BC_1, *, controlr, 0), " &
"301 (BC_0, RDAT27, bidir, X, 302 , 0, Z), " &
"300 (BC_1, *, controlr, 0), " &
"299 (BC_0, RSIG27, bidir, X, 300 , 0, Z), " &
"298 (BC_1, *, controlr, 0), " &
"297 (BC_0, TCLKO28, bidir, X, 298 , 0, Z), " &
"296 (BC_1, *, controlr, 0), " &
"295 (BC_0, TSYNC28, bidir, X, 296 , 0, Z), " &
"294 (BC_1, *, controlr, 0), " &
"293 (BC_0, TDAT28, bidir, X, 294 , 0, Z), " &
"292 (BC_1, *, controlr, 0), " &
"291 (BC_0, TSIG28, bidir, X, 292 , 0, Z), " &
"290 (BC_1, *, controlr, 0), " &
"289 (BC_0, RCLK28, bidir, X, 290 , 0, Z), " &
"288 (BC_1, *, controlr, 0), " &
"287 (BC_0, RSYNC28, bidir, X, 288 , 0, Z), " &
"286 (BC_1, *, controlr, 0), " &
"285 (BC_0, RDAT28, bidir, X, 286 , 0, Z), " &
"284 (BC_1, *, controlr, 0), " &
"283 (BC_0, RSIG28, bidir, X, 284 , 0, Z), " &
"282 (BC_1, *, controlr, 0), " &
"281 (BC_0, TCLKO29, bidir, X, 282 , 0, Z), " &
"280 (BC_1, *, controlr, 0), " &
"279 (BC_0, TSYNC29, bidir, X, 280 , 0, Z), " &
"278 (BC_1, *, controlr, 0), " &
"277 (BC_0, TDAT29, bidir, X, 278 , 0, Z), " &
"276 (BC_1, *, controlr, 0), " &
"275 (BC_0, TSIG29, bidir, X, 276 , 0, Z), " &
"274 (BC_1, *, controlr, 0), " &
"273 (BC_0, RCLK29, bidir, X, 274 , 0, Z), " &
"272 (BC_1, *, controlr, 0), " &
"271 (BC_0, RSYNC29, bidir, X, 272 , 0, Z), " &
"270 (BC_1, *, controlr, 0), " &
"269 (BC_0, RDAT29, bidir, X, 270 , 0, Z), " &
"268 (BC_1, *, controlr, 0), " &
"267 (BC_0, RSIG29, bidir, X, 268 , 0, Z), " &
"266 (BC_1, *, controlr, 0), " &
"265 (BC_0, TCLKO30, bidir, X, 266 , 0, Z), " &
"264 (BC_1, *, controlr, 0), " &
"263 (BC_0, TSYNC30, bidir, X, 264 , 0, Z), " &
"262 (BC_1, *, controlr, 0), " &
"261 (BC_0, TDAT30, bidir, X, 262 , 0, Z), " &
"260 (BC_1, *, controlr, 0), " &
"259 (BC_0, TSIG30, bidir, X, 260 , 0, Z), " &
"258 (BC_1, *, controlr, 0), " &
"257 (BC_0, RCLK30, bidir, X, 258 , 0, Z), " &
"256 (BC_1, *, controlr, 0), " &
"255 (BC_0, RSYNC30, bidir, X, 256 , 0, Z), " &
"254 (BC_1, *, controlr, 0), " &
"253 (BC_0, RDAT30, bidir, X, 254 , 0, Z), " &
"252 (BC_1, *, controlr, 0), " &
"251 (BC_0, RSIG30, bidir, X, 252 , 0, Z), " &
"250 (BC_1, *, controlr, 0), " &
"249 (BC_0, TCLKO31, bidir, X, 250 , 0, Z), " &
"248 (BC_1, *, controlr, 0), " &
"247 (BC_0, TSYNC31, bidir, X, 248 , 0, Z), " &
"246 (BC_1, *, controlr, 0), " &
"245 (BC_0, TDAT31, bidir, X, 246 , 0, Z), " &
"244 (BC_1, *, controlr, 0), " &
"243 (BC_0, TSIG31, bidir, X, 244 , 0, Z), " &
"242 (BC_1, *, controlr, 0), " &
"241 (BC_0, RCLK31, bidir, X, 242 , 0, Z), " &
"240 (BC_1, *, controlr, 0), " &
"239 (BC_0, RSYNC31, bidir, X, 240 , 0, Z), " &
"238 (BC_1, *, controlr, 0), " &
"237 (BC_0, RDAT31, bidir, X, 238 , 0, Z), " &
"236 (BC_1, *, controlr, 0), " &
"235 (BC_0, RSIG31, bidir, X, 236 , 0, Z), " &
"234 (BC_1, *, controlr, 0), " &
"233 (BC_0, MT(0), bidir, X, 234 , 0, Z), " &
"232 (BC_1, *, controlr, 0), " &
"231 (BC_0, MT(1), bidir, X, 232 , 0, Z), " &
"230 (BC_1, *, controlr, 0), " &
"229 (BC_0, MT(2), bidir, X, 230 , 0, Z), " &
"228 (BC_1, *, controlr, 0), " &
"227 (BC_0, MT(3), bidir, X, 228 , 0, Z), " &
"226 (BC_1, *, controlr, 0), " &
"225 (BC_0, MT(4), bidir, X, 226 , 0, Z), " &
"224 (BC_1, *, controlr, 0), " &
"223 (BC_0, MT(5), bidir, X, 224 , 0, Z), " &
"222 (BC_1, *, controlr, 0), " &
"221 (BC_0, MT(6), bidir, X, 222 , 0, Z), " &
"220 (BC_1, *, controlr, 0), " &
"219 (BC_0, MT(7), bidir, X, 220 , 0, Z), " &
"218 (BC_1, *, controlr, 0), " &
"217 (BC_0, MT(8), bidir, X, 218 , 0, Z), " &
"216 (BC_1, *, controlr, 0), " &
"215 (BC_0, MT(9), bidir, X, 216 , 0, Z), " &
"214 (BC_1, *, controlr, 0), " &
"213 (BC_0, MT(10), bidir, X, 214 , 0, Z), " &
"212 (BC_1, *, controlr, 0), " &
"211 (BC_0, MT(11), bidir, X, 212 , 0, Z), " &
"210 (BC_1, *, controlr, 0), " &
"209 (BC_0, MT(12), bidir, X, 210 , 0, Z), " &
"208 (BC_1, *, controlr, 0), " &
"207 (BC_0, MT(13), bidir, X, 208 , 0, Z), " &
"206 (BC_1, *, controlr, 0), " &
"205 (BC_0, PALE, bidir, X, 206 , 0, Z), " &
"204 (BC_1, *, controlr, 0), " &
"203 (BC_0, PA(13), bidir, X, 204 , 0, Z), " &
"202 (BC_1, *, controlr, 0), " &
"201 (BC_0, PA(12), bidir, X, 202 , 0, Z), " &
"200 (BC_1, *, controlr, 0), " &
"199 (BC_0, PA(11), bidir, X, 200 , 0, Z), " &
"198 (BC_1, *, controlr, 0), " &
"197 (BC_0, PA(10), bidir, X, 198 , 0, Z), " &
"196 (BC_1, *, controlr, 0), " &
"195 (BC_0, PA(9), bidir, X, 196 , 0, Z), " &
"194 (BC_1, *, controlr, 0), " &
"193 (BC_0, PA(8), bidir, X, 194 , 0, Z), " &
"192 (BC_1, *, controlr, 0), " &
"191 (BC_0, PA(7), bidir, X, 192 , 0, Z), " &
"190 (BC_1, *, controlr, 0), " &
"189 (BC_0, PA(6), bidir, X, 190 , 0, Z), " &
"188 (BC_1, *, controlr, 0), " &
"187 (BC_0, PA(5), bidir, X, 188 , 0, Z), " &
"186 (BC_1, *, controlr, 0), " &
"185 (BC_0, PA(4), bidir, X, 186 , 0, Z), " &
"184 (BC_1, *, controlr, 0), " &
"183 (BC_0, PA(3), bidir, X, 184 , 0, Z), " &
"182 (BC_1, *, controlr, 0), " &
"181 (BC_0, PA(2), bidir, X, 182 , 0, Z), " &
"180 (BC_1, *, controlr, 0), " &
"179 (BC_0, PA(1), bidir, X, 180 , 0, Z), " &
"178 (BC_1, *, controlr, 0), " &
"177 (BC_0, PWIDTH, bidir, X, 178 , 0, Z), " &
"176 (BC_1, *, controlr, 0), " &
"175 (BC_0, PRW, bidir, X, 176 , 0, Z), " &
"174 (BC_1, *, controlr, 0), " &
"173 (BC_0, PTA_N, bidir, X, 174 , 0, Z), " &
"172 (BC_1, *, controlr, 0), " &
"171 (BC_0, PCS_N, bidir, X, 172 , 0, Z), " &
"170 (BC_1, *, controlr, 0), " &
"169 (BC_0, PRWCTRL, bidir, X, 170 , 0, Z), " &
"168 (BC_1, *, controlr, 0), " &
"167 (BC_0, PINT_N, bidir, X, 168 , 0, Z), " &
"166 (BC_1, *, controlr, 0), " &
"165 (BC_0, PD(31), bidir, X, 166 , 0, Z), " &
"164 (BC_1, *, controlr, 0), " &
"163 (BC_0, PD(30), bidir, X, 164 , 0, Z), " &
"162 (BC_1, *, controlr, 0), " &
"161 (BC_0, PD(29), bidir, X, 162 , 0, Z), " &
"160 (BC_1, *, controlr, 0), " &
"159 (BC_0, PD(28), bidir, X, 160 , 0, Z), " &
"158 (BC_1, *, controlr, 0), " &
"157 (BC_0, PD(27), bidir, X, 158 , 0, Z), " &
"156 (BC_1, *, controlr, 0), " &
"155 (BC_0, PD(26), bidir, X, 156 , 0, Z), " &
"154 (BC_1, *, controlr, 0), " &
"153 (BC_0, PD(25), bidir, X, 154 , 0, Z), " &
"152 (BC_1, *, controlr, 0), " &
"151 (BC_0, PD(24), bidir, X, 152 , 0, Z), " &
"150 (BC_1, *, controlr, 0), " &
"149 (BC_0, PD(23), bidir, X, 150 , 0, Z), " &
"148 (BC_1, *, controlr, 0), " &
"147 (BC_0, PD(22), bidir, X, 148 , 0, Z), " &
"146 (BC_1, *, controlr, 0), " &
"145 (BC_0, PD(21), bidir, X, 146 , 0, Z), " &
"144 (BC_1, *, controlr, 0), " &
"143 (BC_0, PD(20), bidir, X, 144 , 0, Z), " &
"142 (BC_1, *, controlr, 0), " &
"141 (BC_0, PD(19), bidir, X, 142 , 0, Z), " &
"140 (BC_1, *, controlr, 0), " &
"139 (BC_0, PD(18), bidir, X, 140 , 0, Z), " &
"138 (BC_1, *, controlr, 0), " &
"137 (BC_0, PD(17), bidir, X, 138 , 0, Z), " &
"136 (BC_1, *, controlr, 0), " &
"135 (BC_0, PD(16), bidir, X, 136 , 0, Z), " &
"134 (BC_1, *, controlr, 0), " &
"133 (BC_0, PD(15), bidir, X, 134 , 0, Z), " &
"132 (BC_1, *, controlr, 0), " &
"131 (BC_0, PD(14), bidir, X, 132 , 0, Z), " &
"130 (BC_1, *, controlr, 0), " &
"129 (BC_0, PD(13), bidir, X, 130 , 0, Z), " &
"128 (BC_1, *, controlr, 0), " &
"127 (BC_0, PD(12), bidir, X, 128 , 0, Z), " &
"126 (BC_1, *, controlr, 0), " &
"125 (BC_0, PD(11), bidir, X, 126 , 0, Z), " &
"124 (BC_1, *, controlr, 0), " &
"123 (BC_0, PD(10), bidir, X, 124 , 0, Z), " &
"122 (BC_1, *, controlr, 0), " &
"121 (BC_0, PD(9), bidir, X, 122 , 0, Z), " &
"120 (BC_1, *, controlr, 0), " &
"119 (BC_0, PD(8), bidir, X, 120 , 0, Z), " &
"118 (BC_1, *, controlr, 0), " &
"117 (BC_0, PD(7), bidir, X, 118 , 0, Z), " &
"116 (BC_1, *, controlr, 0), " &
"115 (BC_0, PD(6), bidir, X, 116 , 0, Z), " &
"114 (BC_1, *, controlr, 0), " &
"113 (BC_0, PD(5), bidir, X, 114 , 0, Z), " &
"112 (BC_1, *, controlr, 0), " &
"111 (BC_0, PD(4), bidir, X, 112 , 0, Z), " &
"110 (BC_1, *, controlr, 0), " &
"109 (BC_0, PD(3), bidir, X, 110 , 0, Z), " &
"108 (BC_1, *, controlr, 0), " &
"107 (BC_0, PD(2), bidir, X, 108 , 0, Z), " &
"106 (BC_1, *, controlr, 0), " &
"105 (BC_0, PD(1), bidir, X, 106 , 0, Z), " &
"104 (BC_1, *, controlr, 0), " &
"103 (BC_0, PD(0), bidir, X, 104 , 0, Z), " &
"102 (BC_1, *, controlr, 0), " &
"101 (BC_0, MT(14), bidir, X, 102 , 0, Z), " &
"100 (BC_1, *, controlr, 0), " &
"99 (BC_0, MT(15), bidir, X, 100 , 0, Z), " &
"98 (BC_1, *, controlr, 0), " &
"97 (BC_0, SYSCLK, bidir, X, 98 , 0, Z), " &
"96 (BC_1, *, controlr, 0), " &
"95 (BC_0, TXERR, bidir, X, 96 , 0, Z), " &
"94 (BC_1, *, controlr, 0), " &
"93 (BC_0, TXEN, bidir, X, 94 , 0, Z), " &
"92 (BC_1, *, controlr, 0), " &
"91 (BC_0, TXD(0), bidir, X, 92 , 0, Z), " &
"90 (BC_1, *, controlr, 0), " &
"89 (BC_0, TXD(1), bidir, X, 90 , 0, Z), " &
"88 (BC_1, *, controlr, 0), " &
"87 (BC_0, TXD(2), bidir, X, 88 , 0, Z), " &
"86 (BC_1, *, controlr, 0), " &
"85 (BC_0, TXD(3), bidir, X, 86 , 0, Z), " &
"84 (BC_1, *, controlr, 0), " &
"83 (BC_0, TXD(4), bidir, X, 84 , 0, Z), " &
"82 (BC_1, *, controlr, 0), " &
"81 (BC_0, TXD(5), bidir, X, 82 , 0, Z), " &
"80 (BC_1, *, controlr, 0), " &
"79 (BC_0, TXD(6), bidir, X, 80 , 0, Z), " &
"78 (BC_1, *, controlr, 0), " &
"77 (BC_0, TXD(7), bidir, X, 78 , 0, Z), " &
"76 (BC_1, *, controlr, 0), " &
"75 (BC_0, GTXCLK, bidir, X, 76 , 0, Z), " &
"74 (BC_1, *, controlr, 0), " &
"73 (BC_0, TXCLK, bidir, X, 74 , 0, Z), " &
"72 (BC_1, *, controlr, 0), " &
"71 (BC_0, ETHCLK, bidir, X, 72 , 0, Z), " &
"70 (BC_1, *, controlr, 0), " &
"69 (BC_0, EPHYRST_N, bidir, X, 70 , 0, Z), " &
"68 (BC_1, *, controlr, 0), " &
"67 (BC_0, EXTINT, bidir, X, 68 , 0, Z), " &
"66 (BC_1, *, controlr, 0), " &
"65 (BC_0, MDC, bidir, X, 66 , 0, Z), " &
"64 (BC_1, *, controlr, 0), " &
"63 (BC_0, MDIO, bidir, X, 64 , 0, Z), " &
"62 (BC_1, *, controlr, 0), " &
"61 (BC_0, CRS, bidir, X, 62 , 0, Z), " &
"60 (BC_1, *, controlr, 0), " &
"59 (BC_0, COL, bidir, X, 60 , 0, Z), " &
"58 (BC_1, *, controlr, 0), " &
"57 (BC_0, RXCLK, bidir, X, 58 , 0, Z), " &
"56 (BC_1, *, controlr, 0), " &
"55 (BC_0, RXD(0), bidir, X, 56 , 0, Z), " &
"54 (BC_1, *, controlr, 0), " &
"53 (BC_0, RXD(1), bidir, X, 54 , 0, Z), " &
"52 (BC_1, *, controlr, 0), " &
"51 (BC_0, RXD(2), bidir, X, 52 , 0, Z), " &
"50 (BC_1, *, controlr, 0), " &
"49 (BC_0, RXD(3), bidir, X, 50 , 0, Z), " &
"48 (BC_1, *, controlr, 0), " &
"47 (BC_0, RXD(4), bidir, X, 48 , 0, Z), " &
"46 (BC_1, *, controlr, 0), " &
"45 (BC_0, RXD(5), bidir, X, 46 , 0, Z), " &
"44 (BC_1, *, controlr, 0), " &
"43 (BC_0, RXD(6), bidir, X, 44 , 0, Z), " &
"42 (BC_1, *, controlr, 0), " &
"41 (BC_0, RXD(7), bidir, X, 42 , 0, Z), " &
"40 (BC_1, *, controlr, 0), " &
"39 (BC_0, RXDV, bidir, X, 40 , 0, Z), " &
"38 (BC_1, *, controlr, 0), " &
"37 (BC_0, RXERR, bidir, X, 38 , 0, Z), " &
"36 (BC_1, RST_N, input, X), " &
"35 (BC_1, TEST_N, input, X), " &
"34 (BC_1, HIZ_N, input, X), " &
"33 (BC_1, *, controlr, 0), " &
"32 (BC_0, DDRCLK, bidir, X, 33 , 0, Z), " &
"31 (BC_1, *, controlr, 0), " &
"30 (BC_0, TCLKO0, bidir, X, 31 , 0, Z), " &
"29 (BC_1, *, controlr, 0), " &
"28 (BC_0, TSYNC0, bidir, X, 29 , 0, Z), " &
"27 (BC_1, *, controlr, 0), " &
"26 (BC_0, TDAT0, bidir, X, 27 , 0, Z), " &
"25 (BC_1, *, controlr, 0), " &
"24 (BC_0, TSIG0, bidir, X, 25 , 0, Z), " &
"23 (BC_1, *, controlr, 0), " &
"22 (BC_0, RCLK0, bidir, X, 23 , 0, Z), " &
"21 (BC_1, *, controlr, 0), " &
"20 (BC_0, RSYNC0, bidir, X, 21 , 0, Z), " &
"19 (BC_1, *, controlr, 0), " &
"18 (BC_0, RDAT0, bidir, X, 19 , 0, Z), " &
"17 (BC_1, *, controlr, 0), " &
"16 (BC_0, RSIG0, bidir, X, 17 , 0, Z), " &
"15 (BC_1, *, controlr, 0), " &
"14 (BC_0, TCLKO1, bidir, X, 15 , 0, Z), " &
"13 (BC_1, *, controlr, 0), " &
"12 (BC_0, TSYNC1, bidir, X, 13 , 0, Z), " &
"11 (BC_1, *, controlr, 0), " &
"10 (BC_0, TDAT1, bidir, X, 11 , 0, Z), " &
"9 (BC_1, *, controlr, 0), " &
"8 (BC_0, TSIG1, bidir, X, 9 , 0, Z), " &
"7 (BC_1, *, controlr, 0), " &
"6 (BC_0, RCLK1, bidir, X, 7 , 0, Z), " &
"5 (BC_1, *, controlr, 0), " &
"4 (BC_0, RSYNC1, bidir, X, 5 , 0, Z), " &
"3 (BC_1, *, controlr, 0), " &
"2 (BC_0, RDAT1, bidir, X, 3 , 0, Z), " &
"1 (BC_1, *, controlr, 0), " &
"0 (BC_0, RSIG1, bidir, X, 1 , 0, Z) " ;
end DS34S132;
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