BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: BGA361_SAMA5D4_92A04B

------------------------------------------------------------------------
-- A T M E L   A R M   M I C R O C O N T R O L L E R S                --
------------------------------------------------------------------------
-- BSDL file
--
-- File Name:     BGA361_SAMA5D4_92A04B.bsdl
-- File Revision: 1.0
-- Date: 	  Thu Jul 10 15:00:00 2014

-- Created by:    Atmel Corporation
-- File Status:   Released
--
-- Device:        SAMA5D4 92A04B
-- Package:       tfbga361  SAMA5D4 type
--
-- Visit http://www.atmel.com for a updated list of BSDL files.
--
------------------------------------------------------------------------
-- Syntax and Semantics are checked against the IEEE 1149.1 standard. --
-- The logical functioning of the standard Boundary-Scan instructions --
-- and of the associated bypass, idcode and boundary-scan register    --
-- described in this BSDL file has been verified against its related  --
-- silicon by JTAG Technologies B.V.                                  --
--------------------------------------------------------------------------
------------------------------------------------------------------------
--                       IMPORTANT NOTICE                             --
--                                                                    --
--   Copyright 2014 Atmel Corporation. All Rights Reserved.           --
--                                                                    --
--   Atmel assumes no responsibility or liability arising out         --
--   this application or use of any information described herein      --
--   except as expressly agreed to in writing by Atmel Corporation.   --
--                                                                    --
-- ------------------------------------------------------------------ --
-- This BSDL File has been verified on Agilent BSDL Syntax            --
-- Checker/Compilers                                                  --
--  http://bsdl.agilent.com/bsdl/index.php/dashboard                                                                  --

-- Job Status: Pass
-- File Name: BGA361_SAMA5D4_92A04B.bsdl
-- Timestamp:July 11, 2014, 10:18 am
-- Results: Entity name: BGA361_SAMA5D4_92A04B
-- IEEE Std 1149.1-1994 (Version 1.0)
-- Packaging option selected is TFBGA361_SAMA5D4.
-- Inputs = 0
-- Outputs = 26
-- Bidirectionals = 189
-- Instruction Reg Length = 4
-- Boundary Reg Length = 420
-- BSDL compilation of 834 lines completed without errors.
-- There were 34 compile warnings.
-- Text of warnings: Warning: Linkage port 'ADVREFN' has 1 missing pin mapping assignment.
--                            Same for 'ADVREFP', 'CC4A', 'CC4B', 'CC8A', 'CC8B', 'CCLKA', 'CCLKB'
--                                      'CIOA', 'CIOB', 'CRSTA', 'CRSTB', 'HHSDMA','HHSDMB', 'HHSDMC', 'HHSDPA',
--                                      'HHSDPB', 'HHSDPC', 'LFTA', 'LFTB','VBG', 'VEXT_POR_VCCCORE', 'VEXT_POR_VDDBU',
--                                      'VEXT_POR_VDDIO', 'XIN', 'XIN32', 'XOUT', 'XOUT32', 
--                   Warning: Linkage port 'REGUL_VCCORE_OUT' has 16 missing pin mapping assignments.
--                   Warning: Signal DDR_CLK, pin A18 not connected to Boundary Register.
--                   Warning: Signal DDR_DQS__00, pin J19 not connected to Boundary Register.
--                   Warning: Signal DDR_DQS__01, pin F19 not connected to Boundary Register.
--                   Warning: Signal DDR_DQS__02, pin A15 not connected to Boundary Register.
--                   Warning: Signal DDR_DQS__03, pin A12 not connected to Boundary Register.
--Unconnected signals (listed above) are not testable.
-- *****************************************************************************


 entity BGA361_SAMA5D4_92A04B is
   
-- This section identifies the default device package selected.
   
   generic (PHYSICAL_PIN_MAP: string:= "TFBGA361_SAMA5D4");
   
-- This section declares all the ports in the design.
   
   port ( 
          DDR_CLK              : inout    bit;
          DDR_D                : inout    bit_vector (0 to 31);
          DDR_DQS              : inout    bit_vector (0 to 3);
          DDR_DQSN             : inout    bit_vector (0 to 3);
          PA0                  : in       bit;
          PA1                  : inout    bit;
          PA2                  : inout    bit;
          PA3                  : inout    bit;
          PA4                  : inout    bit;
          PA5                  : inout    bit;
          PA6                  : inout    bit;
          PA7                  : inout    bit;
          PA8                  : in       bit;
          PA9                  : inout    bit;
          PA10                 : inout    bit;
          PA11                 : inout    bit;
          PA12                 : inout    bit;
          PA13                 : inout    bit;
          PA14                 : inout    bit;
          PA15                 : inout    bit;
          PA16                 : in       bit;
          PA17                 : inout    bit;
          PA18                 : inout    bit;
          PA19                 : inout    bit;
          PA20                 : inout    bit;
          PA21                 : inout    bit;
          PA22                 : inout    bit;
          PA23                 : inout    bit;
          PA24                 : inout    bit;
          PA25                 : inout    bit;
          PA26                 : inout    bit;
          PA27                 : inout    bit;
          PA28                 : inout    bit;
          PA29                 : inout    bit;
          PA30                 : inout    bit;
          PA31                 : inout    bit;
          PB0                  : inout    bit;
          PB1                  : inout    bit;
          PB2                  : inout    bit;
          PB3                  : inout    bit;
          PB4                  : inout    bit;
          PB5                  : inout    bit;
          PB6                  : inout    bit;
          PB7                  : inout    bit;
          PB8                  : inout    bit;
          PB9                  : inout    bit;
          PB10                 : inout    bit;
          PB11                 : inout    bit;
          PB12                 : inout    bit;
          PB13                 : inout    bit;
          PB14                 : inout    bit;
          PB15                 : inout    bit;
          PB16                 : inout    bit;
          PB17                 : inout    bit;
          PB18                 : inout    bit;
          PB19                 : inout    bit;
          PB20                 : inout    bit;
          PB21                 : inout    bit;
          PB22                 : inout    bit;
          PB23                 : inout    bit;
          PB24                 : in       bit;
          PB25                 : out      bit;
          PB26                 : inout    bit;
          PB27                 : inout    bit;
          PB28                 : inout    bit;
          PB29                 : inout    bit;
          PB30                 : inout    bit;
          PB31                 : inout    bit;
          PC                   : inout    bit_vector (0 to 31);
          PD                   : inout    bit_vector (8 to 31);
          PE                   : inout    bit_vector (0 to 31);
          DDR_CAS              : out      bit;
          DDR_CKE              : out      bit;
          DDR_CLKN             : inout    bit;
          DDR_CS               : out      bit;
          DDR_RAS              : out      bit;
          DDR_WE               : out      bit;
          DDR_A                : out      bit_vector (0 to 13);
          DDR_BA               : out      bit_vector (0 to 2);
          DDR_DQM              : out      bit_vector (0 to 3);
          ADVREFN              : linkage  bit;
          ADVREFP              : linkage  bit;
          CC4A                 : linkage  bit;
          CC4B                 : linkage  bit;
          CC8A                 : linkage  bit;
          CC8B                 : linkage  bit;
          CCLKA                : linkage  bit;
          CCLKB                : linkage  bit;
          CIOA                 : linkage  bit;
          CIOB                 : linkage  bit;
          CRSTA                : linkage  bit;
          CRSTB                : linkage  bit;
          DDR_CALN             : linkage  bit;
          DDR_CALP             : linkage  bit;
          DDR_VREF             : linkage  bit;
          HHSDMA               : linkage  bit;
          HHSDMB               : linkage  bit;
          HHSDMC               : linkage  bit;
          HHSDPA               : linkage  bit;
          HHSDPB               : linkage  bit;
          HHSDPC               : linkage  bit;
          JTAGSEL              : in       bit;
          NRST                 : linkage  bit;
          SHDN                 : linkage  bit;
          TST                  : in       bit;
          VBG                  : linkage  bit;
          WKUP                 : linkage  bit;
          XIN                  : linkage  bit;
          XIN32                : linkage  bit;
          XOUT                 : linkage  bit;
          XOUT32               : linkage  bit;
          lfta                 : linkage  bit;
          lftb                 : linkage  bit;
          vext_por_vcccore     : linkage  bit;
          vext_por_vddbu       : linkage  bit;
          vext_por_vddio       : linkage  bit;
          MSAD                 : linkage  bit_vector (0 to 7);
          PIOBU                : linkage  bit_vector (0 to 15);
          regul_vccore_out     : linkage  bit_vector (0 to 15)
   );
   
   use STD_1149_1_1994.all;
   
   attribute COMPONENT_CONFORMANCE of BGA361_SAMA5D4_92A04B: entity is "STD_1149_1_1993";
   
   attribute PIN_MAP of BGA361_SAMA5D4_92A04B: entity is PHYSICAL_PIN_MAP;
   
-- This section specifies the pin map for each port. This information is 
-- extracted from the port-to-pin map file that was read in using the 
-- "read_pin_map" command.
   
     constant TFBGA361_SAMA5D4: PIN_MAP_STRING := 
        "DDR_CLK              : A18," &
        "DDR_D                : (L14, K16, K15, K14, J18, J17, J15, H19, H18, J14" &
        ", G18, H17, H15, H14, G16, E19, E14, E13, H13, F13, B15, A14, D12, B14, B13" &
        ", G12, B12, C12, F11, C11, D11, B11)," &
        "DDR_DQS              : (J19, F19, A15, A12)," &
        "DDR_DQSN             : (K19, G19, A16, A13)," &
        "PA0                  : A7," &
        "PA1                  : F6," &
        "PA2                  : E6," &
        "PA3                  : C6," &
        "PA4                  : D6," &
        "PA5                  : B6," &
        "PA6                  : A6," &
        "PA7                  : E5," &
        "PA8                  : A5," &
        "PA9                  : F4," &
        "PA10                 : F5," &
        "PA11                 : D5," &
        "PA12                 : G5," &
        "PA13                 : C5," &
        "PA14                 : E4," &
        "PA15                 : B5," &
        "PA16                 : H6," &
        "PA17                 : D4," &
        "PA18                 : G4," &
        "PA19                 : C4," &
        "PA20                 : A3," &
        "PA21                 : B4," &
        "PA22                 : B3," &
        "PA23                 : A4," &
        "PA24                 : H5," &
        "PA25                 : F3," &
        "PA26                 : E3," &
        "PA27                 : H4," &
        "PA28                 : G3," &
        "PA29                 : J5," &
        "PA30                 : D3," &
        "PA31                 : J4," &
        "PB0                  : C3," &
        "PB1                  : A2," &
        "PB2                  : B2," &
        "PB3                  : C2," &
        "PB4                  : J3," &
        "PB5                  : H2," &
        "PB6                  : G2," &
        "PB7                  : H3," &
        "PB8                  : F2," &
        "PB9                  : J2," &
        "PB10                 : F1," &
        "PB11                 : K4," &
        "PB12                 : D2," &
        "PB13                 : K3," &
        "PB14                 : A1," &
        "PB15                 : E2," &
        "PB16                 : B1," &
        "PB17                 : K5," &
        "PB18                 : K2," &
        "PB19                 : C1," &
        "PB20                 : D1," &
        "PB21                 : L3," &
        "PB22                 : G1," &
        "PB23                 : H1," &
        "PB24                 : E1," &
        "PB25                 : J1," &
        "PB26                 : M5," &
        "PB27                 : L2," &
        "PB28                 : K1," &
        "PB29                 : M3," &
        "PB30                 : M4," &
        "PB31                 : L1," &
        "PC                   : (V4, P8, V5, R8, W5, T8, W6, R19, N15, U8" &
        ", V6, V7, W7, V8, U9, W8, V9, W9, V10, U14, V11, U15, T15, U16" &
        ", T16, V17, R16, U12, T11, R13, T12, T13)," &
        "PD                   : (M1, M2, N2, N3, N1, P3, P2, N4, R2, " &
        "R3, T9, P11, T10, P10, U11, R10, U10, R11, U13, T14, R1, P1, N5, P5)" &
        "," &
        "PE                   : (W19, U17, T17, P16, U18, R17, V19, U19, T19, T18" &
        ", N14, R18, P17, P18, N17, N18, M15, N19, P19, N16, M14, M18, M19, L18, L19" &
        ", M17, L15, M16, L17, V1, U2, L4)," &
        "DDR_CAS              : A17," &
        "DDR_CKE              : D15," &
        "DDR_CLKN             : A19," &
        "DDR_CS               : B16," &
        "DDR_RAS              : B17," &
        "DDR_WE               : E16," &
        "DDR_A                : (F15, F16, E17, G15, B18, C16, E15, F17, F18, D19" &
        ", E18, D18, C18, D16)," &
        "DDR_BA               : (C15, D14, G13)," &
        "DDR_DQM              : (L16, J16, D13, F12)," &
        "DDR_CALN             : C19," &
        "DDR_CALP             : B19," &
        "DDR_VREF             : K12," &
        "JTAGSEL              : V2," &
        "NRST                 : T1," &
        "SHDN                 : T2," &
        "TST                  : P4," &
        "WKUP                 : V3," &
        "MSAD                 : (H10, G10, K10, J10, K9, J9, H9, G9)," &
        "PIOBU                : (U3, T3, T4, U4, P6, T5, R4, U5, R5, U6, " &
        "R6, T6, R7, U7, P7, T7) ";
   
-- This section specifies the differential IO port groupings.
   
   attribute PORT_GROUPING of BGA361_SAMA5D4_92A04B: entity is 
      "Differential_Voltage ( " &
          "(DDR_CLK,DDR_CLKN)," &
          "(DDR_DQS(0),DDR_DQSN(0))," &
          "(DDR_DQS(1),DDR_DQSN(1))," &
          "(DDR_DQS(2),DDR_DQSN(2))," &
          "(DDR_DQS(3),DDR_DQSN(3)))";

-- This section specifies the TAP ports. For the TAP TCK port, the parameters in 
-- the brackets are:
--        First Field : Maximum  TCK frequency.
--        Second Field: Allowable states TCK may be stopped in.
   
   attribute TAP_SCAN_CLOCK of PA8 : signal is (10.0e6, BOTH);
   attribute TAP_SCAN_IN    of PB24: signal is true;
   attribute TAP_SCAN_MODE  of PA0 : signal is true;
   attribute TAP_SCAN_OUT   of PB25: signal is true;
   attribute TAP_SCAN_RESET of PA16: signal is true;
   
-- Specifies the compliance enable patterns for the design. It lists a set of 
-- design ports and the values that they should be set to, in order to enable 
-- compliance to IEEE Std 1149.1
   
   attribute COMPLIANCE_PATTERNS of BGA361_SAMA5D4_92A04B: entity is 
        "(JTAGSEL, TST) (10)";
   
-- Specifies the number of bits in the instruction register.
   
   attribute INSTRUCTION_LENGTH of BGA361_SAMA5D4_92A04B: entity is 4;
   
-- Specifies the boundary-scan instructions implemented in the design and their 
-- opcodes.
   
   attribute INSTRUCTION_OPCODE of BGA361_SAMA5D4_92A04B: entity is 
     "BYPASS  (1111, 0001, 0101, 0110, 1100, 0111, 1101, 1000, 1001, 1011, " &
     "1110)," &
     "EXTEST  (0000)," &
     "SAMPLE  (0100)," &
     "INTEST  (0010)," &
     "IDCODE  (0011)," &
     "RUNBIST (1010)";
   
-- Specifies the bit pattern that is loaded into the instruction register when 
-- the TAP controller passes through the Capture-IR state. The standard mandates 
-- that the two LSBs must be "01". The remaining bits are design specific.
   
   attribute INSTRUCTION_CAPTURE of BGA361_SAMA5D4_92A04B: entity is "0001";
   
-- Specifies the bit pattern that is loaded into the DEVICE_ID register during 
-- the IDCODE instruction when the TAP controller passes through the Capture-DR 
-- state.
   
   attribute IDCODE_REGISTER of BGA361_SAMA5D4_92A04B: entity is 
     "0000" &                  
 -- 4-bit version number
     "0101101100111001" &      
 -- 16-bit part number
     "00000011111" &           
 -- 11-bit identity of the manufacturer
     "1";                      
 -- Required by IEEE Std 1149.1
   
-- This section specifies the test data register placed between TDI and TDO for 
-- each implemented instruction.
   
   attribute REGISTER_ACCESS of BGA361_SAMA5D4_92A04B: entity is 
        "BYPASS    (BYPASS)," &
        "BOUNDARY  (EXTEST, SAMPLE, INTEST)," &
        "DEVICE_ID (IDCODE)," &
        "UTDR1[28] (RUNBIST)";
   
-- Specifies the length of the boundary scan register.
   
   attribute BOUNDARY_LENGTH of BGA361_SAMA5D4_92A04B: entity is 420;
   
-- The following list specifies the characteristics of each cell in the boundary 
-- scan register from TDI to TDO. The following is a description of the label 
-- fields:
--      num     : Is the cell number.
--      cell    : Is the cell type as defined by the standard.
--      port    : Is the design port name. Control cells do not have a port 
--                name.
--      function: Is the function of the cell as defined by the standard. Is one 
--                of input, output2, output3, bidir, control or controlr.
--      safe    : Specifies the value that the BSR cell should be loaded with 
--                for safe operation when the software might otherwise choose a 
--                random value.
--      ccell   : The control cell number. Specifies the control cell that 
--                drives the output enable for this port.
--      disval  : Specifies the value that is loaded into the control cell to 
--                disable the output enable for the corresponding port.
--      rslt    : Resulting state. Shows the state of the driver when it is 
--                disabled.
   
   attribute BOUNDARY_REGISTER of BGA361_SAMA5D4_92A04B: entity is 
--     
--    num   cell   port         function      safe  [ccell  disval  rslt]
--     
     "419  (BC_1,  *,           control,      1),                        " &
     "418  (BC_7,  PA1,         bidir,        X,    419,    1,      Z),  " &
     "417  (BC_1,  *,           control,      1),                        " &
     "416  (BC_7,  PA2,         bidir,        X,    417,    1,      Z),  " &
     "415  (BC_1,  *,           control,      1),                        " &
     "414  (BC_7,  PA3,         bidir,        X,    415,    1,      Z),  " &
     "413  (BC_1,  *,           control,      1),                        " &
     "412  (BC_7,  PA4,         bidir,        X,    413,    1,      Z),  " &
     "411  (BC_1,  *,           control,      1),                        " &
     "410  (BC_7,  PA5,         bidir,        X,    411,    1,      Z),  " &
     "409  (BC_1,  *,           control,      1),                        " &
     "408  (BC_7,  PA6,         bidir,        X,    409,    1,      Z),  " &
     "407  (BC_1,  *,           control,      1),                        " &
     "406  (BC_7,  PA7,         bidir,        X,    407,    1,      Z),  " &
     "405  (BC_1,  *,           control,      1),                        " &
     "404  (BC_7,  PA9,         bidir,        X,    405,    1,      Z),  " &
     "403  (BC_1,  *,           control,      1),                        " &
     "402  (BC_7,  PA10,        bidir,        X,    403,    1,      Z),  " &
     "401  (BC_1,  *,           control,      1),                        " &
     "400  (BC_7,  PA11,        bidir,        X,    401,    1,      Z),  " &
     "399  (BC_1,  *,           control,      1),                        " &
     "398  (BC_7,  PA12,        bidir,        X,    399,    1,      Z),  " &
     "397  (BC_1,  *,           control,      1),                        " &
     "396  (BC_7,  PA13,        bidir,        X,    397,    1,      Z),  " &
     "395  (BC_1,  *,           control,      1),                        " &
     "394  (BC_7,  PA14,        bidir,        X,    395,    1,      Z),  " &
     "393  (BC_1,  *,           control,      1),                        " &
     "392  (BC_7,  PA15,        bidir,        X,    393,    1,      Z),  " &
     "391  (BC_1,  *,           control,      1),                        " &
     "390  (BC_7,  PA17,        bidir,        X,    391,    1,      Z),  " &
     "389  (BC_1,  *,           control,      1),                        " &
     "388  (BC_7,  PA18,        bidir,        X,    389,    1,      Z),  " &
     "387  (BC_1,  *,           control,      1),                        " &
     "386  (BC_7,  PA19,        bidir,        X,    387,    1,      Z),  " &
     "385  (BC_1,  *,           control,      1),                        " &
     "384  (BC_7,  PA20,        bidir,        X,    385,    1,      Z),  " &
     "383  (BC_1,  *,           control,      1),                        " &
     "382  (BC_7,  PA21,        bidir,        X,    383,    1,      Z),  " &
     "381  (BC_1,  *,           control,      1),                        " &
     "380  (BC_7,  PA22,        bidir,        X,    381,    1,      Z),  " &
     "379  (BC_1,  *,           control,      1),                        " &
     "378  (BC_7,  PA23,        bidir,        X,    379,    1,      Z),  " &
     "377  (BC_1,  *,           control,      1),                        " &
     "376  (BC_7,  PA24,        bidir,        X,    377,    1,      Z),  " &
     "375  (BC_1,  *,           control,      1),                        " &
     "374  (BC_7,  PA25,        bidir,        X,    375,    1,      Z),  " &
     "373  (BC_1,  *,           control,      1),                        " &
     "372  (BC_7,  PA26,        bidir,        X,    373,    1,      Z),  " &
     "371  (BC_1,  *,           control,      1),                        " &
     "370  (BC_7,  PA27,        bidir,        X,    371,    1,      Z),  " &
     "369  (BC_1,  *,           control,      1),                        " &
     "368  (BC_7,  PA28,        bidir,        X,    369,    1,      Z),  " &
     "367  (BC_1,  *,           control,      1),                        " &
     "366  (BC_7,  PA29,        bidir,        X,    367,    1,      Z),  " &
     "365  (BC_1,  *,           control,      1),                        " &
     "364  (BC_7,  PA30,        bidir,        X,    365,    1,      Z),  " &
     "363  (BC_1,  *,           control,      1),                        " &
     "362  (BC_7,  PA31,        bidir,        X,    363,    1,      Z),  " &
     "361  (BC_1,  *,           control,      1),                        " &
     "360  (BC_7,  PB0,         bidir,        X,    361,    1,      Z),  " &
     "359  (BC_1,  *,           control,      1),                        " &
     "358  (BC_7,  PB1,         bidir,        X,    359,    1,      Z),  " &
     "357  (BC_1,  *,           control,      1),                        " &
     "356  (BC_7,  PB2,         bidir,        X,    357,    1,      Z),  " &
     "355  (BC_1,  *,           control,      1),                        " &
     "354  (BC_7,  PB3,         bidir,        X,    355,    1,      Z),  " &
     "353  (BC_1,  *,           control,      1),                        " &
     "352  (BC_7,  PB4,         bidir,        X,    353,    1,      Z),  " &
     "351  (BC_1,  *,           control,      1),                        " &
     "350  (BC_7,  PB5,         bidir,        X,    351,    1,      Z),  " &
     "349  (BC_1,  *,           control,      1),                        " &
     "348  (BC_7,  PB6,         bidir,        X,    349,    1,      Z),  " &
     "347  (BC_1,  *,           control,      1),                        " &
     "346  (BC_7,  PB7,         bidir,        X,    347,    1,      Z),  " &
     "345  (BC_1,  *,           control,      1),                        " &
     "344  (BC_7,  PB8,         bidir,        X,    345,    1,      Z),  " &
     "343  (BC_1,  *,           control,      1),                        " &
     "342  (BC_7,  PB9,         bidir,        X,    343,    1,      Z),  " &
     "341  (BC_1,  *,           control,      1),                        " &
     "340  (BC_7,  PB10,        bidir,        X,    341,    1,      Z),  " &
     "339  (BC_1,  *,           control,      1),                        " &
     "338  (BC_7,  PB11,        bidir,        X,    339,    1,      Z),  " &
     "337  (BC_1,  *,           control,      1),                        " &
     "336  (BC_7,  PB12,        bidir,        X,    337,    1,      Z),  " &
     "335  (BC_1,  *,           control,      1),                        " &
     "334  (BC_7,  PB13,        bidir,        X,    335,    1,      Z),  " &
     "333  (BC_1,  *,           control,      1),                        " &
     "332  (BC_7,  PB14,        bidir,        X,    333,    1,      Z),  " &
     "331  (BC_1,  *,           control,      1),                        " &
     "330  (BC_7,  PB15,        bidir,        X,    331,    1,      Z),  " &
     "329  (BC_1,  *,           control,      1),                        " &
     "328  (BC_7,  PB16,        bidir,        X,    329,    1,      Z),  " &
     "327  (BC_1,  *,           control,      1),                        " &
     "326  (BC_7,  PB17,        bidir,        X,    327,    1,      Z),  " &
     "325  (BC_1,  *,           control,      1),                        " &
     "324  (BC_7,  PB18,        bidir,        X,    325,    1,      Z),  " &
     "323  (BC_1,  *,           control,      1),                        " &
     "322  (BC_7,  PB19,        bidir,        X,    323,    1,      Z),  " &
     "321  (BC_1,  *,           control,      1),                        " &
     "320  (BC_7,  PB20,        bidir,        X,    321,    1,      Z),  " &
     "319  (BC_1,  *,           control,      1),                        " &
     "318  (BC_7,  PB21,        bidir,        X,    319,    1,      Z),  " &
     "317  (BC_1,  *,           control,      1),                        " &
     "316  (BC_7,  PB22,        bidir,        X,    317,    1,      Z),  " &
     "315  (BC_1,  *,           control,      1),                        " &
     "314  (BC_7,  PE(31),      bidir,        X,    315,    1,      Z),  " &
     "313  (BC_1,  *,           control,      1),                        " &
     "312  (BC_7,  PB23,        bidir,        X,    313,    1,      Z),  " &
     "311  (BC_1,  *,           control,      1),                        " &
     "310  (BC_7,  PB26,        bidir,        X,    311,    1,      Z),  " &
     "309  (BC_1,  *,           control,      1),                        " &
     "308  (BC_7,  PB27,        bidir,        X,    309,    1,      Z),  " &
     "307  (BC_1,  *,           control,      1),                        " &
     "306  (BC_7,  PB28,        bidir,        X,    307,    1,      Z),  " &
     "305  (BC_1,  *,           control,      1),                        " &
     "304  (BC_7,  PB29,        bidir,        X,    305,    1,      Z),  " &
     "303  (BC_1,  *,           control,      1),                        " &
     "302  (BC_7,  PB30,        bidir,        X,    303,    1,      Z),  " &
     "301  (BC_1,  *,           control,      1),                        " &
     "300  (BC_7,  PB31,        bidir,        X,    301,    1,      Z),  " &
     "299  (BC_1,  *,           control,      1),                        " &
     "298  (BC_7,  PD(8),       bidir,        X,    299,    1,      Z),  " &
     "297  (BC_1,  *,           control,      1),                        " &
     "296  (BC_7,  PD(9),       bidir,        X,    297,    1,      Z),  " &
     "295  (BC_1,  *,           control,      1),                        " &
     "294  (BC_7,  PD(10),      bidir,        X,    295,    1,      Z),  " &
     "293  (BC_1,  *,           control,      1),                        " &
     "292  (BC_7,  PD(11),      bidir,        X,    293,    1,      Z),  " &
     "291  (BC_1,  *,           control,      1),                        " &
     "290  (BC_7,  PD(12),      bidir,        X,    291,    1,      Z),  " &
     "289  (BC_1,  *,           control,      1),                        " &
     "288  (BC_7,  PD(13),      bidir,        X,    289,    1,      Z),  " &
     "287  (BC_1,  *,           control,      1),                        " &
     "286  (BC_7,  PD(14),      bidir,        X,    287,    1,      Z),  " &
     "285  (BC_1,  *,           control,      1),                        " &
     "284  (BC_7,  PD(15),      bidir,        X,    285,    1,      Z),  " &
     "283  (BC_1,  *,           control,      1),                        " &
     "282  (BC_7,  PD(16),      bidir,        X,    283,    1,      Z),  " &
     "281  (BC_1,  *,           control,      1),                        " &
     "280  (BC_7,  PD(17),      bidir,        X,    281,    1,      Z),  " &
     "279  (BC_1,  *,           control,      1),                        " &
     "278  (BC_7,  PD(28),      bidir,        X,    279,    1,      Z),  " &
     "277  (BC_1,  *,           control,      1),                        " &
     "276  (BC_7,  PD(29),      bidir,        X,    277,    1,      Z),  " &
     "275  (BC_1,  *,           control,      1),                        " &
     "274  (BC_7,  PD(30),      bidir,        X,    275,    1,      Z),  " &
     "273  (BC_1,  *,           control,      1),                        " &
     "272  (BC_7,  PD(31),      bidir,        X,    273,    1,      Z),  " &
     "271  (BC_1,  *,           control,      1),                        " &
     "270  (BC_7,  PC(0),       bidir,        X,    271,    1,      Z),  " &
     "269  (BC_1,  *,           control,      1),                        " &
     "268  (BC_7,  PC(1),       bidir,        X,    269,    1,      Z),  " &
     "267  (BC_1,  *,           control,      1),                        " &
     "266  (BC_7,  PC(2),       bidir,        X,    267,    1,      Z),  " &
     "265  (BC_1,  *,           control,      1),                        " &
     "264  (BC_7,  PC(3),       bidir,        X,    265,    1,      Z),  " &
     "263  (BC_1,  *,           control,      1),                        " &
     "262  (BC_7,  PC(4),       bidir,        X,    263,    1,      Z),  " &
     "261  (BC_1,  *,           control,      1),                        " &
     "260  (BC_7,  PC(5),       bidir,        X,    261,    1,      Z),  " &
     "259  (BC_1,  *,           control,      1),                        " &
     "258  (BC_7,  PC(6),       bidir,        X,    259,    1,      Z),  " &
     "257  (BC_1,  *,           control,      1),                        " &
     "256  (BC_7,  PC(7),       bidir,        X,    257,    1,      Z),  " &
     "255  (BC_1,  *,           control,      1),                        " &
     "254  (BC_7,  PC(8),       bidir,        X,    255,    1,      Z),  " &
     "253  (BC_1,  *,           control,      1),                        " &
     "252  (BC_7,  PC(9),       bidir,        X,    253,    1,      Z),  " &
     "251  (BC_1,  *,           control,      1),                        " &
     "250  (BC_7,  PC(10),      bidir,        X,    251,    1,      Z),  " &
     "249  (BC_1,  *,           control,      1),                        " &
     "248  (BC_7,  PC(11),      bidir,        X,    249,    1,      Z),  " &
     "247  (BC_1,  *,           control,      1),                        " &
     "246  (BC_7,  PC(12),      bidir,        X,    247,    1,      Z),  " &
     "245  (BC_1,  *,           control,      1),                        " &
     "244  (BC_7,  PC(13),      bidir,        X,    245,    1,      Z),  " &
     "243  (BC_1,  *,           control,      1),                        " &
     "242  (BC_7,  PC(14),      bidir,        X,    243,    1,      Z),  " &
     "241  (BC_1,  *,           control,      1),                        " &
     "240  (BC_7,  PC(15),      bidir,        X,    241,    1,      Z),  " &
     "239  (BC_1,  *,           control,      1),                        " &
     "238  (BC_7,  PC(16),      bidir,        X,    239,    1,      Z),  " &
     "237  (BC_1,  *,           control,      1),                        " &
     "236  (BC_7,  PC(17),      bidir,        X,    237,    1,      Z),  " &
     "235  (BC_1,  *,           control,      1),                        " &
     "234  (BC_7,  PC(18),      bidir,        X,    235,    1,      Z),  " &
     "233  (BC_1,  *,           control,      1),                        " &
     "232  (BC_7,  PC(19),      bidir,        X,    233,    1,      Z),  " &
     "231  (BC_1,  *,           control,      1),                        " &
     "230  (BC_7,  PC(20),      bidir,        X,    231,    1,      Z),  " &
     "229  (BC_1,  *,           control,      0),                        " &
     "228  (BC_7,  PE(29),      bidir,        X,    229,    0,      Z),  " &
     "227  (BC_1,  *,           control,      0),                        " &
     "226  (BC_7,  PE(30),      bidir,        X,    227,    0,      Z),  " &
     "225  (BC_1,  *,           control,      1),                        " &
     "224  (BC_7,  PC(27),      bidir,        X,    225,    1,      Z),  " &
     "223  (BC_1,  *,           control,      1),                        " &
     "222  (BC_7,  PC(28),      bidir,        X,    223,    1,      Z),  " &
     "221  (BC_1,  *,           control,      1),                        " &
     "220  (BC_7,  PC(29),      bidir,        X,    221,    1,      Z),  " &
     "219  (BC_1,  *,           control,      1),                        " &
     "218  (BC_7,  PC(30),      bidir,        X,    219,    1,      Z),  " &
     "217  (BC_1,  *,           control,      1),                        " &
     "216  (BC_7,  PC(31),      bidir,        X,    217,    1,      Z),  " &
     "215  (BC_1,  *,           control,      1),                        " &
     "214  (BC_7,  PD(18),      bidir,        X,    215,    1,      Z),  " &
     "213  (BC_1,  *,           control,      1),                        " &
     "212  (BC_7,  PD(19),      bidir,        X,    213,    1,      Z),  " &
     "211  (BC_1,  *,           control,      1),                        " &
     "210  (BC_7,  PD(20),      bidir,        X,    211,    1,      Z),  " &
     "209  (BC_1,  *,           control,      1),                        " &
     "208  (BC_7,  PD(21),      bidir,        X,    209,    1,      Z),  " &
     "207  (BC_1,  *,           control,      1),                        " &
     "206  (BC_7,  PD(22),      bidir,        X,    207,    1,      Z),  " &
     "205  (BC_1,  *,           control,      1),                        " &
     "204  (BC_7,  PD(23),      bidir,        X,    205,    1,      Z),  " &
     "203  (BC_1,  *,           control,      1),                        " &
     "202  (BC_7,  PD(24),      bidir,        X,    203,    1,      Z),  " &
     "201  (BC_1,  *,           control,      1),                        " &
     "200  (BC_7,  PD(25),      bidir,        X,    201,    1,      Z),  " &
     "199  (BC_1,  *,           control,      1),                        " &
     "198  (BC_7,  PD(26),      bidir,        X,    199,    1,      Z),  " &
     "197  (BC_1,  *,           control,      1),                        " &
     "196  (BC_7,  PD(27),      bidir,        X,    197,    1,      Z),  " &
     "195  (BC_1,  *,           control,      1),                        " &
     "194  (BC_7,  PC(21),      bidir,        X,    195,    1,      Z),  " &
     "193  (BC_1,  *,           control,      1),                        " &
     "192  (BC_7,  PC(22),      bidir,        X,    193,    1,      Z),  " &
     "191  (BC_1,  *,           control,      1),                        " &
     "190  (BC_7,  PC(23),      bidir,        X,    191,    1,      Z),  " &
     "189  (BC_1,  *,           control,      1),                        " &
     "188  (BC_7,  PC(24),      bidir,        X,    189,    1,      Z),  " &
     "187  (BC_1,  *,           control,      1),                        " &
     "186  (BC_7,  PC(25),      bidir,        X,    187,    1,      Z),  " &
     "185  (BC_1,  *,           control,      1),                        " &
     "184  (BC_7,  PC(26),      bidir,        X,    185,    1,      Z),  " &
     "183  (BC_1,  *,           control,      1),                        " &
     "182  (BC_7,  PE(0),       bidir,        X,    183,    1,      Z),  " &
     "181  (BC_1,  *,           control,      1),                        " &
     "180  (BC_7,  PE(1),       bidir,        X,    181,    1,      Z),  " &
     "179  (BC_1,  *,           control,      1),                        " &
     "178  (BC_7,  PE(2),       bidir,        X,    179,    1,      Z),  " &
     "177  (BC_1,  *,           control,      1),                        " &
     "176  (BC_7,  PE(3),       bidir,        X,    177,    1,      Z),  " &
     "175  (BC_1,  *,           control,      1),                        " &
     "174  (BC_7,  PE(4),       bidir,        X,    175,    1,      Z),  " &
     "173  (BC_1,  *,           control,      1),                        " &
     "172  (BC_7,  PE(5),       bidir,        X,    173,    1,      Z),  " &
     "171  (BC_1,  *,           control,      1),                        " &
     "170  (BC_7,  PE(6),       bidir,        X,    171,    1,      Z),  " &
     "169  (BC_1,  *,           control,      1),                        " &
     "168  (BC_7,  PE(7),       bidir,        X,    169,    1,      Z),  " &
     "167  (BC_1,  *,           control,      1),                        " &
     "166  (BC_7,  PE(8),       bidir,        X,    167,    1,      Z),  " &
     "165  (BC_1,  *,           control,      1),                        " &
     "164  (BC_7,  PE(9),       bidir,        X,    165,    1,      Z),  " &
     "163  (BC_1,  *,           control,      1),                        " &
     "162  (BC_7,  PE(10),      bidir,        X,    163,    1,      Z),  " &
     "161  (BC_1,  *,           control,      1),                        " &
     "160  (BC_7,  PE(11),      bidir,        X,    161,    1,      Z),  " &
     "159  (BC_1,  *,           control,      1),                        " &
     "158  (BC_7,  PE(12),      bidir,        X,    159,    1,      Z),  " &
     "157  (BC_1,  *,           control,      1),                        " &
     "156  (BC_7,  PE(13),      bidir,        X,    157,    1,      Z),  " &
     "155  (BC_1,  *,           control,      1),                        " &
     "154  (BC_7,  PE(14),      bidir,        X,    155,    1,      Z),  " &
     "153  (BC_1,  *,           control,      1),                        " &
     "152  (BC_7,  PE(15),      bidir,        X,    153,    1,      Z),  " &
     "151  (BC_1,  *,           control,      1),                        " &
     "150  (BC_7,  PE(16),      bidir,        X,    151,    1,      Z),  " &
     "149  (BC_1,  *,           control,      1),                        " &
     "148  (BC_7,  PE(17),      bidir,        X,    149,    1,      Z),  " &
     "147  (BC_1,  *,           control,      1),                        " &
     "146  (BC_7,  PE(18),      bidir,        X,    147,    1,      Z),  " &
     "145  (BC_1,  *,           control,      1),                        " &
     "144  (BC_7,  PE(19),      bidir,        X,    145,    1,      Z),  " &
     "143  (BC_1,  *,           control,      1),                        " &
     "142  (BC_7,  PE(20),      bidir,        X,    143,    1,      Z),  " &
     "141  (BC_1,  *,           control,      1),                        " &
     "140  (BC_7,  PE(21),      bidir,        X,    141,    1,      Z),  " &
     "139  (BC_1,  *,           control,      1),                        " &
     "138  (BC_7,  PE(22),      bidir,        X,    139,    1,      Z),  " &
     "137  (BC_1,  *,           control,      1),                        " &
     "136  (BC_7,  PE(23),      bidir,        X,    137,    1,      Z),  " &
     "135  (BC_1,  *,           control,      1),                        " &
     "134  (BC_7,  PE(24),      bidir,        X,    135,    1,      Z),  " &
     "133  (BC_1,  *,           control,      1),                        " &
     "132  (BC_7,  PE(25),      bidir,        X,    133,    1,      Z),  " &
     "131  (BC_1,  *,           control,      1),                        " &
     "130  (BC_7,  PE(26),      bidir,        X,    131,    1,      Z),  " &
     "129  (BC_1,  *,           control,      1),                        " &
     "128  (BC_7,  PE(27),      bidir,        X,    129,    1,      Z),  " &
     "127  (BC_1,  *,           control,      1),                        " &
     "126  (BC_7,  PE(28),      bidir,        X,    127,    1,      Z),  " &
     "125  (BC_1,  *,           control,      1),                        " &
     "124  (BC_7,  DDR_D(31),   bidir,        X,    125,    1,      Z),  " &
     "123  (BC_1,  *,           control,      1),                        " &
     "122  (BC_7,  DDR_D(30),   bidir,        X,    123,    1,      Z),  " &
     "121  (BC_1,  *,           control,      1),                        " &
     "120  (BC_7,  DDR_D(29),   bidir,        X,    121,    1,      Z),  " &
     "119  (BC_1,  *,           control,      1),                        " &
     "118  (BC_7,  DDR_D(28),   bidir,        X,    119,    1,      Z),  " &
     "117  (BC_0,  *,           internal,     X),                        " &
     "116  (BC_0,  *,           internal,     X),                        " &
     "115  (BC_1,  *,           control,      1),                        " &
     "114  (BC_7,  DDR_D(27),   bidir,        X,    115,    1,      Z),  " &
     "113  (BC_1,  *,           control,      1),                        " &
     "112  (BC_7,  DDR_D(26),   bidir,        X,    113,    1,      Z),  " &
     "111  (BC_1,  *,           control,      1),                        " &
     "110  (BC_7,  DDR_D(25),   bidir,        X,    111,    1,      Z),  " &
     "109  (BC_1,  *,           control,      1),                        " &
     "108  (BC_7,  DDR_D(24),   bidir,        X,    109,    1,      Z),  " &
     "107  (BC_1,  *,           control,      1),                        " &
     "106  (BC_1,  DDR_DQM(3),  output3,      X,    107,    1,      Z),  " &
     "105  (BC_1,  *,           control,      1),                        " &
     "104  (BC_7,  DDR_D(23),   bidir,        X,    105,    1,      Z),  " &
     "103  (BC_1,  *,           control,      1),                        " &
     "102  (BC_7,  DDR_D(22),   bidir,        X,    103,    1,      Z),  " &
     "101  (BC_1,  *,           control,      1),                        " &
     "100  (BC_7,  DDR_D(21),   bidir,        X,    101,    1,      Z),  " &
     "99   (BC_1,  *,           control,      1),                        " &
     "98   (BC_7,  DDR_D(20),   bidir,        X,    99,     1,      Z),  " &
     "97   (BC_0,  *,           internal,     X),                        " &
     "96   (BC_0,  *,           internal,     X),                        " &
     "95   (BC_1,  *,           control,      1),                        " &
     "94   (BC_7,  DDR_D(19),   bidir,        X,    95,     1,      Z),  " &
     "93   (BC_1,  *,           control,      1),                        " &
     "92   (BC_7,  DDR_D(18),   bidir,        X,    93,     1,      Z),  " &
     "91   (BC_1,  *,           control,      1),                        " &
     "90   (BC_7,  DDR_D(17),   bidir,        X,    91,     1,      Z),  " &
     "89   (BC_1,  *,           control,      1),                        " &
     "88   (BC_7,  DDR_D(16),   bidir,        X,    89,     1,      Z),  " &
     "87   (BC_1,  *,           control,      1),                        " &
     "86   (BC_1,  DDR_DQM(2),  output3,      X,    87,     1,      Z),  " &
     "85   (BC_1,  *,           control,      1),                        " &
     "84   (BC_1,  DDR_BA(2),   output3,      X,    85,     1,      Z),  " &
     "83   (BC_1,  *,           control,      1),                        " &
     "82   (BC_1,  DDR_BA(1),   output3,      X,    83,     1,      Z),  " &
     "81   (BC_1,  *,           control,      1),                        " &
     "80   (BC_1,  DDR_BA(0),   output3,      X,    81,     1,      Z),  " &
     "79   (BC_1,  *,           control,      1),                        " &
     "78   (BC_1,  DDR_CKE,     output3,      X,    79,     1,      Z),  " &
     "77   (BC_1,  *,           control,      1),                        " &
     "76   (BC_1,  DDR_CS,      output3,      X,    77,     1,      Z),  " &
     "75   (BC_1,  *,           control,      1),                        " &
     "74   (BC_1,  DDR_A(13),   output3,      X,    75,     1,      Z),  " &
     "73   (BC_1,  *,           control,      1),                        " &
     "72   (BC_1,  DDR_A(5),    output3,      X,    73,     1,      Z),  " &
     "71   (BC_1,  *,           control,      1),                        " &
     "70   (BC_1,  DDR_A(6),    output3,      X,    71,     1,      Z),  " &
     "69   (BC_1,  *,           control,      1),                        " &
     "68   (BC_1,  DDR_RAS,     output3,      X,    69,     1,      Z),  " &
     "67   (BC_1,  *,           control,      1),                        " &
     "66   (BC_1,  DDR_CAS,     output3,      X,    67,     1,      Z),  " &
     "65   (BC_1,  *,           control,      1),                        " &
     "64   (BC_1,  DDR_WE,      output3,      X,    65,     1,      Z),  " &
     "63   (BC_0,  *,           internal,     X),                        " &
     "62   (BC_0,  *,           internal,     X),                        " &
     "61   (BC_1,  *,           control,      1),                        " &
     "60   (BC_1,  DDR_A(0),    output3,      X,    61,     1,      Z),  " &
     "59   (BC_1,  *,           control,      1),                        " &
     "58   (BC_1,  DDR_A(1),    output3,      X,    59,     1,      Z),  " &
     "57   (BC_1,  *,           control,      1),                        " &
     "56   (BC_1,  DDR_A(2),    output3,      X,    57,     1,      Z),  " &
     "55   (BC_1,  *,           control,      1),                        " &
     "54   (BC_1,  DDR_A(3),    output3,      X,    55,     1,      Z),  " &
     "53   (BC_1,  *,           control,      1),                        " &
     "52   (BC_1,  DDR_A(4),    output3,      X,    53,     1,      Z),  " &
     "51   (BC_1,  *,           control,      1),                        " &
     "50   (BC_1,  DDR_A(12),   output3,      X,    51,     1,      Z),  " &
     "49   (BC_1,  *,           control,      1),                        " &
     "48   (BC_1,  DDR_A(11),   output3,      X,    49,     1,      Z),  " &
     "47   (BC_1,  *,           control,      1),                        " &
     "46   (BC_1,  DDR_A(10),   output3,      X,    47,     1,      Z),  " &
     "45   (BC_1,  *,           control,      1),                        " &
     "44   (BC_1,  DDR_A(9),    output3,      X,    45,     1,      Z),  " &
     "43   (BC_1,  *,           control,      1),                        " &
     "42   (BC_1,  DDR_A(8),    output3,      X,    43,     1,      Z),  " &
     "41   (BC_1,  *,           control,      1),                        " &
     "40   (BC_1,  DDR_A(7),    output3,      X,    41,     1,      Z),  " &
     "39   (BC_1,  *,           control,      1),                        " &
     "38   (BC_7,  DDR_D(15),   bidir,        X,    39,     1,      Z),  " &
     "37   (BC_1,  *,           control,      1),                        " &
     "36   (BC_7,  DDR_D(14),   bidir,        X,    37,     1,      Z),  " &
     "35   (BC_1,  *,           control,      1),                        " &
     "34   (BC_7,  DDR_D(13),   bidir,        X,    35,     1,      Z),  " &
     "33   (BC_1,  *,           control,      1),                        " &
     "32   (BC_7,  DDR_D(12),   bidir,        X,    33,     1,      Z),  " &
     "31   (BC_0,  *,           internal,     X),                        " &
     "30   (BC_0,  *,           internal,     X),                        " &
     "29   (BC_1,  *,           control,      1),                        " &
     "28   (BC_7,  DDR_D(11),   bidir,        X,    29,     1,      Z),  " &
     "27   (BC_1,  *,           control,      1),                        " &
     "26   (BC_7,  DDR_D(10),   bidir,        X,    27,     1,      Z),  " &
     "25   (BC_1,  *,           control,      1),                        " &
     "24   (BC_7,  DDR_D(9),    bidir,        X,    25,     1,      Z),  " &
     "23   (BC_1,  *,           control,      1),                        " &
     "22   (BC_7,  DDR_D(8),    bidir,        X,    23,     1,      Z),  " &
     "21   (BC_1,  *,           control,      1),                        " &
     "20   (BC_1,  DDR_DQM(1),  output3,      X,    21,     1,      Z),  " &
     "19   (BC_1,  *,           control,      1),                        " &
     "18   (BC_7,  DDR_D(7),    bidir,        X,    19,     1,      Z),  " &
     "17   (BC_1,  *,           control,      1),                        " &
     "16   (BC_7,  DDR_D(6),    bidir,        X,    17,     1,      Z),  " &
     "15   (BC_1,  *,           control,      1),                        " &
     "14   (BC_7,  DDR_D(5),    bidir,        X,    15,     1,      Z),  " &
     "13   (BC_1,  *,           control,      1),                        " &
     "12   (BC_7,  DDR_D(4),    bidir,        X,    13,     1,      Z),  " &
     "11   (BC_0,  *,           internal,     X),                        " &
     "10   (BC_0,  *,           internal,     X),                        " &
     "9    (BC_1,  *,           control,      1),                        " &
     "8    (BC_7,  DDR_D(3),    bidir,        X,    9,      1,      Z),  " &
     "7    (BC_1,  *,           control,      1),                        " &
     "6    (BC_7,  DDR_D(2),    bidir,        X,    7,      1,      Z),  " &
     "5    (BC_1,  *,           control,      1),                        " &
     "4    (BC_7,  DDR_D(1),    bidir,        X,    5,      1,      Z),  " &
     "3    (BC_1,  *,           control,      1),                        " &
     "2    (BC_7,  DDR_D(0),    bidir,        X,    3,      1,      Z),  " &
     "1    (BC_1,  *,           control,      1),                        " &
     "0    (BC_1,  DDR_DQM(0),  output3,      X,    1,      1,      Z)   ";
 
 end BGA361_SAMA5D4_92A04B;