-- **********************************************************************
--
-- FILE : bga_zl50012.bsd
-- generated by Czeslaw Piasta as cz402 on Wed Nov 20 08:12:43 EST 2002
-- using p.jtag.bsd rev 2.0 July 23, 2002
--
-- BSDL description for top level entity zl50012
-- Device : ZL50012 Package : BGA
--
-- Number of BSC cells: 147
--
-- **********************************************************************
--
-- IMPORTANT NOTICE
--
-- This information is for modeling purposes only, and is not guaranteed.
--
-- This information is provided "as is" without warranty of any kind.
-- It may contain technical inaccuracies or typographical errors.
--
-- ZARLINK and ZL50012 are trademarks of ZARLINK Semiconductor. ZARLINK
-- products, marketed under trademarks, are protected under numerous US
-- and foreign patents and pending applications, maskwork rights, and
-- copyrights.
--
-- ZARLINK reserves the right to make changes to any products and
-- services at any time without notice. ZARLINK assumes no
-- responsibility or liability arising out of the application or use of
-- any information, product, or service described herein except as
-- expressly agreed to in writing by ZARLINK Corporation. ZARLINK
-- customers are advised to obtain the latest version of device
-- specifications before relying on any published information and before
-- placing orders for products or services.
--
-- *********************************************************************
-- ********************************************************************
-- Modification History:
-- Initial release: Wed Nov 20 08:12:43 EST 2002
-- ********************************************************************
-- ********************************************************************
--
-- SPECIAL NOTES
--
-- 1. All instruction opcodes other than those defined in this file
-- should be considered PRIVATE.
--
-- 2. Keep the following balls not connected:
-- NC(1 to 5): C9,C8,C5,C6,A8 IC(0 to 4): A6,A5,B6,B5,C7
--
-- 3. Connect pins ICONN(1 to 3): A7,C4,A4 to VSS for normal operation
--
-- ********************************************************************
entity zl50012 is
generic(PHYSICAL_PIN_MAP : string := "BGA_PACKAGE");
port (
A: in bit_vector (0 to 11);
CKI: in bit;
CKO: out bit_vector (0 to 2);
CLKBYPS: in bit;
CSB: in bit;
D: inout bit_vector (0 to 15);
DSB: in bit;
DTAB: out bit;
FPI: in bit;
FPO: out bit_vector (0 to 2);
IC: linkage bit_vector (0 to 4);
ICONN: linkage bit_vector(1 to 3);
NC: linkage bit_vector (1 to 5);
ODE: in bit;
RESETB: linkage bit;
RWB: in bit;
SG1: linkage bit;
STI: in bit_vector (0 to 15);
STO: out bit_vector (0 to 15);
STOHZ: out bit_vector (0 to 15);
TCK: in bit;
TDI: in bit;
TDO: out bit;
TM1: linkage bit;
TM2: linkage bit;
TMS: in bit;
TRSTB: in bit;
VDD: linkage bit_vector (1 to 11);
VDD_APLL: linkage bit;
VSS: linkage bit_vector (1 to 19);
VSS_APLL: linkage bit
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of zl50012 : entity is
"STD_1149_1_2001";
attribute PIN_MAP of zl50012 : entity is PHYSICAL_PIN_MAP;
constant BGA_PACKAGE : PIN_MAP_STRING :=
"A :(M10 , " & -- A[0]
"M11 , " & -- A[1]
"L10 , " & -- A[2]
"L11 , " & -- A[3]
"K11 , " & -- A[4]
"K10 , " & -- A[5]
"L12 , " & -- A[6]
"K12 , " & -- A[7]
"J11 , " & -- A[8]
"J10 , " & -- A[9]
"J9 , " & -- A[10]
"J12 ), " & -- A[11]
"CKI : A10 , " &
"CKO :(B4 , " & -- CKO[0]
"B2 , " & -- CKO[1]
"B1 ), " & -- CKO[2]
"CLKBYPS : B7 , " &
"CSB : K7 , " &
"D :(M4 , " & -- D[0]
"K5 , " & -- D[1]
"J5 , " & -- D[2]
"L4 , " & -- D[3]
"L6 , " & -- D[4]
"K6 , " & -- D[5]
"M6 , " & -- D[6]
"L7 , " & -- D[7]
"M7 , " & -- D[8]
"M8 , " & -- D[9]
"K8 , " & -- D[10]
"K9 , " & -- D[11]
"L8 , " & -- D[12]
"M9 , " & -- D[13]
"L9 , " & -- D[14]
"L5 ), " & -- D[15]
"DSB : H10 , " &
"DTAB : M5 , " &
"FPI : B10 , " &
"FPO :(A3 , " & -- FPO[0]
"B3 , " & -- FPO[1]
"A2 ), " & -- FPO[2]
"IC :(A6 , " & -- IC[0]
"A5 , " & -- IC[1]
"B6 , " & -- IC[2]
"B5 , " & -- IC[3]
"C7 ), " & -- IC[4]
"ICONN :(A7 , " & -- ICONN[1]
"C4 , " & -- ICONN[2]
"A4 ), " & -- ICONN[3]
"NC :(C9 , " & -- NC[1]
"C8 , " & -- NC[2]
"C5 , " & -- NC[3]
"C6 , " & -- NC[4]
"A8 ), " & -- NC[5]
"ODE : A1 , " &
"RESETB : D11 , " &
"RWB : M12 , " &
"SG1 : B9 , " &
"STI :(H9 , " & -- STI[0]
"G9 , " & -- STI[1]
"H11 , " & -- STI[2]
"H12 , " & -- STI[3]
"G12 , " & -- STI[4]
"G11 , " & -- STI[5]
"G10 , " & -- STI[6]
"F10 , " & -- STI[7]
"D10 , " & -- STI[8]
"E10 , " & -- STI[9]
"F11 , " & -- STI[10]
"F12 , " & -- STI[11]
"E12 , " & -- STI[12]
"E11 , " & -- STI[13]
"D12 , " & -- STI[14]
"C12 ), " & -- STI[15]
"STO :(D2 , " & -- STO[0]
"C2 , " & -- STO[1]
"C1 , " & -- STO[2]
"D1 , " & -- STO[3]
"E2 , " & -- STO[4]
"E1 , " & -- STO[5]
"F1 , " & -- STO[6]
"F2 , " & -- STO[7]
"H3 , " & -- STO[8]
"H1 , " & -- STO[9]
"H2 , " & -- STO[10]
"J1 , " & -- STO[11]
"L2 , " & -- STO[12]
"L3 , " & -- STO[13]
"M1 , " & -- STO[14]
"K3 ), " & -- STO[15]
"STOHZ :(C3 , " & -- STOHZ[0]
"D3 , " & -- STOHZ[1]
"E4 , " & -- STOHZ[2]
"E3 , " & -- STOHZ[3]
"F3 , " & -- STOHZ[4]
"G3 , " & -- STOHZ[5]
"G1 , " & -- STOHZ[6]
"G2 , " & -- STOHZ[7]
"J3 , " & -- STOHZ[8]
"K1 , " & -- STOHZ[9]
"L1 , " & -- STOHZ[10]
"J2 , " & -- STOHZ[11]
"M2 , " & -- STOHZ[12]
"K4 , " & -- STOHZ[13]
"M3 , " & -- STOHZ[14]
"K2 ), " & -- STOHZ[15]
"TCK : A12 , " &
"TDI : A11 , " &
"TDO : C11 , " &
"TM1 : A9 , " &
"TM2 : C10 , " &
"TMS : B12 , " &
"TRSTB : B11 , " &
"VDD :(D5, J7, J8, D6, D7, E9, F4, F9, G4, H4, J6)," &
"VDD_APLL : B8 , " &
"VSS :(D4, F8, G5, G6, G7, G8, H5, H6, H7, H8, J4, D9," &
"E5, E6, E7, E8, F5, F6, F7)," &
"VSS_APLL : D8";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e+06,BOTH);
attribute TAP_SCAN_RESET of TRSTB : signal is true;
attribute INSTRUCTION_LENGTH of zl50012 : entity is 16;
attribute INSTRUCTION_OPCODE of zl50012 : entity is
"bypass (1111111111111111)," &
"sample (1111111111111000)," &
"preload (1111111111111000)," &
"idcode (1111111111111110)," &
"highz (1111111111001111)," &
"clamp (1111111111101111)," &
"extest (0000000000000000)," &
"extest (1111111111101000)";
attribute INSTRUCTION_CAPTURE of zl50012 : entity is "xxxxxxxxxxxxxx01";
attribute IDCODE_REGISTER of zl50012 : entity is
"0000" & -- version
"1100001101011100" & -- part number
"00010100101" & -- manufacturer id
"1";
attribute REGISTER_ACCESS of zl50012 : entity is
"boundary (extest, sample, preload)," &
"bypass (bypass, highz, clamp)," &
"device_id (idcode)" ;
attribute BOUNDARY_LENGTH of zl50012 : entity is 147;
attribute BOUNDARY_REGISTER of zl50012 : entity is
-- num cell port function safe ccel disval rslt
" 0 ( BC_2, STI(15), input, X) ," &
" 1 ( BC_2, STI(14), input, X) ," &
" 2 ( BC_2, STI(13), input, X) ," &
" 3 ( BC_2, STI(12), input, X) ," &
" 4 ( BC_2, STI(11), input, X) ," &
" 5 ( BC_2, STI(10), input, X) ," &
" 6 ( BC_2, STI(9), input, X) ," &
" 7 ( BC_2, STI(8), input, X) ," &
" 8 ( BC_2, STI(7), input, X) ," &
" 9 ( BC_2, STI(6), input, X) ," &
" 10 ( BC_2, STI(5), input, X) ," &
" 11 ( BC_2, STI(4), input, X) ," &
" 12 ( BC_2, STI(3), input, X) ," &
" 13 ( BC_2, STI(2), input, X) ," &
" 14 ( BC_2, STI(1), input, X) ," &
" 15 ( BC_2, STI(0), input, X) ," &
" 16 ( BC_2, A(11), input, X) ," &
" 17 ( BC_2, A(10), input, X) ," &
" 18 ( BC_2, A(9), input, X) ," &
" 19 ( BC_2, A(8), input, X) ," &
" 20 ( BC_2, A(7), input, X) ," &
" 21 ( BC_2, A(6), input, X) ," &
" 22 ( BC_2, A(5), input, X) ," &
" 23 ( BC_2, A(4), input, X) ," &
" 24 ( BC_2, A(3), input, X) ," &
" 25 ( BC_2, A(2), input, X) ," &
" 26 ( BC_2, A(1), input, X) ," &
" 27 ( BC_2, A(0), input, X) ," &
" 28 ( BC_2, DSB, input, X) ," &
" 29 ( BC_2, RWB, input, X) ," &
" 30 ( BC_2, CSB, input, X) ," &
" 31 ( BC_2, DTAB, output3, X, 32, 1, Z) ," &
" 32 ( BC_2, *, control, 1) ," &
" 33 ( BC_7, D(15), bidir, X, 34, 1, Z) ," &
" 34 ( BC_2, *, control, 1) ," &
" 35 ( BC_7, D(14), bidir, X, 36, 1, Z) ," &
" 36 ( BC_2, *, control, 1) ," &
" 37 ( BC_7, D(13), bidir, X, 38, 1, Z) ," &
" 38 ( BC_2, *, control, 1) ," &
" 39 ( BC_7, D(12), bidir, X, 40, 1, Z) ," &
" 40 ( BC_2, *, control, 1) ," &
" 41 ( BC_7, D(11), bidir, X, 42, 1, Z) ," &
" 42 ( BC_2, *, control, 1) ," &
" 43 ( BC_7, D(10), bidir, X, 44, 1, Z) ," &
" 44 ( BC_2, *, control, 1) ," &
" 45 ( BC_7, D(9), bidir, X, 46, 1, Z) ," &
" 46 ( BC_2, *, control, 1) ," &
" 47 ( BC_7, D(8), bidir, X, 48, 1, Z) ," &
" 48 ( BC_2, *, control, 1) ," &
" 49 ( BC_7, D(7), bidir, X, 50, 1, Z) ," &
" 50 ( BC_2, *, control, 1) ," &
" 51 ( BC_7, D(6), bidir, X, 52, 1, Z) ," &
" 52 ( BC_2, *, control, 1) ," &
" 53 ( BC_7, D(5), bidir, X, 54, 1, Z) ," &
" 54 ( BC_2, *, control, 1) ," &
" 55 ( BC_7, D(4), bidir, X, 56, 1, Z) ," &
" 56 ( BC_2, *, control, 1) ," &
" 57 ( BC_7, D(3), bidir, X, 58, 1, Z) ," &
" 58 ( BC_2, *, control, 1) ," &
" 59 ( BC_7, D(2), bidir, X, 60, 1, Z) ," &
" 60 ( BC_2, *, control, 1) ," &
" 61 ( BC_7, D(1), bidir, X, 62, 1, Z) ," &
" 62 ( BC_2, *, control, 1) ," &
" 63 ( BC_7, D(0), bidir, X, 64, 1, Z) ," &
" 64 ( BC_2, *, control, 1) ," &
" 65 ( BC_2, STOHZ(15), output3, X, 66, 1, Z) ," &
" 66 ( BC_2, *, control, 1) ," &
" 67 ( BC_2, STOHZ(14), output3, X, 68, 1, Z) ," &
" 68 ( BC_2, *, control, 1) ," &
" 69 ( BC_2, STOHZ(13), output3, X, 70, 1, Z) ," &
" 70 ( BC_2, *, control, 1) ," &
" 71 ( BC_2, STOHZ(12), output3, X, 72, 1, Z) ," &
" 72 ( BC_2, *, control, 1) ," &
" 73 ( BC_2, STO(15), output3, X, 74, 1, Z) ," &
" 74 ( BC_2, *, control, 1) ," &
" 75 ( BC_2, STO(14), output3, X, 76, 1, Z) ," &
" 76 ( BC_2, *, control, 1) ," &
" 77 ( BC_2, STO(13), output3, X, 78, 1, Z) ," &
" 78 ( BC_2, *, control, 1) ," &
" 79 ( BC_2, STO(12), output3, X, 80, 1, Z) ," &
" 80 ( BC_2, *, control, 1) ," &
" 81 ( BC_2, STOHZ(11), output3, X, 82, 1, Z) ," &
" 82 ( BC_2, *, control, 1) ," &
" 83 ( BC_2, STOHZ(10), output3, X, 84, 1, Z) ," &
" 84 ( BC_2, *, control, 1) ," &
" 85 ( BC_2, STOHZ(9), output3, X, 86, 1, Z) ," &
" 86 ( BC_2, *, control, 1) ," &
" 87 ( BC_2, STOHZ(8), output3, X, 88, 1, Z) ," &
" 88 ( BC_2, *, control, 1) ," &
" 89 ( BC_2, STO(11), output3, X, 90, 1, Z) ," &
" 90 ( BC_2, *, control, 1) ," &
" 91 ( BC_2, STO(10), output3, X, 92, 1, Z) ," &
" 92 ( BC_2, *, control, 1) ," &
" 93 ( BC_2, STO(9), output3, X, 94, 1, Z) ," &
" 94 ( BC_2, *, control, 1) ," &
" 95 ( BC_2, STO(8), output3, X, 96, 1, Z) ," &
" 96 ( BC_2, *, control, 1) ," &
" 97 ( BC_2, STOHZ(7), output3, X, 98, 1, Z) ," &
" 98 ( BC_2, *, control, 1) ," &
" 99 ( BC_2, STOHZ(6), output3, X, 100, 1, Z) ," &
" 100 ( BC_2, *, control, 1) ," &
" 101 ( BC_2, STOHZ(5), output3, X, 102, 1, Z) ," &
" 102 ( BC_2, *, control, 1) ," &
" 103 ( BC_2, STOHZ(4), output3, X, 104, 1, Z) ," &
" 104 ( BC_2, *, control, 1) ," &
" 105 ( BC_2, STO(7), output3, X, 106, 1, Z) ," &
" 106 ( BC_2, *, control, 1) ," &
" 107 ( BC_2, STO(6), output3, X, 108, 1, Z) ," &
" 108 ( BC_2, *, control, 1) ," &
" 109 ( BC_2, STO(5), output3, X, 110, 1, Z) ," &
" 110 ( BC_2, *, control, 1) ," &
" 111 ( BC_2, STO(4), output3, X, 112, 1, Z) ," &
" 112 ( BC_2, *, control, 1) ," &
" 113 ( BC_2, STOHZ(3), output3, X, 114, 1, Z) ," &
" 114 ( BC_2, *, control, 1) ," &
" 115 ( BC_2, STOHZ(2), output3, X, 116, 1, Z) ," &
" 116 ( BC_2, *, control, 1) ," &
" 117 ( BC_2, STOHZ(1), output3, X, 118, 1, Z) ," &
" 118 ( BC_2, *, control, 1) ," &
" 119 ( BC_2, STOHZ(0), output3, X, 120, 1, Z) ," &
" 120 ( BC_2, *, control, 1) ," &
" 121 ( BC_2, STO(3), output3, X, 122, 1, Z) ," &
" 122 ( BC_2, *, control, 1) ," &
" 123 ( BC_2, STO(2), output3, X, 124, 1, Z) ," &
" 124 ( BC_2, *, control, 1) ," &
" 125 ( BC_2, STO(1), output3, X, 126, 1, Z) ," &
" 126 ( BC_2, *, control, 1) ," &
" 127 ( BC_2, STO(0), output3, X, 128, 1, Z) ," &
" 128 ( BC_2, *, control, 1) ," &
" 129 ( BC_2, ODE, input, X) ," &
" 130 ( BC_2, CKO(2), output3, X, 131, 1, Z) ," &
" 131 ( BC_2, *, control, 1) ," &
" 132 ( BC_2, FPO(2), output3, X, 133, 1, Z) ," &
" 133 ( BC_2, *, control, 1) ," &
" 134 ( BC_2, CKO(1), output3, X, 135, 1, Z) ," &
" 135 ( BC_2, *, control, 1) ," &
" 136 ( BC_2, FPO(1), output3, X, 137, 1, Z) ," &
" 137 ( BC_2, *, control, 1) ," &
" 138 ( BC_2, CKO(0), output3, X, 139, 1, Z) ," &
" 139 ( BC_2, *, control, 1) ," &
" 140 ( BC_2, FPO(0), output3, X, 141, 1, Z) ," &
" 141 ( BC_2, *, control, 1) ," &
" 142 ( BC_2, *, internal, X) ," &
" 143 ( BC_2, *, internal, X) ," &
" 144 ( BC_4, CLKBYPS, input, X) ," &
" 145 ( BC_2, CKI, input, X) ," &
" 146 ( BC_2, FPI, input, X) ";
end zl50012;
------------- end of BSDL description for the zl50012 ----------