BSDL Files Library for JTAG
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BSDL File: MT49H8M32 Download View details  


--**************************************************************************
--*
--*    File Name:  MT49H8M32.BSDL  
--*     Revision:  1.2
--*         Date:  June 25, 2003
--*        Model:  BSDL
--*    Simulator:  Agilent Technologies
--*
--* Dependencies:  None
--*
--*       Author:  Todd Dinkelman
--*        Email:  tdinkelman@micron.com
--*        Phone:  (208) 368-5814
--*      Company:  Micron Technology, Inc.
--*        Model:  MT49H8M32 (8M x 32  RLDRAM I)
--*
--*  Description:  Micron 1M x 32 BSDL model
--*
--*   Limitation:  IEEE 1149.1 Serial Boundary Scan (JTAG) 
--*
--*                Disclaimer:  THESE DESIGNS ARE PROVIDED "AS IS" WITH NO 
--*                WARRANTY 
--*                WHATSOEVER AND MICRON SPECIFICALLY DISCLAIMS ANY 
--*                IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
--*                A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT.
--*
--*                Copyright (C) 1998 Micron Semiconductor Products, Inc.
--*                All rights reserved
--*
--* 
--*************************************************************************/

entity  MT49H8M32 is

generic (PHYSICAL_PIN_MAP : string := "FBGA");

port  (
               A:   in                 bit_vector(0 to 18);
               B:   in                 bit_vector(0 to 2);
              DQ:   inout              bit_vector(0 to 31);
            AS_n:   in                 bit; 
              DM:   in                 bit_vector(0 to 1);
             DQS:   buffer             bit_vector(0 to 3);
           DQS_n:   buffer             bit_vector(0 to 3);
              CK:   in                 bit;
            CK_n:   in                 bit;
            WE_n:   in                 bit;
           REF_n:   in                 bit;
            CS_n:   in                 bit;
             TMS:   in                 bit;
            DVLD:   out                bit;
             TDI:   in                 bit;
             TCK:   in                 bit;
             TDO:   out                bit;
            VEXT:   linkage bit_vector(0 to 3);
            VREF:   linkage bit_vector(0 to 1);
             Vdd:   linkage bit_vector(0 to 11);
             Vss:   linkage bit_vector(0 to 29);
            VssQ:   linkage bit_vector(0 to 11);
            VddQ:   linkage bit_vector(0 to 7);
              NC:   linkage bit_vector(0 to 0));

             use STD_1149_1_1994.all;

         attribute COMPONENT_CONFORMANCE of MT49H8M32 : entity is

            "STD_1149_1_1993";

         attribute PIN_MAP of  MT49H8M32 : entity is PHYSICAL_PIN_MAP;

            constant FBGA : PIN_MAP_STRING:=  

       "       A:    (G12,G11,G10,H12,H11,G1,G2,G3,H1,H2,    " &
       "              M12,M11,M10,L12,L11,M1,M2,M3,L1),      " & --Address
       "       B:    (J11,K11,J2),                 " &  --Bank Address
       "    VEXT:    (A2,A10,V2,V10),              " &  --Power Supply
       "      DM:    (F1,N1),                      " &  --Input Data Mask
       "     DQS:     (D11,D2,R2,R11),             " &  --Input Data Clocks
       "   DQS_n:     (D10,D3,R3,R10),             " &  --Input Data Clocks 
       "      CK:     J12,                         " &  --Pos Clock
       "    CK_n:     K12,                         " &  --Neg Clock
       "   REF_n:     K2,                          " &  --Command control
       "    DVLD:     F12,                         " &  --Data Valid
       "    CS_n:     L2,                          " &  --Neg Chip Select
       "    AS_n:     J1,                           "&
       "    WE_n:     K1,                          " &  --Command control
       "      DQ:    (B11,B10,C11,C10,E11,E10,F11,F10,  " &
       "              B2,B3,C2,C3,E2,E3,F2,F3,          " &
       "              U2,U3,T2,T3,P2,P3,N2,N3,          " &    
       "              U11,U10,T11,T10,P11,P10,N11,N10), " &                                                                              
       "     TMS:     A11,                  " &     --Test Mode Select
       "     TDI:     V12,                  " &     --Test Data-In
       "     TCK:     A12,                  " &     --Test Clock
       "     TDO:     V11,                  " &     --Test Data-Out
       "    VREF:    (A3,V3),               " &     --HSTL Input Ref Voltage
       "     VDD:    (G4,G9,J3,J4,J9,J10,K3,K4,K9,K10,M4,M9),     " & --Power Supply
       "     VSS:    (A1,A4,A9,B1,B12,C1,C12,D1,D12,E1,E12,       " & 
       "              H3,H4,H9,H10,L3,L4,L9,L10,P1,P12,R1,R12,    " &
       "              T1,T12,U1,U12,V1,V4,V9),                    " & --GND
       "    VSSQ:    (B4,B9,D4,D9,F4,F9,N4,N9,R4,R9,U4,U9),       " & -- Buffer Supply, GND
       "    VDDQ:    (C4,C9,E4,E9,P4,P9,T4,T9),                   " & --Power Supply& 
       "      NC:    (N12)                                        " ; --No Connection                  

         attribute TAP_SCAN_IN         of    TDI : signal is true;
         attribute TAP_SCAN_OUT        of    TDO : signal is true;
         attribute TAP_SCAN_MODE       of    TMS : signal is true;
         attribute TAP_SCAN_CLOCK      of    TCK : signal is (10.0e6, BOTH);

         attribute INSTRUCTION_LENGTH of MT49H8M32 : entity is 8;   

         attribute INSTRUCTION_OPCODE of MT49H8M32 : entity is

                   "EXTEST            (00000000),  " &                    
                   "RESERV1           (00000011),  " &
                   "SAMPLE            (00000101),  " &
                   "RESERV2           (00000111),  " & 
                   "IDCODE            (00100001),  " & 
                   "BYPASS            (11111111)   " ;

         attribute INSTRUCTION_CAPTURE of MT49H8M32 : entity is

                   "00100001";

         attribute INSTRUCTION_PRIVATE of MT49H8M32 : entity is  
         
                   "reserv1, reserv2" ;                                            
 
         attribute IDCODE_REGISTER of  MT49H8M32 : entity is

                   "0010"               & --Die Rev & Width
                   "0000000010100111"   & --Device ID
                   "00000101100"        & --MICRON JEDIC ID
                   "1"                  ; --ID REGISTER PRESENCE INDICATOR

        attribute REGISTER_ACCESS of MT49H8M32 : entity is
                   
                   "BOUNDARY           (EXTEST,SAMPLE)," &
                   "BYPASS             (BYPASS)";

        attribute BOUNDARY_LENGTH  of MT49H8M32 : entity is 104;

        attribute BOUNDARY_REGISTER  of  MT49H8M32 : entity is

                  "0        (BC_1, WE_n,       input,    X), " &
                  "1        (BC_1, REF_n,      input,    X), " &
                  "2        (BC_1, CS_n,       input,    X), " &
                  "3        (BC_1, A(18),      input,    X), " &
                  "4        (BC_1, A(15),      input,    X), " &
                  "5        (BC_1, A(17),      input,    X), " &
                  "6        (BC_1, A(16),      input,    X), " &
                  "7        (BC_1, DM(1),      input,    X), " &
                  "8        (BC_7, DQ(23),     bidir,    X, 9, 0, Z), " &
                  "9        (BC_2, *,          control,  0), " &
                 "10        (BC_7, DQ(22),     bidir,    X, 11, 0, Z), " &
                 "11        (BC_2, *,          control,  0), " &
                 "12        (BC_7, DQ(21),     bidir,    X, 13, 0, Z), " &
                 "13        (BC_2, *,          control,  0), " &
                 "14        (BC_7, DQ(20),     bidir,    X, 15, 0, Z), " &
                 "15        (BC_2, *,          control,  0), " &
                 "16        (BC_1, DQS(2),     output2,  X), " &
                 "17        (BC_1, DQS_n(2),   output2,  X), " &
                 "18        (BC_7, DQ(18),     bidir,    X, 19, 0, Z), " &
                 "19        (BC_2, *,          control,  0), " &
                 "20        (BC_7, DQ(19),     bidir,    X, 21, 0, Z), " &
                 "21        (BC_2, *,          control,  0), " &
                 "22        (BC_7, DQ(16),     bidir,    X, 23, 0, Z), " &
                 "23        (BC_2, *,          control,  0), " &
                 "24        (BC_7, DQ(17),     bidir,    X, 25, 0, Z), " &
                 "25        (BC_2, *,          control,  0), " &
                 "26        (BC_7, DQ(25),     bidir,    X, 27, 0, Z), " &
                 "27        (BC_2, *,          control,  0), " &
                 "28        (BC_7, DQ(24),     bidir,    X, 29, 0, Z), " &
                 "29        (BC_2, *,          control,  0), " &
                 "30        (BC_7, DQ(27),     bidir,    X, 31, 0, Z), " &
                 "31        (BC_2, *,          control,  0), " &
                 "32        (BC_7, DQ(26),     bidir,    X, 33, 0, Z), " &
                 "33        (BC_2, *,          control,  0), " &
                 "34        (BC_1, DQS_n(3),   output2,  X), " &
                 "35        (BC_1, DQS(3),     output2,  X), " &
                 "36        (BC_7, DQ(28),     bidir,    X, 37, 0, Z), " &
                 "37        (BC_2, *,          control,  0), " &
                 "38        (BC_7, DQ(29),     bidir,    X, 39, 0, Z), " &
                 "39        (BC_2, *,          control,  0), " &
                 "40        (BC_7, DQ(30),     bidir,    X, 41, 0, Z), " &
                 "41        (BC_2, *,          control,  0), " &
                 "42        (BC_7, DQ(31),     bidir,    X, 43, 0, Z), " &
                 "43        (BC_2, *,          control,  0), " &
                 "44        (BC_4, *,          internal, X), " &
                 "45        (BC_1, A(11),      input,    X), " &
                 "46        (BC_1, A(12),      input,    X), " &
                 "47        (BC_1, A(10),      input,    X), " &
                 "48        (BC_1, A(13),      input,    X), " &
                 "49        (BC_1, A(14),      input,    X), " &
                 "50        (BC_1, B(1),       input,    X), " &
                 "51        (BC_4, CK_n,       input,    X), " &
                 "52        (BC_4, CK,         input,    X), " &
                 "53        (BC_1, B(0),       input,    X), " &
                 "54        (BC_1, A(4),       input,    X), " &
                 "55        (BC_1, A(3),       input,    X), " &
                 "56        (BC_1, A(0),       input,    X), " &
                 "57        (BC_1, A(2),       input,    X), " &
                 "58        (BC_1, A(1),       input,    X), " &
                 "59        (BC_1, DVLD,       output2,  1, 59, 1, weak1), " &
                 "60        (BC_7, DQ(7),      bidir,    X, 61, 0, Z), " &
                 "61        (BC_2, *,          control,  0), " &
                 "62        (BC_7, DQ(6),      bidir,    X, 63, 0, Z), " &
                 "63        (BC_2, *,          control,  0), " &
                 "64        (BC_7, DQ(5),      bidir,    X, 65, 0, Z), " &
                 "65        (BC_2, *,          control,  0), " &
                 "66        (BC_7, DQ(4),      bidir,    X, 67, 0, Z), " &
                 "67        (BC_2, *,          control,  0), " &
                 "68        (BC_1, DQS(0),     output2,  X), " &
                 "69        (BC_1, DQS_n(0),   output2,  X), " &
                 "70        (BC_7, DQ(2),      bidir,    X, 71, 0, Z), " &
                 "71        (BC_2, *,          control,  0), " &
                 "72        (BC_7, DQ(3),      bidir,    X, 73, 0, Z), " &
                 "73        (BC_2, *,          control,  0), " &
                 "74        (BC_7, DQ(0),      bidir,    X, 75, 0, Z), " &
                 "75        (BC_2, *,          control,  0), " &
                 "76        (BC_7, DQ(1),      bidir,    X, 77, 0, Z), " &
                 "77        (BC_2, *,          control,  0), " &
                 "78        (BC_7, DQ(9),      bidir,    X, 79, 0, Z), " &
                 "79        (BC_2, *,          control,  0), " &
                 "80        (BC_7, DQ(8),      bidir,    X, 81, 0, Z), " &
                 "81        (BC_2, *,          control,  0), " &
                 "82        (BC_7, DQ(11),     bidir,    X, 83, 0, Z), " &
                 "83        (BC_2, *,          control,  0), " &
                 "84        (BC_7, DQ(10),     bidir,    X, 85, 0, Z), " &
                 "85        (BC_2, *,          control,  0), " &
                 "86        (BC_1, DQS_n(1),   output2,  X), " &
                 "87        (BC_1, DQS(1),     output2,  X), " &
                 "88        (BC_7, DQ(12),     bidir,    X, 89, 0, Z), " &
                 "89        (BC_2, *,          control,  0), " &
                 "90        (BC_7, DQ(13),     bidir,    X, 91, 0, Z), " &
                 "91        (BC_2, *,          control,  0), " &
                 "92        (BC_7, DQ(14),     bidir,    X, 93, 0, Z), " &
                 "93        (BC_2, *,          control,  0), " &
                 "94        (BC_7, DQ(15),     bidir,    X, 95, 0, Z), " &
                 "95        (BC_2, *,          control,  0), " &
                 "96        (BC_1, DM(0),      input,    X), " &
                 "97        (BC_1, A(6),       input,    X), " &
                 "98        (BC_1, A(7),       input,    X), " &
                 "99        (BC_1, A(5),       input,    X), " &
                "100        (BC_1, A(8),       input,    X), " &
                "101        (BC_1, A(9),       input,    X), " &
                "102        (BC_4, B(2),       input,    X), " &
                "103        (BC_4, AS_n,       input,    X)  " ;


end MT49H8M32;

This library contains 7714 BSDL files (for 6086 distinct entities) from 64 vendors
Last BSDL model (CY7C1512KV18) was added on Sep 15, 2017 14:30
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