-- BSDL File created/edited by AT&T BSD Editor
--
--BSDE:Revision:
--BSDE:Description:
--LAGUNA TQFP package 11/24/97
entity LAGUNA is
generic (PHYSICAL_PIN_MAP : string := "TQFP_176" );
port (
AD0: inout bit;
AD1: inout bit;
AD10: inout bit;
AD11: inout bit;
AD12: inout bit;
AD13: inout bit;
AD14: inout bit;
AD15: inout bit;
AD16: inout bit;
AD17: inout bit;
AD18: inout bit;
AD19: inout bit;
AD2: inout bit;
AD20: inout bit;
AD21: inout bit;
AD22: inout bit;
AD23: inout bit;
AD24: inout bit;
AD25: inout bit;
AD26: inout bit;
AD27: inout bit;
AD28: inout bit;
AD29: inout bit;
AD3: inout bit;
AD30: inout bit;
AD31: inout bit;
AD4: inout bit;
AD5: inout bit;
AD6: inout bit;
AD7: inout bit;
AD8: inout bit;
AD9: inout bit;
AS_EBOE: inout bit;
AVDDB: linkage bit;
AVSSB: linkage bit;
CBE0: inout bit;
CBE1: inout bit;
CBE2: inout bit;
CBE3: inout bit;
CI_N: linkage bit;
CI_P: linkage bit;
CLK: in bit;
COL_CLSN: in bit;
CRS_RXEN: in bit;
DEVSEL: inout bit;
DI_N: linkage bit;
DI_P: linkage bit;
DO_N: linkage bit;
DO_P: out bit;
EBCLK: in bit;
EBD0: inout bit;
EBD1: inout bit;
EBD2: inout bit;
EBD3: inout bit;
EBD4: inout bit;
EBD5: inout bit;
EBD6: inout bit;
EBD7: inout bit;
EBDA10: inout bit;
EBDA11: inout bit;
EBDA12: inout bit;
EBDA13: inout bit;
EBDA14: inout bit;
EBDA15: inout bit;
EBDA8: inout bit;
EBDA9: inout bit;
EBWE: inout bit;
EECS: inout bit;
EEDI_LD0: inout bit;
EEDO_LD3_SRD: inout bit;
EESK_LD1_SFBD: inout bit;
ERAMCS: inout bit;
EROMCS: inout bit;
FRAME: inout bit;
GNT: in bit;
IDSEL: in bit;
INTA: linkage bit;
IRDY: inout bit;
LD2_SRDCLK: inout bit;
MDC: inout bit;
MDIO: inout bit;
PAR: inout bit;
PERR: inout bit;
REQ: inout bit;
RSTL: in bit;
RXCLK: in bit;
RXD0_FRTGD: in bit;
RXD1: in bit;
RXD2: in bit;
RXD3: in bit;
RXDV_FRTGE: in bit;
RXD_N: linkage bit;
RXD_P: linkage bit;
RXER_RXDAT: in bit;
SERR: inout bit;
SLEEPL_EARL: in bit;
STOPL: inout bit;
TCK: in bit;
TDI: in bit;
TDO: out bit;
TMS: in bit;
TRDY: inout bit;
TXCLK: in bit;
TXD0_TXDAT: inout bit;
TXD1: inout bit;
TXD2: inout bit;
TXD3: inout bit;
TXD_N: linkage bit;
TXD_P: out bit;
TXEN: inout bit;
TXER: inout bit;
TXP_N: linkage bit;
TXP_P: out bit;
UA_EBA0: inout bit;
UA_EBA1: inout bit;
UA_EBA2: inout bit;
UA_EBA3: inout bit;
UA_EBA4: inout bit;
UA_EBA5: inout bit;
UA_EBA6: inout bit;
UA_EBA7: inout bit;
VDD: linkage bit;
VDDB: linkage bit;
VDD_PCI: linkage bit;
VDD_PLL: linkage bit;
VSS: linkage bit;
VSSB: linkage bit;
VSS_PLL: linkage bit;
XTAL1: in bit;
XTAL2: linkage bit
);
use STD_1149_1_1990.all;
attribute PIN_MAP of LAGUNA : entity is PHYSICAL_PIN_MAP;
constant TQFP_176: PIN_MAP_STRING:=
"AD0:53," &
"AD1:52," &
"AD10:34," &
"AD11:33," &
"AD12:31," &
"AD13:30," &
"AD14:29," &
"AD15:28," &
"AD16:15," &
"AD17:14," &
"AD18:12," &
"AD19:11," &
"AD2:50," &
"AD20:9," &
"AD21:8," &
"AD22:6," &
"AD23:5," &
"AD24:174," &
"AD25:171," &
"AD26:169," &
"AD27:168," &
"AD28:167," &
"AD29:166," &
"AD3:49," &
"AD30:165," &
"AD31:163," &
"AD4:48," &
"AD5:47," &
"AD6:41," &
"AD7:40," &
"AD8:37," &
"AD9:36," &
"AS_EBOE:58," &
"AVDDB:122," &
"AVSSB:135," &
"CBE0:39," &
"CBE1:27," &
"CBE2:16," &
"CBE3:173," &
"CI_P:142," &
"CI_N:141," &
"CLK:159," &
"COL_CLSN:98," &
"CRS_RXEN:97," &
"DEVSEL:20," &
"DI_P:140," &
"DI_N:139," &
"DO_P:137," &
"DO_N:136," &
"EBCLK:59," &
"EBD0:95," &
"EBD1:94," &
"EBD2:93," &
"EBD3:92," &
"EBD4:91," &
"EBD5:85," &
"EBD6:83," &
"EBD7:82," &
"EBDA10:74," &
"EBDA11:75," &
"EBDA12:77," &
"EBDA13:78," &
"EBDA14:80," &
"EBDA15:81," &
"EBDA8:72," &
"EBDA9:73," &
"UA_EBA0:61," &
"UA_EBA1:62," &
"UA_EBA2:63," &
"UA_EBA3:64," &
"UA_EBA4:66," &
"UA_EBA5:68," &
"UA_EBA6:69," &
"UA_EBA7:70," &
"EBWE:57," &
"EECS:150," &
"EEDI_LD0:146," &
"EEDO_LD3_SRD:145," &
"EESK_LD1_SFBD:148," &
"ERAMCS:55," &
"EROMCS:56," &
"FRAME:17," &
"GNT:161," &
"IDSEL:3," &
"INTA:156," &
"IRDY:18," &
"LD2_SRDCLK:147," &
"MDC:117," &
"MDIO:118," &
"PAR:26," &
"PERR:23," &
"REQ:162," &
"RSTL:157," &
"RXD_P:121," &
"RXD_N:120," &
"RXD0_FRTGD:112," &
"RXD1:113," &
"RXD2:114," &
"RXD3:115," &
"RXCLK:109," &
"RXDV_FRTGE:110," &
"RXER_RXDAT:108," &
"SERR:24," &
"SLEEPL_EARL:116," &
"STOPL:21," &
"TCK:151," &
"TDI:154," &
"TDO:153," &
"TMS:152," &
"TRDY:19," &
"TXD_P:126," &
"TXD_N:124," &
"TXD0_TXDAT:102," &
"TXD1:101," &
"TXD2:100," &
"TXD3:99," &
"TXP_P:125," &
"TXP_N:123," &
"TXCLK:105," &
"TXEN:104," &
"TXER:106," &
"VDD:35," &
"VDDB:71," &
"VDD_PCI:10," &
"VDD_PLL:143," &
"VSS:7," &
"VSS_PLL:129," &
"XTAL1:128," &
"XTAL2:130";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (1.00e+07, BOTH);
attribute INSTRUCTION_LENGTH of LAGUNA : entity is 4;
attribute INSTRUCTION_OPCODE of LAGUNA : entity is
"BYPASS ( 0110, 0111, 1100, 1101, 1110, 1111)," &
"EXTEST ( 0000)," &
"IDCODE ( 0001)," &
"INSCAN0 ( 1000)," &
"INSCAN1 ( 1001)," &
"INSCAN2 ( 1010)," &
"INSCAN3 ( 1011)," &
"SAMPLE ( 0010)," &
"SELFTST ( 0101)," &
"SETBYP ( 0100)," &
"TRIBYP ( 0011)" ;
attribute INSTRUCTION_CAPTURE of LAGUNA : entity is "0001";
attribute INSTRUCTION_DISABLE of LAGUNA : entity is "TRIBYP";
attribute INSTRUCTION_PRIVATE of LAGUNA : entity is
" INSCAN0, INSCAN1, INSCAN2, INSCAN3, SELFTST";
attribute IDCODE_REGISTER of LAGUNA : entity is
"0101" & -- version is 5
"0010011000100011" & -- part number
"00000000001" & -- manufacturer's id
"1"; -- required by standard
attribute REGISTER_ACCESS of LAGUNA : entity is
"BYPASS ( BYPASS, INSCAN0, INSCAN1, INSCAN2, INSCAN3, SETBYP," &
" TRIBYP)," &
"BOUNDARY ( EXTEST, SAMPLE, SELFTST)," &
"IDCODE ( IDCODE)";
attribute BOUNDARY_CELLS of LAGUNA : entity is
" BC_1, BC_4";
attribute BOUNDARY_LENGTH of LAGUNA : entity is 232;
attribute BOUNDARY_REGISTER of LAGUNA : entity is
" 0 (BC_4, XTAL1, clock, 0)," &
" 1 (BC_1, *, control, 0)," &
" 2 (BC_1, TXP_P, output3, X, 1, 0, Z)," &
" 3 (BC_1, TXD_P, output3, X, 1, 0, Z)," &
" 4 (BC_1, *, control, 0)," &
" 5 (BC_1, DO_P, output3, X, 4, 0, Z)," &
" 6 (BC_1, EEDO_LD3_SRD, output3, X, 8, 0, Weak1)," &
" 7 (BC_1, EEDO_LD3_SRD, input, X)," &
" 8 (BC_1, *, control, 0)," &
" 9 (BC_1, EEDI_LD0, output3, X, 11, 0, Weak1)," &
" 10 (BC_1, EEDI_LD0, input, X)," &
" 11 (BC_1, *, control, 0)," &
" 12 (BC_1, LD2_SRDCLK, output3, X, 14, 0, Weak1)," &
" 13 (BC_1, LD2_SRDCLK, input, X)," &
" 14 (BC_1, *, control, 0)," &
" 15 (BC_1, EESK_LD1_SFBD, output3, X, 17, 0, Weak1)," &
" 16 (BC_1, EESK_LD1_SFBD, input, X)," &
" 17 (BC_1, *, control, 0)," &
" 18 (BC_1, EECS, output3, X, 20, 0, Z)," &
" 19 (BC_1, EECS, input, X)," &
" 20 (BC_1, *, control, 0)," &
" 21 (BC_4, RSTL, input, 1)," &
" 22 (BC_4, CLK, clock, 1)," &
" 23 (BC_4, GNT, input, X)," &
" 24 (BC_1, REQ, output3, X, 26, 0, Z)," &
" 25 (BC_1, REQ, input, X)," &
" 26 (BC_1, *, control, 0)," &
" 27 (BC_1, AD31, output3, X, 31, 0, Z)," &
" 28 (BC_1, AD31, input, X)," &
" 29 (BC_1, AD30, output3, X, 31, 0, Z)," &
" 30 (BC_1, AD30, input, X)," &
" 31 (BC_1, *, control, 0)," &
" 32 (BC_1, AD29, output3, X, 31, 0, Z)," &
" 33 (BC_1, AD29, input, X)," &
" 34 (BC_1, AD28, output3, X, 31, 0, Z)," &
" 35 (BC_1, AD28, input, X)," &
" 36 (BC_1, AD27, output3, X, 40, 0, Z)," &
" 37 (BC_1, AD27, input, X)," &
" 38 (BC_1, AD26, output3, X, 40, 0, Z)," &
" 39 (BC_1, AD26, input, X)," &
" 40 (BC_1, *, control, 0)," &
" 41 (BC_1, AD25, output3, X, 40, 0, Z)," &
" 42 (BC_1, AD25, input, X)," &
" 43 (BC_1, CBE3, output3, X, 45, 0, Z)," &
" 44 (BC_1, CBE3, input, X)," &
" 45 (BC_1, *, control, 0)," &
" 46 (BC_1, AD24, output3, X, 40, 0, Z)," &
" 47 (BC_1, AD24, input, X)," &
" 48 (BC_4, IDSEL, input, X)," &
" 49 (BC_1, AD23, output3, X, 53, 0, Z)," &
" 50 (BC_1, AD23, input, X)," &
" 51 (BC_1, AD22, output3, X, 53, 0, Z)," &
" 52 (BC_1, AD22, input, X)," &
" 53 (BC_1, *, control, 0)," &
" 54 (BC_1, AD21, output3, X, 53, 0, Z)," &
" 55 (BC_1, AD21, input, X)," &
" 56 (BC_1, AD20, output3, X, 53, 0, Z)," &
" 57 (BC_1, AD20, input, X)," &
" 58 (BC_1, AD19, output3, X, 62, 0, Z)," &
" 59 (BC_1, AD19, input, X)," &
" 60 (BC_1, AD18, output3, X, 62, 0, Z)," &
" 61 (BC_1, AD18, input, X)," &
" 62 (BC_1, *, control, 0)," &
" 63 (BC_1, AD17, output3, X, 62, 0, Z)," &
" 64 (BC_1, AD17, input, X)," &
" 65 (BC_1, AD16, output3, X, 62, 0, Z)," &
" 66 (BC_1, AD16, input, X)," &
" 67 (BC_1, CBE2, output3, X, 69, 0, Z)," &
" 68 (BC_1, CBE2, input, X)," &
" 69 (BC_1, *, control, 0)," &
" 70 (BC_1, FRAME, output3, X, 72, 0, Z)," &
" 71 (BC_1, FRAME, input, X)," &
" 72 (BC_1, *, control, 0)," &
" 73 (BC_1, IRDY, output3, X, 75, 0, Z)," &
" 74 (BC_1, IRDY, input, X)," &
" 75 (BC_1, *, control, 0)," &
" 76 (BC_1, TRDY, output3, X, 78, 0, Z)," &
" 77 (BC_1, TRDY, input, X)," &
" 78 (BC_1, *, control, 0)," &
" 79 (BC_1, DEVSEL, output3, X, 81, 0, Z)," &
" 80 (BC_1, DEVSEL, input, X)," &
" 81 (BC_1, *, control, 0)," &
" 82 (BC_1, STOPL, output3, X, 84, 0, Z)," &
" 83 (BC_1, STOPL, input, X)," &
" 84 (BC_1, *, control, 0)," &
" 85 (BC_1, PERR, output3, X, 87, 0, Z)," &
" 86 (BC_1, PERR, input, X)," &
" 87 (BC_1, *, control, 0)," &
" 88 (BC_1, SERR, output3, X, 90, 0, Weak1)," &
" 89 (BC_1, SERR, input, X)," &
" 90 (BC_1, *, control, 0)," &
" 91 (BC_1, PAR, output3, X, 93, 0, Z)," &
" 92 (BC_1, PAR, input, X)," &
" 93 (BC_1, *, control, 0)," &
" 94 (BC_1, CBE1, output3, X, 96, 0, Z)," &
" 95 (BC_1, CBE1, input, X)," &
" 96 (BC_1, *, control, 0)," &
" 97 (BC_1, AD15, output3, X, 101, 0, Z)," &
" 98 (BC_1, AD15, input, X)," &
" 99 (BC_1, AD14, output3, X, 101, 0, Z)," &
" 100 (BC_1, AD14, input, X)," &
" 101 (BC_1, *, control, 0)," &
" 102 (BC_1, AD13, output3, X, 101, 0, Z)," &
" 103 (BC_1, AD13, input, X)," &
" 104 (BC_1, AD12, output3, X, 101, 0, Z)," &
" 105 (BC_1, AD12, input, X)," &
" 106 (BC_1, AD11, output3, X, 110, 0, Z)," &
" 107 (BC_1, AD11, input, X)," &
" 108 (BC_1, AD10, output3, X, 110, 0, Z)," &
" 109 (BC_1, AD10, input, X)," &
" 110 (BC_1, *, control, 0)," &
" 111 (BC_1, AD9, output3, X, 110, 0, Z)," &
" 112 (BC_1, AD9, input, X)," &
" 113 (BC_1, AD8, output3, X, 110, 0, Z)," &
" 114 (BC_1, AD8, input, X)," &
" 115 (BC_1, CBE0, output3, X, 117, 0, Z)," &
" 116 (BC_1, CBE0, input, X)," &
" 117 (BC_1, *, control, 0)," &
" 118 (BC_1, AD7, output3, X, 120, 0, Z)," &
" 119 (BC_1, AD7, input, X)," &
" 120 (BC_1, *, control, 0)," &
" 121 (BC_1, AD6, output3, X, 120, 0, Z)," &
" 122 (BC_1, AD6, input, X)," &
" 123 (BC_1, AD5, output3, X, 125, 0, Z)," &
" 124 (BC_1, AD5, input, X)," &
" 125 (BC_1, *, control, 0)," &
" 126 (BC_1, AD4, output3, X, 125, 0, Z)," &
" 127 (BC_1, AD4, input, X)," &
" 128 (BC_1, AD3, output3, X, 132, 0, Z)," &
" 129 (BC_1, AD3, input, X)," &
" 130 (BC_1, AD2, output3, X, 132, 0, Z)," &
" 131 (BC_1, AD2, input, X)," &
" 132 (BC_1, *, control, 0)," &
" 133 (BC_1, AD1, output3, X, 132, 0, Z)," &
" 134 (BC_1, AD1, input, X)," &
" 135 (BC_1, AD0, output3, X, 132, 0, Z)," &
" 136 (BC_1, AD0, input, X)," &
" 137 (BC_1, ERAMCS, output3, X, 141, 0, Z)," &
" 138 (BC_1, ERAMCS, input, X)," &
" 139 (BC_1, EROMCS, output3, X, 141, 0, Z)," &
" 140 (BC_1, EROMCS, input, X)," &
" 141 (BC_1, *, control, 0)," &
" 142 (BC_1, EBWE, output3, X, 141, 0, Z)," &
" 143 (BC_1, EBWE, input, X)," &
" 144 (BC_1, AS_EBOE, output3, X, 141, 0, Z)," &
" 145 (BC_1, AS_EBOE, input, X)," &
" 146 (BC_4, EBCLK, clock, 1)," &
" 147 (BC_1, UA_EBA0, output3, X, 151, 0, Z)," &
" 148 (BC_1, UA_EBA0, input, X)," &
" 149 (BC_1, UA_EBA1, output3, X, 151, 0, Z)," &
" 150 (BC_1, UA_EBA1, input, X)," &
" 151 (BC_1, *, control, 0)," &
" 152 (BC_1, UA_EBA2, output3, X, 151, 0, Z)," &
" 153 (BC_1, UA_EBA2, input, X)," &
" 154 (BC_1, UA_EBA3, output3, X, 151, 0, Z)," &
" 155 (BC_1, UA_EBA3, input, X)," &
" 156 (BC_1, UA_EBA4, output3, X, 160, 0, Z)," &
" 157 (BC_1, UA_EBA4, input, X)," &
" 158 (BC_1, UA_EBA5, output3, X, 160, 0, Z)," &
" 159 (BC_1, UA_EBA5, input, X)," &
" 160 (BC_1, *, control, 0)," &
" 161 (BC_1, UA_EBA6, output3, X, 160, 0, Z)," &
" 162 (BC_1, UA_EBA6, input, X)," &
" 163 (BC_1, UA_EBA7, output3, X, 160, 0, Z)," &
" 164 (BC_1, UA_EBA7, input, X)," &
" 165 (BC_1, EBDA8, output3, X, 169, 0, Z)," &
" 166 (BC_1, EBDA8, input, X)," &
" 167 (BC_1, EBDA9, output3, X, 169, 0, Z)," &
" 168 (BC_1, EBDA9, input, X)," &
" 169 (BC_1, *, control, 0)," &
" 170 (BC_1, EBDA10, output3, X, 169, 0, Z)," &
" 171 (BC_1, EBDA10, input, X)," &
" 172 (BC_1, EBDA11, output3, X, 169, 0, Z)," &
" 173 (BC_1, EBDA11, input, X)," &
" 174 (BC_1, EBDA12, output3, X, 178, 0, Z)," &
" 175 (BC_1, EBDA12, input, X)," &
" 176 (BC_1, EBDA13, output3, X, 178, 0, Z)," &
" 177 (BC_1, EBDA13, input, X)," &
" 178 (BC_1, *, control, 0)," &
" 179 (BC_1, EBDA14, output3, X, 178, 0, Z)," &
" 180 (BC_1, EBDA14, input, X)," &
" 181 (BC_1, EBDA15, output3, X, 178, 0, Z)," &
" 182 (BC_1, EBDA15, input, X)," &
" 183 (BC_1, EBD7, output3, X, 187, 0, Z)," &
" 184 (BC_1, EBD7, input, X)," &
" 185 (BC_1, EBD6, output3, X, 187, 0, Z)," &
" 186 (BC_1, EBD6, input, X)," &
" 187 (BC_1, *, control, 0)," &
" 188 (BC_1, EBD5, output3, X, 187, 0, Z)," &
" 189 (BC_1, EBD5, input, X)," &
" 190 (BC_1, EBD4, output3, X, 187, 0, Z)," &
" 191 (BC_1, EBD4, input, X)," &
" 192 (BC_1, EBD3, output3, X, 194, 0, Z)," &
" 193 (BC_1, EBD3, input, X)," &
" 194 (BC_1, *, control, 0)," &
" 195 (BC_1, EBD2, output3, X, 194, 0, Z)," &
" 196 (BC_1, EBD2, input, X)," &
" 197 (BC_1, EBD1, output3, X, 194, 0, Z)," &
" 198 (BC_1, EBD1, input, X)," &
" 199 (BC_1, EBD0, output3, X, 194, 0, Z)," &
" 200 (BC_1, EBD0, input, X)," &
" 201 (BC_4, CRS_RXEN, input, X)," &
" 202 (BC_4, COL_CLSN, input, X)," &
" 203 (BC_1, TXD3, output3, X, 217, 0, Z)," &
" 204 (BC_1, TXD3, input, X)," &
" 205 (BC_1, TXD2, output3, X, 217, 0, Z)," &
" 206 (BC_1, TXD2, input, X)," &
" 207 (BC_1, TXD1, output3, X, 217, 0, Z)," &
" 208 (BC_1, TXD1, input, X)," &
" 209 (BC_1, TXD0_TXDAT, output3, X, 211, 0, Z)," &
" 210 (BC_1, TXD0_TXDAT, input, X)," &
" 211 (BC_1, *, control, 0)," &
" 212 (BC_1, TXEN, output3, X, 211, 0, Z)," &
" 213 (BC_1, TXEN, input, X)," &
" 214 (BC_4, TXCLK, clock, 1)," &
" 215 (BC_1, TXER, output3, X, 217, 0, Z)," &
" 216 (BC_1, TXER, input, X)," &
" 217 (BC_1, *, control, 0)," &
" 218 (BC_4, RXER_RXDAT, input, X)," &
" 219 (BC_4, RXCLK, clock, X)," &
" 220 (BC_4, RXDV_FRTGE, input, X)," &
" 221 (BC_4, RXD0_FRTGD, input, X)," &
" 222 (BC_4, RXD1, input, X)," &
" 223 (BC_4, RXD2, input, X)," &
" 224 (BC_4, RXD3, input, X)," &
" 225 (BC_4, SLEEPL_EARL, input, X)," &
" 226 (BC_1, MDC, output3, X, 228, 0, Z)," &
" 227 (BC_1, MDC, input, X)," &
" 228 (BC_1, *, control, 0)," &
" 229 (BC_1, MDIO, output3, X, 231, 0, Z)," &
" 230 (BC_1, MDIO, input, X)," &
" 231 (BC_1, *, control, 0)";
end LAGUNA;