BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: EPC2T32

-- Copyright (C) 1998-2005 Altera Corporation
--
-- File Name     : EPC2T32.BSD
-- Device        : EPC2T32
-- Package       : 32-Pin Thin Quad Flat Pack
-- BSDL Version  : 3.04
-- Date Created  : 7/27/2001
-- Created by    : Altera BSDL Generation Program Ver. 1.20      
-- Verification  : Software syntax checked on:
--                   Agilent Technologies 3070 BSDL Compiler
--                   ASSET ScanWorks ver. 3.1.1
--                   Corelis ScanPlus TPG ver. 4.12
--                   Genrad BSDL syntax checker ver. 4.01, a component
--                      of Scan Pathfinder(tm) and BasicSCAN(tm)
--                   GOEPEL Electronics' CASCON-GALAXY(R) ver. 4.0
--                   JTAG Technologies BSDL Converter ver. 2.4
--
-- Documentation : Configuration Devices for APEX&FLEX Family Datasheet
--                 AN39: JTAG Boundary Scan Testing for Altera Devices
--
-- *********************************************************************
-- *                           IMPORTANT NOTICE                        *
-- *********************************************************************
--
-- Altera, APEX, FLEX and EPC2 are trademarks of Altera
-- Corporation.  Altera products, marketed under trademarks, are
-- protected under numerous US and foreign patents and pending
-- applications, maskwork rights, and copyrights.   Altera warrants
-- performance of its semiconductor products to current specifications
-- in accordance with Altera's standard warranty, but reserves the
-- right to make changes to any products and services at any time
-- without notice.  Altera assumes no responsibility or liability
-- arising out of the application or use of any information, product,
-- or service described herein except as expressly agreed to in
-- writing by Altera Corporation.  Altera customers are advised to
-- obtain the latest version of device specifications before relying
-- on any published information and before placing orders for products
-- or services.
--
-- *********************************************************************
-- *                     ENTITY DEFINITION WITH PORTS                  *
-- *********************************************************************

entity EPC2T32 is
  generic (PHYSICAL_PIN_MAP : string := "TQFP32");

port (
--APEX, FLEX Family-Specific Pins
    NCS           , VCCSEL        , VPPSEL        : in bit;
    DCLK          , DATA          , NCASC         : inout bit;
    NINIT_CONF    , OE            , VPP           : linkage bit;
--JTAG Ports
    TCK    , TMS    , TDI    : in bit;
    TDO    : out bit;
--No Connect Pins
    NC     : linkage bit_vector (1 to 17);
--Power Pins
    VCC    : linkage bit;
--Ground Pins
    GND    : linkage bit
);

use STD_1149_1_1994.all;

attribute COMPONENT_CONFORMANCE of EPC2T32 :
          entity is "STD_1149_1_1993";

-- *********************************************************************
-- *                             PIN MAPPING                           *
-- *********************************************************************

attribute PIN_MAP of EPC2T32 : entity is PHYSICAL_PIN_MAP;
constant TQFP32 : PIN_MAP_STRING :=
--APEX, FLEX Family-Specific Pins
    "NCS           : 10  , VCCSEL        : 3   , VPPSEL      : 17  , "&
    "DCLK          : 2   , DATA          : 31  , NCASC       : 15  , "&
    "NINIT_CONF    : 16  , OE            : 7   , VPP         : 23  , "&
--JTAG ports
    "TCK    : 32  , TMS    : 25  , TDI    : 13  , TDO    : 28  , "&
--No Connect Pins
    "NC     : (1   , 4   , 5   , 6   , 8   , 9   , 11  , 14  , "&
              "18  , 19  , 20  , 21  , 22  , 24  , 26  , 29  , "&
              "30  ), "&
--Power Pins
    "VCC    : 27  , "&
--Ground Pins
    "GND    : 12  ";

-- *********************************************************************
-- *                       IEEE 1149.1 TAP PORTS                       *
-- *********************************************************************

attribute TAP_SCAN_IN of TDI     : signal is true;
attribute TAP_SCAN_MODE of TMS   : signal is true;
attribute TAP_SCAN_OUT of TDO    : signal is true;
attribute TAP_SCAN_CLOCK of TCK  : signal is (10.00e6,BOTH);

-- *********************************************************************
-- *                   INSTRUCTIONS AND REGISTER ACCESS                *
-- *********************************************************************

attribute INSTRUCTION_LENGTH of EPC2T32 : entity is 10;
attribute INSTRUCTION_OPCODE of EPC2T32 : entity is
  "BYPASS            (1111111111), "&
  "EXTEST            (0000000000), "&
  "SAMPLE            (0001010101), "&
  "IDCODE            (0001011001), "&
  "USERCODE          (0001111001)";

attribute INSTRUCTION_CAPTURE of EPC2T32 : entity is "0101010101";

attribute IDCODE_REGISTER of EPC2T32 : entity is
  "0000"&               --4-bit Version
  "0001000000000010"&   --16-bit Part Number (hex 1002)
  "00001101110"&        --11-bit Manufacturer's Identity
  "1";                  --Mandatory LSB
attribute USERCODE_REGISTER of EPC2T32 : entity is
  "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
attribute REGISTER_ACCESS of EPC2T32 : entity is
  "DEVICE_ID        (IDCODE)";

-- *********************************************************************
-- *                    BOUNDARY SCAN CELL INFORMATION                 *
-- *********************************************************************

attribute BOUNDARY_LENGTH of EPC2T32 : entity is 24;
attribute BOUNDARY_REGISTER of EPC2T32 : entity is
  --BSC group 0 for Family-specific bidir pin 31
  "0   (BC_4, DATA, input, X)," &
  "1   (BC_1, *, control, 0)," &
  "2   (BC_1, DATA, output3, X, 1, 0, Z)," &

  --BSC group 1 for Family-specific bidir pin 2
  "3   (BC_4, DCLK, input, X)," &
  "4   (BC_1, *, control, 0)," &
  "5   (BC_1, DCLK, output3, X, 4, 0, Z)," &

  --BSC group 2 for Family-specific input pin 3
  "6   (BC_4, VCCSEL, input, X)," &
  "7   (BC_4, *, internal, X)," &
  "8   (BC_4, *, internal, X)," &

  --BSC group 3 for untestable Family-specific pin
  "9   (BC_4, *, internal, X)," &
  "10  (BC_4, *, internal, 0)," &
  "11  (BC_4, *, internal, X)," &

  --BSC group 4 for Family-specific input pin 10
  "12  (BC_4, NCS, input, X)," &
  "13  (BC_4, *, internal, X)," &
  "14  (BC_4, *, internal, X)," &

  --BSC group 5 for Family-specific bidir pin 15
  "15  (BC_4, NCASC, input, X)," &
  "16  (BC_1, *, control, 0)," &
  "17  (BC_1, NCASC, output3, X, 16, 0, Z)," &

  --BSC group 6 for untestable Family-specific pin
  "18  (BC_4, *, internal, X)," &
  "19  (BC_4, *, internal, 0)," &
  "20  (BC_4, *, internal, X)," &

  --BSC group 7 for Family-specific input pin 17
  "21  (BC_4, VPPSEL, input, X)," &
  "22  (BC_4, *, internal, X)," &
  "23  (BC_4, *, internal, X)" ;

end EPC2T32;