BSDL Files Library for JTAG
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ChipVORX ISP IP for Ultra Fast Flash Programming
BSDL File: CY7C0831V_144FBGA Download View details  



-- *************************************************************
-- Copyright (C) 2004 Cypress Semiconductor Corporation.
--
-- All rights reserved. This Software and associated documentation are
-- owned by Cypress Semiconductor Incorporated, and may be used only
-- as authorized in the license agreement controlling such use. No part of
-- this publication may be reproduced, transmitted, modified,
-- distributed, displayed or translated, in any form or by any means,
-- electronic, mechanical, manual, optical, or otherwise, without prior
-- written permission of Cypress Semiconductor Incorporated, or as
-- expressly provided by the license agreement. Authorized users agree
-- to be bound by the Destination Control Statement and Disclaimer
-- notice below.
--
-- Destination Control Statement
-- All technical data contained in this publication is subject to the
-- export control laws of the United States of America. Disclosure to
-- nationals of other countries contrary to United States law is
-- prohibited. It is the reader's responsibility to determine the
-- applicable regulations and to comply with them.
--
-- Disclaimer
-- Cypress Semiconductor Corporation, makes no warranty of any kind,
-- express or implied, with regard to this material, including, but not
-- limited to, the implied warranties of merchantability and fitness
-- for a particular purpose. Cypress Semiconductor Incorporated,
-- reserves the right to make changes without further notice to the
-- materials described herein. Cypress Semiconductor Incorporated does
-- not assume any liability arising out of the application or use of
-- any product or circuit described herein. The Cypress Semiconductor
-- Incorporated products described herein are not authorized for use
-- as components in life-support devices.
--
-- end Copyright Notice
--
-- *************************************************************

-- *************************************************************
-- File : CY7C0831V_144FBGA.bsd
-- Part Numbers: CY7C0831V-*BB*
-- Date : September 14, 2004
-- Revision : 1.00 - Initial Revision
-- Usage Notes: The MRSTb pin of the device resets both the system
--              logic and JTAG logic and should be treated as a 
--              compliance enable pin and forced high during JTAG
--              testing.
--
--              The TAP controller is not fully compliant andshould 
--              not be allowed to enter the Pause-DR or Pause-IR 
--              states and then returned to Shift-DR and Shift-IR 
--              respectively. 
-- *************************************************************

entity CY7C0831V_144FBGA is

 GENERIC (PHYSICAL_PIN_MAP : string := "UNDEFINED");

 PORT (
      la :      INOUT bit_vector(16 DOWNTO 0);
      ladsb:    IN    bit;
      lce0b:    IN    bit;
      lce1:     IN    bit;
      lclk :    IN    bit;
      lcntenb:  IN    bit;
      lcntrstb: IN    bit;
      lcntmsk:  IN    bit;
      ldq:      INOUT bit_vector(17 DOWNTO 0);
      loeb :    IN    bit;
      lintb:    OUT   bit;
      lcntintb: OUT   bit;
      lrw  :    IN    bit;
      lbb  :    IN    bit_vector(1 DOWNTO 0);
      ra :      INOUT bit_vector(16 DOWNTO 0);
      radsb:    IN    bit;
      rce0b:    IN    bit;
      rce1 :    IN    bit;
      rclk :    IN    bit;
      rcntenb:  IN    bit;
      rcntrstb: IN    bit;
      rcntmsk:  IN    bit;
      rdq:      INOUT bit_vector(17 DOWNTO 0);
      roeb :    IN    bit;
      rintb:    OUT   bit;
      rcntintb: OUT   bit;
      rrw  :    IN    bit;
      rbb  :    IN    bit_vector(1 DOWNTO 0);
      mrstb:    IN    bit;
      TMS  :    IN    bit;
      TDI  :    IN    bit;
      TDO  :    OUT   bit;
      TCK  :    IN    bit;
      lvddio:   linkage bit_vector(5 DOWNTO 0);
      rvddio:   linkage bit_vector(5 DOWNTO 0);
      vss  :    linkage bit_vector(11 DOWNTO 0);
      NC   :    linkage bit_vector(18 DOWNTO 0)
       );

 use STD_1149_1_1994.all;

 attribute COMPONENT_CONFORMANCE of CY7C0831V_144FBGA :
          entity is "STD_1149_1_1993";

 attribute PIN_MAP of CY7C0831V_144FBGA : entity is PHYSICAL_PIN_MAP;

 constant UNDEFINED : PIN_MAP_STRING :=
   "mrstb: B6," &
   "TCK: K6," &
   "TDI: K9," &
   "TDO: K4," &
   "TMS: K7," &
   "la:    (K1,J2,J1,H2,H1,G2,G1,F2,F1," &
   "        E2,E1,D2,D1,C2,C1,B2,B1)," &
   "lclk: F3," &
   "ladsb: C6," &
   "lbb:    (E3,G3)," &
   "lce0b: D3," &
   "lce1: C3," &
   "lcntenb: L6," &
   "lcntintb: C5," &
   "lcntmsk: K3," &
   "lcntrstb: K5," &
   "lintb: C4," &
   "loeb: H3," &
   "lrw: J3," &
   "ldq:    (A1,A2,B3,A3,B4,A4,B5,A5,A6," &
   "         M1,M2,L3,M3,L4,M4,L5,M5,M6)," &
   "ra:    (K12,J11,J12,H11,H12,G11,G12,F11,F12," &
   "        E11,E12,D11,D12,C11,C12,B11,B12)," &
   "rclk: F10," &
   "radsb: C7," &
   "rbb:    (E10,G10)," &
   "rce0b: D10," &
   "rce1: C10," &
   "rcntenb: L7," &
   "rcntintb: C8," &
   "rcntmsk: K10," &
   "rcntrstb: K8," &
   "rintb: C9," &
   "roeb: H10," &
   "rrw: J10," &
   "rdq:    (A12,A11,B10,A10,B9,A9,B8,A8,A7," &
   "         M12,M11,L10,M10,L9,M9,L8,M8,M7)," &
   "vss:    (E7,E6,F5,F6,F7,F8,G5,G6,G7,G8," &
   "         H6,H7)," &
   "lvddio:    (J5,D5,D6,E5,H5,J6)," &
   "rvddio:    (D7,D8,E8,H8,J7,J8)," &
   "NC:    (B7,L2,L1,K2,J4,L11,L12,K11,J9,H4," &
   "        H9,D4,D9,F4,F9,E4,E9,G4,G9)";

 attribute TAP_SCAN_IN of TDI     : signal is true;
 attribute TAP_SCAN_OUT of TDO    : signal is true;
 attribute TAP_SCAN_MODE of TMS   : signal is true;
 attribute TAP_SCAN_CLOCK of TCK  : signal is (10.00e6,BOTH);

 attribute COMPLIANCE_PATTERNS of CY7C0831V_144FBGA : entity is
    "(mrstb) (1)";

 attribute INSTRUCTION_LENGTH of CY7C0831V_144FBGA : entity is 4;

 attribute INSTRUCTION_OPCODE of CY7C0831V_144FBGA : entity is
    "EXTEST   (0000),"&
    "BYPASS   (1111),"&
    "IDCODE   (1011),"&
    "HIGHZ    (0111),"&
    "CLAMP    (0100),"&
    "NBSRST   (1100),"&
    "SAMPLE   (1000)";

 attribute INSTRUCTION_CAPTURE of CY7C0831V_144FBGA : entity is "0001";

-- The part number field of the Device Identification Code is:
-- Revision A: "1100000000000001" (hex C001)
-- Revision B: "1100000010010001" (hex C091)
attribute IDCODE_REGISTER of CY7C0831V_144FBGA : entity is
    "0000"&               --4-bit Version
    "1100000000000001"&   --16-bit Part Number (hex C001)
    "00000110100"&        --11-bit Manufacturer's Identity (hex 034)
    "1";                  --Mandatory LSB

 attribute REGISTER_ACCESS of CY7C0831V_144FBGA : entity is
  "BOUNDARY (EXTEST,SAMPLE),"&
  "BYPASS  (HIGHZ,CLAMP,BYPASS,NBSRST)";

 attribute BOUNDARY_LENGTH of CY7C0831V_144FBGA : entity is 170;

 attribute BOUNDARY_REGISTER of CY7C0831V_144FBGA : entity is
  "0   (BC_1, *, control, 0),"&
  "1   (BC_7, ldq(0), bidir, X, 0, 0, Z),"&
  "2   (BC_1, *, control, 0),"&
  "3   (BC_7, ldq(1), bidir, X, 2, 0, Z),"&
  "4   (BC_1, *, control, 0),"&
  "5   (BC_7, ldq(2), bidir, X, 4, 0, Z),"&
  "6   (BC_1, *, control, 0),"&
  "7   (BC_7, ldq(3), bidir, X, 6, 0, Z),"&
  "8   (BC_1, *, control, 0),"&
  "9   (BC_7, ldq(4), bidir, X, 8, 0, Z),"&
  "10  (BC_1, *, control, 0),"&
  "11  (BC_7, ldq(5), bidir, X, 10, 0, Z),"&
  "12  (BC_1, *, control, 0),"&
  "13  (BC_7, ldq(6), bidir, X, 12, 0, Z),"&
  "14  (BC_1, *, control, 0),"&
  "15  (BC_7, ldq(7), bidir, X, 14, 0, Z),"&
  "16  (BC_1, *, control, 0),"&
  "17  (BC_7, ldq(8), bidir, X, 16, 0, Z),"&
  "18  (BC_1, *, control, 0),"&
  "19  (BC_7, la(16), bidir, X, 18, 0, Z),"&
  "20  (BC_1, *, control, 0),"&
  "21  (BC_7, la(15), bidir, X, 20, 0, Z),"&
  "22  (BC_1, *, control, 0),"&
  "23  (BC_7, la(14), bidir, X, 22, 0, Z),"&
  "24  (BC_1, *, control, 0),"&
  "25  (BC_7, la(13), bidir, X, 24, 0, Z),"&
  "26  (BC_1, *, control, 0),"&
  "27  (BC_7, la(12), bidir, X, 26, 0, Z),"&
  "28  (BC_1, *, control, 0),"&
  "29  (BC_7, la(11), bidir, X, 28, 0, Z),"&
  "30  (BC_1, *, control, 0),"&
  "31  (BC_7, la(10), bidir, X, 30, 0, Z),"&
  "32  (BC_1, *, control, 0),"&
  "33  (BC_7, la(9), bidir, X, 32, 0, Z),"&
  "34  (BC_1, *, control, 0),"&
  "35  (BC_7, la(8), bidir, X, 34, 0, Z),"&
  "36  (BC_1, lcntmsk, input, X),"&
  "37  (BC_1, lcntrstb, input, X),"&
  "38  (BC_1, lcntenb, input, X),"&
  "39  (BC_1, ladsb, input, X),"&
  "40  (BC_1, lclk, input, X),"&
  "41  (BC_1, lrw, input, X),"&
  "42  (BC_1, lce0b, input, X),"&
  "43  (BC_1, loeb, input, X),"&
  "44  (BC_1, lbb(1), input, X),"&
  "45  (BC_1, lbb(0), input, X),"&
  "46  (BC_1, lce1, input, X),"&
  "47  (BC_1, *, control, 0),"&
  "48  (BC_7, la(7), bidir, X, 47, 0, Z),"&
  "49  (BC_1, *, control, 0),"&
  "50  (BC_7, la(6), bidir, X, 49, 0, Z),"&
  "51  (BC_1, *, control, 0),"&
  "52  (BC_7, la(5), bidir, X, 51, 0, Z),"&
  "53  (BC_1, *, control, 0),"&
  "54  (BC_7, la(4), bidir, X, 53, 0, Z),"&
  "55  (BC_1, *, control, 0),"&
  "56  (BC_7, la(3), bidir, X, 55, 0, Z),"&
  "57  (BC_1, *, control, 0),"&
  "58  (BC_7, la(2), bidir, X, 57, 0, Z),"&
  "59  (BC_1, *, control, 0),"&
  "60  (BC_7, la(1), bidir, X, 59, 0, Z),"&
  "61  (BC_1, *, control, 0),"&
  "62  (BC_7, la(0), bidir, X, 61, 0, Z),"&
  "63  (BC_1, *, control, 0),"&
  "64  (BC_7, ldq(17), bidir, X, 63, 0, Z),"&
  "65  (BC_1, *, control, 0),"&
  "66  (BC_7, ldq(16), bidir, X, 65, 0, Z),"&
  "67  (BC_1, *, control, 0),"&
  "68  (BC_7, ldq(15), bidir, X, 67, 0, Z),"&
  "69  (BC_1, *, control, 0),"&
  "70  (BC_7, ldq(14), bidir, X, 69, 0, Z),"&
  "71  (BC_1, *, control, 0),"&
  "72  (BC_7, ldq(13), bidir, X, 71, 0, Z),"&
  "73  (BC_1, *, control, 0),"&
  "74  (BC_7, ldq(12), bidir, X, 73, 0, Z),"&
  "75  (BC_1, *, control, 0),"&
  "76  (BC_7, ldq(11), bidir, X, 75, 0, Z),"&
  "77  (BC_1, *, control, 0),"&
  "78  (BC_7, ldq(10), bidir, X, 77, 0, Z),"&
  "79  (BC_1, *, control, 0),"&
  "80  (BC_7, ldq(9), bidir, X, 79, 0, Z),"&
  "81  (BC_1, *, control, 0),"&
  "82  (BC_1, lintb, output3, X, 81, 0, Z),"&
  "83  (BC_1, *, control, 0),"&
  "84  (BC_1, lcntintb, output3, X, 83, 0, Z),"&
  "85  (BC_1, *, control, 0),"&
  "86  (BC_1, rcntintb, output3, X, 85, 0, Z),"&
  "87  (BC_1, *, control, 0),"&
  "88  (BC_1, rintb, output3, X, 87, 0, Z),"&
  "89  (BC_1, *, control, 0),"&
  "90  (BC_7, rdq(9), bidir, X, 89, 0, Z),"&
  "91  (BC_1, *, control, 0),"&
  "92  (BC_7, rdq(10), bidir, X, 91, 0, Z),"&
  "93  (BC_1, *, control, 0),"&
  "94  (BC_7, rdq(11), bidir, X, 93, 0, Z),"&
  "95  (BC_1, *, control, 0),"&
  "96  (BC_7, rdq(12), bidir, X, 95, 0, Z),"&
  "97  (BC_1, *, control, 0),"&
  "98  (BC_7, rdq(13), bidir, X, 97, 0, Z),"&
  "99  (BC_1, *, control, 0),"&
  "100 (BC_7, rdq(14), bidir, X, 99, 0, Z),"&
  "101 (BC_1, *, control, 0),"&
  "102 (BC_7, rdq(15), bidir, X, 101, 0, Z),"&
  "103 (BC_1, *, control, 0),"&
  "104 (BC_7, rdq(16), bidir, X, 103, 0, Z),"&
  "105 (BC_1, *, control, 0),"&
  "106 (BC_7, rdq(17), bidir, X, 105, 0, Z),"&
  "107 (BC_1, *, control, 0),"&
  "108 (BC_7, ra(0), bidir, X, 107, 0, Z),"&
  "109 (BC_1, *, control, 0),"&
  "110 (BC_7, ra(1), bidir, X, 109, 0, Z),"&
  "111 (BC_1, *, control, 0),"&
  "112 (BC_7, ra(2), bidir, X, 111, 0, Z),"&
  "113 (BC_1, *, control, 0),"&
  "114 (BC_7, ra(3), bidir, X, 113, 0, Z),"&
  "115 (BC_1, *, control, 0),"&
  "116 (BC_7, ra(4), bidir, X, 115, 0, Z),"&
  "117 (BC_1, *, control, 0),"&
  "118 (BC_7, ra(5), bidir, X, 117, 0, Z),"&
  "119 (BC_1, *, control, 0),"&
  "120 (BC_7, ra(6), bidir, X, 119, 0, Z),"&
  "121 (BC_1, *, control, 0),"&
  "122 (BC_7, ra(7), bidir, X, 121, 0, Z),"&
  "123 (BC_1, rce1, input, X),"&
  "124 (BC_1, rbb(0), input, X),"&
  "125 (BC_1, rbb(1), input, X),"&
  "126 (BC_1, roeb, input, X),"&
  "127 (BC_1, rce0b, input, X),"&
  "128 (BC_1, rrw, input, X),"&
  "129 (BC_1, rclk, input, X),"&
  "130 (BC_1, radsb, input, X),"&
  "131 (BC_1, rcntenb, input, X),"&
  "132 (BC_1, rcntrstb, input, X),"&
  "133 (BC_1, rcntmsk, input, X),"&
  "134 (BC_1, *, control, 0),"&
  "135 (BC_7, ra(8), bidir, X, 134, 0, Z),"&
  "136 (BC_1, *, control, 0),"&
  "137 (BC_7, ra(9), bidir, X, 136, 0, Z),"&
  "138 (BC_1, *, control, 0),"&
  "139 (BC_7, ra(10), bidir, X, 138, 0, Z),"&
  "140 (BC_1, *, control, 0),"&
  "141 (BC_7, ra(11), bidir, X, 140, 0, Z),"&
  "142 (BC_1, *, control, 0),"&
  "143 (BC_7, ra(12), bidir, X, 142, 0, Z),"&
  "144 (BC_1, *, control, 0),"&
  "145 (BC_7, ra(13), bidir, X, 144, 0, Z),"&
  "146 (BC_1, *, control, 0),"&
  "147 (BC_7, ra(14), bidir, X, 146, 0, Z),"&
  "148 (BC_1, *, control, 0),"&
  "149 (BC_7, ra(15), bidir, X, 148, 0, Z),"&
  "150 (BC_1, *, control, 0),"&
  "151 (BC_7, ra(16), bidir, X, 150, 0, Z),"&
  "152 (BC_1, *, control, 0),"&
  "153 (BC_7, rdq(8), bidir, X, 152, 0, Z),"&
  "154 (BC_1, *, control, 0),"&
  "155 (BC_7, rdq(7), bidir, X, 154, 0, Z),"&
  "156 (BC_1, *, control, 0),"&
  "157 (BC_7, rdq(6), bidir, X, 156, 0, Z),"&
  "158 (BC_1, *, control, 0),"&
  "159 (BC_7, rdq(5), bidir, X, 158, 0, Z),"&
  "160 (BC_1, *, control, 0),"&
  "161 (BC_7, rdq(4), bidir, X, 160, 0, Z),"&
  "162 (BC_1, *, control, 0),"&
  "163 (BC_7, rdq(3), bidir, X, 162, 0, Z),"&
  "164 (BC_1, *, control, 0),"&
  "165 (BC_7, rdq(2), bidir, X, 164, 0, Z),"&
  "166 (BC_1, *, control, 0),"&
  "167 (BC_7, rdq(1), bidir, X, 166, 0, Z),"&
  "168 (BC_1, *, control, 0),"&
  "169 (BC_7, rdq(0), bidir, X, 168, 0, Z)";
end CY7C0831V_144FBGA;

This library contains 7712 BSDL files (for 6084 distinct entities) from 63 vendors
Last BSDL model (KS32C41100) was added on Mar 9, 2017 20:54
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