-- BSDL file for the Ultra37064V in the 84-pin PLCC package
-- Initial release 1.0 2/24/99
entity D064VP84 is
generic (PHYSICAL_PIN_MAP:string:= "UNDEFINED");
port (
JTAGen:in bit;
TDI :in bit;
TCK :in bit;
TMS :in bit;
TDO :out bit;
IO_63 :inout bit;
IO_62 :inout bit;
IO_61 :inout bit;
IO_60 :inout bit;
IO_59 :inout bit;
IO_58 :inout bit;
IO_57 :inout bit;
IO_56 :inout bit;
IO_55 :inout bit;
IO_53 :inout bit;
IO_52 :inout bit;
IO_51 :inout bit;
IO_50 :inout bit;
IO_49 :inout bit;
IO_48 :inout bit;
IO_47 :inout bit;
IO_46 :inout bit;
IO_45 :inout bit;
IO_44 :inout bit;
IO_43 :inout bit;
IO_42 :inout bit;
IO_41 :inout bit;
IO_40 :inout bit;
IO_39 :inout bit;
IO_37 :inout bit;
IO_36 :inout bit;
IO_35 :inout bit;
IO_34 :inout bit;
IO_33 :inout bit;
IO_32 :inout bit;
IO_31 :inout bit;
IO_30 :inout bit;
IO_29 :inout bit;
IO_28 :inout bit;
IO_27 :inout bit;
IO_25 :inout bit;
IO_24 :inout bit;
IO_23 :inout bit;
IO_22 :inout bit;
IO_21 :inout bit;
IO_20 :inout bit;
IO_19 :inout bit;
IO_18 :inout bit;
IO_17 :inout bit;
IO_16 :inout bit;
IO_15 :inout bit;
IO_14 :inout bit;
IO_13 :inout bit;
IO_12 :inout bit;
IO_11 :inout bit;
IO_9 :inout bit;
IO_8 :inout bit;
IO_7 :inout bit;
IO_6 :inout bit;
IO_5 :inout bit;
IO_4 :inout bit;
IO_3 :inout bit;
IO_2 :inout bit;
IO_1 :inout bit;
IO_0 :inout bit;
INP_4 :in bit;
INP_3 :in bit;
INP_2 :in bit;
INP_1 :in bit;
INP_0 :in bit;
GND :linkage bit_vector(1 to 8);
VCCEXT :linkage bit_vector(1 to 4);
VCCINT :linkage bit_vector(1 to 2)
);
use STD_1149_1_1994.all;-- needed for attribute compliance patterns
attribute COMPONENT_CONFORMANCE of D064VP84 : entity is
"STD_1149_1_1993";
attribute PIN_MAP of D064VP84:entity is PHYSICAL_PIN_MAP;
constant p84_package:PIN_MAP_STRING:=
"JTAGen :83 ," &
"TDI :72 ," &
"TCK :14 ," &
"TMS :35 ," &
"TDO :51 ," &
"IO_63 :82 ," &
"IO_62 :81 ," &
"IO_61 :80 ," &
"IO_60 :79 ," &
"IO_59 :78 ," &
"IO_58 :77 ," &
"IO_57 :76 ," &
"IO_56 :75 ," &
"IO_55 :73 ," &
"IO_53 :71 ," &
"IO_52 :70 ," &
"IO_51 :69 ," &
"IO_50 :68 ," &
"IO_49 :67 ," &
"IO_48 :66 ," &
"IO_47 :61 ," &
"IO_46 :60 ," &
"IO_45 :59 ," &
"IO_44 :58 ," &
"IO_43 :57 ," &
"IO_42 :56 ," &
"IO_41 :55 ," &
"IO_40 :54 ," &
"IO_39 :52 ," &
"IO_37 :50 ," &
"IO_36 :49 ," &
"IO_35 :48 ," &
"IO_34 :47 ," &
"IO_33 :46 ," &
"IO_32 :45 ," &
"IO_31 :40 ," &
"IO_30 :39 ," &
"IO_29 :38 ," &
"IO_28 :37 ," &
"IO_27 :36 ," &
"IO_25 :34 ," &
"IO_24 :33 ," &
"IO_23 :31 ," &
"IO_22 :30 ," &
"IO_21 :29 ," &
"IO_20 :28 ," &
"IO_19 :27 ," &
"IO_18 :26 ," &
"IO_17 :25 ," &
"IO_16 :24 ," &
"IO_15 :19 ," &
"IO_14 :18 ," &
"IO_13 :17 ," &
"IO_12 :16 ," &
"IO_11 :15 ," &
"IO_9 :13 ," &
"IO_8 :12 ," &
"IO_7 :10 ," &
"IO_6 :9 ," &
"IO_5 :8 ," &
"IO_4 :7 ," &
"IO_3 :6 ," &
"IO_2 :5 ," &
"IO_1 :4 ," &
"IO_0 :3 ," &
"inp_4 :65 ," &
"inp_3 :62 ," &
"inp_2 :41 ," &
"inp_1 :23 ," &
"inp_0 :20 ," &
"GND :(11,43,1,74,64,22,53,32)," &
"VCCEXT :(2,21,63,42)," &
"VCCINT :(44,84)";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (2.0e6, BOTH);
--The compliance_pattern attribute is needed to choose
--the JTAG function from the dual function pins.
attribute compliance_patterns of D064VP84 : entity is
"(JTAGen) (1)";
attribute INSTRUCTION_LENGTH of D064VP84 : entity is 6;
attribute INSTRUCTION_OPCODE of D064VP84 : entity is
"BYPASS ( 111111)," &
"SAMPLE( 000010)," &
"EXTEST ( 000000)," &
"IDCODE ( 000100)," &
"USERCODEX ( 000111)";
attribute INSTRUCTION_CAPTURE of D064VP84 : entity is "000001";
attribute IDCODE_REGISTER of D064VP84 : entity is
"XX00" & -- version
"1001000100000100" & -- part number
"00000110100" & -- manufacturer's id
"1"; -- required by standard
attribute REGISTER_ACCESS of D064VP84 : entity is
"USER_CODE[16] (USERCODEX CAPTURES XXXXXXXXXXXXXXXX)" ;
attribute BOUNDARY_LENGTH of D064VP84 : entity is 185;
attribute BOUNDARY_REGISTER of D064VP84 : entity is
"184(BC_4, IO_63, input, X), " &
"183(BC_1, IO_63, output3, X, 182, 0, Z), " &
"182(BC_1, *, control , 0), " &
"181(BC_4, IO_62, input, X), " &
"180(BC_1, IO_62, output3, X, 179, 0, Z), " &
"179(BC_1, *, control , 0), " &
"178(BC_4, IO_61, input, X), " &
"177(BC_1, IO_61, output3, X, 176, 0, Z), " &
"176(BC_1, *, control , 0), " &
"175(BC_4, IO_60, input, X), " &
"174(BC_1, IO_60, output3, X, 173, 0, Z), " &
"173(BC_1, *, control , 0), " &
"172(BC_4, IO_59, input, X), " &
"171(BC_1, IO_59, output3, X, 170, 0, Z), " &
"170(BC_1, *, control , 0), " &
"169(BC_4, IO_58, input, X), " &
"168(BC_1, IO_58, output3, X, 167, 0, Z), " &
"167(BC_1, *, control , 0), " &
"166(BC_4, IO_57, input, X), " &
"165(BC_1, IO_57, output3, X, 164, 0, Z), " &
"164(BC_1, *, control , 0), " &
"163(BC_4, IO_56, input, X), " &
"162(BC_1, IO_56, output3, X, 161, 0, Z), " &
"161(BC_1, *, control , 0), " &
"160(BC_4, IO_55, input, X), " &
"159(BC_1, IO_55, output3, X, 158, 0, Z), " &
"158(BC_1, *, control , 0), " &
"157(BC_4, IO_53, input, X), " &
"156(BC_1, IO_53, output3, X, 155, 0, Z), " &
"155(BC_1, *, control , 0), " &
"154(BC_4, IO_52, input, X), " &
"153(BC_1, IO_52, output3, X, 152, 0, Z), " &
"152(BC_1, *, control , 0), " &
"151(BC_4, IO_51, input, X), " &
"150(BC_1, IO_51, output3, X, 149, 0, Z), " &
"149(BC_1, *, control , 0), " &
"148(BC_4, IO_50, input, X), " &
"147(BC_1, IO_50, output3, X, 146, 0, Z), " &
"146(BC_1, *, control , 0), " &
"145(BC_4, IO_49, input, X), " &
"144(BC_1, IO_49, output3, X, 143, 0, Z), " &
"143(BC_1, *, control , 0), " &
"142(BC_4, IO_48, input, X), " &
"141(BC_1, IO_48, output3, X, 140, 0, Z), " &
"140(BC_1, *, control , 0), " &
"139(BC_4, IO_47, input, X), " &
"138(BC_1, IO_47, output3, X, 137, 0, Z), " &
"137(BC_1, *, control , 0), " &
"136(BC_4, IO_46, input, X), " &
"135(BC_1, IO_46, output3, X, 134, 0, Z), " &
"134(BC_1, *, control , 0), " &
"133(BC_4, IO_45, input, X), " &
"132(BC_1, IO_45, output3, X, 131, 0, Z), " &
"131(BC_1, *, control , 0), " &
"130(BC_4, IO_44, input, X), " &
"129(BC_1, IO_44, output3, X, 128, 0, Z), " &
"128(BC_1, *, control , 0), " &
"127(BC_4, IO_43, input, X), " &
"126(BC_1, IO_43, output3, X, 125, 0, Z), " &
"125(BC_1, *, control , 0), " &
"124(BC_4, IO_42, input, X), " &
"123(BC_1, IO_42, output3, X, 122, 0, Z), " &
"122(BC_1, *, control , 0), " &
"121(BC_4, IO_41, input, X), " &
"120(BC_1, IO_41, output3, X, 119, 0, Z), " &
"119(BC_1, *, control , 0), " &
"118(BC_4, IO_40, input, X), " &
"117(BC_1, IO_40, output3, X, 116, 0, Z), " &
"116(BC_1, *, control , 0), " &
"115(BC_4, IO_39, input, X), " &
"114(BC_1, IO_39, output3, X, 113, 0, Z), " &
"113(BC_1, *, control , 0), " &
"112(BC_4, IO_37, input, X), " &
"111(BC_1, IO_37, output3, X, 110, 0, Z), " &
"110(BC_1, *, control , 0), " &
"109(BC_4, IO_36, input, X), " &
"108(BC_1, IO_36, output3, X, 107, 0, Z), " &
"107(BC_1, *, control , 0), " &
"106(BC_4, IO_35, input, X), " &
"105(BC_1, IO_35, output3, X, 104, 0, Z), " &
"104(BC_1, *, control , 0), " &
"103(BC_4, IO_34, input, X), " &
"102(BC_1, IO_34, output3, X, 101, 0, Z), " &
"101(BC_1, *, control , 0), " &
"100(BC_4, IO_33, input, X), " &
" 99(BC_1, IO_33, output3, X, 98, 0, Z), " &
" 98(BC_1, *, control , 0), " &
" 97(BC_4, IO_32, input, X), " &
" 96(BC_1, IO_32, output3, X, 95, 0, Z), " &
" 95(BC_1, *, control , 0), " &
" 94(BC_4, inp_4, clock, X), " &
" 93(BC_4, inp_3, clock, X), " &
" 92(BC_4, inp_2, input, X), " &
" 91(BC_4, inp_1, clock, X), " &
" 90(BC_4, inp_0, clock, X), " &
" 89(BC_4, IO_31, input, X), " &
" 88(BC_1, IO_31, output3, X, 87, 0, Z), " &
" 87(BC_1, *, control , 0), " &
" 86(BC_4, IO_30, input, X), " &
" 85(BC_1, IO_30, output3, X, 84, 0, Z), " &
" 84(BC_1, *, control , 0), " &
" 83(BC_4, IO_29, input, X), " &
" 82(BC_1, IO_29, output3, X, 81, 0, Z), " &
" 81(BC_1, *, control , 0), " &
" 80(BC_4, IO_28, input, X), " &
" 79(BC_1, IO_28, output3, X, 78, 0, Z), " &
" 78(BC_1, *, control , 0), " &
" 77(BC_4, IO_27, input, X), " &
" 76(BC_1, IO_27, output3, X, 75, 0, Z), " &
" 75(BC_1, *, control , 0), " &
" 74(BC_4, IO_25, input, X), " &
" 73(BC_1, IO_25, output3, X, 72, 0, Z), " &
" 72(BC_1, *, control , 0), " &
" 71(BC_4, IO_24, input, X), " &
" 70(BC_1, IO_24, output3, X, 69, 0, Z), " &
" 69(BC_1, *, control , 0), " &
" 68(BC_4, IO_23, input, X), " &
" 67(BC_1, IO_23, output3, X, 66, 0, Z), " &
" 66(BC_1, *, control , 0), " &
" 65(BC_4, IO_22, input, X), " &
" 64(BC_1, IO_22, output3, X, 63, 0, Z), " &
" 63(BC_1, *, control , 0), " &
" 62(BC_4, IO_21, input, X), " &
" 61(BC_1, IO_21, output3, X, 60, 0, Z), " &
" 60(BC_1, *, control , 0), " &
" 59(BC_4, IO_20, input, X), " &
" 58(BC_1, IO_20, output3, X, 57, 0, Z), " &
" 57(BC_1, *, control , 0), " &
" 56(BC_4, IO_19, input, X), " &
" 55(BC_1, IO_19, output3, X, 54, 0, Z), " &
" 54(BC_1, *, control , 0), " &
" 53(BC_4, IO_18, input, X), " &
" 52(BC_1, IO_18, output3, X, 51, 0, Z), " &
" 51(BC_1, *, control , 0), " &
" 50(BC_4, IO_17, input, X), " &
" 49(BC_1, IO_17, output3, X, 48, 0, Z), " &
" 48(BC_1, *, control , 0), " &
" 47(BC_4, IO_16, input, X), " &
" 46(BC_1, IO_16, output3, X, 45, 0, Z), " &
" 45(BC_1, *, control , 0), " &
" 44(BC_4, IO_15, input, X), " &
" 43(BC_1, IO_15, output3, X, 42, 0, Z), " &
" 42(BC_1, *, control , 0), " &
" 41(BC_4, IO_14, input, X), " &
" 40(BC_1, IO_14, output3, X, 39, 0, Z), " &
" 39(BC_1, *, control , 0), " &
" 38(BC_4, IO_13, input, X), " &
" 37(BC_1, IO_13, output3, X, 36, 0, Z), " &
" 36(BC_1, *, control , 0), " &
" 35(BC_4, IO_12, input, X), " &
" 34(BC_1, IO_12, output3, X, 33, 0, Z), " &
" 33(BC_1, *, control , 0), " &
" 32(BC_4, IO_11, input, X), " &
" 31(BC_1, IO_11, output3, X, 30, 0, Z), " &
" 30(BC_1, *, control , 0), " &
" 29(BC_4, IO_9, input, X), " &
" 28(BC_1, IO_9, output3, X, 27, 0, Z), " &
" 27(BC_1, *, control , 0), " &
" 26(BC_4, IO_8, input, X), " &
" 25(BC_1, IO_8, output3, X, 24, 0, Z), " &
" 24(BC_1, *, control , 0), " &
" 23(BC_4, IO_7, input, X), " &
" 22(BC_1, IO_7, output3, X, 21, 0, Z), " &
" 21(BC_1, *, control , 0), " &
" 20(BC_4, IO_6, input, X), " &
" 19(BC_1, IO_6, output3, X, 18, 0, Z), " &
" 18(BC_1, *, control , 0), " &
" 17(BC_4, IO_5, input, X), " &
" 16(BC_1, IO_5, output3, X, 15, 0, Z), " &
" 15(BC_1, *, control , 0), " &
" 14(BC_4, IO_4, input, X), " &
" 13(BC_1, IO_4, output3, X, 12, 0, Z), " &
" 12(BC_1, *, control , 0), " &
" 11(BC_4, IO_3, input, X), " &
" 10(BC_1, IO_3, output3, X, 9, 0, Z), " &
" 9(BC_1, *, control , 0), " &
" 8(BC_4, IO_2, input, X), " &
" 7(BC_1, IO_2, output3, X, 6, 0, Z), " &
" 6(BC_1, *, control , 0), " &
" 5(BC_4, IO_1, input, X), " &
" 4(BC_1, IO_1, output3, X, 3, 0, Z), " &
" 3(BC_1, *, control , 0), " &
" 2(BC_4, IO_0, input, X), " &
" 1(BC_1, IO_0, output3, X, 0, 0, Z), " &
" 0(BC_1, *, control , 0)";
attribute DESIGN_WARNING of D064VP84: entity is
" The SAMPLE instruction is only to be used in" &
" conjunction with the EXTEST operation." &
" The SAMPLE instruction is non-1149.1 compliant" &
" wrt a logic analyzer(INTEST) capability for" &
" capturing macrocell output and associated output" &
" enable data on I/O pins. The captured macrocell" &
" data is potentially inverted from the data present" &
" on the I/O pin and the captured output enable data" &
" is always inverted from the output enable signal " &
" controlling the I/O pin. ";
end D064VP84;