-- $ XILINX$RCSfile: xc2c32a.bsd,v $
-- $ XILINX$Revision: 1.9 $
--
-- BSDL file for device xc2c32a, package cp56
-- Xilinx, Inc. $State: PRELIMINARY $ $Date: 2008-05-05 16:59:01-07 $
-- Generated by createBSDL_br 2.2c
--
-- Unzip these BSDL files into your %xilinx%/xbr/data directory,
-- overwriting all files."
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--
------------------------------------------------------------------------
-- | Generated on 05/01/08
-- | CR # 471889
-- | Details - Added USERCODE_REGISTER & changed CONTROL safe bit to 0.
------------------------------------------------------------------------
entity xc2c32a is
generic (PHYSICAL_PIN_MAP : string := "UNDEFINED");
port ( tdi : in bit;
tck : in bit;
tms : in bit;
tdo : out bit;
IN_16 : in bit;
IO_0 : inout bit;
IO_1 : inout bit;
IO_2 : inout bit;
IO_3 : inout bit;
IO_4 : inout bit;
IO_5 : inout bit;
IO_6 : inout bit;
IO_7 : inout bit;
IO_8 : inout bit;
IO_9 : inout bit;
IO_10 : inout bit;
IO_11 : inout bit;
IO_12 : inout bit;
IO_13 : inout bit;
IO_14 : inout bit;
IO_15 : inout bit;
IO_17 : inout bit;
IO_18 : inout bit;
IO_19 : inout bit;
IO_20 : inout bit;
IO_21 : inout bit;
IO_22 : inout bit;
IO_23 : inout bit;
IO_24 : inout bit;
IO_25 : inout bit;
IO_26 : inout bit;
IO_27 : inout bit;
IO_28 : inout bit;
IO_29 : inout bit;
IO_30 : inout bit;
IO_31 : inout bit;
IO_32 : inout bit);
use std_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of xc2c32a : entity is "std_1149_1_1993";
attribute PIN_MAP of xc2c32a : entity is PHYSICAL_PIN_MAP;
constant UNDEFINED : PIN_MAP_STRING :=
" tdi:J10, tck:K10, tms:K9, tdo:A6,IN_16:E8," &
" IO_0:F1, IO_1:E3, IO_2:E1, IO_3:D1, IO_4:C1," &
" IO_5:A3, IO_6:A2, IO_7:B1, IO_8:A1, IO_9:C4," &
" IO_10:C5, IO_11:A7, IO_12:C8, IO_13:A9, IO_14:A10," &
" IO_15:C10, IO_17:G1, IO_18:F3, IO_19:H1, IO_20:G3," &
" IO_21:J1, IO_22:K1, IO_23:K2, IO_24:K3, IO_25:H3," &
" IO_26:K5, IO_27:H5, IO_28:H8, IO_29:K8, IO_30:H10," &
" IO_31:G10, IO_32:F10";
attribute TAP_SCAN_IN of tdi : signal is true;
attribute TAP_SCAN_CLOCK of tck : signal is (33.0e6, both);
attribute TAP_SCAN_MODE of tms : signal is true;
attribute TAP_SCAN_OUT of tdo : signal is true;
attribute INSTRUCTION_LENGTH of xc2c32a : entity is 8;
attribute INSTRUCTION_OPCODE of xc2c32a : entity is
"INTEST (00000010)," &
"BYPASS (11111111)," &
"SAMPLE (00000011)," &
"EXTEST (00000000)," &
"IDCODE (00000001)," &
"USERCODE (11111101)," &
"HIGHZ (11111100)," &
"ISC_ENABLE_CLAMP (11101001)," &
"ISC_ENABLEOTF (11100100)," &
"ISC_ENABLE (11101000)," &
"ISC_SRAM_READ (11100111)," &
"ISC_SRAM_WRITE (11100110)," &
"ISC_ERASE (11101101)," &
"ISC_PROGRAM (11101010)," &
"ISC_READ (11101110)," &
"ISC_INIT (11110000)," &
"ISC_DISABLE (11000000)," &
"TEST_ENABLE (00010001)," &
"BULKPROG (00010010)," &
"ERASE_ALL (00010100)," &
"MVERIFY (00010011)," &
"TEST_DISABLE (00010101)," &
-- "STCTEST (00010110)," &
"ISC_NOOP (11100000)";
attribute INSTRUCTION_CAPTURE of xc2c32a : entity is "XXXXXX01" ;
attribute IDCODE_REGISTER of xc2c32a : entity is "XXXX0110111000011XXX000010010011";
attribute USERCODE_REGISTER of xc2c32a : entity is "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
attribute REGISTER_ACCESS of xc2c32a : entity is
"BYPASS (BYPASS)," &
"BYPASS (HIGHZ)," &
"BOUNDARY (SAMPLE)," &
"BOUNDARY (EXTEST)," &
"BOUNDARY (INTEST)," &
"DATAREG[266] (ISC_ENABLEOTF)," &
"DATAREG[266] (ISC_ENABLE)," &
"DATAREG[266] (ISC_SRAM_READ)," &
"DATAREG[266] (ISC_SRAM_WRITE)," &
"DATAREG[266] (ISC_ERASE)," &
"DATAREG[266] (ISC_PROGRAM)," &
"DATAREG[266] (ISC_READ)," &
"DATAREG[266] (ISC_INIT)," &
"DATAREG[266] (ISC_DISABLE)," &
"DATAREG[266] (TEST_ENABLE)," &
"DATAREG[266] (BULKPROG)," &
"DATAREG[266] (ERASE_ALL)," &
"DATAREG[266] (MVERIFY)," &
"DATAREG[266] (TEST_DISABLE)," &
-- "STC[] (STCTEST)," &
"ISC_DEFAULT[1] (ISC_NOOP)," &
"DEVICE_ID (IDCODE, USERCODE)," &
"ISC_DEFAULT[1] (ISC_ENABLE_CLAMP)";
attribute BOUNDARY_LENGTH of xc2c32a : entity is 97;
attribute BOUNDARY_REGISTER of xc2c32a : entity is
--
-- num cell port function safe [ccell disval rslt]
--
" 96 (BC_1, IO_0, INPUT, X)," &
" 95 (BC_1, IO_0, OUTPUT3, X, 94, 0,Z),"&
" 94 (BC_1, *, CONTROL, 0)," &
" 93 (BC_1, IO_1, INPUT, X)," &
" 92 (BC_1, IO_1, OUTPUT3, X, 91, 0,Z),"&
" 91 (BC_1, *, CONTROL, 0)," &
" 90 (BC_1, IO_2, INPUT, X)," &
" 89 (BC_1, IO_2, OUTPUT3, X, 88, 0,Z),"&
" 88 (BC_1, *, CONTROL, 0)," &
" 87 (BC_1, IO_3, INPUT, X)," &
" 86 (BC_1, IO_3, OUTPUT3, X, 85, 0,Z),"&
" 85 (BC_1, *, CONTROL, 0)," &
" 84 (BC_1, IO_4, INPUT, X)," &
" 83 (BC_1, IO_4, OUTPUT3, X, 82, 0,Z),"&
" 82 (BC_1, *, CONTROL, 0)," &
" 81 (BC_1, IO_5, INPUT, X)," &
" 80 (BC_1, IO_5, OUTPUT3, X, 79, 0,Z),"&
" 79 (BC_1, *, CONTROL, 0)," &
" 78 (BC_1, IO_6, INPUT, X)," &
" 77 (BC_1, IO_6, OUTPUT3, X, 76, 0,Z),"&
" 76 (BC_1, *, CONTROL, 0)," &
" 75 (BC_1, IO_7, INPUT, X)," &
" 74 (BC_1, IO_7, OUTPUT3, X, 73, 0,Z),"&
" 73 (BC_1, *, CONTROL, 0)," &
" 72 (BC_1, IO_8, INPUT, X)," &
" 71 (BC_1, IO_8, OUTPUT3, X, 70, 0,Z),"&
" 70 (BC_1, *, CONTROL, 0)," &
" 69 (BC_1, IO_9, INPUT, X)," &
" 68 (BC_1, IO_9, OUTPUT3, X, 67, 0,Z),"&
" 67 (BC_1, *, CONTROL, 0)," &
" 66 (BC_1, IO_10, INPUT, X)," &
" 65 (BC_1, IO_10, OUTPUT3, X, 64, 0,Z),"&
" 64 (BC_1, *, CONTROL, 0)," &
" 63 (BC_1, IO_11, INPUT, X)," &
" 62 (BC_1, IO_11, OUTPUT3, X, 61, 0,Z),"&
" 61 (BC_1, *, CONTROL, 0)," &
" 60 (BC_1, IO_12, INPUT, X)," &
" 59 (BC_1, IO_12, OUTPUT3, X, 58, 0,Z),"&
" 58 (BC_1, *, CONTROL, 0)," &
" 57 (BC_1, IO_13, INPUT, X)," &
" 56 (BC_1, IO_13, OUTPUT3, X, 55, 0,Z),"&
" 55 (BC_1, *, CONTROL, 0)," &
" 54 (BC_1, IO_14, INPUT, X)," &
" 53 (BC_1, IO_14, OUTPUT3, X, 52, 0,Z),"&
" 52 (BC_1, *, CONTROL, 0)," &
" 51 (BC_1, IO_15, INPUT, X)," &
" 50 (BC_1, IO_15, OUTPUT3, X, 49, 0,Z),"&
" 49 (BC_1, *, CONTROL, 0)," &
" 48 (BC_1, IO_17, INPUT, X)," &
" 47 (BC_1, IO_17, OUTPUT3, X, 46, 0,Z),"&
" 46 (BC_1, *, CONTROL, 0)," &
" 45 (BC_1, IO_18, INPUT, X)," &
" 44 (BC_1, IO_18, OUTPUT3, X, 43, 0,Z),"&
" 43 (BC_1, *, CONTROL, 0)," &
" 42 (BC_1, IO_19, INPUT, X)," &
" 41 (BC_1, IO_19, OUTPUT3, X, 40, 0,Z),"&
" 40 (BC_1, *, CONTROL, 0)," &
" 39 (BC_1, IO_20, INPUT, X)," &
" 38 (BC_1, IO_20, OUTPUT3, X, 37, 0,Z),"&
" 37 (BC_1, *, CONTROL, 0)," &
" 36 (BC_1, IO_21, INPUT, X)," &
" 35 (BC_1, IO_21, OUTPUT3, X, 34, 0,Z),"&
" 34 (BC_1, *, CONTROL, 0)," &
" 33 (BC_1, IO_22, INPUT, X)," &
" 32 (BC_1, IO_22, OUTPUT3, X, 31, 0,Z),"&
" 31 (BC_1, *, CONTROL, 0)," &
" 30 (BC_1, IO_23, INPUT, X)," &
" 29 (BC_1, IO_23, OUTPUT3, X, 28, 0,Z),"&
" 28 (BC_1, *, CONTROL, 0)," &
" 27 (BC_1, IO_24, INPUT, X)," &
" 26 (BC_1, IO_24, OUTPUT3, X, 25, 0,Z),"&
" 25 (BC_1, *, CONTROL, 0)," &
" 24 (BC_1, IO_25, INPUT, X)," &
" 23 (BC_1, IO_25, OUTPUT3, X, 22, 0,Z),"&
" 22 (BC_1, *, CONTROL, 0)," &
" 21 (BC_1, IO_26, INPUT, X)," &
" 20 (BC_1, IO_26, OUTPUT3, X, 19, 0,Z),"&
" 19 (BC_1, *, CONTROL, 0)," &
" 18 (BC_1, IO_27, INPUT, X)," &
" 17 (BC_1, IO_27, OUTPUT3, X, 16, 0,Z),"&
" 16 (BC_1, *, CONTROL, 0)," &
" 15 (BC_1, IO_28, INPUT, X)," &
" 14 (BC_1, IO_28, OUTPUT3, X, 13, 0,Z),"&
" 13 (BC_1, *, CONTROL, 0)," &
" 12 (BC_1, IO_29, INPUT, X)," &
" 11 (BC_1, IO_29, OUTPUT3, X, 10, 0,Z),"&
" 10 (BC_1, *, CONTROL, 0)," &
" 9 (BC_1, IO_30, INPUT, X)," &
" 8 (BC_1, IO_30, OUTPUT3, X, 7, 0,Z),"&
" 7 (BC_1, *, CONTROL, 0)," &
" 6 (BC_1, IO_31, INPUT, X)," &
" 5 (BC_1, IO_31, OUTPUT3, X, 4, 0,Z),"&
" 4 (BC_1, *, CONTROL, 0)," &
" 3 (BC_1, IO_32, INPUT, X)," &
" 2 (BC_1, IO_32, OUTPUT3, X, 1, 0,Z),"&
" 1 (BC_1, *, CONTROL, 0)," &
" 0 (BC_1, IN_16, INPUT, X)";
end xc2c32a;