-------------------------------------------------------------------------------
-- --
-- TI TMX320VC5509 16-Bit 144-pin Fixed-Point DSP with Boundary Scan --
-- --
-------------------------------------------------------------------------------
-- --
-- Supported Devices: TMS320VC5509PGE 144-pin LQFP Silicon Rev 2.0 only --
-- --
-------------------------------------------------------------------------------
-- --
-- Created by : Texas Instruments Incorporated --
-- Documentation : TMS320VC55x Users Guides --
-- BSDL Revision : 1.02 --
-- BSDL status : Preliminary --
-- Date created : 12/01/2001 --
-- Last modified : 1/03/2005 --
-- Changes made : Making SDA and SCL control as internal and keeping its --
-- safe value as Zero. Changing SDA and SCL output from --
-- OUTPUT3 -> OUTPUT2 --
-- --
-------------------------------------------------------------------------------
-- --
-- Notes: --
-- ====== --
-- This BSDL file represents VC5509 silicon revision 2.0 only. --
-- --
-- Initialization Requirements for Boundary Scan Test --
-- ---------------------------------------------------------------------------
-- The 5509 uses the JTAG port for boundary scan tests, emulation --
-- capability and factory test purposes. To use boundary scan test, --
-- the EMU0 and EMU1/OFF pins must be held LOW through a rising edge --
-- of the TRST- signal prior to the first scan. This operation --
-- selects the appropriate TAP control for boundary scan. If at any --
-- time during a boundary scan test a rising edge of TRST occurs when --
-- EMU0 or EMU1 are not low, a factory test mode may be selected --
-- preventing boundary scan test from being completed. For this reason, --
-- it is recommended that EMU0 and EMU1/OFF be pulled or driven low at --
-- all times during boundary scan test. --
-------------------------------------------------------------------------------
-- --
-- Device Pins not testable by Boundary Scan --
-- ---------------------------------------------------------------------------
-- --
-- The following pins cannot be tested through boundary scan: --
-- EMU0, EMU1/OFF, X2/CLKIN, X1, PLLEN, PU, DP, DN, RTCINX1, RTCINX2 --
-- --
-------------------------------------------------------------------------------
-- --
-- IMPORTANT NOTICE --
-- Texas Instruments Incorporated (TI) reserves the right to make changes --
-- to its products or to discontinue any semiconductor product or service --
-- without notice, and advises its customers to obtain the latest version --
-- of the relevant information to verify, before placing orders, that the --
-- information being relied on is current. --
-- --
-- TI warrants performance of its semiconductor products and related --
-- software to the specifications applicable at the time of sale in --
-- accordance with TI's standard warranty. Testing and other quality --
-- control techniques are utilized to the extent TI deems necessary to --
-- support this warranty. Specific testing of all parameters of each --
-- device is not necessarily performed, except those mandated by . --
-- government requirements --
-- Certain applications using semiconductor devices may involve potential --
-- risks of death, personal injury, or severe property or environmental --
-- damage ("Critical Applications"). --
-- --
-- TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, --
-- OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, --
-- DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. --
-- --
-- Inclusion of TI products in such applications is understood to be fully --
-- at the risk of the customer. Use of TI products in such applications --
-- requires the written approval of an appropriate TI officer. Questions --
-- concerning potential risk applications should be directed to TI through --
-- a local SC sales office. --
-- --
-- In order to minimize risks associated with the customer's applications, --
-- adequate design and operating safeguards should be provided by the --
-- customer to minimize inherent or procedural hazards. --
-- --
-- TI assumes no liability for applications assistance, customer product --
-- design, software performance, or infringement of patents or services --
-- described herein. Nor does TI warrant or represent that any license, --
-- either express or implied, is granted under any patent right, copyright, --
-- mask work right, or other intellectual property right of TI covering or --
-- relating to any combination, machine, or process in which such --
-- semiconductor products or services might be or are used. --
-- --
-- Copyright (c) 1999, Texas Instruments Incorporated --
-- --
--***************************************************************************--
--* W A R N I N G *--
--* *--
--* This BSDL file has been checked for correct syntax and semantics *--
--* using several commercial tools, but it has NOT been validated against *--
--* the device. Without validation many structural errors could be *--
--* present, leading to possible damage of the device when using its *--
--* boundary scan logic. *--
--* *--
--***************************************************************************--
entity TMX320VC5509 is
generic (PHYSICAL_PIN_MAP : string := "PGE");
port (
A : inout bit_vector(0 to 13);
D : inout bit_vector(0 to 15);
C0 : inout bit;
C1 : out bit;
C2 : inout bit;
C3 : inout bit;
C4 : inout bit;
C5 : inout bit;
C6 : inout bit;
C7 : inout bit;
C8 : inout bit;
C9 : inout bit;
C10 : inout bit;
C11 : inout bit;
C12 : inout bit;
C13 : inout bit;
C14 : inout bit;
GPIO0 : inout bit;
GPIO1 : inout bit;
GPIO2 : inout bit;
GPIO3 : inout bit;
GPIO4 : inout bit;
GPIO6 : inout bit;
GPIO7 : inout bit;
S10 : inout bit;
S11 : inout bit;
S12 : inout bit;
S13 : inout bit;
S14 : inout bit;
S15 : inout bit;
S20 : inout bit;
S21 : inout bit;
S22 : inout bit;
S23 : inout bit;
S24 : inout bit;
S25 : inout bit;
SCL : inout bit;
SDA : inout bit;
RESET : in bit;
INT0 : in bit;
INT1 : in bit;
INT2 : in bit;
INT3 : in bit;
INT4 : in bit;
PU : linkage bit;
DP : linkage bit;
DN : linkage bit;
XF : out bit;
TINOUT0 : inout bit;
CLKR0 : inout bit;
FSR0 : inout bit;
DR0 : in bit;
CLKX0 : inout bit;
FSX0 : inout bit;
DX0 : out bit;
RTCINX1 : linkage bit;
RTCINX2 : linkage bit;
X2_CLKIN : in bit;
X1 : linkage bit;
CLKOUT : out bit;
AIN : linkage bit_vector(0 to 1);
EMU0 : in bit;
EMU1_OFF : in bit;
TCK : in bit;
TDI : in bit;
TDO : out bit;
TMS : in bit;
TRST : in bit;
DVDD : linkage bit_vector(1 to 9);
CVDD : linkage bit_vector(1 to 9);
RVDD : linkage bit_vector(1 to 3);
VSS : linkage bit_vector(1 to 16);
USBVDD : linkage bit;
ADVSS : linkage bit;
ADVDD : linkage bit;
AVDD : linkage bit;
AVSS : linkage bit;
RDVDD : linkage bit;
RCVDD : linkage bit;
RDVSS : linkage bit;
RCVSS : linkage bit;
USBVSS : linkage bit);
--***************************************************************************--
use STD_1149_1_1994.all; -- Get standard attributes and definitions
attribute COMPONENT_CONFORMANCE of TMX320VC5509: entity is "STD_1149_1_1993";
attribute PIN_MAP of TMX320VC5509 : entity is PHYSICAL_PIN_MAP;
constant PGE : PIN_MAP_STRING :=
"A : (55,54,52,51,50,48,47,46,44,43,42,40,39,38)," &
"D : (57,58,59,61,62,63,65,66,67,69,70,71,74,75,76,77)," &
"C0 : 16," &
"C1 : 17," &
"C2 : 19," &
"C3 : 20," &
"C4 : 21," &
"C5 : 22," &
"C6 : 23," &
"C7 : 25," &
"C8 : 26," &
"C9 : 27," &
"C10 : 34," &
"C11 : 28," &
"C12 : 32," &
"C13 : 35," &
"C14 : 31," &
"GPIO0: 12," &
"GPIO1: 10," &
"GPIO2: 9," &
"GPIO3: 143," &
"GPIO4: 142," &
"GPIO6: 141," &
"GPIO7: 6," &
"S10 : 130," &
"S11 : 128," &
"S12 : 129," &
"S13 : 124," &
"S14 : 127," &
"S15 : 125," &
"S20 : 123," &
"S21 : 120," &
"S22 : 121," &
"S23 : 116," &
"S24 : 119," &
"S25 : 117," &
"SCL : 90," &
"SDA : 89," &
"RESET : 91," &
"INT0 : 93," &
"INT1 : 94," &
"INT2 : 96," &
"INT3 : 97," &
"INT4 : 99," &
"PU : 2," &
"DP : 3," &
"DN : 4," &
"XF : 101," &
"TINOUT0: 140," &
"CLKR0 : 137," &
"FSR0 : 136," &
"DR0 : 135," &
"CLKX0 : 134," &
"FSX0 : 133," &
"DX0 : 131," &
"RTCINX1: 112," &
"RTCINX2: 111," &
"X2_CLKIN: 13," &
"X1 : 14," &
"CLKOUT : 15," &
"AIN : (105,106)," &
"EMU0 : 79," &
"EMU1_OFF : 80," &
"TCK : 85," &
"TDI : 82," &
"TDO : 81," &
"TMS : 86," &
"TRST : 84," &
"DVDD : (8,24,49,56,72,88,98,126,139)," &
"CVDD : (18,29,41,68,78,83,95,118,132)," &
"RVDD : (30,53,87)," &
"VSS : (7,11,33,36,37,45,60,64,73,92,100,102,115,122,138,144)," &
"USBVDD : 5," &
"ADVSS : 103," &
"ADVDD : 104," &
"AVDD : 107," &
"AVSS : 108," &
"RDVDD : 109," &
"RCVDD : 110," &
"RDVSS : 113," &
"RCVSS : 114," &
"USBVSS : 1" ;
-- **************************************************************************--
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of TRST : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (25.00e6, BOTH);
attribute COMPLIANCE_PATTERNS of TMX320VC5509 : entity is
"(EMU1_OFF,EMU0)(00)";
attribute INSTRUCTION_LENGTH of TMX320VC5509 : entity is 6;
attribute INSTRUCTION_OPCODE of TMX320VC5509 : entity is
"EXTEST (000000), " &
"BYPASS (111111), " &
"SAMPLE (000101), " &
"IDCODE (010001), " &
"HIGHZ (010101) " ;
attribute INSTRUCTION_CAPTURE of TMX320VC5509 : entity is "XXXX01";
-- attribute REGISTER_ACCESS of TMX320VC5509 : entity is
-- "BOUNDARY (EXTEST, SAMPLE)," &
-- "BYPASS (BYPASS, HIGHZ) " ;
attribute IDCODE_REGISTER of TMX320VC5509 : entity is
"00001000000001010000000000101111";
-- attribute BOUNDARY_CELLS of TMX320VC5509 : entity is
-- "BC_1, BC_2";
attribute BOUNDARY_LENGTH of TMX320VC5509 : entity is 254;
attribute BOUNDARY_REGISTER of TMX320VC5509 : entity is
-------------------------------------------------------------------------------
-- --
-- CELL CELL PIN CELL CNTRL --
-- # NAME ,NAME ,TYPE , ,CELL --
-------------------------------------------------------------------------------
"0 (BC_1 ,* ,CONTROL ,1 ), " &
"1 (BC_2 ,RESET ,INPUT ,X ), " &
"2 (BC_2 ,INT4 ,INPUT ,X ), " &
"3 (BC_2 ,INT3 ,INPUT ,X ), " &
"4 (BC_2 ,INT2 ,INPUT ,X ), " &
"5 (BC_2 ,INT1 ,INPUT ,X ), " &
"6 (BC_2 ,INT0 ,INPUT ,X ), " &
"7 (BC_1 ,XF ,OUTPUT3 ,X ,0 ,1 ,Z), " &
"8 (BC_1 ,CLKOUT ,OUTPUT3 ,X ,0 ,1 ,Z), " &
"9 (BC_2 ,X2_CLKIN ,INPUT ,X ), " &
"10 (BC_1 ,* ,CONTROL ,1 ), " &
"11 (BC_1 ,TINOUT0 ,OUTPUT3 ,X ,10 ,1 ,Z), " &
"12 (BC_2 ,TINOUT0 ,INPUT ,X ), " &
"13 (BC_1 ,* ,INTERNAL,1 ), " &
"14 (BC_1 ,* ,INTERNAL,1 ), " &
"15 (BC_1 ,* ,INTERNAL,1 ), " &
"16 (BC_1 ,* ,INTERNAL,1 ), " &
"17 (BC_1 ,* ,INTERNAL,1 ), " &
"18 (BC_1 ,* ,INTERNAL,1 ), " &
"19 (BC_1 ,* ,INTERNAL,1 ), " &
"20 (BC_1 ,* ,INTERNAL,1 ), " &
"21 (BC_1 ,* ,INTERNAL,0 ), " &
"22 (BC_1 ,SCL ,OUTPUT2 ,1 ,22 ,1 ,Z), " &
"23 (BC_2 ,SCL ,INPUT ,X ), " &
"24 (BC_1 ,* ,INTERNAL,0 ), " &
"25 (BC_1 ,SDA ,OUTPUT2 ,1 ,25 ,1 ,Z), " &
"26 (BC_2 ,SDA ,INPUT ,X ), " &
"27 (BC_1 ,GPIO0 ,OUTPUT3 ,X ,43 ,1 ,Z), " &
"28 (BC_1 ,GPIO1 ,OUTPUT3 ,X ,44 ,1 ,Z), " &
"29 (BC_1 ,GPIO2 ,OUTPUT3 ,X ,45 ,1 ,Z), " &
"30 (BC_1 ,GPIO3 ,OUTPUT3 ,X ,46 ,1 ,Z), " &
"31 (BC_1 ,GPIO4 ,OUTPUT3 ,X ,47 ,1 ,Z), " &
"32 (BC_1 ,* ,INTERNAL,1 ), " &
"33 (BC_1 ,GPIO6 ,OUTPUT3 ,X ,49 ,1 ,Z), " &
"34 (BC_1 ,GPIO7 ,OUTPUT3 ,X ,50 ,1 ,Z), " &
"35 (BC_2 ,GPIO0 ,INPUT ,X ), " &
"36 (BC_2 ,GPIO1 ,INPUT ,X ), " &
"37 (BC_2 ,GPIO2 ,INPUT ,X ), " &
"38 (BC_2 ,GPIO3 ,INPUT ,X ), " &
"39 (BC_2 ,GPIO4 ,INPUT ,X ), " &
"40 (BC_1 ,* ,INTERNAL,1 ), " &
"41 (BC_2 ,GPIO6 ,INPUT ,X ), " &
"42 (BC_2 ,GPIO7 ,INPUT ,X ), " &
"43 (BC_1 ,* ,CONTROL ,1 ), " &
"44 (BC_1 ,* ,CONTROL ,1 ), " &
"45 (BC_1 ,* ,CONTROL ,1 ), " &
"46 (BC_1 ,* ,CONTROL ,1 ), " &
"47 (BC_1 ,* ,CONTROL ,1 ), " &
"48 (BC_1 ,* ,INTERNAL,1 ), " &
"49 (BC_1 ,* ,CONTROL ,1 ), " &
"50 (BC_1 ,* ,CONTROL ,1 ), " &
"51 (BC_1 ,* ,CONTROL ,1 ), " &
"52 (BC_1 ,* ,CONTROL ,1 ), " &
"53 (BC_1 ,* ,CONTROL ,1 ), " &
"54 (BC_1 ,* ,CONTROL ,1 ), " &
"55 (BC_1 ,* ,CONTROL ,1 ), " &
"56 (BC_1 ,* ,CONTROL ,1 ), " &
"57 (BC_1 ,S25 ,OUTPUT3 ,X ,51 ,1 ,Z), " &
"58 (BC_1 ,S24 ,OUTPUT3 ,X ,52 ,1 ,Z), " &
"59 (BC_1 ,S23 ,OUTPUT3 ,X ,53 ,1 ,Z), " &
"60 (BC_1 ,S22 ,OUTPUT3 ,X ,54 ,1 ,Z), " &
"61 (BC_1 ,S21 ,OUTPUT3 ,X ,55 ,1 ,Z), " &
"62 (BC_1 ,S20 ,OUTPUT3 ,X ,56 ,1 ,Z), " &
"63 (BC_2 ,S25 ,INPUT ,X ), " &
"64 (BC_2 ,S24 ,INPUT ,X ), " &
"65 (BC_2 ,S23 ,INPUT ,X ), " &
"66 (BC_2 ,S22 ,INPUT ,X ), " &
"67 (BC_2 ,S21 ,INPUT ,X ), " &
"68 (BC_2 ,S20 ,INPUT ,X ), " &
"69 (BC_1 ,* ,CONTROL ,1 ), " &
"70 (BC_1 ,* ,CONTROL ,1 ), " &
"71 (BC_1 ,* ,CONTROL ,1 ), " &
"72 (BC_1 ,* ,CONTROL ,1 ), " &
"73 (BC_1 ,* ,CONTROL ,1 ), " &
"74 (BC_1 ,* ,CONTROL ,1 ), " &
"75 (BC_1 ,S15 ,OUTPUT3 ,X ,69 ,1 ,Z), " &
"76 (BC_1 ,S14 ,OUTPUT3 ,X ,70 ,1 ,Z), " &
"77 (BC_1 ,S13 ,OUTPUT3 ,X ,71 ,1 ,Z), " &
"78 (BC_1 ,S12 ,OUTPUT3 ,X ,72 ,1 ,Z), " &
"79 (BC_1 ,S11 ,OUTPUT3 ,X ,73 ,1 ,Z), " &
"80 (BC_1 ,S10 ,OUTPUT3 ,X ,74 ,1 ,Z), " &
"81 (BC_2 ,S15 ,INPUT ,X ), " &
"82 (BC_2 ,S14 ,INPUT ,X ), " &
"83 (BC_2 ,S13 ,INPUT ,X ), " &
"84 (BC_2 ,S12 ,INPUT ,X ), " &
"85 (BC_2 ,S11 ,INPUT ,X ), " &
"86 (BC_2 ,S10 ,INPUT ,X ), " &
"87 (BC_1 ,* ,CONTROL ,1 ), " &
"88 (BC_1 ,FSX0 ,OUTPUT3 ,X ,87 ,1 ,Z), " &
"89 (BC_2 ,FSX0 ,INPUT ,X ), " &
"90 (BC_1 ,* ,CONTROL ,1 ), " &
"91 (BC_1 ,FSR0 ,OUTPUT3 ,X ,90 ,1 ,Z), " &
"92 (BC_2 ,FSR0 ,INPUT ,X ), " &
"93 (BC_1 ,* ,CONTROL ,1 ), " &
"94 (BC_1 ,DX0 ,OUTPUT3 ,X ,93 ,1 ,Z), " &
"95 (BC_2 ,DR0 ,INPUT ,X ), " &
"96 (BC_1 ,* ,CONTROL ,1 ), " &
"97 (BC_1 ,CLKX0 ,OUTPUT3 ,X ,96 ,1 ,Z), " &
"98 (BC_2 ,CLKX0 ,INPUT ,X ), " &
"99 (BC_1 ,* ,CONTROL ,1 ), " &
"100 (BC_1 ,CLKR0 ,OUTPUT3 ,X ,99 ,1 ,Z), " &
"101 (BC_2 ,CLKR0 ,INPUT ,X ), " &
"102 (BC_2 ,C0 ,INPUT ,X ), " &
"103 (BC_1 ,* ,CONTROL ,1 ), " &
"104 (BC_1 ,C0 ,OUTPUT3 ,X ,103 ,1 ,Z), " &
"105 (BC_1 ,* ,CONTROL ,1 ), " &
"106 (BC_1 ,C1 ,OUTPUT3 ,X ,105 ,1 ,Z), " &
"107 (BC_2 ,C2 ,INPUT ,X ), " &
"108 (BC_1 ,* ,CONTROL ,1 ), " &
"109 (BC_1 ,C2 ,OUTPUT3 ,X ,108 ,1 ,Z), " &
"110 (BC_2 ,C3 ,INPUT ,X ), " &
"111 (BC_1 ,* ,CONTROL ,1 ), " &
"112 (BC_1 ,C3 ,OUTPUT3 ,X ,111 ,1 ,Z), " &
"113 (BC_2 ,C4 ,INPUT ,X ), " &
"114 (BC_1 ,* ,CONTROL ,1 ), " &
"115 (BC_1 ,C4 ,OUTPUT3 ,X ,114 ,1 ,Z), " &
"116 (BC_2 ,C5 ,INPUT ,X ), " &
"117 (BC_1 ,* ,CONTROL ,1 ), " &
"118 (BC_1 ,C5 ,OUTPUT3 ,X ,117 ,1 ,Z), " &
"119 (BC_2 ,C6 ,INPUT ,X ), " &
"120 (BC_1 ,* ,CONTROL ,1 ), " &
"121 (BC_1 ,C6 ,OUTPUT3 ,X ,120 ,1 ,Z), " &
"122 (BC_2 ,C7 ,INPUT ,X ), " &
"123 (BC_1 ,* ,CONTROL ,1 ), " &
"124 (BC_1 ,C7 ,OUTPUT3 ,X ,123 ,1 ,Z), " &
"125 (BC_2 ,C8 ,INPUT ,X ), " &
"126 (BC_1 ,* ,CONTROL ,1 ), " &
"127 (BC_1 ,C8 ,OUTPUT3 ,X ,126 ,1 ,Z), " &
"128 (BC_2 ,C9 ,INPUT ,X ), " &
"129 (BC_1 ,* ,CONTROL ,1 ), " &
"130 (BC_1 ,C9 ,OUTPUT3 ,X ,129 ,1 ,Z), " &
"131 (BC_2 ,C10 ,INPUT ,X ), " &
"132 (BC_1 ,* ,CONTROL ,1 ), " &
"133 (BC_1 ,C10 ,OUTPUT3 ,X ,132 ,1 ,Z), " &
"134 (BC_2 ,C11 ,INPUT ,X ), " &
"135 (BC_1 ,* ,CONTROL ,1 ), " &
"136 (BC_1 ,C11 ,OUTPUT3 ,X ,135 ,1 ,Z), " &
"137 (BC_2 ,C12 ,INPUT ,X ), " &
"138 (BC_1 ,* ,CONTROL ,1 ), " &
"139 (BC_1 ,C12 ,OUTPUT3 ,X ,138 ,1 ,Z), " &
"140 (BC_2 ,C13 ,INPUT ,X ), " &
"141 (BC_1 ,* ,CONTROL ,1 ), " &
"142 (BC_1 ,C13 ,OUTPUT3 ,X ,141 ,1 ,Z), " &
"143 (BC_2 ,C14 ,INPUT ,X ), " &
"144 (BC_1 ,* ,CONTROL ,1 ), " &
"145 (BC_1 ,C14 ,OUTPUT3 ,X ,144 ,1 ,Z), " &
"146 (BC_2 ,D(0) ,INPUT ,X ), " &
"147 (BC_2 ,D(1) ,INPUT ,X ), " &
"148 (BC_2 ,D(2) ,INPUT ,X ), " &
"149 (BC_2 ,D(3) ,INPUT ,X ), " &
"150 (BC_2 ,D(4) ,INPUT ,X ), " &
"151 (BC_2 ,D(5) ,INPUT ,X ), " &
"152 (BC_2 ,D(6) ,INPUT ,X ), " &
"153 (BC_2 ,D(7) ,INPUT ,X ), " &
"154 (BC_2 ,D(8) ,INPUT ,X ), " &
"155 (BC_2 ,D(9) ,INPUT ,X ), " &
"156 (BC_2 ,D(10) ,INPUT ,X ), " &
"157 (BC_2 ,D(11) ,INPUT ,X ), " &
"158 (BC_2 ,D(12) ,INPUT ,X ), " &
"159 (BC_2 ,D(13) ,INPUT ,X ), " &
"160 (BC_2 ,D(14) ,INPUT ,X ), " &
"161 (BC_2 ,D(15) ,INPUT ,X ), " &
"162 (BC_1 ,* ,CONTROL ,1 ), " &
"163 (BC_1 ,* ,CONTROL ,1 ), " &
"164 (BC_1 ,* ,CONTROL ,1 ), " &
"165 (BC_1 ,* ,CONTROL ,1 ), " &
"166 (BC_1 ,* ,CONTROL ,1 ), " &
"167 (BC_1 ,* ,CONTROL ,1 ), " &
"168 (BC_1 ,* ,CONTROL ,1 ), " &
"169 (BC_1 ,* ,CONTROL ,1 ), " &
"170 (BC_1 ,* ,CONTROL ,1 ), " &
"171 (BC_1 ,* ,CONTROL ,1 ), " &
"172 (BC_1 ,* ,CONTROL ,1 ), " &
"173 (BC_1 ,* ,CONTROL ,1 ), " &
"174 (BC_1 ,* ,CONTROL ,1 ), " &
"175 (BC_1 ,* ,CONTROL ,1 ), " &
"176 (BC_1 ,* ,CONTROL ,1 ), " &
"177 (BC_1 ,* ,CONTROL ,1 ), " &
"178 (BC_1 ,D(0) ,OUTPUT3 ,X ,162 ,1 ,Z), " &
"179 (BC_1 ,D(1) ,OUTPUT3 ,X ,163 ,1 ,Z), " &
"180 (BC_1 ,D(2) ,OUTPUT3 ,X ,164 ,1 ,Z), " &
"181 (BC_1 ,D(3) ,OUTPUT3 ,X ,165 ,1 ,Z), " &
"182 (BC_1 ,D(4) ,OUTPUT3 ,X ,166 ,1 ,Z), " &
"183 (BC_1 ,D(5) ,OUTPUT3 ,X ,167 ,1 ,Z), " &
"184 (BC_1 ,D(6) ,OUTPUT3 ,X ,168 ,1 ,Z), " &
"185 (BC_1 ,D(7) ,OUTPUT3 ,X ,169 ,1 ,Z), " &
"186 (BC_1 ,D(8) ,OUTPUT3 ,X ,170 ,1 ,Z), " &
"187 (BC_1 ,D(9) ,OUTPUT3 ,X ,171 ,1 ,Z), " &
"188 (BC_1 ,D(10) ,OUTPUT3 ,X ,172 ,1 ,Z), " &
"189 (BC_1 ,D(11) ,OUTPUT3 ,X ,173 ,1 ,Z), " &
"190 (BC_1 ,D(12) ,OUTPUT3 ,X ,174 ,1 ,Z), " &
"191 (BC_1 ,D(13) ,OUTPUT3 ,X ,175 ,1 ,Z), " &
"192 (BC_1 ,D(14) ,OUTPUT3 ,X ,176 ,1 ,Z), " &
"193 (BC_1 ,D(15) ,OUTPUT3 ,X ,177 ,1 ,Z), " &
"194 (BC_1 ,* ,INTERNAL,1 ), " &
"195 (BC_1 ,* ,INTERNAL,1 ), " &
"196 (BC_2 ,A(0) ,INPUT ,X ), " &
"197 (BC_2 ,A(1) ,INPUT ,X ), " &
"198 (BC_2 ,A(2) ,INPUT ,X ), " &
"199 (BC_2 ,A(3) ,INPUT ,X ), " &
"200 (BC_2 ,A(4) ,INPUT ,X ), " &
"201 (BC_2 ,A(5) ,INPUT ,X ), " &
"202 (BC_2 ,A(6) ,INPUT ,X ), " &
"203 (BC_2 ,A(7) ,INPUT ,X ), " &
"204 (BC_2 ,A(8) ,INPUT ,X ), " &
"205 (BC_2 ,A(9) ,INPUT ,X ), " &
"206 (BC_2 ,A(10) ,INPUT ,X ), " &
"207 (BC_2 ,A(11) ,INPUT ,X ), " &
"208 (BC_2 ,A(12) ,INPUT ,X ), " &
"209 (BC_2 ,A(13) ,INPUT ,X ), " &
"210 (BC_1 ,* ,INTERNAL,1 ), " &
"211 (BC_1 ,* ,INTERNAL,1 ), " &
"212 (BC_1 ,* ,CONTROL ,1 ), " &
"213 (BC_1 ,* ,CONTROL ,1 ), " &
"214 (BC_1 ,* ,CONTROL ,1 ), " &
"215 (BC_1 ,* ,CONTROL ,1 ), " &
"216 (BC_1 ,* ,CONTROL ,1 ), " &
"217 (BC_1 ,* ,CONTROL ,1 ), " &
"218 (BC_1 ,* ,CONTROL ,1 ), " &
"219 (BC_1 ,* ,CONTROL ,1 ), " &
"220 (BC_1 ,* ,CONTROL ,1 ), " &
"221 (BC_1 ,* ,CONTROL ,1 ), " &
"222 (BC_1 ,* ,CONTROL ,1 ), " &
"223 (BC_1 ,* ,CONTROL ,1 ), " &
"224 (BC_1 ,* ,CONTROL ,1 ), " &
"225 (BC_1 ,* ,CONTROL ,1 ), " &
"226 (BC_1 ,* ,INTERNAL,1 ), " &
"227 (BC_1 ,* ,INTERNAL,1 ), " &
"228 (BC_1 ,* ,INTERNAL,1 ), " &
"229 (BC_1 ,* ,INTERNAL,1 ), " &
"230 (BC_1 ,* ,INTERNAL,1 ), " &
"231 (BC_1 ,* ,INTERNAL,1 ), " &
"232 (BC_1 ,* ,INTERNAL,1 ), " &
"233 (BC_1 ,A(0) ,OUTPUT3 ,X ,212 ,1 ,Z), " &
"234 (BC_1 ,A(1) ,OUTPUT3 ,X ,213 ,1 ,Z), " &
"235 (BC_1 ,A(2) ,OUTPUT3 ,X ,214 ,1 ,Z), " &
"236 (BC_1 ,A(3) ,OUTPUT3 ,X ,215 ,1 ,Z), " &
"237 (BC_1 ,A(4) ,OUTPUT3 ,X ,216 ,1 ,Z), " &
"238 (BC_1 ,A(5) ,OUTPUT3 ,X ,217 ,1 ,Z), " &
"239 (BC_1 ,A(6) ,OUTPUT3 ,X ,218 ,1 ,Z), " &
"240 (BC_1 ,A(7) ,OUTPUT3 ,X ,219 ,1 ,Z), " &
"241 (BC_1 ,A(8) ,OUTPUT3 ,X ,220 ,1 ,Z), " &
"242 (BC_1 ,A(9) ,OUTPUT3 ,X ,221 ,1 ,Z), " &
"243 (BC_1 ,A(10) ,OUTPUT3 ,X ,222 ,1 ,Z), " &
"244 (BC_1 ,A(11) ,OUTPUT3 ,X ,223 ,1 ,Z), " &
"245 (BC_1 ,A(12) ,OUTPUT3 ,X ,224 ,1 ,Z), " &
"246 (BC_1 ,A(13) ,OUTPUT3 ,X ,225 ,1 ,Z), " &
"247 (BC_1 ,* ,INTERNAL,1 ), " &
"248 (BC_1 ,* ,INTERNAL,1 ), " &
"249 (BC_1 ,* ,INTERNAL,1 ), " &
"250 (BC_1 ,* ,INTERNAL,1 ), " &
"251 (BC_1 ,* ,INTERNAL,1 ), " &
"252 (BC_1 ,* ,INTERNAL,1 ), " &
"253 (BC_1 ,* ,INTERNAL,1 ) ";
end TMX320VC5509;