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BSDL File: DLPC300 Download View details  


-----------------------------------------------------------------------------------
-- DATE & TIME    :  Tue Jan 10 10:21:19 2012
-- File Type      :  BSDL Description for Top-Level Entity DLPC300
-----------------------------------------------------------------------------------

 entity DLPC300 is 

    generic(PHYSICAL_PIN_MAP : string := "DW"); 

    port (
              CMP_OUT              : in           bit;
              CMP_PWM              : out          bit;
              DATEN                : in           bit;
              RESERVED             : in           bit;
              DMD_D0               : out          bit;
              DMD_D1               : out          bit;
              DMD_D10              : out          bit;
              DMD_D11              : out          bit;
              DMD_D12              : out          bit;
              DMD_D13              : out          bit;
              DMD_D14              : out          bit;
              DMD_D2               : out          bit;
              DMD_D3               : out          bit;
              DMD_D4               : out          bit;
              DMD_D5               : out          bit;
              DMD_D6               : out          bit;
              DMD_D7               : out          bit;
              DMD_D8               : out          bit;
              DMD_D9               : out          bit;
              DMD_DRC_BUS          : out          bit;
              DMD_DRC_OE           : out          bit;
              DMD_DRC_STRB         : out          bit;
              DMD_DCLK             : out          bit;
              DMD_LOADB            : out          bit;
              DMD_PWR_EN           : inout        bit;
              DMD_SAC_BUS          : out          bit;
              DMD_SAC_CLK          : out          bit;
              DMD_SCTRL            : out          bit;
              DMD_TRC              : out          bit;
              CMP_PWR              : inout        bit;
              RPWM                 : out          bit;
              GPWM                 : out          bit;
              BPWM                 : out          bit;
              INIT_DONE            : inout        bit;
              RESERVED             : inout        bit;
              HSYNC                : in           bit;
              TEST_EN              : in           bit;
              LED_ENABLE           : in           bit;
              LED_SEL_0            : inout        bit;
              LED_SEL_1            : inout        bit;
              LEDDRV_ON            : inout        bit;
              MEM_A0               : out          bit;
              MEM_A1               : out          bit;
              MEM_A10              : out          bit;
              MEM_A11              : out          bit;
              MEM_A12              : out          bit;
              MEM_A2               : out          bit;
              MEM_A3               : out          bit;
              MEM_A4               : out          bit;
              MEM_A5               : out          bit;
              MEM_A6               : out          bit;
              MEM_A7               : out          bit;
              MEM_A8               : out          bit;
              MEM_A9               : out          bit;
              MEM_BA0              : out          bit;
              MEM_BA1              : out          bit;
              MEM_CAS              : out          bit;
              MEM_CKE              : out          bit;
              MEM_CLK_P            : out          bit;
              MEM_CLK_N            : out          bit;
              MEM_CS               : out          bit;
              MEM_DQ0              : inout        bit;
              MEM_DQ1              : inout        bit;
              MEM_DQ10             : inout        bit;
              MEM_DQ11             : inout        bit;
              MEM_DQ12             : inout        bit;
              MEM_DQ13             : inout        bit;
              MEM_DQ14             : inout        bit;
              MEM_DQ15             : inout        bit;
              MEM_DQ2              : inout        bit;
              MEM_DQ3              : inout        bit;
              MEM_DQ4              : inout        bit;
              MEM_DQ5              : inout        bit;
              MEM_DQ6              : inout        bit;
              MEM_DQ7              : inout        bit;
              MEM_DQ8              : inout        bit;
              MEM_DQ9              : inout        bit;
              MEM_LDM              : out          bit;
              MEM_LDQS             : inout        bit;
              MEM_RAS              : out          bit;
              MEM_UDM              : out          bit;
              MEM_UDQS             : inout        bit;
              MEM_WE               : out          bit;
              PCLK                 : in           bit;
              PDATA[0]             : inout        bit;
              PDATA[1]             : inout        bit;
              PDATA[10]            : inout        bit;
              PDATA[11]            : inout        bit;
              PDATA[12]            : inout        bit;
              PDATA[13]            : inout        bit;
              PDATA[14]            : inout        bit;
              PDATA[15]            : inout        bit;
              PDATA[16]            : inout        bit;
              PDATA[17]            : inout        bit;
              PDATA[18]            : inout        bit;
              PDATA[19]            : inout        bit;
              PDATA[2]             : inout        bit;
              PDATA[20]            : inout        bit;
              PDATA[21]            : inout        bit;
              PDATA[22]            : inout        bit;
              PDATA[23]            : inout        bit;
              PDATA[3]             : inout        bit;
              PDATA[4]             : inout        bit;
              PDATA[5]             : inout        bit;
              PDATA[6]             : inout        bit;
              PDATA[7]             : inout        bit;
              PDATA[8]             : inout        bit;
              PDATA[9]             : inout        bit;
              PDM                  : inout        bit;
              PLL_REFCLK_I         : in           bit;
              PARK                 : in           bit;
              RESET                : in           bit;
              SCL                  : inout        bit;
              SDA                  : inout        bit;
              SPICLK               : inout        bit;
              SPICS0               : inout        bit;
              RESERVED             : out          bit;
              SPIDIN               : in           bit;
              SPIDOUT              : inout        bit;
              RD_BUF0              : inout        bit;
              BUFFER_SWAP          : inout        bit;
              PATTERN_INVERT       : inout        bit;
              RED_EN               : inout        bit;
              GREEN_EN             : inout        bit;
              BLUE_EN              : inout        bit;
              OUTPUT_TRIGGER       : inout        bit;
              RD_BUF1/I2C_ADDR_SEL : inout        bit;
              VSYNC                : in           bit;
              JTAGTCK              : in           bit;
              JTAGTDI              : in           bit;
              JTAGTMS              : in           bit;
              JTAGTDO              : out          bit;
              JTAGRST              : in           bit;
              PLL_REFCLK_O         : linkage bit 
         ); 

    use STD_1149_1_2001.all;

    attribute COMPONENT_CONFORMANCE of DLPC300 : entity is "STD_1149_1_2001";

    attribute PIN_MAP of DLPC300 : entity is PHYSICAL_PIN_MAP; 

    constant DW : PIN_MAP_STRING := 
       "CMP_OUT: A6," & 
       "CMP_PWM: B7," & 
       "DATEN: G15," & 
       "RESERVED: B10," & 
       "DMD_D0: M15," & 
       "DMD_D1: N14," & 
       "DMD_D10: P11," & 
       "DMD_D11: R11," & 
       "DMD_D12: N10," & 
       "DMD_D13: P10," & 
       "DMD_D14: R10," & 
       "DMD_D2: M14," & 
       "DMD_D3: N15," & 
       "DMD_D4: P13," & 
       "DMD_D5: P14," & 
       "DMD_D6: P15," & 
       "DMD_D7: R15," & 
       "DMD_D8: R12," & 
       "DMD_D9: N11," & 
       "DMD_DRC_BUS: L13," & 
       "DMD_DRC_OE: M13," & 
       "DMD_DRC_STRB: K13," & 
       "DMD_DCLK: N13," & 
       "DMD_LOADB: R13," & 
       "DMD_PWR_EN: K14," & 
       "DMD_SAC_BUS: L15," & 
       "DMD_SAC_CLK: L14," & 
       "DMD_SCTRL: R14," & 
       "DMD_TRC: P12," & 
       "CMP_PWR: P5," & 
       "RPWM: N8," & 
       "GPWM: P9," & 
       "BPWM: R8," & 
       "INIT_DONE: C9," & 
       "RESERVED: B9," & 
       "HSYNC: H13," & 
       "TEST_EN: A9," & 
       "LED_ENABLE: A11," & 
       "LED_SEL_0: R6," & 
       "LED_SEL_1: N6," & 
       "LEDDRV_ON: P7," & 
       "MEM_A0: P1," & 
       "MEM_A1: R3," & 
       "MEM_A10: P2," & 
       "MEM_A11: B3," & 
       "MEM_A12: D3," & 
       "MEM_A2: R1," & 
       "MEM_A3: R2," & 
       "MEM_A4: A1," & 
       "MEM_A5: B1," & 
       "MEM_A6: A2," & 
       "MEM_A7: B2," & 
       "MEM_A8: D2," & 
       "MEM_A9: A3," & 
       "MEM_BA0: M3," & 
       "MEM_BA1: P3," & 
       "MEM_CAS: R4," & 
       "MEM_CKE: C1," & 
       "MEM_CLK_P: D1," & 
       "MEM_CLK_N: E1," & 
       "MEM_CS: J3," & 
       "MEM_DQ0: N1," & 
       "MEM_DQ1: M2," & 
       "MEM_DQ10: H3," & 
       "MEM_DQ11: F3," & 
       "MEM_DQ12: F1," & 
       "MEM_DQ13: E2," & 
       "MEM_DQ14: F2," & 
       "MEM_DQ15: E3," & 
       "MEM_DQ2: M1," & 
       "MEM_DQ3: L3," & 
       "MEM_DQ4: L2," & 
       "MEM_DQ5: K2," & 
       "MEM_DQ6: L1," & 
       "MEM_DQ7: K1," & 
       "MEM_DQ8: H2," & 
       "MEM_DQ9: G2," & 
       "MEM_LDM: J1," & 
       "MEM_LDQS: J2," & 
       "MEM_RAS: P4," & 
       "MEM_UDM: H1," & 
       "MEM_UDQS: G1," & 
       "MEM_WE: R5," & 
       "PCLK: D13," & 
       "PDATA[0]: G14," & 
       "PDATA[1]: G13," & 
       "PDATA[10]: C15," & 
       "PDATA[11]: C14," & 
       "PDATA[12]: C13," & 
       "PDATA[13]: B15," & 
       "PDATA[14]: B14," & 
       "PDATA[15]: A15," & 
       "PDATA[16]: A14," & 
       "PDATA[17]: B13," & 
       "PDATA[18]: A13," & 
       "PDATA[19]: C12," & 
       "PDATA[2]: F15," & 
       "PDATA[20]: B12," & 
       "PDATA[21]: A12," & 
       "PDATA[22]: C11," & 
       "PDATA[23]: B11," & 
       "PDATA[3]: F14," & 
       "PDATA[4]: F13," & 
       "PDATA[5]: E15," & 
       "PDATA[6]: E14," & 
       "PDATA[7]: E13," & 
       "PDATA[8]: D15," & 
       "PDATA[9]: D14," & 
       "PDM: H15," & 
       "PLL_REFCLK_I: K15," & 
       "PARK: B8," & 
       "RESET: J14," & 
       "SCL: A10," & 
       "SDA: C10," & 
       "SPICLK: A4," & 
       "SPICS0 : A5," & 
       "RESERVED: C6," & 
       "SPIDIN: B4," & 
       "SPIDOUT: C5," & 
       "RD_BUF0: B6," & 
       "BUFFER_SWAP: A8," & 
       "PATTERN_INVERT: C7," & 
       "RED_EN: B5," & 
       "GREEN_EN: A7," & 
       "BLUE_EN: C8," & 
       "OUTPUT_TRIGGER: N9," & 
       "RD_BUF1/I2C_ADDR_SEL: R9," & 
       "VSYNC: H14," & 
       "JTAGTCK: N5," & 
       "JTAGTDI: P6," & 
       "JTAGTMS: N7," & 
       "JTAGTDO: R7," & 
       "JTAGRST: P8," & 
       "PLL_REFCLK_O: J15";

    attribute PORT_GROUPING of DLPC300 : entity is

      "Differential_Voltage  ( (MEM_CLK_P, MEM_CLK_N)) " ;

    attribute TAP_SCAN_IN of JTAGTDI : signal is true; 
    attribute TAP_SCAN_MODE of JTAGTMS : signal is true; 
    attribute TAP_SCAN_OUT of JTAGTDO : signal is true; 
    attribute TAP_SCAN_CLOCK of JTAGTCK : signal is (1.00000000e+07, BOTH); 
    attribute TAP_SCAN_RESET of JTAGRST : signal is true; 

    attribute INSTRUCTION_LENGTH of DLPC300 : entity is 4;
    attribute INSTRUCTION_OPCODE of DLPC300 : entity is 
        "extest (0000),"  & 
        "bypass (1111),"  & 
        "sample (0001),"  & 
        "preload (0001),"  & 
        "highz (0010),"  & 
        "idcode (0011),"  & 
        "mems_read_margin_instr (0100),"  & 
        "mbist_reset (0101),"  & 
        "mbist_instr (0110),"  & 
        "algsel_instr_1 (0111),"  & 
        "algsel_instr_2 (1000),"  & 
        "algsel_instr_3 (1001),"  & 
        "algsel_instr_4 (1010),"  & 
        "algsel_instr_5 (1011),"  & 
        "algsel_instr_6 (1100),"  & 
        "algsel_instr_7 (1101),"  & 
        "retention_instr (1110)"; 

    attribute INSTRUCTION_CAPTURE of DLPC300 : entity is "0001";
    attribute IDCODE_REGISTER of DLPC300 : entity is 
        "0000"  &                -- Version Number 
        "0000000000010101"  &    -- Part Number 
        "00101111001"  &         -- Manufacturer ID 
        "1";                     -- Required by IEEE Std. 1149.1-1990 

    attribute REGISTER_ACCESS of DLPC300 : entity is 
        "BOUNDARY (extest, sample, preload), " & 
        "DEVICE_ID (idcode), " & 
        "BYPASS (bypass, highz, mbist_reset), " & 
        "algsel_reg_1[6] (algsel_instr_1), " & 
        "algsel_reg_2[6] (algsel_instr_2), " & 
        "algsel_reg_3[6] (algsel_instr_3), " & 
        "algsel_reg_4[6] (algsel_instr_4), " & 
        "algsel_reg_5[6] (algsel_instr_5), " & 
        "algsel_reg_6[6] (algsel_instr_6), " & 
        "algsel_reg_7[6] (algsel_instr_7), " & 
        "mems_read_margin_reg[315] (mems_read_margin_instr), " & 
        "mbist_reg[14] (mbist_instr), " & 
        "retention_reg[14] (retention_instr)"; 

    attribute BOUNDARY_LENGTH of DLPC300 : entity is 245;
    attribute BOUNDARY_REGISTER of DLPC300 : entity is 
      --- num            cell                 port      function   safe  [ccell  disval  rslt]
       "0    (           bc_1,          MEM_CLK_P,      output3,     X,      1,      1,    Z)," & 
       "1    (           bc_1,                   *,      control,     1)," & 
       "2    (           bc_7,           MEM_DQ13,        bidir,     X,      3,      1,    Z)," & 
       "3    (           bc_2,                   *,      control,     1)," & 
       "4    (           bc_7,           MEM_DQ15,        bidir,     X,      5,      1,    Z)," & 
       "5    (           bc_2,                   *,      control,     1)," & 
       "6    (           bc_7,           MEM_DQ14,        bidir,     X,      7,      1,    Z)," & 
       "7    (           bc_2,                   *,      control,     1)," & 
       "8    (           bc_7,           MEM_DQ12,        bidir,     X,      9,      1,    Z)," & 
       "9    (           bc_2,                   *,      control,     1)," & 
       "10   (           bc_7,           MEM_DQ11,        bidir,     X,     11,      1,    Z)," & 
       "11   (           bc_2,                   *,      control,     1)," & 
       "12   (           bc_7,            MEM_DQ9,        bidir,     X,     13,      1,    Z)," & 
       "13   (           bc_2,                   *,      control,     1)," & 
       "14   (           bc_7,           MEM_UDQS,        bidir,     X,     15,      1,    Z)," & 
       "15   (           bc_2,                   *,      control,     1)," & 
       "16   (           bc_7,            MEM_DQ8,        bidir,     X,     17,      1,    Z)," & 
       "17   (           bc_2,                   *,      control,     1)," & 
       "18   (           bc_1,            MEM_UDM,      output3,     X,     19,      1,    Z)," & 
       "19   (           bc_1,                   *,      control,     1)," & 
       "20   (           bc_7,           MEM_LDQS,        bidir,     X,     21,      1,    Z)," & 
       "21   (           bc_2,                   *,      control,     1)," & 
       "22   (           bc_1,            MEM_LDM,      output3,     X,     23,      1,    Z)," & 
       "23   (           bc_1,                   *,      control,     1)," & 
       "24   (           bc_7,           MEM_DQ10,        bidir,     X,     25,      1,    Z)," & 
       "25   (           bc_2,                   *,      control,     1)," & 
       "26   (           bc_1,            MEM_CS,      output3,     X,     27,      1,    Z)," & 
       "27   (           bc_1,                   *,      control,     1)," & 
       "28   (           bc_7,                   *,     internal,     X)," & 
       "29   (           bc_2,                   *,     internal,     X)," & 
       "30   (           bc_7,            MEM_DQ5,        bidir,     X,     31,      1,    Z)," & 
       "31   (           bc_2,                   *,      control,     1)," & 
       "32   (           bc_7,            MEM_DQ7,        bidir,     X,     33,      1,    Z)," & 
       "33   (           bc_2,                   *,      control,     1)," & 
       "34   (           bc_7,            MEM_DQ4,        bidir,     X,     35,      1,    Z)," & 
       "35   (           bc_2,                   *,      control,     1)," & 
       "36   (           bc_7,            MEM_DQ6,        bidir,     X,     37,      1,    Z)," & 
       "37   (           bc_2,                   *,      control,     1)," & 
       "38   (           bc_7,            MEM_DQ1,        bidir,     X,     39,      1,    Z)," & 
       "39   (           bc_2,                   *,      control,     1)," & 
       "40   (           bc_7,            MEM_DQ2,        bidir,     X,     41,      1,    Z)," & 
       "41   (           bc_2,                   *,      control,     1)," & 
       "42   (           bc_7,            MEM_DQ3,        bidir,     X,     43,      1,    Z)," & 
       "43   (           bc_2,                   *,      control,     1)," & 
       "44   (           bc_1,                   *,     internal,     X)," & 
       "45   (           bc_1,            MEM_BA0,      output3,     X,     46,      1,    Z)," & 
       "46   (           bc_1,                   *,      control,     1)," & 
       "47   (           bc_1,             MEM_A0,      output3,     X,     48,      1,    Z)," & 
       "48   (           bc_1,                   *,      control,     1)," & 
       "49   (           bc_7,            MEM_DQ0,        bidir,     X,     50,      1,    Z)," & 
       "50   (           bc_2,                   *,      control,     1)," & 
       "51   (           bc_1,             MEM_A2,      output3,     X,     52,      1,    Z)," & 
       "52   (           bc_1,                   *,      control,     1)," & 
       "53   (           bc_1,             MEM_A3,      output3,     X,     54,      1,    Z)," & 
       "54   (           bc_1,                   *,      control,     1)," & 
       "55   (           bc_1,            MEM_A10,      output3,     X,     56,      1,    Z)," & 
       "56   (           bc_1,                   *,      control,     1)," & 
       "57   (           bc_1,             MEM_A1,      output3,     X,     58,      1,    Z)," & 
       "58   (           bc_1,                   *,      control,     1)," & 
       "59   (           bc_1,            MEM_BA1,      output3,     X,     60,      1,    Z)," & 
       "60   (           bc_1,                   *,      control,     1)," & 
       "61   (           bc_1,           MEM_CAS,      output3,     X,     62,      1,    Z)," & 
       "62   (           bc_1,                   *,      control,     1)," & 
       "63   (           bc_1,           MEM_RAS,      output3,     X,     64,      1,    Z)," & 
       "64   (           bc_1,                   *,      control,     1)," & 
       "65   (           bc_1,            MEM_WE,      output3,     X,     66,      1,    Z)," & 
       "66   (           bc_1,                   *,      control,     1)," & 
       "67   (           bc_7,           LED_SEL_1,        bidir,     X,     68,      1,    Z)," & 
       "68   (           bc_2,                   *,      control,     1)," & 
       "69   (           bc_7,         CMP_PWR,        bidir,     X,     70,      1,    Z)," & 
       "70   (           bc_2,                   *,      control,     1)," & 
       "71   (           bc_7,           LED_SEL_0,        bidir,     X,     72,      1,    Z)," & 
       "72   (           bc_2,                   *,      control,     1)," & 
       "73   (           bc_1,          RPWM,      output3,     X,     74,      1,    Z)," & 
       "74   (           bc_1,                   *,      control,     1)," & 
       "75   (           bc_7,           LEDDRV_ON,        bidir,     X,     76,      1,    Z)," & 
       "76   (           bc_2,                   *,      control,     1)," & 
       "77   (           bc_1,          BPWM,      output3,     X,     78,      1,    Z)," & 
       "78   (           bc_1,                   *,      control,     1)," & 
       "79   (           bc_7,             OUTPUT_TRIGGER,        bidir,     X,     80,      1,    Z)," & 
       "80   (           bc_2,                   *,      control,     1)," & 
       "81   (           bc_7,             RD_BUF1/I2C_ADDR_SEL,        bidir,     X,     82,      1,    Z)," & 
       "82   (           bc_2,                   *,      control,     1)," & 
       "83   (           bc_1,          GPWM,      output3,     X,     84,      1,    Z)," & 
       "84   (           bc_1,                   *,      control,     1)," & 
       "85   (           bc_1,             DMD_D12,      output3,     X,     86,      1,    Z)," & 
       "86   (           bc_1,                   *,      control,     1)," & 
       "87   (           bc_1,             DMD_D14,      output3,     X,     88,      1,    Z)," & 
       "88   (           bc_1,                   *,      control,     1)," & 
       "89   (           bc_1,             DMD_D13,      output3,     X,     90,      1,    Z)," & 
       "90   (           bc_1,                   *,      control,     1)," & 
       "91   (           bc_1,             DMD_D11,      output3,     X,     92,      1,    Z)," & 
       "92   (           bc_1,                   *,      control,     1)," & 
       "93   (           bc_1,             DMD_D10,      output3,     X,     94,      1,    Z)," & 
       "94   (           bc_1,                   *,      control,     1)," & 
       "95   (           bc_1,              DMD_D9,      output3,     X,     96,      1,    Z)," & 
       "96   (           bc_1,                   *,      control,     1)," & 
       "97   (           bc_1,             DMD_TRC,      output3,     X,     98,      1,    Z)," & 
       "98   (           bc_1,                   *,      control,     1)," & 
       "99   (           bc_1,              DMD_D8,      output3,     X,    100,      1,    Z)," & 
       "100  (           bc_1,                   *,      control,     1)," & 
       "101  (           bc_1,              DMD_D4,      output3,     X,    102,      1,    Z)," & 
       "102  (           bc_1,                   *,      control,     1)," & 
       "103  (           bc_1,           DMD_LOADB,      output3,     X,    104,      1,    Z)," & 
       "104  (           bc_1,                   *,      control,     1)," & 
       "105  (           bc_1,           DMD_SCTRL,      output3,     X,    106,      1,    Z)," & 
       "106  (           bc_1,                   *,      control,     1)," & 
       "107  (           bc_1,              DMD_D7,      output3,     X,    108,      1,    Z)," & 
       "108  (           bc_1,                   *,      control,     1)," & 
       "109  (           bc_1,              DMD_D6,      output3,     X,    110,      1,    Z)," & 
       "110  (           bc_1,                   *,      control,     1)," & 
       "111  (           bc_1,            DMD_DCLK,      output3,     X,    112,      1,    Z)," & 
       "112  (           bc_1,                   *,      control,     1)," & 
       "113  (           bc_1,         DMD_DRC_OE,      output3,     X,    114,      1,    Z)," & 
       "114  (           bc_1,                   *,      control,     1)," & 
       "115  (           bc_1,              DMD_D3,      output3,     X,    116,      1,    Z)," & 
       "116  (           bc_1,                   *,      control,     1)," & 
       "117  (           bc_1,              DMD_D5,      output3,     X,    118,      1,    Z)," & 
       "118  (           bc_1,                   *,      control,     1)," & 
       "119  (           bc_1,         DMD_DRC_BUS,      output3,     X,    120,      1,    Z)," & 
       "120  (           bc_1,                   *,      control,     1)," & 
       "121  (           bc_1,              DMD_D1,      output3,     X,    122,      1,    Z)," & 
       "122  (           bc_1,                   *,      control,     1)," & 
       "123  (           bc_1,              DMD_D0,      output3,     X,    124,      1,    Z)," & 
       "124  (           bc_1,                   *,      control,     1)," & 
       "125  (           bc_1,              DMD_D2,      output3,     X,    126,      1,    Z)," & 
       "126  (           bc_1,                   *,      control,     1)," & 
       "127  (           bc_1,        DMD_DRC_STRB,      output3,     X,    128,      1,    Z)," & 
       "128  (           bc_1,                   *,      control,     1)," & 
       "129  (           bc_1,         DMD_SAC_BUS,      output3,     X,    130,      1,    Z)," & 
       "130  (           bc_1,                   *,      control,     1)," & 
       "131  (           bc_7,          DMD_PWR_EN,        bidir,     X,    132,      1,    Z)," & 
       "132  (           bc_2,                   *,      control,     1)," & 
       "133  (           bc_1,         DMD_SAC_CLK,      output3,     X,    134,      1,    Z)," & 
       "134  (           bc_1,                   *,      control,     1)," & 
       "135  (           BC_4,              RESET,        input,     X)," & 
       "136  (           bc_4,        PLL_REFCLK_I,        input,     X)," & 
       "137  (           bc_1,            VSYNC,        input,     X)," & 
       "138  (           bc_7,        PDM,        bidir,     X,    139,      1,    Z)," & 
       "139  (           bc_2,                   *,      control,     1)," & 
       "140  (           bc_1,            HSYNC,        input,     X)," & 
       "141  (           bc_7,             PDATA[0],        bidir,     X,    142,      1,    Z)," & 
       "142  (           bc_2,                   *,      control,     1)," & 
       "143  (           bc_1,           DATEN,        input,     X)," & 
       "144  (           bc_7,             PDATA[1],        bidir,     X,    145,      1,    Z)," & 
       "145  (           bc_2,                   *,      control,     1)," & 
       "146  (           bc_7,             PDATA[3],        bidir,     X,    147,      1,    Z)," & 
       "147  (           bc_2,                   *,      control,     1)," & 
       "148  (           bc_7,             PDATA[6],        bidir,     X,    149,      1,    Z)," & 
       "149  (           bc_2,                   *,      control,     1)," & 
       "150  (           bc_7,             PDATA[2],        bidir,     X,    151,      1,    Z)," & 
       "151  (           bc_2,                   *,      control,     1)," & 
       "152  (           bc_7,             PDATA[9],        bidir,     X,    153,      1,    Z)," & 
       "153  (           bc_2,                   *,      control,     1)," & 
       "154  (           bc_7,             PDATA[5],        bidir,     X,    155,      1,    Z)," & 
       "155  (           bc_2,                   *,      control,     1)," & 
       "156  (           bc_7,             PDATA[4],        bidir,     X,    157,      1,    Z)," & 
       "157  (           bc_2,                   *,      control,     1)," & 
       "158  (           bc_7,            PDATA[11],        bidir,     X,    159,      1,    Z)," & 
       "159  (           bc_2,                   *,      control,     1)," & 
       "160  (           bc_7,             PDATA[7],        bidir,     X,    161,      1,    Z)," & 
       "161  (           bc_2,                   *,      control,     1)," & 
       "162  (           bc_7,             PDATA[8],        bidir,     X,    163,      1,    Z)," & 
       "163  (           bc_2,                   *,      control,     1)," & 
       "164  (           bc_7,            PDATA[10],        bidir,     X,    165,      1,    Z)," & 
       "165  (           bc_2,                   *,      control,     1)," & 
       "166  (           bc_7,            PDATA[14],        bidir,     X,    167,      1,    Z)," & 
       "167  (           bc_2,                   *,      control,     1)," & 
       "168  (           bc_7,            PDATA[17],        bidir,     X,    169,      1,    Z)," & 
       "169  (           bc_2,                   *,      control,     1)," & 
       "170  (           BC_4,                PCLK,        input,     X)," & 
       "171  (           bc_7,            PDATA[12],        bidir,     X,    172,      1,    Z)," & 
       "172  (           bc_2,                   *,      control,     1)," & 
       "173  (           bc_7,            PDATA[13],        bidir,     X,    174,      1,    Z)," & 
       "174  (           bc_2,                   *,      control,     1)," & 
       "175  (           bc_7,            PDATA[15],        bidir,     X,    176,      1,    Z)," & 
       "176  (           bc_2,                   *,      control,     1)," & 
       "177  (           bc_7,            PDATA[19],        bidir,     X,    178,      1,    Z)," & 
       "178  (           bc_2,                   *,      control,     1)," & 
       "179  (           bc_7,            PDATA[20],        bidir,     X,    180,      1,    Z)," & 
       "180  (           bc_2,                   *,      control,     1)," & 
       "181  (           bc_7,            PDATA[21],        bidir,     X,    182,      1,    Z)," & 
       "182  (           bc_2,                   *,      control,     1)," & 
       "183  (           bc_7,            PDATA[18],        bidir,     X,    184,      1,    Z)," & 
       "184  (           bc_2,                   *,      control,     1)," & 
       "185  (           bc_7,            PDATA[16],        bidir,     X,    186,      1,    Z)," & 
       "186  (           bc_2,                   *,      control,     1)," & 
       "187  (           bc_7,            PDATA[23],        bidir,     X,    188,      1,    Z)," & 
       "188  (           bc_2,                   *,      control,     1)," & 
       "189  (           bc_7,            PDATA[22],        bidir,     X,    190,      1,    Z)," & 
       "190  (           bc_2,                   *,      control,     1)," & 
       "191  (           bc_1,          LED_ENABLE,        input,     X)," & 
       "192  (           bc_1,            RESERVED,        input,     X)," & 
       "193  (           bc_7,                 SDA,        bidir,     X,    194,      1,    Z)," & 
       "194  (           bc_2,                   *,      control,     1)," & 
       "195  (           bc_7,                 SCL,        bidir,     X,    196,      1,    Z)," & 
       "196  (           bc_2,                   *,      control,     1)," & 
       "197  (           bc_7,          RESERVED,        bidir,     X,    198,      1,    Z)," & 
       "198  (           bc_2,                   *,      control,     1)," & 
       "199  (           bc_1,           TEST_EN,        input,     X)," & 
       "200  (           bc_7,          INIT_DONE,        bidir,     X,    201,      1,    Z)," & 
       "201  (           bc_2,                   *,      control,     1)," & 
       "202  (           bc_1,             PARK,        input,     X)," & 
       "203  (           bc_7,             BLUE_EN,        bidir,     X,    204,      1,    Z)," & 
       "204  (           bc_2,                   *,      control,     1)," & 
       "205  (           bc_7,             BUFFER_SWAP,        bidir,     X,    206,      1,    Z)," & 
       "206  (           bc_2,                   *,      control,     1)," & 
       "207  (           bc_1,             CMP_PWM,      output3,     X,    208,      1,    Z)," & 
       "208  (           bc_1,                   *,      control,     1)," & 
       "209  (           bc_7,             GREEN_EN,        bidir,     X,    210,      1,    Z)," & 
       "210  (           bc_2,                   *,      control,     1)," & 
       "211  (           bc_7,             RD_BUF0,        bidir,     X,    212,      1,    Z)," & 
       "212  (           bc_2,                   *,      control,     1)," & 
       "213  (           bc_7,             PATTERN_INVERT,        bidir,     X,    214,      1,    Z)," & 
       "214  (           bc_2,                   *,      control,     1)," & 
       "215  (           bc_1,             CMP_OUT,        input,     X)," & 
       "216  (           bc_7,             RED_EN,        bidir,     X,    217,      1,    Z)," & 
       "217  (           bc_2,                   *,      control,     1)," & 
       "218  (           bc_1,             RESERVED,      output3,     X,    219,      1,    Z)," & 
       "219  (           bc_1,                   *,      control,     1)," & 
       "220  (           bc_7,             SPICS0 ,        bidir,     X,    221,      1,    Z)," & 
       "221  (           bc_2,                   *,      control,     1)," & 
       "222  (           bc_1,              SPIDIN,        input,     X)," & 
       "223  (           bc_7,              SPICLK,        bidir,     X,    224,      1,    Z)," & 
       "224  (           bc_2,                   *,      control,     1)," & 
       "225  (           bc_7,             SPIDOUT,        bidir,     X,    226,      1,    Z)," & 
       "226  (           bc_2,                   *,      control,     1)," & 
       "227  (           bc_1,            MEM_A11,      output3,     X,    228,      1,    Z)," & 
       "228  (           bc_1,                   *,      control,     1)," & 
       "229  (           bc_1,             MEM_A7,      output3,     X,    230,      1,    Z)," & 
       "230  (           bc_1,                   *,      control,     1)," & 
       "231  (           bc_1,             MEM_A9,      output3,     X,    232,      1,    Z)," & 
       "232  (           bc_1,                   *,      control,     1)," & 
       "233  (           bc_1,            MEM_CKE,      output3,     X,    234,      1,    Z)," & 
       "234  (           bc_1,                   *,      control,     1)," & 
       "235  (           bc_1,             MEM_A6,      output3,     X,    236,      1,    Z)," & 
       "236  (           bc_1,                   *,      control,     1)," & 
       "237  (           bc_1,            MEM_A12,      output3,     X,    238,      1,    Z)," & 
       "238  (           bc_1,                   *,      control,     1)," & 
       "239  (           bc_1,             MEM_A5,      output3,     X,    240,      1,    Z)," & 
       "240  (           bc_1,                   *,      control,     1)," & 
       "241  (           bc_1,             MEM_A4,      output3,     X,    242,      1,    Z)," & 
       "242  (           bc_1,                   *,      control,     1)," & 
       "243  (           bc_1,             MEM_A8,      output3,     X,    244,      1,    Z)," & 
       "244  (           bc_1,                   *,      control,     1)";

 end DLPC300;

        

This library contains 9408 BSDL files (for 7328 distinct entities) from 69 vendors
Last BSDL model (NOTHING_AT_ALL) was added on Feb 14, 2018 10:19
info@bsdl.info