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BSDL File: pspan2_3p_504 Download View details  


-- ***************************************************************
--	Company: Integrated Device Technology,Inc.

-- 	Document Number: 35A101D_BS001_03

--	Title: BSDL file for design PowerSpan II dual PCI 504 pin HSBGA
--	Author: Andi Sugandi

--	Release status: formal issue
--	Revision date: Oct. 3, 2002
--	Security level: Public
--      Authoring Group: DFT

--	Revision history:
--	release stat	rev no 	date		Reviser/Group	Description
--	------------	------	------------	-------------	------------
--	formal 		01 	Sept 20, 2001 	DFT Dept	1st release
--      formal		02	Oct.3, 2002	FrankLu/Apps    Add comment
--      formal		03      Sep.9, 2009     AE              updated with IDT
--							        formatting

-- ****************************************************************

-- Generated by boundaryScanGenerate 3.2 on 12/10/00 09:40:08
-- BSDL Version 1994

-- Important Note before begin interconnect test: 
-- The PO_RST signal is an input pin only during normal operation of the
-- device. This pin is defined as inout (bi-directional) in this BSDL file 
-- below. Some automatic JTAG pattern generation toolsets will drive 
-- the PO_RST net logic low as a part of boundary scan to fully test 
-- interconnectivity. In most applications the power-on reset (PO_RST net) 
-- is shared by multiple devices. Please ensure that the JTAG behavior 
-- of other component(s) on the same PO_RST net will not  be  influenced  
-- by the assertion of PO_RST. If you do experience problems,
-- please constrain the pattern generator to keep PO_RST net high 
-- during the boundary scan test.


entity pspan2_3p_504 is 
    generic (PHYSICAL_PIN_MAP : string := "HSBGA_504_1_37_DUAL_PCI");

    port (
        -- Port List
        JT_TDI               : in       bit;
        PB_A                 : inout    bit_vector( 0 to 31 );
        ES                   : inout    bit;
        PB_RST_DIR           : inout    bit;
        PB_BR2_b              : inout    bit;
        PB_DBG3_b             : inout    bit;
        PB_TT                : inout    bit_vector( 0 to 4 );
        PB_BR3_b              : inout    bit;
        INT_b                 : inout    bit_vector( 5 downto 0 );
        PB_TS_b               : inout    bit;
        HEALTHY_b             : inout    bit;
        PB_TBST_b             : inout    bit;
        PB_AACK_b             : inout    bit;
        PB_TSIZ              : inout    bit_vector( 0 to 3 );
        PB_ARTRY_b            : inout    bit;
        PB_BG1_b              : inout    bit;
        I2C_SCLK             : inout    bit;
        PB_AP                : inout    bit_vector( 0 to 3 );
        PB_DVAL_b             : inout    bit;
        PB_TEA_b              : inout    bit;
        PB_TA_b               : inout    bit;
        PB_D                 : inout    bit_vector( 0 to 63 );
        LED_b                 : inout    bit;
        I2C_SDA              : inout    bit;
        PB_BG3_b              : inout    bit;
        JT_TRST              : in       bit;
        PB_BG2_b              : inout    bit;
        PB_CLK               : inout    bit;
        PB_TEST1             : linkage       bit;
        PB_TEST2             : linkage      bit;
        PB_DBB_b              : inout    bit;
        PB_ABB_b              : inout    bit;
        PB_FAST              : inout    bit;
        PB_RSTCONF_b          : inout    bit;
        PO_RST_b              : inout    bit;
        PB_RST_b              : inout    bit;
        PB_DP                : inout    bit_vector( 0 to 7 );
        P2_RST_DIR           : inout    bit;
        P2_AD                : inout    bit_vector( 31 downto 0 );
        P2_RST_b              : inout    bit;
        P2_CBE               : inout    bit_vector( 3 downto 0 );
        P2_IRDY_b             : inout    bit;
        P2_DEVSEL_b           : inout    bit;
        P2_FRAME_b            : inout    bit;
        P2_SERR_b             : inout    bit;
        P2_REQ_b              : inout    bit_vector( 4 downto 2 );
        P2_TRDY_b             : inout    bit;
        P2_PERR_b             : inout    bit;
        P2_STOP_b             : inout    bit;
        P2_PAR               : inout    bit;
        P2_INTA_b             : inout    bit;
        PCI_GNT_b             : inout    bit_vector( 7 downto 5 );
        P2_CLK               : inout    bit;
        P2_TEST1             : linkage       bit;
        P2_TEST2             : linkage      bit;
        P2_IDSEL             : inout    bit;
        P2_GNT_b              : inout    bit_vector( 4 downto 2 );
        P1_AD                : inout    bit_vector( 63 downto 0 );
        PCI_REQ_b             : inout    bit_vector( 7 downto 5 );
        P2_M66EN             : inout    bit;
        P2_REQ1_b             : inout    bit;
        P2_GNT1_b             : inout    bit;
        P1_RST_b              : inout    bit;
        P1_CBE               : inout    bit_vector( 7 downto 0 );
        P1_IRDY_b             : inout    bit;
        P1_FRAME_b            : inout    bit;
        P1_PERR_b             : inout    bit;
        P1_STOP_b             : inout    bit;
        P1_DEVSEL_b           : inout    bit;
        P1_TRDY_b             : inout    bit;
        P1_INTA_b             : inout    bit;
        P1_PAR               : inout    bit;
        P1_GNT_b              : inout    bit_vector( 4 downto 2 );
        P1_REQ_b              : inout    bit_vector( 4 downto 2 );
        P1_64EN_b             : inout    bit;
        P1_CLK               : inout    bit;
        P1_GNT1_b             : inout    bit;
        P1_ACK64_b            : inout    bit;
        P1_REQ64_b            : inout    bit;
        P1_REQ1_b             : inout    bit;
        P1_TEST1             : linkage       bit;
        P1_TEST2             : linkage      bit;
        ENUM_b                : inout    bit;
        P1_PAR64             : inout    bit;
        P1_IDSEL             : inout    bit;
        P1_M66EN             : inout    bit;
        P1_SERR_b             : inout    bit;
        PB_CI_b               : inout    bit;
        PB_DBG1_b             : inout    bit;
        P1_RST_DIR           : inout    bit;
        PB_GBL_b              : inout    bit;
        PB_BR1_b              : inout    bit;
        JT_TMS               : in       bit;
        PB_DBG2_b             : inout    bit;
        JT_TCK               : in       bit;
        JT_TDO               : out    bit;
        TE                   : in       bit;
        P1_AVSS : linkage bit ;
        P1_DVDD : linkage bit ;
        P1_DVSS : linkage bit ;
        P2_AVSS : linkage bit ;
        P2_DVDD : linkage bit ;
        P2_DVSS : linkage bit ;
        PB_AVSS : linkage bit ;
        PB_DVDD : linkage bit ;
        PB_DVSS : linkage bit ;
        VDD25   : linkage bit_vector ( 1 to 32 );
        VDD33   : linkage bit_vector ( 1 to 24 );
        VSS     : linkage bit_vector ( 1 to 30 );
        VSS_IO  : linkage bit_vector ( 1 to 60 );
        NC      : linkage bit;
        PB_VDDA              : linkage       bit;
        P1_VDDA              : linkage       bit;
        P2_VDDA              : linkage       bit
        );

    use STD_1149_1_1994.all;
    use LVS_BSCAN_CELLS.all;

    attribute COMPONENT_CONFORMANCE of pspan2_3p_504: entity is "STD_1149_1_1993";

    --Pin mappings

    attribute PIN_MAP of pspan2_3p_504: entity is PHYSICAL_PIN_MAP;

    constant HSBGA_504_1_37_DUAL_PCI: PIN_MAP_STRING := 
    "JT_TDI               : D5   , " &
    "PB_A                 :(F1  , " &  -- PB_A[0]
                           "H3  , " &  -- PB_A[1]
                           "F2  , " &  -- PB_A[2]
                           "E1   , " &  -- PB_A[3]
                           "G3  , " &  -- PB_A[4]
                           "H4  , " &  -- PB_A[5]
                           "D1   , " &  -- PB_A[6]
                           "F4   , " &  -- PB_A[7]
                           "G4  , " &  -- PB_A[8]
                           "C1   , " &  -- PB_A[9]
                           "E3   , " &  -- PB_A[10]
                           "D2   , " &  -- PB_A[11]
                           "C5 , " &  -- PB_A[12]
                           "C4 , " &  -- PB_A[13]
                           "D7 , " &  -- PB_A[14]
                           "B4 , " &  -- PB_A[15]
                           "D8 , " &  -- PB_A[16]
                           "D6 , " &  -- PB_A[17]
                           "D9 , " &  -- PB_A[18]
                           "A4 , " &  -- PB_A[19]
                           "B5 , " &  -- PB_A[20]
                           "A6 , " &  -- PB_A[21]
                           "C8 , " &  -- PB_A[22]
                           "B6 , " &  -- PB_A[23]
                           "A7 , " &  -- PB_A[24]
                           "B7 , " &  -- PB_A[25]
                           "D10 , " &  -- PB_A[26]
                           "D11 , " &  -- PB_A[27]
                           "C10 , " &  -- PB_A[28]
                           "B8 , " &  -- PB_A[29]
                           "C9 , " &  -- PB_A[30]
                           "C11), " &  -- PB_A[31]
    "ES                   : E4   , " &
    "PB_RST_DIR           : E2   , " &
    "PB_BR2_b              : J4  , " &
    "PB_DBG3_b             : F3  , " &
    "PB_TT                :(H2  , " &  -- PB_TT[0]
                           "K3 , " &  -- PB_TT[1]
                           "K4  , " &  -- PB_TT[2]
                           "G2  , " &  -- PB_TT[3]
                           "L4 ), " &  -- PB_TT[4]
    "PB_BR3_b              : J2  , " &
    "INT_b                 :(AA2  , " &  -- INT_[5]
                           "J3  , " &  -- INT_[4]
                           "AB3  , " &  -- INT_[3]
                           "AB6  , " &  -- INT_[2]
                           "AC6  , " &  -- INT_[1]
                           "AD10), " &  -- INT_[0]
    "PB_TS_b               : K1  , " &
    "HEALTHY_b             : G1  , " &
    "PB_TBST_b             : L2  , " &
    "PB_AACK_b             : H1  , " &
    "PB_TSIZ              :(M4  , " &  -- PB_TSIZ[0]
                           "M3  , " &  -- PB_TSIZ[1]
                           "M5  , " &  -- PB_TSIZ[2]
                           "K2 ), " &  -- PB_TSIZ[3]
    "PB_ARTRY_b            : J1  , " &
    "PB_BG1_b              : L3  , " &
    "I2C_SCLK             : L1  , " &
    "PB_AP                :(P4  , " &  -- PB_AP[0]
                           "M1  , " &  -- PB_AP[1]
                           "N3  , " &  -- PB_AP[2]
                           "M2 ), " &  -- PB_AP[3]
    "PB_DVAL_b             : N1  , " &
    "PB_TEA_b              : P1  , " &
    "PB_TA_b               : N2  , " &
    "PB_D                 :(AF14 , " &  -- PB_D[0]
                           "AF10 , " &  -- PB_D[1]
                           "AF7 , " &  -- PB_D[2]
                           "AC7  , " &  -- PB_D[3]
                           "AE5  , " &  -- PB_D[4]
                           "U4  , " &  -- PB_D[5]
                           "R3  , " &  -- PB_D[6]
                           "T1  , " &  -- PB_D[7]
                           "AF13 , " &  -- PB_D[8]
                           "AF9 , " &  -- PB_D[9]
                           "AC10 , " &  -- PB_D[10]
                           "AC8  , " &  -- PB_D[11]
                           "AB2  , " &  -- PB_D[12]
                           "AB1  , " &  -- PB_D[13]
                           "W2  , " &  -- PB_D[14]
                           "P2  , " &  -- PB_D[15]
                           "AE13 , " &  -- PB_D[16]
                           "AE10 , " &  -- PB_D[17]
                           "AE7 , " &  -- PB_D[18]
                           "AD6  , " &  -- PB_D[19]
                           "AA3  , " &  -- PB_D[20]
                           "T4  , " &  -- PB_D[21]
                           "T2  , " &  -- PB_D[22]
                           "V1  , " &  -- PB_D[23]
                           "AF12 , " &  -- PB_D[24]
                           "AC12 , " &  -- PB_D[25]
                           "AD8  , " &  -- PB_D[26]
                           "AF5  , " &  -- PB_D[27]
                           "AA4  , " &  -- PB_D[28]
                           "V3  , " &  -- PB_D[29]
                           "R1  , " &  -- PB_D[30]
                           "U2  , " &  -- PB_D[31]
                           "AD13 , " &  -- PB_D[32]
                           "AD11 , " &  -- PB_D[33]
                           "AF6 , " &  -- PB_D[34]
                           "Y5  , " &  -- PB_D[35]
                           "AC1  , " &  -- PB_D[36]
                           "R5  , " &  -- PB_D[37]
                           "U3  , " &  -- PB_D[38]
                           "P3  , " &  -- PB_D[39]
                           "AC13 , " &  -- PB_D[40]
                           "AF8 , " &  -- PB_D[41]
                           "AC9 , " &  -- PB_D[42]
                           "AD1  , " &  -- PB_D[43]
                           "W4  , " &  -- PB_D[44]
                           "AA1  , " &  -- PB_D[45]
                           "V2  , " &  -- PB_D[46]
                           "R4  , " &  -- PB_D[47]
                           "AF11 , " &  -- PB_D[48]
                           "AB12 , " &  -- PB_D[49]
                           "AD7  , " &  -- PB_D[50]
                           "AE4  , " &  -- PB_D[51]
                           "V4  , " &  -- PB_D[52]
                           "Y1  , " &  -- PB_D[53]
                           "W1  , " &  -- PB_D[54]
                           "U1  , " &  -- PB_D[55]
                           "AE11 , " &  -- PB_D[56]
                           "AD9  , " &  -- PB_D[57]
                           "AE6  , " &  -- PB_D[58]
                           "AF3  , " &  -- PB_D[59]
                           "Y3  , " &  -- PB_D[60]
                           "Y2  , " &  -- PB_D[61]
                           "T3  , " &  -- PB_D[62]
                           "AD15), " &  -- PB_D[63]
    "LED_b                 : R2  , " &
    "I2C_SDA              : N4  , " &
    "PB_BG3_b              : W3  , " &
    "JT_TRST              : Y4  , " &
    "PB_BG2_b              : AA5  , " &
    "PB_CLK               : AD5  , " &
    "PB_TEST1             : AB4  , " &
    "PB_TEST2             : AB7  , " &
    "PB_DBB_b              : AF4  , " &
    "PB_ABB_b              : AE8 , " &
    "PB_FAST              : AE12 , " &
    "PB_RSTCONF_b          : AE9 , " &
    "PO_RST_b              : AC11 , " &
    "PB_RST_b              : AD12 , " &
    "PB_DP                :(AE16 , " &  -- PB_DP[0]
                           "AF17 , " &  -- PB_DP[1]
                           "AE15 , " &  -- PB_DP[2]
                           "AF16 , " &  -- PB_DP[3]
                           "AC15 , " &  -- PB_DP[4]
                           "AC14 , " &  -- PB_DP[5]
                           "AE14 , " &  -- PB_DP[6]
                           "AF15), " &  -- PB_DP[7]
    "P2_RST_DIR           : AD14 , " &
    "P2_AD                :(AD16 , " &  -- P2_AD[31]
                           "AE17 , " &  -- P2_AD[30]
                           "AF18 , " &  -- P2_AD[29]
                           "AF20 , " &  -- P2_AD[28]
                           "AD17 , " &  -- P2_AD[27]
                           "AC16 , " &  -- P2_AD[26]
                           "AF19 , " &  -- P2_AD[25]
                           "AE20 , " &  -- P2_AD[24]
                           "AE19 , " &  -- P2_AD[23]
                           "AF21 , " &  -- P2_AD[22]
                           "AC17 , " &  -- P2_AD[21]
                           "AD18 , " &  -- P2_AD[20]
                           "AD21 , " &  -- P2_AD[19]
                           "AD20 , " &  -- P2_AD[18]
                           "AF22 , " &  -- P2_AD[17]
                           "AE21 , " &  -- P2_AD[16]
                           "Y23 , " &  -- P2_AD[15]
                           "AB24 , " &  -- P2_AD[14]
                           "AA23 , " &  -- P2_AD[13]
                           "AB25 , " &  -- P2_AD[12]
                           "AC26 , " &  -- P2_AD[11]
                           "AB26 , " &  -- P2_AD[10]
                           "AA24 , " &  -- P2_AD[9]
                           "Y24 , " &  -- P2_AD[8]
                           "AA26 , " &  -- P2_AD[7]
                           "Y25 , " &  -- P2_AD[6]
                           "W24 , " &  -- P2_AD[5]
                           "U23 , " &  -- P2_AD[4]
                           "V24 , " &  -- P2_AD[3]
                           "U24, " &  -- P2_AD[2]
                           "R22 , " &  -- P2_AD[1]
                           "T23), " &  -- P2_AD[0]
    "P2_RST_b              : AE18 , " &
    "P2_CBE               :(AB15 , " &  -- P2_CBE[3]
                           "AD19 , " &  -- P2_CBE[2]
                           "AD26 , " &  -- P2_CBE[1]
                           "AA25), " &  -- P2_CBE[0]
    "P2_IRDY_b             : AC18 , " &
    "P2_DEVSEL_b           : AC19 , " &
    "P2_FRAME_b            : AF23 , " &
    "P2_SERR_b             : AE22 , " &
    "P2_REQ_b              :(V23 , " &  -- P2_REQ_[4]
                           "AB20 , " &  -- P2_REQ_[3]
                           "AE23), " &  -- P2_REQ_[2]
    "P2_TRDY_b             : AC20 , " &
    "P2_PERR_b             : AC21 , " &
    "P2_STOP_b             : AF24 , " &
    "P2_PAR               : Y22 , " &
    "P2_INTA_b             : AA22 , " &
    "PCI_GNT_b             :(P24 , " &  -- PCI_GNT_[7]
                           "K23 , " &  -- PCI_GNT_[6]
                           "R26), " &  -- PCI_GNT_[5]
    "P2_CLK               : AD22 , " &
    "P2_TEST1             : AB21 , " &
    "P2_TEST2             : AB23 , " &
    "P2_IDSEL             : W23 , " &
    "P2_GNT_b              :(V26 , " &  -- P2_GNT_[4]
                           "U25 , " &  -- P2_GNT_[3]
                           "T24), " &  -- P2_GNT_[2]
    "P1_AD                :(B20 , " &  -- P1_AD[63]
                           "C18 , " &  -- P1_AD[62]
                           "A21, " &  -- P1_AD[61]
                           "D17, " &  -- P1_AD[60]
                           "B19 , " &  -- P1_AD[59]
                           "A20 , " &  -- P1_AD[58]
                           "D16 , " &  -- P1_AD[57]
                           "A19 , " &  -- P1_AD[56]
                           "C16 , " &  -- P1_AD[55]
                           "B17 , " &  -- P1_AD[54]
                           "A18 , " &  -- P1_AD[53]
                           "A17 , " &  -- P1_AD[52]
                           "D15 , " &  -- P1_AD[51]
                           "C15 , " &  -- P1_AD[50]
                           "B15 , " &  -- P1_AD[49]
                           "D14 , " &  -- P1_AD[48]
                           "C14 , " &  -- P1_AD[47]
                           "D13, " &  -- P1_AD[46]
                           "A15 , " &  -- P1_AD[45]
                           "B14 , " &  -- P1_AD[44]
                           "A14 , " &  -- P1_AD[43]
                           "A13 , " &  -- P1_AD[42]
                           "B13 , " &  -- P1_AD[41]
                           "A12 , " &  -- P1_AD[40]
                           "C13 , " &  -- P1_AD[39]
                           "D12 , " &  -- P1_AD[38]
                           "C12 , " &  -- P1_AD[37]
                           "B11 , " &  -- P1_AD[36]
                           "A11 , " &  -- P1_AD[35]
                           "B12 , " &  -- P1_AD[34]
                           "A9 , " &  -- P1_AD[33]
                           "A10 , " &  -- P1_AD[32]
                           "R24 , " &  -- P1_AD[31]
                           "T25 , " &  -- P1_AD[30]
                           "R23 , " &  -- P1_AD[29]
                           "P23 , " &  -- P1_AD[28]
                           "R25 , " &  -- P1_AD[27]
                           "T26 , " &  -- P1_AD[26]
                           "P26 , " &  -- P1_AD[25]
                           "N26 , " &  -- P1_AD[24]
                           "M26 , " &  -- P1_AD[23]
                           "L26 , " &  -- P1_AD[22]
                           "M25 , " &  -- P1_AD[21]
                           "N24 , " &  -- P1_AD[20]
                           "K26 , " &  -- P1_AD[19]
                           "M24 , " &  -- P1_AD[18]
                           "M23, " &  -- P1_AD[17]
                           "L25 , " &  -- P1_AD[16]
                           "H25 , " &  -- P1_AD[15]
                           "L23 , " &  -- P1_AD[14]
                           "J24 , " &  -- P1_AD[13]
                           "G24 , " &  -- P1_AD[12]
                           "F25 , " &  -- P1_AD[11]
                           "F26 , " &  -- P1_AD[10]
                           "E25 , " &  -- P1_AD[9]
                           "D26 , " &  -- P1_AD[8]
                           "E26 , " &  -- P1_AD[7]
                           "G22 , " &  -- P1_AD[6]
                           "F24 , " &  -- P1_AD[5]
                           "C26 , " &  -- P1_AD[4]
                           "G23 , " &  -- P1_AD[3]
                           "E24 , " &  -- P1_AD[2]
                           "F23 , " &  -- P1_AD[1]
                           "E23), " &  -- P1_AD[0]
    "PCI_REQ_b             :(W25 , " &  -- PCI_REQ_b[7]
                           "P25 , " &  -- PCI_REQ_b[6]
                           "N23), " &  -- PCI_REQ_b[5]
    "P2_M66EN             : Y26 , " &
    "P2_REQ1_b             : W26 , " &
    "P2_GNT1_b             : V25 , " &
    "P1_RST_b              : U26 , " &
    "P1_CBE               :(A22 , " &  -- P1_CBE[7]
                           "B21 , " &  -- P1_CBE[6]
                           "C21 , " &  -- P1_CBE[5]
                           "C20 , " &  -- P1_CBE[4]
                           "N25 , " &  -- P1_CBE[3]
                           "H26 , " &  -- P1_CBE[2]
                           "G26 , " &  -- P1_CBE[1]
                           "H23), " &  -- P1_CBE[0]
    "P1_IRDY_b             : J26 , " &
    "P1_FRAME_b            : K25 , " &
    "P1_PERR_b             : L24 , " &
    "P1_STOP_b             : M22 , " &
    "P1_DEVSEL_b           : J25 , " &
    "P1_TRDY_b             : K24 , " &
    "P1_INTA_b             : H24 , " &
    "P1_PAR               : G25 , " &
    "P1_GNT_b              :(J23 , " &  -- P1_GNT_[4]
                           "D21 , " &  -- P1_GNT_[3]
                           "A23), " &  -- P1_GNT_[2]
    "P1_REQ_b              :(C17 , " &  -- P1_REQ_[4]
                           "B18 , " &  -- P1_REQ_[3]
                           "F22), " &  -- P1_REQ_[2]
    "P1_64EN_b             : B23 , " &
    "P1_CLK               : C22 , " &
    "P1_GNT1_b             : D20 , " &
    "P1_ACK64_b            : A24 , " &
    "P1_REQ64_b            : B22 , " &
    "P1_REQ1_b             : D19 , " &
    "P1_TEST1             : E21 , " &
    "P1_TEST2             : E20 , " &
    "ENUM_b                : D18 , " &
    "P1_PAR64             : C19 , " &
    "P1_IDSEL             : E15 , " &
    "P1_M66EN             : B16 , " &
    "P1_SERR_b             : A16 , " &
    "PB_CI_b               : A8 , " &
    "PB_DBG1_b             : B9 , " &
    "P1_RST_DIR           : C7 , " &
    "PB_GBL_b              : B10 , " &
    "PB_BR1_b              : E12 , " &
    "JT_TMS               : A5 , " &
    "PB_DBG2_b             : C6 , " &
    "JT_TCK               : E7 , " &
    "JT_TDO               : A3 , " &
    "TE                   : D3 , " &
    " VDD25  : ( W6, W5, W22, W21, V6, V5, V22, V21, J6, J5, " &
               " J22, J21, H6, H5, H22, H21, F9, F8, F19, F18, " &
               " E9, E8, E19, E18, AB9, AB8, AB19, AB18, AA9, AA8, " &
               " AA19, AA18 ) , " &
    " VDD33  : ( AA10, AA11, AA16, AA17, AA20, AA7, AB10, AB11, AB16, " &
               " E10, E11, E16, E17, F10, F11, F16, F17, F20, F6, " &
               " AB17, F7, G21, G6, K21 ) , " &
    " VSS    : ( AA12, AA13, AA14, AA15, AB13, AB14, E13, E14, F12," &
               " F13, F14, F15, M21, M6, N21, N22, N5, N6, P21," &
               " P22, P5, P6, R21, R6, D4, E5, E6, F5, G5," &
               " C3 ) ," &
    " VSS_IO : ( AB22, AB5, AC2, AC23, AC24, AC25, AC3, AC4, AD2, AD25," &
               " AE2, AE24, AE25, AE3, B2, B24, B25, B3, C2, C25," &
               " D23, D24, D25, E22, L11, L12, L13, L14, L15, L16," &
               " M11, M12, M13, M14, M15, M16, N11, N12, N13," &
               " N14, N15, N16, P11, P12, P13, P14, P15, P16," &
               " R11, R12, R13, R14, R15, R16, T11, T12, T13," &
               " T14, T15, T16 ) ," &
    " NC      : AH3 , " &
    " P1_AVSS : C23 ," &
    " P1_DVDD : F21 ," &
    " P1_DVSS : D22 ," &
    " P2_AVSS : AD23 ," &
    " P2_DVDD : AA21 ," &
    " P2_DVSS : AC22 ," &
    " PB_AVSS : AD4 ," &
    " PB_DVDD : AA6 ," &
    " PB_DVSS : AC5 ," &
    "PB_VDDA              : AD3 , " &
    "P1_VDDA              : C24 , " &
    "P2_VDDA              : AD24   " ;

   attribute TAP_SCAN_RESET of JT_TRST: signal is true;
   attribute TAP_SCAN_IN    of JT_TDI : signal is true;
   attribute TAP_SCAN_MODE  of JT_TMS : signal is true;
   attribute TAP_SCAN_OUT   of JT_TDO : signal is true;
   attribute TAP_SCAN_CLOCK of JT_TCK : signal is (1.0e+07, BOTH);

   attribute COMPLIANCE_PATTERNS of pspan2_3p_504 : entity is
      "(TE) (0)";

   attribute INSTRUCTION_LENGTH of pspan2_3p_504: entity is 29;
 
   attribute INSTRUCTION_OPCODE of pspan2_3p_504: entity is
      "IDCODE   (11111111111111111111111111110)," &
      "BYPASS   (11111111111111111111111111111)," &
"EXTEST (00000000000000000000000000000, 11111111111111111111111101000)," &
      "SAMPLE   (11111111111111111111111111000)," &
      "HIGHZ    (11111111111111111111111001111)," &
      "CLAMP    (11111111111111111111111101111) " ;
 
   attribute INSTRUCTION_CAPTURE of pspan2_3p_504: entity is 
   "xxxxxxxxxxxxxxxxxxxxxxxxxxx01";
 
   attribute IDCODE_REGISTER of pspan2_3p_504: entity is
      "0001"             & -- version
      "1000001001100000" & -- part number
      "00010110011"      & -- manufacturer's identity
      "1";                   -- required by 1149.1
 
   attribute REGISTER_ACCESS of pspan2_3p_504: entity is
      "BYPASS   (HIGHZ, CLAMP) " ;


    --Boundary scan definition
    attribute BOUNDARY_LENGTH of pspan2_3p_504: entity is 412;

    attribute BOUNDARY_REGISTER of pspan2_3p_504: entity is 
-- num  cell      port           function   safe [ccell disval  rslt]
"  411  (BC_2   , *            , control  , 0   )            ,"&
"  410  (LV_BC_7, PB_A(10)     , bidir    , X,   411, 0 , Z   ),"&
"  409  (LV_BC_7, PB_A(11)     , bidir    , X,   411, 0 , Z   ),"&
"  408  (LV_BC_7, PB_A(9)      , bidir    , X,   411, 0 , Z   ),"&
"  407  (BC_2   , *            , control  , 0   )            ,"&
"  406  (LV_BC_7, ES           , bidir    , X,   407, 0 , Z   ),"&
"  405  (LV_BC_7, PB_A(7)      , bidir    , X,   411, 0 , Z   ),"&
"  404  (LV_BC_7, PB_A(3)      , bidir    , X,   411, 0 , Z   ),"&
"  403  (LV_BC_7, PB_A(6)      , bidir    , X,   411, 0 , Z   ),"&
"  402  (LV_BC_7, PB_RST_DIR   , bidir    , X,   407, 0 , Z   ),"&
"  401  (LV_BC_7, PB_A(8)      , bidir    , X,   411, 0 , Z   ),"&
"  400  (LV_BC_7, PB_A(2)      , bidir    , X,   411, 0 , Z   ),"&
"  399  (LV_BC_7, PB_A(5)      , bidir    , X,   411, 0 , Z   ),"&
"  398  (LV_BC_7, PB_BR2_b      , bidir    , X,   407, 0 , Z   ),"&
"  397  (BC_2   , *            , control  , 0   )            ,"&
"  396  (LV_BC_7, PB_DBG3_b     , bidir    , X,   397, 0 , Z   ),"&
"  395  (BC_2   , *            , control  , 0   )            ,"&
"  394  (LV_BC_7, PB_TT(3)     , bidir    , X,   395, 0 , Z   ),"&
"  393  (LV_BC_7, PB_A(4)      , bidir    , X,   411, 0 , Z   ),"&
"  392  (LV_BC_7, PB_TT(0)     , bidir    , X,   395, 0 , Z   ),"&
"  391  (LV_BC_7, PB_A(1)      , bidir    , X,   411, 0 , Z   ),"&
"  390  (LV_BC_7, PB_A(0)      , bidir    , X,   411, 0 , Z   ),"&
"  389  (LV_BC_7, PB_BR3_b      , bidir    , X,   407, 0 , Z   ),"&
"  388  (LV_BC_7, PB_TT(2)     , bidir    , X,   395, 0 , Z   ),"&
"  387  (BC_2   , *            , control  , 0   )            ,"&
"  386  (LV_BC_7, INT_b(4)      , bidir    , X,   387, 0 , Z   ),"&
"  385  (BC_2   , *            , control  , 0   )            ,"&
"  384  (LV_BC_7, PB_TS_b       , bidir    , X,   385, 0 , Z   ),"&
"  383  (LV_BC_7, HEALTHY_b     , bidir    , X,   407, 0 , Z   ),"&
"  382  (LV_BC_7, PB_TT(1)     , bidir    , X,   395, 0 , Z   ),"&
"  381  (BC_2   , *            , control  , 0   )            ,"&
"  380  (LV_BC_7, PB_TBST_b     , bidir    , X,   381, 0 , Z   ),"&
"  379  (LV_BC_7, PB_TT(4)     , bidir    , X,   395, 0 , Z   ),"&
"  378  (BC_2   , *            , control  , 0   )            ,"&
"  377  (LV_BC_7, PB_AACK_b     , bidir    , X,   378, 0 , Z   ),"&
"  376  (BC_2   , *            , control  , 0   )            ,"&
"  375  (LV_BC_7, PB_TSIZ(3)   , bidir    , X,   376, 0 , Z   ),"&
"  374  (BC_2   , *            , control  , 0   )            ,"&
"  373  (LV_BC_7, PB_ARTRY_b    , bidir    , X,   374, 0 , Z   ),"&
"  372  (BC_2   , *            , control  , 0   )            ,"&
"  371  (LV_BC_7, PB_BG1_b      , bidir    , X,   372, 0 , Z   ),"&
"  370  (LV_BC_7, PB_TSIZ(2)   , bidir    , X,   376, 0 , Z   ),"&
"  369  (BC_2   , *            , control  , 0   )            ,"&
"  368  (LV_BC_7, I2C_SCLK     , bidir    , X,   369, 0 , Z   ),"&
"  367  (LV_BC_7, PB_TSIZ(1)   , bidir    , X,   376, 0 , Z   ),"&
"  366  (LV_BC_7, PB_TSIZ(0)   , bidir    , X,   376, 0 , Z   ),"&
"  365  (BC_2   , *            , control  , 0   )            ,"&
"  364  (LV_BC_7, PB_AP(3)     , bidir    , X,   365, 0 , Z   ),"&
"  363  (LV_BC_7, PB_AP(2)     , bidir    , X,   365, 0 , Z   ),"&
"  362  (LV_BC_7, PB_AP(1)     , bidir    , X,   365, 0 , Z   ),"&
"  361  (BC_2   , *            , control  , 0   )            ,"&
"  360  (LV_BC_7, PB_DVAL_b     , bidir    , X,   361, 0 , Z   ),"&
"  359  (BC_2   , *            , control  , 0   )            ,"&
"  358  (LV_BC_7, PB_TEA_b      , bidir    , X,   359, 0 , Z   ),"&
"  357  (BC_2   , *            , control  , 0   )            ,"&
"  356  (LV_BC_7, PB_TA_b       , bidir    , X,   357, 0 , Z   ),"&
"  355  (BC_2   , *            , control  , 0   )            ,"&
"  354  (LV_BC_7, PB_D(15)     , bidir    , X,   355, 0 , Z   ),"&
"  353  (LV_BC_7, PB_D(30)     , bidir    , X,   355, 0 , Z   ),"&
"  352  (BC_2   , *            , control  , 0   )            ,"&
"  351  (LV_BC_7, LED_b         , bidir    , X,   352, 0 , Z   ),"&
"  350  (LV_BC_7, PB_D(7)      , bidir    , X,   355, 0 , Z   ),"&
"  349  (LV_BC_7, PB_D(22)     , bidir    , X,   355, 0 , Z   ),"&
"  348  (LV_BC_7, PB_D(55)     , bidir    , X,   355, 0 , Z   ),"&
"  347  (LV_BC_7, PB_D(6)      , bidir    , X,   355, 0 , Z   ),"&
"  346  (LV_BC_7, PB_D(31)     , bidir    , X,   339, 0 , Z   ),"&
"  345  (LV_BC_7, PB_D(62)     , bidir    , X,   339, 0 , Z   ),"&
"  344  (BC_2   , *            , control  , 0   )            ,"&
"  343  (LV_BC_7, I2C_SDA      , bidir    , X,   344, 0 , Z   ),"&
"  342  (LV_BC_7, PB_D(21)     , bidir    , X,   339, 0 , Z   ),"&
"  341  (LV_BC_7, PB_D(38)     , bidir    , X,   339, 0 , Z   ),"&
"  340  (LV_BC_7, PB_AP(0)     , bidir    , X,   365, 0 , Z   ),"&
"  339  (BC_2   , *            , control  , 0   )            ,"&
"  338  (LV_BC_7, PB_D(54)     , bidir    , X,   339, 0 , Z   ),"&
"  337  (BC_2   , *            , control  , 0   )            ,"&
"  336  (LV_BC_7, PB_D(37)     , bidir    , X,   339, 0 , Z   ),"&
"  335  (LV_BC_7, PB_D(39)     , bidir    , X,   355, 0 , Z   ),"&
"  334  (LV_BC_7, PB_D(14)     , bidir    , X,   337, 0 , Z   ),"&
"  333  (LV_BC_7, PB_D(47)     , bidir    , X,   355, 0 , Z   ),"&
"  332  (LV_BC_7, PB_D(5)      , bidir    , X,   337, 0 , Z   ),"&
"  331  (LV_BC_7, PB_D(61)     , bidir    , X,   337, 0 , Z   ),"&
"  330  (LV_BC_7, PB_D(23)     , bidir    , X,   339, 0 , Z   ),"&
"  329  (LV_BC_7, PB_D(29)     , bidir    , X,   337, 0 , Z   ),"&
"  328  (LV_BC_7, PB_BG3_b      , bidir    , X,   372, 0 , Z   ),"&
"  327  (LV_BC_7, PB_D(46)     , bidir    , X,   339, 0 , Z   ),"&
"  326  (LV_BC_7, PB_D(60)     , bidir    , X,   337, 0 , Z   ),"&
"  325  (LV_BC_7, PB_D(53)     , bidir    , X,   337, 0 , Z   ),"&
"  324  (BC_2   , *            , control  , 0   ),"&
"  323  (LV_BC_7, PB_D(20)     , bidir    , X,   324, 0 , Z   ),"&
"  322  (LV_BC_7, PB_D(52)     , bidir    , X,   337, 0 , Z   ),"&
"  321  (LV_BC_7, PB_D(45)     , bidir    , X,   337, 0 , Z   ),"&
"  320  (BC_2   , *            , control  , 0   ),"&
"  319  (LV_BC_7, INT_b(5)      , bidir    , X,   320, 0 , Z   ),"&
"  318  (LV_BC_7, PB_D(36)     , bidir    , X,   324, 0 , Z   ),"&
"  317  (LV_BC_7, PB_D(13)     , bidir    , X,   324, 0 , Z   ),"&
"  316  (LV_BC_7, PB_D(44)     , bidir    , X,   324, 0 , Z   ),"&
"  315  (LV_BC_7, PB_D(28)     , bidir    , X,   324, 0 , Z   ),"&
"  314  (LV_BC_7, PB_D(12)     , bidir    , X,   324, 0 , Z   ),"&
"  313  (LV_BC_7, PB_D(35)     , bidir    , X,   324, 0 , Z   ),"&
"  312  (BC_2   , *            , control  , 0   ),"&
"  311  (LV_BC_7, INT_b(3)      , bidir    , X,   312, 0 , Z   ),"&
"  310  (LV_BC_7, PB_BG2_b      , bidir    , X,   372, 0 , Z   ),"&
"  309  (LV_BC_7, PB_D(43)     , bidir    , X,   324, 0 , Z   ),"&
"  308  (LV_BC_7, PB_D(51)     , bidir    , X,   296, 0 , Z   ),"&
"  307  (BC_2   , *            , control  , 0   ),"&
"  306  (LV_BC_7, INT_b(2)      , bidir    , X,   307, 0 , Z   ),"&
"  305  (BC_2   , *            , control  , 0   ),"&
"  304  (LV_BC_7, INT_b(1)      , bidir    , X,   305, 0 , Z   ),"&
"  303  (BC_2   , *            , control  , 0   ),"&
"  302  (LV_BC_7, PB_D(3)      , bidir    , X,   296, 0 , Z   ),"&
"  301  (LV_BC_7, PB_D(11)     , bidir    , X,   296, 0 , Z   ),"&
"  300  (BC_2   , *            , control  , 0   ),"&
"  299  (LV_BC_7, PB_CLK       , bidir    , X,   300, 0 , Z   ),"&
"  298  (LV_BC_7, PB_D(59)     , bidir    , X,   296, 0 , Z   ),"&
"  297  (LV_BC_7, PB_D(4)      , bidir    , X,   296, 0 , Z   ),"&
"  296  (BC_2   , *            , control  , 0   ),"&
"  295  (LV_BC_7, PB_D(42)     , bidir    , X,   296, 0 , Z   ),"&
"  294  (LV_BC_7, PB_D(19)     , bidir    , X,   296, 0 , Z   ),"&
"  293  (LV_BC_7, PB_D(26)     , bidir    , X,   303, 0 , Z   ),"&
"  292  (BC_2   , *            , control  , 0   ),"&
"  291  (LV_BC_7, PB_DBB_b      , bidir    , X,   292, 0 , Z   ),"&
"  290  (LV_BC_7, PB_D(57)     , bidir    , X,   303, 0 , Z   ),"&
"  289  (LV_BC_7, PB_D(50)     , bidir    , X,   303, 0 , Z   ),"&
"  288  (LV_BC_7, PB_D(58)     , bidir    , X,   303, 0 , Z   ),"&
"  287  (LV_BC_7, PB_D(27)     , bidir    , X,   296, 0 , Z   ),"&
"  286  (LV_BC_7, PB_D(34)     , bidir    , X,   303, 0 , Z   ),"&
"  285  (BC_2   , *            , control  , 0   ),"&
"  284  (LV_BC_7, INT_b(0)      , bidir    , X,   285, 0 , Z   ),"&
"  283  (LV_BC_7, PB_D(18)     , bidir    , X,   303, 0 , Z   ),"&
"  282  (LV_BC_7, PB_D(10)     , bidir    , X,   303, 0 , Z   ),"&
"  281  (LV_BC_7, PB_D(25)     , bidir    , X,   280, 0 , Z   ),"&
"  280  (BC_2   , *            , control  , 0   ),"&
"  279  (LV_BC_7, PB_D(2)      , bidir    , X,   303, 0 , Z   ),"&
"  278  (BC_2   , *            , control  , 0   ),"&
"  277  (LV_BC_7, PB_D(1)      , bidir    , X,   280, 0 , Z   ),"&
"  276  (BC_2   , *            , control  , 0   ),"&
"  275  (LV_BC_7, PB_ABB_b      , bidir    , X,   276, 0 , Z   ),"&
"  274  (LV_BC_7, PB_D(49)     , bidir    , X,   280, 0 , Z   ),"&
"  273  (LV_BC_7, PB_FAST      , bidir    , X,   300, 0 , Z   ),"&
"  272  (LV_BC_7, PB_RSTCONF_b  , bidir    , X,   300, 0 , Z   ),"&
"  271  (LV_BC_7, PB_D(41)     , bidir    , X,   280, 0 , Z   ),"&
"  270  (LV_BC_7, PO_RST_b      , bidir    , X,   300, 0 , Z   ),"&
"  269  (LV_BC_7, PB_D(17)     , bidir    , X,   280, 0 , Z   ),"&
"  268  (LV_BC_7, PB_D(9)      , bidir    , X,   280, 0 , Z   ),"&
"  267  (LV_BC_7, PB_D(33)     , bidir    , X,   280, 0 , Z   ),"&
"  266  (LV_BC_7, PB_D(56)     , bidir    , X,   280, 0 , Z   ),"&
"  265  (LV_BC_7, PB_D(48)     , bidir    , X,   278, 0 , Z   ),"&
"  264  (BC_2   , *            , control  , 0   ),"&
"  263  (LV_BC_7, PB_RST_b      , bidir    , X,   264, 0 , Z   ),"&
"  262  (LV_BC_7, PB_D(40)     , bidir    , X,   278, 0 , Z   ),"&
"  261  (LV_BC_7, PB_D(32)     , bidir    , X,   278, 0 , Z   ),"&
"  260  (LV_BC_7, PB_D(16)     , bidir    , X,   278, 0 , Z   ),"&
"  259  (LV_BC_7, PB_D(8)      , bidir    , X,   278, 0 , Z   ),"&
"  258  (LV_BC_7, PB_D(0)      , bidir    , X,   278, 0 , Z   ),"&
"  257  (BC_2   , *            , control  , 0   ),"&
"  256  (LV_BC_7, PB_DP(5)     , bidir    , X,   257, 0 , Z   ),"&
"  255  (LV_BC_7, PB_DP(6)     , bidir    , X,   257, 0 , Z   ),"&
"  254  (LV_BC_7, P2_RST_DIR   , bidir    , X,   300, 0 , Z   ),"&
"  253  (LV_BC_7, PB_DP(2)     , bidir    , X,   257, 0 , Z   ),"&
"  252  (LV_BC_7, PB_DP(3)     , bidir    , X,   257, 0 , Z   ),"&
"  251  (LV_BC_7, PB_D(63)     , bidir    , X,   278, 0 , Z   ),"&
"  250  (BC_2   , *            , control  , 0   ),"&
"  249  (LV_BC_7, P2_AD(29)    , bidir    , X,   250, 0 , Z   ),"&
"  248  (LV_BC_7, P2_AD(30)    , bidir    , X,   250, 0 , Z   ),"&
"  247  (LV_BC_7, PB_D(24)     , bidir    , X,   278, 0 , Z   ),"&
"  246  (LV_BC_7, PB_DP(0)     , bidir    , X,   257, 0 , Z   ),"&
"  245  (LV_BC_7, P2_AD(25)    , bidir    , X,   250, 0 , Z   ),"&
"  244  (LV_BC_7, PB_DP(7)     , bidir    , X,   257, 0 , Z   ),"&
"  243  (LV_BC_7, P2_AD(26)    , bidir    , X,   250, 0 , Z   ),"&
"  242  (LV_BC_7, P2_AD(31)    , bidir    , X,   250, 0 , Z   ),"&
"  241  (LV_BC_7, PB_DP(4)     , bidir    , X,   257, 0 , Z   ),"&
"  240  (BC_2   , *            , control  , 0   ),"&
"  239  (LV_BC_7, P2_AD(23)    , bidir    , X,   240, 0 , Z   ),"&
"  238  (LV_BC_7, PB_DP(1)     , bidir    , X,   257, 0 , Z   ),"&
"  237  (LV_BC_7, P2_AD(27)    , bidir    , X,   250, 0 , Z   ),"&
"  236  (LV_BC_7, P2_AD(20)    , bidir    , X,   240, 0 , Z   ),"&
"  235  (BC_2   , *            , control  , 0   ),"&
"  234  (LV_BC_7, P2_RST_b      , bidir    , X,   235, 0 , Z   ),"&
"  233  (LV_BC_7, P2_AD(21)    , bidir    , X,   240, 0 , Z   ),"&
"  232  (BC_2   , *            , control  , 0   ),"&
"  231  (LV_BC_7, P2_CBE(3)    , bidir    , X,   232, 0 , Z   ),"&
"  230  (LV_BC_7, P2_AD(28)    , bidir    , X,   250, 0 , Z   ),"&
"  229  (LV_BC_7, P2_CBE(2)    , bidir    , X,   232, 0 , Z   ),"&
"  228  (LV_BC_7, P2_AD(22)    , bidir    , X,   240, 0 , Z   ),"&
"  227  (LV_BC_7, P2_AD(24)    , bidir    , X,   250, 0 , Z   ),"&
"  226  (LV_BC_7, P2_AD(16)    , bidir    , X,   240, 0 , Z   ),"&
"  225  (BC_2   , *            , control  , 0   ),"&
"  224  (LV_BC_7, P2_IRDY_b     , bidir    , X,   225, 0 , Z   ),"&
"  223  (LV_BC_7, P2_AD(18)    , bidir    , X,   240, 0 , Z   ),"&
"  222  (LV_BC_7, P2_AD(19)    , bidir    , X,   240, 0 , Z   ),"&
"  221  (BC_2   , *            , control  , 0   ),"&
"  220  (LV_BC_7, P2_DEVSEL_b   , bidir    , X,   221, 0 , Z   ),"&
"  219  (LV_BC_7, P2_AD(17)    , bidir    , X,   240, 0 , Z   ),"&
"  218  (BC_2   , *            , control  , 0   ),"&
"  217  (LV_BC_7, P2_FRAME_b    , bidir    , X,   218, 0 , Z   ),"&
"  216  (BC_2   , *            , control  , 0   ),"&
"  215  (LV_BC_7, P2_SERR_b     , bidir    , X,   216, 0 , Z   ),"&
"  214  (LV_BC_7, P2_REQ_b(2)   , bidir    , X,   300, 0 , Z   ),"&
"  213  (BC_2   , *            , control  , 0   ),"&
"  212  (LV_BC_7, P2_TRDY_b     , bidir    , X,   213, 0 , Z   ),"&
"  211  (BC_2   , *            , control  , 0   ),"&
"  210  (LV_BC_7, P2_PERR_b     , bidir    , X,   211, 0 , Z   ),"&
"  209  (BC_2   , *            , control  , 0   ),"&
"  208  (LV_BC_7, P2_STOP_b     , bidir    , X,   209, 0 , Z   ),"&
"  207  (BC_2   , *            , control  , 0   ),"&
"  206  (LV_BC_7, P2_AD(14)    , bidir    , X,   207, 0 , Z   ),"&
"  205  (LV_BC_7, P2_REQ_b(3)   , bidir    , X,   300, 0 , Z   ),"&
"  204  (BC_2   , *            , control  , 0   ),"&
"  203  (LV_BC_7, P2_PAR       , bidir    , X,   204, 0 , Z   ),"&
"  202  (BC_2   , *            , control  , 0   ),"&
"  201  (LV_BC_7, P2_INTA_b     , bidir    , X,   202, 0 , Z   ),"&
"  200  (BC_2   , *            , control  , 0   ),"&
"  199  (LV_BC_7, PCI_GNT_b(7)  , bidir    , X,   200, 0 , Z   ),"&
"  198  (BC_2   , *            , control  , 0   ),"&
"  197  (LV_BC_7, P2_CBE(1)    , bidir    , X,   198, 0 , Z   ),"&
"  196  (BC_2   , *            , control  , 0   ),"&
"  195  (LV_BC_7, P2_CLK       , bidir    , X,   196, 0 , Z   ),"&
"  194  (BC_2   , *            , control  , 0   ),"&
"  193  (LV_BC_7, P2_AD(12)    , bidir    , X,   194, 0 , Z   ),"&
"  192  (LV_BC_7, P2_AD(13)    , bidir    , X,   194, 0 , Z   ),"&
"  191  (LV_BC_7, P2_AD(10)    , bidir    , X,   194, 0 , Z   ),"&
"  190  (LV_BC_7, P2_AD(15)    , bidir    , X,   194, 0 , Z   ),"&
"  189  (LV_BC_7, P2_REQ_b(4)   , bidir    , X,   196, 0 , Z   ),"&
"  188  (LV_BC_7, P2_AD(11)    , bidir    , X,   194, 0 , Z   ),"&
"  187  (BC_2   , *            , control  , 0   ),"&
"  186  (LV_BC_7, P2_AD(5)     , bidir    , X,   187, 0 , Z   ),"&
"  185  (LV_BC_7, P2_AD(9)     , bidir    , X,   194, 0 , Z   ),"&
"  184  (LV_BC_7, P2_AD(3)     , bidir    , X,   187, 0 , Z   ),"&
"  183  (LV_BC_7, P2_IDSEL     , bidir    , X,   196, 0 , Z   ),"&
"  182  (LV_BC_7, P2_AD(0)     , bidir    , X,   187, 0 , Z   ),"&
"  181  (LV_BC_7, P2_AD(8)     , bidir    , X,   194, 0 , Z   ),"&
"  180  (LV_BC_7, P2_CBE(0)    , bidir    , X,   198, 0 , Z   ),"&
"  179  (BC_2   , *            , control  , 0   ),"&
"  178  (LV_BC_7, P2_GNT_b(3)   , bidir    , X,   179, 0 , Z   ),"&
"  177  (LV_BC_7, P2_AD(7)     , bidir    , X,   187, 0 , Z   ),"&
"  176  (LV_BC_7, P2_AD(4)     , bidir    , X,   187, 0 , Z   ),"&
"  175  (BC_2   , *            , control  , 0   ),"&
"  174  (LV_BC_7, P1_AD(31)    , bidir    , X,   175, 0 , Z   ),"&
"  173  (LV_BC_7, P2_AD(6)     , bidir    , X,   187, 0 , Z   ),"&
"  172  (LV_BC_7, P1_AD(28)    , bidir    , X,   175, 0 , Z   ),"&
"  171  (LV_BC_7, PCI_REQ_b(7)  , bidir    , X,   196, 0 , Z   ),"&
"  170  (LV_BC_7, P2_AD(2)     , bidir    , X,   187, 0 , Z   ),"&
"  169  (LV_BC_7, P2_M66EN     , bidir    , X,   196, 0 , Z   ),"&
"  168  (BC_2   , *            , control  , 0   ),"&
"  167  (LV_BC_7, P2_REQ1_b     , bidir    , X,   168, 0 , Z   ),"&
"  166  (BC_2   , *            , control  , 0   ),"&
"  165  (LV_BC_7, P2_GNT1_b     , bidir    , X,   166, 0 , Z   ),"&
"  164  (LV_BC_7, P2_AD(1)     , bidir    , X,   187, 0 , Z   ),"&
"  163  (LV_BC_7, P2_GNT_b(4)   , bidir    , X,   179, 0 , Z   ),"&
"  162  (BC_2   , *            , control  , 0   ),"&
"  161  (LV_BC_7, P1_RST_b      , bidir    , X,   162, 0 , Z   ),"&
"  160  (LV_BC_7, P2_GNT_b(2)   , bidir    , X,   179, 0 , Z   ),"&
"  159  (LV_BC_7, P1_AD(30)    , bidir    , X,   175, 0 , Z   ),"&
"  158  (LV_BC_7, P1_AD(29)    , bidir    , X,   175, 0 , Z   ),"&
"  157  (LV_BC_7, P1_AD(27)    , bidir    , X,   175, 0 , Z   ),"&
"  156  (LV_BC_7, P1_AD(26)    , bidir    , X,   175, 0 , Z   ),"&
"  155  (BC_2   , *            , control  , 0   ),"&
"  154  (LV_BC_7, P1_CBE(3)    , bidir    , X,   155, 0 , Z   ),"&
"  153  (LV_BC_7, P1_AD(24)    , bidir    , X,   175, 0 , Z   ),"&
"  152  (LV_BC_7, P1_AD(25)    , bidir    , X,   175, 0 , Z   ),"&
"  151  (BC_2   , *            , control  , 0   ),"&
"  150  (LV_BC_7, P1_AD(23)    , bidir    , X,   151, 0 , Z   ),"&
"  149  (LV_BC_7, P1_AD(20)    , bidir    , X,   151, 0 , Z   ),"&
"  148  (LV_BC_7, P1_AD(21)    , bidir    , X,   151, 0 , Z   ),"&
"  147  (LV_BC_7, P1_AD(16)    , bidir    , X,   151, 0 , Z   ),"&
"  146  (LV_BC_7, P1_AD(17)    , bidir    , X,   151, 0 , Z   ),"&
"  145  (LV_BC_7, P1_AD(18)    , bidir    , X,   151, 0 , Z   ),"&
"  144  (BC_2   , *            , control  , 0   ),"&
"  143  (LV_BC_7, P1_IRDY_b     , bidir    , X,   144, 0 , Z   ),"&
"  142  (BC_2   , *            , control  , 0   ),"&
"  141  (LV_BC_7, P1_FRAME_b    , bidir    , X,   142, 0 , Z   ),"&
"  140  (BC_2   , *            , control  , 0   ),"&
"  139  (LV_BC_7, P1_PERR_b     , bidir    , X,   140, 0 , Z   ),"&
"  138  (BC_2   , *            , control  , 0   ),"&
"  137  (LV_BC_7, P1_STOP_b     , bidir    , X,   138, 0 , Z   ),"&
"  136  (BC_2   , *            , control  , 0   ),"&
"  135  (LV_BC_7, P1_AD(14)    , bidir    , X,   136, 0 , Z   ),"&
"  134  (LV_BC_7, P1_AD(22)    , bidir    , X,   151, 0 , Z   ),"&
"  133  (LV_BC_7, P1_AD(15)    , bidir    , X,   136, 0 , Z   ),"&
"  132  (BC_2   , *            , control  , 0   ),"&
"  131  (LV_BC_7, P1_DEVSEL_b   , bidir    , X,   132, 0 , Z   ),"&
"  130  (LV_BC_7, P1_AD(19)    , bidir    , X,   151, 0 , Z   ),"&
"  129  (LV_BC_7, P1_AD(13)    , bidir    , X,   136, 0 , Z   ),"&
"  128  (BC_2   , *            , control  , 0   ),"&
"  127  (LV_BC_7, PCI_GNT_b(6)  , bidir    , X,   128, 0 , Z   ),"&
"  126  (LV_BC_7, P1_CBE(2)    , bidir    , X,   155, 0 , Z   ),"&
"  125  (LV_BC_7, P1_CBE(1)    , bidir    , X,   155, 0 , Z   ),"&
"  124  (LV_BC_7, P1_AD(10)    , bidir    , X,   136, 0 , Z   ),"&
"  123  (BC_2   , *            , control  , 0   ),"&
"  122  (LV_BC_7, P1_TRDY_b     , bidir    , X,   123, 0 , Z   ),"&
"  121  (LV_BC_7, P1_AD(11)    , bidir    , X,   136, 0 , Z   ),"&
"  120  (BC_2   , *            , control  , 0   ),"&
"  119  (LV_BC_7, P1_INTA_b     , bidir    , X,   120, 0 , Z   ),"&
"  118  (BC_2   , *            , control  , 0   ),"&
"  117  (LV_BC_7, P1_PAR       , bidir    , X,   118, 0 , Z   ),"&
"  116  (BC_2   , *            , control  , 0   ),"&
"  115  (LV_BC_7, P1_GNT_b(4)   , bidir    , X,   116, 0 , Z   ),"&
"  114  (BC_2   , *            , control  , 0   ),"&
"  113  (LV_BC_7, P1_AD(7)     , bidir    , X,   114, 0 , Z   ),"&
"  112  (LV_BC_7, P1_AD(12)    , bidir    , X,   136, 0 , Z   ),"&
"  111  (LV_BC_7, P1_CBE(0)    , bidir    , X,   155, 0 , Z   ),"&
"  110  (LV_BC_7, P1_AD(5)     , bidir    , X,   114, 0 , Z   ),"&
"  109  (BC_2   , *            , control  , 0   ),"&
"  108  (LV_BC_7, PCI_GNT_b(5)  , bidir    , X,   109, 0 , Z   ),"&
"  107  (LV_BC_7, P1_AD(3)     , bidir    , X,   114, 0 , Z   ),"&
"  106  (LV_BC_7, P1_AD(8)     , bidir    , X,   136, 0 , Z   ),"&
"  105  (LV_BC_7, P1_AD(9)     , bidir    , X,   136, 0 , Z   ),"&
"  104  (LV_BC_7, P1_AD(1)     , bidir    , X,   114, 0 , Z   ),"&
"  103  (LV_BC_7, P1_AD(4)     , bidir    , X,   114, 0 , Z   ),"&
"  102  (LV_BC_7, P1_AD(6)     , bidir    , X,   114, 0 , Z   ),"&
"  101  (LV_BC_7, PCI_REQ_b(6)  , bidir    , X,   196, 0 , Z   ),"&
"  100  (LV_BC_7, P1_AD(2)     , bidir    , X,   114, 0 , Z   ),"&
"  99   (LV_BC_7, P1_AD(0)     , bidir    , X,   114, 0 , Z   ),"&
"  98   (LV_BC_7, P1_REQ_b(2)   , bidir    , X,   196, 0 , Z   ),"&
"  97   (BC_2   , *            , control  , 0   ),"&
"  96   (LV_BC_7, PCI_REQ_b(5)  , bidir    , X,   97 , 0 , Z   ),"&
"  95   (LV_BC_7, P1_64EN_b     , bidir    , X,   97 , 0 , Z   ),"&
"  94   (LV_BC_7, P1_CLK       , bidir    , X,   97 , 0 , Z   ),"&
"  93   (BC_2   , *            , control  , 0   ),"&
"  92   (LV_BC_7, P1_GNT1_b     , bidir    , X,   93 , 0 , Z   ),"&
"  91   (BC_2   , *            , control  , 0   ),"&
"  90   (LV_BC_7, P1_GNT_b(3)   , bidir    , X,   91 , 0 , Z   ),"&
"  89   (BC_2   , *            , control  , 0   ),"&
"  88   (LV_BC_7, P1_ACK64_b    , bidir    , X,   89 , 0 , Z   ),"&
"  87   (BC_2   , *            , control  , 0   ),"&
"  86   (LV_BC_7, P1_REQ64_b    , bidir    , X,   87 , 0 , Z   ),"&
"  85   (BC_2   , *            , control  , 0   ),"&
"  84   (LV_BC_7, P1_REQ1_b     , bidir    , X,   85 , 0 , Z   ),"&
"  83   (LV_BC_7, P1_GNT_b(2)   , bidir    , X,   91 , 0 , Z   ),"&
"  82   (BC_2   , *            , control  , 0   ),"&
"  81   (LV_BC_7, P1_CBE(7)    , bidir    , X,   82 , 0 , Z   ),"&
"  80   (LV_BC_7, P1_CBE(5)    , bidir    , X,   82 , 0 , Z   ),"&
"  79   (BC_2   , *            , control  , 0   ),"&
"  78   (LV_BC_7, ENUM_b        , bidir    , X,   79 , 0 , Z   ),"&
"  77   (LV_BC_7, P1_CBE(4)    , bidir    , X,   82 , 0 , Z   ),"&
"  76   (BC_2   , *            , control  , 0   ),"&
"  75   (LV_BC_7, P1_AD(61)    , bidir    , X,   76 , 0 , Z   ),"&
"  74   (BC_2   , *            , control  , 0   ),"&
"  73   (LV_BC_7, P1_PAR64     , bidir    , X,   74 , 0 , Z   ),"&
"  72   (LV_BC_7, P1_CBE(6)    , bidir    , X,   82 , 0 , Z   ),"&
"  71   (LV_BC_7, P1_AD(63)    , bidir    , X,   76 , 0 , Z   ),"&
"  70   (LV_BC_7, P1_AD(60)    , bidir    , X,   76 , 0 , Z   ),"&
"  69   (LV_BC_7, P1_AD(58)    , bidir    , X,   76 , 0 , Z   ),"&
"  68   (LV_BC_7, P1_AD(62)    , bidir    , X,   76 , 0 , Z   ),"&
"  67   (LV_BC_7, P1_IDSEL     , bidir    , X,   97 , 0 , Z   ),"&
"  66   (LV_BC_7, P1_REQ_b(3)   , bidir    , X,   97 , 0 , Z   ),"&
"  65   (LV_BC_7, P1_AD(59)    , bidir    , X,   76 , 0 , Z   ),"&
"  64   (LV_BC_7, P1_REQ_b(4)   , bidir    , X,   97 , 0 , Z   ),"&
"  63   (BC_2   , *            , control  , 0   ),"&
"  62   (LV_BC_7, P1_AD(52)    , bidir    , X,   63 , 0 , Z   ),"&
"  61   (LV_BC_7, P1_AD(57)    , bidir    , X,   76 , 0 , Z   ),"&
"  60   (LV_BC_7, P1_AD(56)    , bidir    , X,   76 , 0 , Z   ),"&
"  59   (LV_BC_7, P1_M66EN     , bidir    , X,   97 , 0 , Z   ),"&
"  58   (LV_BC_7, P1_AD(55)    , bidir    , X,   63 , 0 , Z   ),"&
"  57   (LV_BC_7, P1_AD(54)    , bidir    , X,   63 , 0 , Z   ),"&
"  56   (BC_2   , *            , control  , 0   ),"&
"  55   (LV_BC_7, P1_AD(47)    , bidir    , X,   56 , 0 , Z   ),"&
"  54   (LV_BC_7, P1_AD(51)    , bidir    , X,   63 , 0 , Z   ),"&
"  53   (LV_BC_7, P1_AD(50)    , bidir    , X,   63 , 0 , Z   ),"&
"  52   (LV_BC_7, P1_AD(53)    , bidir    , X,   63 , 0 , Z   ),"&
"  51   (LV_BC_7, P1_AD(49)    , bidir    , X,   63 , 0 , Z   ),"&
"  50   (LV_BC_7, P1_AD(48)    , bidir    , X,   63 , 0 , Z   ),"&
"  49   (BC_2   , *            , control  , 0   ),"&
"  48   (LV_BC_7, P1_SERR_b     , bidir    , X,   49 , 0 , Z   ),"&
"  47   (LV_BC_7, P1_AD(46)    , bidir    , X,   56 , 0 , Z   ),"&
"  46   (LV_BC_7, P1_AD(45)    , bidir    , X,   56 , 0 , Z   ),"&
"  45   (LV_BC_7, P1_AD(41)    , bidir    , X,   56 , 0 , Z   ),"&
"  44   (LV_BC_7, P1_AD(42)    , bidir    , X,   56 , 0 , Z   ),"&
"  43   (LV_BC_7, P1_AD(43)    , bidir    , X,   56 , 0 , Z   ),"&
"  42   (BC_2   , *            , control  , 0   ),"&
"  41   (LV_BC_7, P1_AD(38)    , bidir    , X,   42 , 0 , Z   ),"&
"  40   (LV_BC_7, P1_AD(39)    , bidir    , X,   42 , 0 , Z   ),"&
"  39   (LV_BC_7, P1_AD(34)    , bidir    , X,   42 , 0 , Z   ),"&
"  38   (LV_BC_7, P1_AD(35)    , bidir    , X,   42 , 0 , Z   ),"&
"  37   (LV_BC_7, P1_AD(36)    , bidir    , X,   42 , 0 , Z   ),"&
"  36   (LV_BC_7, P1_AD(32)    , bidir    , X,   42 , 0 , Z   ),"&
"  35   (BC_2   , *            , control  , 0   ),"&
"  34   (LV_BC_7, PB_A(31)     , bidir    , X,   35 , 0 , Z   ),"&
"  33   (LV_BC_7, P1_AD(33)    , bidir    , X,   42 , 0 , Z   ),"&
"  32   (LV_BC_7, PB_A(28)     , bidir    , X,   35 , 0 , Z   ),"&
"  31   (BC_2   , *            , control  , 0   ),"&
"  30   (LV_BC_7, PB_CI_b       , bidir    , X,   31 , 0 , Z   ),"&
"  29   (LV_BC_7, PB_A(27)     , bidir    , X,   35 , 0 , Z   ),"&
"  28   (LV_BC_7, P1_AD(44)    , bidir    , X,   56 , 0 , Z   ),"&
"  27   (BC_2   , *            , control  , 0   ),"&
"  26   (LV_BC_7, PB_DBG1_b     , bidir    , X,   27 , 0 , Z   ),"&
"  25   (LV_BC_7, PB_A(24)     , bidir    , X,   35 , 0 , Z   ),"&
"  24   (LV_BC_7, P1_AD(40)    , bidir    , X,   56 , 0 , Z   ),"&
"  23   (LV_BC_7, PB_A(21)     , bidir    , X,   35 , 0 , Z   ),"&
"  22   (LV_BC_7, PB_A(26)     , bidir    , X,   35 , 0 , Z   ),"&
"  21   (LV_BC_7, P1_AD(37)    , bidir    , X,   42 , 0 , Z   ),"&
"  20   (LV_BC_7, PB_A(29)     , bidir    , X,   35 , 0 , Z   ),"&
"  19   (LV_BC_7, PB_A(22)     , bidir    , X,   35 , 0 , Z   ),"&
"  18   (LV_BC_7, PB_A(25)     , bidir    , X,   35 , 0 , Z   ),"&
"  17   (LV_BC_7, P1_RST_DIR   , bidir    , X,   97 , 0 , Z   ),"&
"  16   (LV_BC_7, PB_A(18)     , bidir    , X,   35 , 0 , Z   ),"&
"  15   (BC_2   , *            , control  , 0   ),"&
"  14   (LV_BC_7, PB_GBL_b      , bidir    , X,   15 , 0 , Z   ),"&
"  13   (BC_2   , *            , control  , 0   ),"&
"  12   (LV_BC_7, PB_A(16)     , bidir    , X,   13 , 0 , Z   ),"&
"  11   (BC_2   , *            , control  , 0   ),"&
"  10   (LV_BC_7, PB_BR1_b      , bidir    , X,   11 , 0 , Z   ),"&
"  9    (LV_BC_7, PB_A(30)     , bidir    , X,   13 , 0 , Z   ),"&
"  8    (LV_BC_7, PB_DBG2_b     , bidir    , X,   27 , 0 , Z   ),"&
"  7    (LV_BC_7, PB_A(23)     , bidir    , X,   13 , 0 , Z   ),"&
"  6    (LV_BC_7, PB_A(14)     , bidir    , X,   13 , 0 , Z   ),"&
"  5    (LV_BC_7, PB_A(15)     , bidir    , X,   13 , 0 , Z   ),"&
"  4    (LV_BC_7, PB_A(19)     , bidir    , X,   13 , 0 , Z   ),"&
"  3    (LV_BC_7, PB_A(17)     , bidir    , X,   13 , 0 , Z   ),"&
"  2    (LV_BC_7, PB_A(20)     , bidir    , X,   13 , 0 , Z   ),"&
"  1    (LV_BC_7, PB_A(12)     , bidir    , X,   13 , 0 , Z   ),"&
"  0    (LV_BC_7, PB_A(13)     , bidir    , X,   411, 0 , Z   ) ";

end pspan2_3p_504;

-- package LVS_BSCAN_CELLS is
--     use STD_1149_1_1994.all;
--         constant LV_BC_7: CELL_INFO;
-- 
-- end LVS_BSCAN_CELLS;
-- package body LVS_BSCAN_CELLS is
--     use STD_1149_1_1994.all;
--         constant LV_BC_7: CELL_INFO := 
--            ((BIDIR_IN, EXTEST,  PI),  (BIDIR_OUT, EXTEST,  PO),
--            (BIDIR_IN, SAMPLE,  PI),  (BIDIR_OUT, SAMPLE,  PI),
--            (BIDIR_IN, INTEST,  X),  (BIDIR_OUT, INTEST,  PI));
 
-- end LVS_BSCAN_CELLS;






This library contains 7714 BSDL files (for 6086 distinct entities) from 64 vendors
Last BSDL model (CY7C1512KV18) was added on Sep 15, 2017 14:30
info@bsdl.info