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ChipVORX ISP IP for Ultra Fast Flash Programming
BSDL File: SCAN921260 Download View details  


-------------------------------------------------------------------------------
    -- Copyright National Semiconductor Corporation 2001
    -- 
    -- Boundary Scan Description Language, BSDL Model for SCAN921260
    -- 6 by 10-bit LVDS Deserializer
    -- 
    -- National Semiconductor Customer Service Center
    -- N. America  (800) 272-9959
    -- Europe Germany p49 (0) 69 9508 6208
    -------------------------------------------------------------------------------
-- 01   Initial  13/04/01
-- XX   Chan               Made pwr/gnd naming conventions match datasheet
--                         Added missing pwr/gnd pins
-- 02   BillA    27/11/01  Comment out BIST_EXEC
--                         Make pwrdn a linkage pin
-- 03   BillA    28/11/01  Combined rev XX with 02
--
-- 04   PeteC	 15/01/03  Modified to overcome discrepency
--	JTAG Tech	   between pin map description & pin numbering

-- Notes:
-- This device contains differential pins.  Not all ATPGs correctly parse
--    attribute PORT_GROUPING of SCAN921260 : entity is
--        "DIFFERENTIAL_VOLTAGE ( (Rin_p, Rin_n))";          
-- Therefore this has been commented out. 
-- The Rin_n pins are also commented out for the same reason.
--
-- The follow statement is directly from the 1149.1 - supplement (BSDL specification)
-- It has proven to be non-parsable by all ATPGs. It is therefore this has been commented out.
--    attribute RUNBIST_EXECUTION of SCAN921260 : entity is
--        "Wait_duration (10.0e-3), "&
--        "Observing HIGHZ At_Pins, "&
--        "Expect_Data 111111111111";

 
entity SCAN921260 is
    generic (PHYSICAL_PIN_MAP : string := "UNDEFINED");
   
    port (
      sel:          in        bit_vector(0 to 2);
      Rin_p:        in        bit_vector(0 to 6);
      --  Rin_n:    linkage   bit_vector(0 to 6);
      refclk:       in        bit;
      ren:          in        bit;
      pwrdn:        linkage   bit;
      rclk:         out       bit_vector(0 to 5);
      lock:         out       bit_vector(0 to 5);
      bistmode_req: in        bit;
      bist_act:     in        bit;
      bist_sel:     in        bit_vector(0 to 2);
      chtst_en:     in        bit;
      chtst:        out       bit;
      Rout0:        out       bit_vector(0 to 9);
      Rout1:        out       bit_vector(0 to 9);
      Rout2:        out       bit_vector(0 to 9);
      Rout3:        out       bit_vector(0 to 9);
      Rout4:        out       bit_vector(0 to 9);
      Rout5:        out       bit_vector(0 to 9);
      TDI:          in        bit;
      TMS:          in        bit;
      TCK:          in        bit;
      TRST:         in        bit;
      TDO:          out       bit;
      AVDD:         linkage   bit_vector(0 to 3);
      AGND:	    linkage   bit_vector(0 to 4);
      DGND:         linkage   bit_vector(0 to 25);
      DVDD:         linkage   bit_vector(0 to 24);
      PVDD:         linkage   bit_vector(0 to 11);
      PGND:         linkage   bit_vector(0 to 15)
   );
 
     use STD_1149_1_1994.all;
 
     attribute COMPONENT_CONFORMANCE of SCAN921260 : entity is "STD_1149_1_1993";
 
     attribute PIN_MAP of SCAN921260 : entity is PHYSICAL_PIN_MAP;
    
 
-- BGA_196_INTEGER identifies each pin as an integer
  constant BGA_196_INTEGER:PIN_MAP_STRING:=
    "bist_act: 137,"&
    "bist_sel: (50, 56, 42),"&
    "bistmode_req: 24,"&
    "chtst: 31,"&
    "chtst_en: 59,"&
    "Rin_p:(4, 34, 7, 37, 10, 39, 13),"&
    --"Rin_n:(3, 33, 6, 36, 9, 38, 12),"&
    "lock:(73, 183, 171, 194, 195, 55),"&
    "pwrdn:19,"&
    "rclk:(72, 142, 173, 178, 167, 83),"&
    "ren: 2,"&
    "Rout0: (129, 130, 101, 102, 100, 88, 87, 74, 60, 58),"&
    "Rout1: (115, 143, 114, 141, 128, 155, 169, 170, 156, 157),"&
    "Rout2: (161, 146, 174, 160, 186, 159, 185, 172, 184, 158),"&
    "Rout3: (162, 148, 177, 163, 149, 164, 165, 179, 193, 180),"&
    "Rout4: (139, 152, 154, 168, 153, 151, 166, 181, 182, 196),"&
    "Rout5: (138, 124, 123, 110, 109, 95, 96, 68, 69, 70),"&
    "refclk: 18,"&
    "sel: (40, 41, 27),"&
    "TDI: 43,"&
    "TMS: 29,"&
    "TCK: 44,"&
    "TRST:30,"&
    "TDO: 45,"&
    "AVDD: (11, 20, 23, 35),"&
    "AGND: (5, 8, 21, 22, 25),"&
    "DGND: (1, 16, 28, 46, 47, 49, 51, 53, 61, 64, 75, 76, 79, 89, 91, 92, 93, 103, 105, 106, 107, 118, 119, 134, 135, 147),"&
    "DVDD: (15, 17, 32, 48, 54, 62, 63, 65, 66, 77, 80, 82, 90, 94, 104, 108, 117, 120, 121, 122, 131, 132, 133, 136, 150),"&
    "PVDD: (57, 71, 84, 98, 113, 126, 127, 140, 187, 188, 191, 192),"&
    "PGND: (14, 26, 52, 78, 85, 86, 97, 99, 111, 112, 116, 125, 175, 176, 189, 190)";

    
-- BGA_196_BALL identifies each pin as a "BALL" identifier    
  constant BGA_196_BALL:PIN_MAP_STRING:=
    "bist_act: K11,"&
    "bist_sel: (D8, D14, C14),"&
    "bistmode_req: B10,"&
    "chtst: C3,"&
    "chtst_en: E3,"&
    "Rin_p:(A4, C6, A7, C9, A10, C11, A13),"&
    --"Rin_n:(A3, C5, A6, C8, A9, C10, A12),"&
    "lock:(F3, P1, N3, P12, P13, D13),"&
    "pwrdn:B5,"&
    "rclk:(F2, L2, N5, N10, M13, F13),"&
    "ren: A2,"&
    "Rout0: (K3, K4, H3, H4, H2, G4, G3, F4, E4, E2),"&
    "Rout1: (J3, L3, J2, L1, K2, M1, N1, N2, M2, M3),"&
    "Rout2: (M7, L6, N6, M6, P4, M5, P3, N4, P2, M4),"&
    "Rout3: (M8, L8, N9, M9, L9, M10, M11, N11, P11, N12),"&
    "Rout4: (K13, L12, L14, M14, L13, L11, M12, N13, N14, P14),"&
    "Rout5: (K12, J12, J11, H12, H11, G11, G12, E12, E13, E14),"&
    "refclk:B4,"&
    "sel: (C12, C13, B13),"&
    "TDI: D1,"&
    "TMS: C1,"&
    "TCK: D2,"&
    "TRST:C2,"&
    "TDO: D3,"&    
    "AVDD: (A11, B6, B9, C7),"& 
    "AGND: (A5, A8, B7, B8, B11),"&
    "DGND: (A1, B2, B14, D4, D5, D7, D9, D11, E5, E8, F5, F6, F9, G5, G7, G8, G9, H5, H7, H8, H9, J6, J7, K8, K9, L7),"&
    "DVDD: (B1, B3, C4, D6, D12, E6, E7, E9, E10, F7, F10, F12, G6, G10, H6, H10, J5, J8, J9, J10, K5, K6, K7, K10, L10),"&
    "PVDD: (F1, E1, J1, K1, P6, P5, P9, P10, J14, K14, G14, F14),"&
    "PGND: (A14, B12, D10, G2, G1, H1, J4, N7, P7, P8, N8, J13, H14, H13, G13, F8)";   
    
    

--    attribute PORT_GROUPING of SCAN921260 : entity is
--        "DIFFERENTIAL_VOLTAGE ( (Rin_p, Rin_n))";          
        
    attribute TAP_SCAN_IN of TDI : signal is true;              
    attribute TAP_SCAN_MODE of TMS : signal is true;
    attribute TAP_SCAN_OUT of TDO : signal is true;

    attribute TAP_SCAN_CLOCK of TCK : signal is (25.0e6, BOTH); 
    attribute TAP_SCAN_RESET of TRST : signal is true; 

    attribute INSTRUCTION_LENGTH of SCAN921260 : entity is 8;   

    attribute INSTRUCTION_OPCODE of SCAN921260 : entity is      
        "BYPASS          (11111111)," &   
        "EXTEST          (00000000)," &
        "SAMPLE          (10000010)," &
        "IDCODE          (10000001)," &
        "CLAMP           (10000111)," &
        "HIGHZ           (00000110)," &
        "RUNBIST         (10000011)";

    attribute INSTRUCTION_CAPTURE of SCAN921260 : entity is "XXXXXX01";   

    attribute IDCODE_REGISTER of SCAN921260 : entity is                
        "0000" &                -- version                             
        "1111110000100111" &    -- part number FC27 RX
        "00000001111" &         -- manufacturer's identity
        "1";                    -- required by 1149.1

--    attribute RUNBIST_EXECUTION of SCAN921260 : entity is
--        "Wait_duration (10.0e-3), "&
--        "Observing HIGHZ At_Pins, "&
--        "Expect_Data 111111111111";


    attribute REGISTER_ACCESS of SCAN921260 : entity is
        "BYPASS          (BYPASS, CLAMP, HIGHZ)," &
        "BOUNDARY        (SAMPLE, EXTEST)," &
        "BISTREG[12]      (RUNBIST)," &
        "DEVICE_ID       (IDCODE)";
        
--    attribute BOUNDARY_CELLS of SCAN921260 :entity is "BC_1,BC_4";

    attribute BOUNDARY_LENGTH of SCAN921260 : entity is  105;   
                                                            
    attribute BOUNDARY_REGISTER  of SCAN921260 : entity is  
     --
     -- num   cell   port                  function   safe [ccell disval rslt]
     --
   "104 (BC_1,  chtst,            output3,  X,000, 0, Z)," &                               
   "103 (BC_1, *,                controlr, 0)," &         -- Control Lock ch 0          
   "102 (BC_1, *,                controlr, 0)," &         -- Control Output ch 0        
   "101 (BC_1,  lock(0),          output3,  X,103, 0, Z)," &                                
   "100 (BC_1,  Rout0(9),         output3,  X,102, 0, Z)," &                                
   "099 (BC_1,  Rout0(8),         output3,  X,102, 0, Z)," &                                
   "098 (BC_1,  Rout0(7),         output3,  X,102, 0, Z)," &                                
   "097 (BC_1,  Rout0(6),         output3,  X,102, 0, Z)," &                                
   "096 (BC_1,  Rout0(5),         output3,  X,102, 0, Z)," &                                
   "095 (BC_1,  rclk(0),          output3,  X,102, 0, Z)," &        
   "094 (BC_1,  Rout0(4),         output3,  X,102, 0, Z)," &        
   "093 (BC_1,  Rout0(3),         output3,  X,102, 0, Z)," &                                
   "092 (BC_1,  Rout0(2),         output3,  X,102, 0, Z)," &                                
   "091 (BC_1,  Rout0(1),         output3,  X,102, 0, Z)," &                                
   "090 (BC_1,  Rout0(0),         output3,  X,102, 0, Z)," &                                
   "089 (BC_1,  Rout1(0),         output3,  X,083, 0, Z)," &                                
   "088 (BC_1,  Rout1(1),         output3,  X,083, 0, Z)," &                                
   "087 (BC_1,  Rout1(2),         output3,  X,083, 0, Z)," &                                
   "086 (BC_1,  Rout1(3),         output3,  X,083, 0, Z)," &                                
   "085 (BC_1,  Rout1(4),         output3,  X,083, 0, Z)," &                                
   "084 (BC_1,  rclk(1),          output3,  X,083, 0, Z)," &                                 
   "083 (BC_1, *,                controlr, 0)," &         -- Control Output ch 1        
   "082 (BC_1, *,                controlr, 0)," &         -- Control Lock ch 1          
   "081 (BC_1,  Rout1(5),         output3,  X,083, 0, Z)," &                                
   "080 (BC_1,  Rout1(6),         output3,  X,083, 0, Z)," &                                
   "079 (BC_1,  Rout1(7),         output3,  X,083, 0, Z)," &                                
   "078 (BC_1,  Rout1(8),         output3,  X,083, 0, Z)," &                                
   "077 (BC_1,  Rout1(9),         output3,  X,083, 0, Z)," &                                
   "076 (BC_1,  lock(1),          output3,  X,082, 0, Z)," &                                
   "075 (BC_1,  lock(2),          output3,  X,068, 0, Z)," &                                
   "074 (BC_1,  Rout2(9),         output3,  X,067, 0, Z)," &                                
   "073 (BC_1,  Rout2(8),         output3,  X,067, 0, Z)," &                                
   "072 (BC_1,  Rout2(7),         output3,  X,067, 0, Z)," &                                
   "071 (BC_1,  Rout2(6),         output3,  X,067, 0, Z)," &                                
   "070 (BC_1,  Rout2(5),         output3,  X,067, 0, Z)," &                                
   "069 (BC_1,  rclk(2),          output3,  X,067, 0, Z)," &                                
   "068 (BC_1, *,                controlr, 0)," &         -- Control Lock ch 2          
   "067 (BC_1, *,                controlr, 0)," &         -- Control Output ch 2        
   "066 (BC_1,  Rout2(4),         output3,  X,067, 0, Z)," &                                
   "065 (BC_1,  Rout2(3),         output3,  X,067, 0, Z)," &                                
   "064 (BC_1,  Rout2(2),         output3,  X,067, 0, Z)," &                                
   "063 (BC_1,  Rout2(1),         output3,  X,067, 0, Z)," &                                
   "062 (BC_1,  Rout2(0),         output3,  X,067, 0, Z)," &                                
   "061 (BC_1,  Rout3(0),         output3,  X,055, 0, Z)," &                                
   "060 (BC_1,  Rout3(1),         output3,  X,055, 0, Z)," &                                
   "059 (BC_1,  Rout3(2),         output3,  X,055, 0, Z)," &                                
   "058 (BC_1,  Rout3(3),         output3,  X,055, 0, Z)," &                                
   "057 (BC_1,  Rout3(4),         output3,  X,055, 0, Z)," &                                
   "056 (BC_1,  rclk(3),          output3,  X,055, 0, Z)," &                                 
   "055 (BC_1, *,                controlr, 0)," &         -- Control Output ch 3        
   "054 (BC_1, *,                controlr, 0)," &         -- Control Lock ch 3          
   "053 (BC_1,  Rout3(5),         output3,  X,055, 0, Z)," &                                
   "052 (BC_1,  Rout3(6),         output3,  X,055, 0, Z)," &                                
   "051 (BC_1,  Rout3(7),         output3,  X,055, 0, Z)," &                                
   "050 (BC_1,  Rout3(8),         output3,  X,055, 0, Z)," &                                
   "049 (BC_1,  Rout3(9),         output3,  X,055, 0, Z)," &                                
   "048 (BC_1,  lock(3),          output3,  X,054, 0, Z)," &                                
   "047 (BC_1,  lock(4),          output3,  X,039, 0, Z)," &                                
   "046 (BC_1,  Rout4(9),         output3,  X,040, 0, Z)," &                                
   "045 (BC_1,  Rout4(8),         output3,  X,040, 0, Z)," &                                
   "044 (BC_1,  Rout4(7),         output3,  X,040, 0, Z)," &                                
   "043 (BC_1,  Rout4(6),         output3,  X,040, 0, Z)," &                                
   "042 (BC_1,  Rout4(5),         output3,  X,040, 0, Z)," &                                
   "041 (BC_1,  rclk(4),          output3,  X,040, 0, Z)," &                                
   "040 (BC_1, *,                controlr, 0)," &         -- Control Output ch 4        
   "039 (BC_1, *,                controlr, 0)," &         -- Control Lock ch 4          
   "038 (BC_1,  Rout4(4),         output3,  X,040, 0, Z)," &                                
   "037 (BC_1,  Rout4(3),         output3,  X,040, 0, Z)," &                                
   "036 (BC_1,  Rout4(2),         output3,  X,040, 0, Z)," &                                
   "035 (BC_1,  Rout4(1),         output3,  X,040, 0, Z)," &                                
   "034 (BC_1,  Rout4(0),         output3,  X,040, 0, Z)," &                                
   "033 (BC_1,  Rout5(0),         output3,  X,027, 0, Z)," &                                
   "032 (BC_1,  Rout5(1),         output3,  X,027, 0, Z)," &                                
   "031 (BC_1,  Rout5(2),         output3,  X,027, 0, Z)," &                                
   "030 (BC_1,  Rout5(3),         output3,  X,027, 0, Z)," &                                
   "029 (BC_1,  Rout5(4),         output3,  X,027, 0, Z)," &                                
   "028 (BC_1,  rclk(5),          output3,  X,027, 0, Z)," &                                    
   "027 (BC_1, *,                controlr, 0)," &         -- Control Output ch 5        
   "026 (BC_1, *,                controlr, 0)," &         -- Control Lock ch 5          
   "025 (BC_1,  Rout5(5),         output3,  X,027, 0, Z)," &                                
   "024 (BC_1,  Rout5(6),         output3,  X,027, 0, Z)," &                                
   "023 (BC_1,  Rout5(7),         output3,  X,027, 0, Z)," &                                
   "022 (BC_1,  Rout5(8),         output3,  X,027, 0, Z)," &                                
   "021 (BC_1,  Rout5(9),         output3,  X,027, 0, Z)," &                                
   "020 (BC_1,  lock(5),          output3,  X,026, 0, Z)," &                                
   "019 (BC_4,  bist_act,         input,    X)," &                                          
   "018 (BC_4,  Rin_p(6),         input,    X)," &                                          
   "017 (BC_4,  bist_sel(0),      input,    X)," &                                          
   "016 (BC_4,  bist_sel(1),      input,    X)," &                                          
   "015 (BC_4,  bist_sel(2),      input,    X)," &                                          
   "014 (BC_4,  Rin_p(5),         input,    X)," &                                          
   "013 (BC_4,  sel(0),           input,    X)," &                                          
   "012 (BC_4,  sel(1),           input,    X)," &                                          
   "011 (BC_4,  sel(2),           input,    X)," &                                          
   "010 (BC_4,  bistmode_req,     input,    X)," &                                          
   "009 (BC_4,  Rin_p(4),         input,    X)," &                                          
   "008 (BC_4,  Rin_p(3),         input,    X)," &                                          
   "007 (BC_4,  refclk,           input,    X)," &                                          
   "006 (BC_4,  ren,              input,    X)," &                                          
   "005 (BC_4,  Rin_p(2),         input,    X)," &                                          
   "004 (BC_4,  Rin_p(1),         input,    X)," &                                          
   "003 (BC_4,  *,                internal,    1)," &   -- pwrdn
   "002 (BC_4,  Rin_p(0),         input,    X)," &    
   "001 (BC_4,  chtst_en,         input,    X)," &                                          
   "000 (BC_1, *,                controlr, 0)";                  -- chtst_oen                          

end SCAN921260;


This library contains 8117 BSDL files (for 6391 distinct entities) from 66 vendors
Last BSDL model (RT4G150CG1657) was added on Nov 23, 2017 18:20
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