BSDL Files Library for JTAG
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BSDL File: AM5K2E0X Download View details  


-------------------------------------------------------------------------------
--  TI AM5K2E0X Fixed & Floating Point DSP with Boundary Scan                --
-------------------------------------------------------------------------------
--  Supported Devices: AM5K2E04 Revision 1.0                                 --
--  Supported Devices: AM5K2E02 Revision 1.0                                 --
-------------------------------------------------------------------------------
--  Created by    : Texas Instruments Incorporated                           --
--  Documentation : AM5K2E0X Users Guide                                     --
--  BSDL Revision : 0.3 corrected signal names to match data maunal          --
--  BSDL Revision : 0.2 modified idcode                                      --
--  BSDL Revision : 0.1 originally created                                   --
--                                                                           --
--  BSDL Status   : Preliminary                                              --
--  Date Created  : 04/14/2013                                               --
--                                                                           --
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--                                                                           --
--                          IMPORTANT NOTICE                                 --
--  Texas Instruments and its subsidiaries (TI) reserve the right to make    --
--  changes to their products or to discontinue any product or service       --
--  without notice, and advise customers to obtain the latest version of     --
--  relevant information to verify, before placing orders, that information  --
--  being relied on is current and complete. All products are sold subject   --
--  to the terms and conditions of sale supplied at the time of order        --
--  acknowledgment, including those pertaining to warranty, patent infringe- --
--  ment, and limitation of liability.                                       --
--                                                                           --
--  TI warrants performance of its products to the specifications applicable --
--  at the time of sale in accordance with TI's standard warranty. Testing   --
--  and other quality control techniques are utilized to the extent TI deems --
--  necessary to support this warranty. Specific testing of all parameters   --
--  of each device is not necessarily performed, except those mandated by    --
--  government requirements.                                                 --
--                                                                           --
--  Customers are responsible for their applications using TI components.    --
--  In order to minimize risks associated with the customer's applications,  --
--  adequate design and operating safeguards must be provided by the         --
--  customer to minimize inherent or procedural hazards.                     --
--                                                                           --
--  TI assumes no liability for applications assistance or customer product  --
--  design. TI does not warrant or represent that any license, either        --
--  express or implied, is granted under any patent right, copyright, mask   --
--  work right, or other intellectual property right of TI covering or       --
--  relating to any combination, machine, or process in which such products  --
--  or services might be or are used. TI's publication of information        --
--  regarding any third party's products or services does not constitute     --
--  TI's approval, license, warranty or endorsement thereof.                 --
--                                                                           --
--  Reproduction of information in TI data books or data sheets is           --
--  permissible only if reproduction is without alteration and is            --
--  accompanied by all associated warranties, conditions, limitations and    --
--  notices.  Representation or reproduction of this information with        --
--  alteration voids all warranties provided for an associated TI product or --
--  service, is an unfair and deceptive business practice, and TI is not     --
--  responsible nor liable for any such use.                                 --
--                                                                           --
--  Resale of TI's products or services with statements different from or    --
--  beyond the parameters stated by TI for that product or service voids     --
--  all express and any implied warranties for the associated TI product or  --
--  service, is an unfair and deceptive business practice, and TI is not     --
--  responsible nor liable for any such use.                                 --
--                                                                           --
--  Also see: Standard Terms and Conditions of Sale for Semiconductor        --
--  Products. www.ti.com/sc/docs/stdterms.htm                                --
--                                                                           --
--  Mailing Address:                                                         --
--                                                                           --
--             Texas Instruments                                             --
--             Post Office Box 655303                                        --
--             Dallas, Texas 75265                                           --
--                                                                           --
--             Copyright � 2007, Texas Instruments Incorporated              --
-- ------------------------------------------------------------------------- --


entity AM5K2E0X is

  generic(PHYSICAL_PIN_MAP : string := "AAW");

  port(
   bootcomplete        : inout       bit;
   rsv008              : inout       bit;
   rsv003              : buffer      bit;
   rsv002              : buffer      bit;
   ddra00              : inout       bit;
   ddra01              : inout       bit;
   ddra02              : inout       bit;
   ddra03              : inout       bit;
   ddra04              : inout       bit;
   ddra05              : inout       bit;
   ddra06              : inout       bit;
   ddra07              : inout       bit;
   ddra08              : inout       bit;
   ddra09              : inout       bit;
   ddra10              : inout       bit;
   ddra11              : inout       bit;
   ddra12              : inout       bit;
   ddra13              : inout       bit;
   ddra14              : inout       bit;
   ddra15              : inout       bit;
   rsv023              : linkage     bit;
   ddrba0              : inout       bit;
   ddrba1              : inout       bit;
   ddrba2              : inout       bit;
   ddrcas              : inout       bit;
   ddrcb00             : inout       bit;
   ddrcb01             : inout       bit;
   ddrcb02             : inout       bit;
   ddrcb03             : inout       bit;
   ddrcb04             : inout       bit;
   ddrcb05             : inout       bit;
   ddrcb06             : inout       bit;
   ddrcb07             : inout       bit;
   ddrce0              : inout       bit;
   ddrce1              : inout       bit;
   ddrcke0             : inout       bit;
   ddrcke1             : inout       bit;
   ddrclkn             : in          bit;
   ddrclkp             : in          bit;
   ddrclkoutn0         : inout       bit;
   ddrclkoutn1         : inout       bit;
   ddrclkoutp0         : inout       bit;
   ddrclkoutp1         : inout       bit;
   ddrd00              : inout       bit;
   ddrd01              : inout       bit;
   ddrd02              : inout       bit;
   ddrd03              : inout       bit;
   ddrd04              : inout       bit;
   ddrd05              : inout       bit;
   ddrd06              : inout       bit;
   ddrd07              : inout       bit;
   ddrd08              : inout       bit;
   ddrd09              : inout       bit;
   ddrd10              : inout       bit;
   ddrd11              : inout       bit;
   ddrd12              : inout       bit;
   ddrd13              : inout       bit;
   ddrd14              : inout       bit;
   ddrd15              : inout       bit;
   ddrd16              : inout       bit;
   ddrd17              : inout       bit;
   ddrd18              : inout       bit;
   ddrd19              : inout       bit;
   ddrd20              : inout       bit;
   ddrd21              : inout       bit;
   ddrd22              : inout       bit;
   ddrd23              : inout       bit;
   ddrd24              : inout       bit;
   ddrd25              : inout       bit;
   ddrd26              : inout       bit;
   ddrd27              : inout       bit;
   ddrd28              : inout       bit;
   ddrd29              : inout       bit;
   ddrd30              : inout       bit;
   ddrd31              : inout       bit;
   ddrd32              : inout       bit;
   ddrd33              : inout       bit;
   ddrd34              : inout       bit;
   ddrd35              : inout       bit;
   ddrd36              : inout       bit;
   ddrd37              : inout       bit;
   ddrd38              : inout       bit;
   ddrd39              : inout       bit;
   ddrd40              : inout       bit;
   ddrd41              : inout       bit;
   ddrd42              : inout       bit;
   ddrd43              : inout       bit;
   ddrd44              : inout       bit;
   ddrd45              : inout       bit;
   ddrd46              : inout       bit;
   ddrd47              : inout       bit;
   ddrd48              : inout       bit;
   ddrd49              : inout       bit;
   ddrd50              : inout       bit;
   ddrd51              : inout       bit;
   ddrd52              : inout       bit;
   ddrd53              : inout       bit;
   ddrd54              : inout       bit;
   ddrd55              : inout       bit;
   ddrd56              : inout       bit;
   ddrd57              : inout       bit;
   ddrd58              : inout       bit;
   ddrd59              : inout       bit;
   ddrd60              : inout       bit;
   ddrd61              : inout       bit;
   ddrd62              : inout       bit;
   ddrd63              : inout       bit;
   ddrdqm0             : inout       bit;
   ddrdqm1             : inout       bit;
   ddrdqm2             : inout       bit;
   ddrdqm3             : inout       bit;
   ddrdqm4             : inout       bit;
   ddrdqm5             : inout       bit;
   ddrdqm6             : inout       bit;
   ddrdqm7             : inout       bit;
   ddrdqm8             : inout       bit;
   ddrdqs0n            : inout       bit;
   ddrdqs0p            : inout       bit;
   ddrdqs1n            : inout       bit;
   ddrdqs1p            : inout       bit;
   ddrdqs2n            : inout       bit;
   ddrdqs2p            : inout       bit;
   ddrdqs3n            : inout       bit;
   ddrdqs3p            : inout       bit;
   ddrdqs4n            : inout       bit;
   ddrdqs4p            : inout       bit;
   ddrdqs5n            : inout       bit;
   ddrdqs5p            : inout       bit;
   ddrdqs6n            : inout       bit;
   ddrdqs6p            : inout       bit;
   ddrdqs7n            : inout       bit;
   ddrdqs7p            : inout       bit;
   ddrdqs8n            : inout       bit;
   ddrdqs8p            : inout       bit;
   rsv021              : inout       bit;
   rsv022              : inout       bit;
   ddrodt0             : inout       bit;
   ddrodt1             : inout       bit;
   rsv005              : buffer      bit;
   rsv004              : buffer      bit;
   ddrras              : inout       bit;
   ddrreset            : inout       bit;
   ddrrzq0             : linkage     bit;
   ddrrzq1             : linkage     bit;
   ddrrzq2             : linkage     bit;
   ddrvrefsstl         : linkage     bit;
   ddrwe               : inout       bit;
   rsv000              : inout       bit;
   emifa00             : inout       bit;
   emifa01             : inout       bit;
   emifa02             : inout       bit;
   emifa03             : inout       bit;
   emifa04             : inout       bit;
   emifa05             : inout       bit;
   emifa06             : inout       bit;
   emifa07             : inout       bit;
   emifa08             : inout       bit;
   emifa09             : inout       bit;
   emifa10             : inout       bit;
   emifa11             : inout       bit;
   emifa12             : inout       bit;
   emifa13             : inout       bit;
   emifa14             : inout       bit;
   emifa15             : inout       bit;
   emifa16             : inout       bit;
   emifa17             : inout       bit;
   emifa18             : inout       bit;
   emifa19             : inout       bit;
   emifa20             : inout       bit;
   emifa21             : inout       bit;
   emifa22             : inout       bit;
   emifa23             : inout       bit;
   emifbe0             : inout       bit;
   emifbe1             : inout       bit;
   emifce0             : inout       bit;
   emifce1             : inout       bit;
   emifce2             : inout       bit;
   emifce3             : inout       bit;
   emifd00             : inout       bit;
   emifd01             : inout       bit;
   emifd02             : inout       bit;
   emifd03             : inout       bit;
   emifd04             : inout       bit;
   emifd05             : inout       bit;
   emifd06             : inout       bit;
   emifd07             : inout       bit;
   emifd08             : inout       bit;
   emifd09             : inout       bit;
   emifd10             : inout       bit;
   emifd11             : inout       bit;
   emifd12             : inout       bit;
   emifd13             : inout       bit;
   emifd14             : inout       bit;
   emifd15             : inout       bit;
   emifoe              : inout       bit;
   emifrnw             : inout       bit;
   emifwait0           : inout       bit;
   emifwait1           : inout       bit;
   emifwe              : inout       bit;
   emu00               : inout       bit;
   emu01               : inout       bit;
   emu02               : inout       bit;
   emu03               : inout       bit;
   emu04               : inout       bit;
   emu05               : inout       bit;
   emu06               : inout       bit;
   emu07               : inout       bit;
   emu08               : inout       bit;
   emu09               : inout       bit;
   emu10               : inout       bit;
   emu11               : inout       bit;
   emu12               : inout       bit;
   emu13               : inout       bit;
   emu14               : inout       bit;
   emu15               : inout       bit;
   emu16               : inout       bit;
   emu17               : inout       bit;
   emu18               : inout       bit;
   gpio00              : inout       bit;
   gpio01              : inout       bit;
   gpio02              : inout       bit;
   gpio03              : inout       bit;
   gpio04              : inout       bit;
   gpio05              : inout       bit;
   gpio06              : inout       bit;
   gpio07              : inout       bit;
   gpio08              : inout       bit;
   gpio09              : inout       bit;
   gpio10              : inout       bit;
   gpio11              : inout       bit;
   gpio12              : inout       bit;
   gpio13              : inout       bit;
   gpio14              : inout       bit;
   gpio15              : inout       bit;
   gpio16              : inout       bit;
   gpio17              : inout       bit;
   gpio18              : inout       bit;
   gpio19              : inout       bit;
   gpio20              : inout       bit;
   gpio21              : inout       bit;
   gpio22              : inout       bit;
   gpio23              : inout       bit;
   gpio24              : inout       bit;
   gpio25              : inout       bit;
   gpio26              : inout       bit;
   gpio27              : inout       bit;
   gpio28              : inout       bit;
   gpio29              : inout       bit;
   gpio30              : inout       bit;
   gpio31              : inout       bit;
   hout                : inout       bit;
   rsv015              : linkage     bit;
   hyplnk0refres       : linkage     bit;
   hyplnk0rxflclk      : inout       bit;
   hyplnk0rxfldat      : inout       bit;
   hyplnk0rxn0         : in          bit;
   hyplnk0rxn1         : in          bit;
   hyplnk0rxn2         : in          bit;
   hyplnk0rxn3         : in          bit;
   hyplnk0rxp0         : in          bit;
   hyplnk0rxp1         : in          bit;
   hyplnk0rxp2         : in          bit;
   hyplnk0rxp3         : in          bit;
   hyplnk0rxpmclk      : inout       bit;
   hyplnk0rxpmdat      : inout       bit;
   hyplnk0txflclk      : inout       bit;
   hyplnk0txfldat      : inout       bit;
   hyplnk0txn0         : buffer      bit;
   hyplnk0txn1         : buffer      bit;
   hyplnk0txn2         : buffer      bit;
   hyplnk0txn3         : buffer      bit;
   hyplnk0txp0         : buffer      bit;
   hyplnk0txp1         : buffer      bit;
   hyplnk0txp2         : buffer      bit;
   hyplnk0txp3         : buffer      bit;
   hyplnk0txpmclk      : inout       bit;
   hyplnk0txpmdat      : inout       bit;
   hyplnk0clkn         : linkage     bit;
   hyplnk0clkp         : linkage     bit;
   rsv028              : inout       bit;
   por                 : in          bit;
   reset               : in          bit;
   resetfull           : in          bit;
   resetstat           : inout       bit;
   rsv030              : inout       bit;
   rsv029              : inout       bit;
   netcpclkn           : in          bit;
   netcpclkp           : in          bit;
   netcpclksel         : in          bit;
   rsv007              : buffer      bit;
   rsv006              : buffer      bit;
   rsv001              : inout       bit;
   rsv016              : linkage     bit;
   pcie0clkn           : linkage     bit;
   pcie0clkp           : linkage     bit;
   pcie0refres         : linkage     bit;
   pcie0rxn0           : in          bit;
   pcie0rxn1           : in          bit;
   pcie0rxp0           : in          bit;
   pcie0rxp1           : in          bit;
   pcie0txn0           : buffer      bit;
   pcie0txn1           : buffer      bit;
   pcie0txp0           : buffer      bit;
   pcie0txp1           : buffer      bit;
   rsv017              : linkage     bit;
   pcie1clkn           : linkage     bit;
   pcie1clkp           : linkage     bit;
   pcie1refres         : linkage     bit;
   pcie1rxn0           : in          bit;
   pcie1rxn1           : in          bit;
   pcie1rxp0           : in          bit;
   pcie1rxp1           : in          bit;
   pcie1txn0           : buffer      bit;
   pcie1txn1           : buffer      bit;
   pcie1txp0           : buffer      bit;
   pcie1txp1           : buffer      bit;
   rsv009              : linkage     bit;
   rsv010              : linkage     bit;
   scl0                : inout       bit;
   scl1                : inout       bit;
   scl2                : inout       bit;
   sda0                : inout       bit;
   sda1                : inout       bit;
   sda2                : inout       bit;
   mdclk0              : inout       bit;
   mdio0               : inout       bit;
   sgmii0clkn          : in          bit;
   sgmii0clkp          : in          bit;
   rsv018              : linkage     bit;
   sgmii00refres       : linkage     bit;
   rsv019              : linkage     bit;
   sgmii01refres       : linkage     bit;
   sgmii0rxn0          : in          bit;
   sgmii0rxn1          : in          bit;
   sgmii0rxn2          : in          bit;
   sgmii0rxn3          : in          bit;
   sgmii0rxn4          : in          bit;
   sgmii0rxn5          : in          bit;
   sgmii0rxn6          : in          bit;
   sgmii0rxn7          : in          bit;
   sgmii0rxp0          : in          bit;
   sgmii0rxp1          : in          bit;
   sgmii0rxp2          : in          bit;
   sgmii0rxp3          : in          bit;
   sgmii0rxp4          : in          bit;
   sgmii0rxp5          : in          bit;
   sgmii0rxp6          : in          bit;
   sgmii0rxp7          : in          bit;
   sgmii0txn0          : buffer      bit;
   sgmii0txn1          : buffer      bit;
   sgmii0txn2          : buffer      bit;
   sgmii0txn3          : buffer      bit;
   sgmii0txn4          : buffer      bit;
   sgmii0txn5          : buffer      bit;
   sgmii0txn6          : buffer      bit;
   sgmii0txn7          : buffer      bit;
   sgmii0txp0          : buffer      bit;
   sgmii0txp1          : buffer      bit;
   sgmii0txp2          : buffer      bit;
   sgmii0txp3          : buffer      bit;
   sgmii0txp4          : buffer      bit;
   sgmii0txp5          : buffer      bit;
   sgmii0txp6          : buffer      bit;
   sgmii0txp7          : buffer      bit;
   spi0clk             : inout       bit;
   spi0scs0            : inout       bit;
   spi0scs1            : inout       bit;
   spi0scs2            : inout       bit;
   spi0scs3            : inout       bit;
   spi0dout            : inout       bit;
   spi0din             : inout       bit;
   spi1clk             : inout       bit;
   spi1scs0            : inout       bit;
   spi1scs1            : inout       bit;
   spi1scs2            : inout       bit;
   spi1scs3            : inout       bit;
   spi1dout            : inout       bit;
   spi1din             : inout       bit;
   spi2clk             : inout       bit;
   spi2scs0            : inout       bit;
   spi2scs1            : inout       bit;
   spi2scs2            : inout       bit;
   spi2scs3            : inout       bit;
   spi2dout            : inout       bit;
   spi2din             : inout       bit;
   coreclkn            : in          bit;
   coreclkp            : in          bit;
   sysclkout           : inout       bit;
   tck                 : in          bit;
   tdi                 : in          bit;
   tms                 : in          bit;
   trst                : in          bit;
   tdo                 : out         bit;
   tscompout           : inout       bit;
   tspushevt0          : inout       bit;
   tspushevt1          : inout       bit;
   tsrefclkn           : in          bit;
   tsrefclkp           : in          bit;
   tsrxclkout0n        : buffer      bit;
   tsrxclkout0p        : buffer      bit;
   tsrxclkout1n        : buffer      bit;
   tsrxclkout1p        : buffer      bit;
   tssyncevt           : inout       bit;
   rsv011              : linkage     bit;
   rsv013              : linkage     bit;
   rsv012              : linkage     bit;
   rsv014              : linkage     bit;
   timi0               : inout       bit;
   timi1               : inout       bit;
   timo0               : inout       bit;
   timo1               : inout       bit;
   uart0cts            : inout       bit;
   uart0rts            : inout       bit;
   uart0rxd            : inout       bit;
   uart0txd            : inout       bit;
   uart0dsr            : inout       bit;
   uart0dtr            : inout       bit;
   uart1cts            : inout       bit;
   uart1rts            : inout       bit;
   uart1rxd            : inout       bit;
   uart1txd            : inout       bit;
   usbclkm             : in          bit;
   usbclkp             : in          bit;
   usb0resref          : linkage     bit;
   usb0id0             : linkage     bit;
   usb0vbus            : linkage     bit;
   usb0dp              : linkage     bit;
   usb0dm              : linkage     bit;
   usb0rx0m            : linkage     bit;
   usb0rx0p            : linkage     bit;
   usb0tx0m            : linkage     bit;
   usb0tx0p            : linkage     bit;
   usb0drvvbus         : inout       bit;
   usb1resref          : linkage     bit;
   usb1id0             : linkage     bit;
   usb1vbus            : linkage     bit;
   usb1dp              : linkage     bit;
   usb1dm              : linkage     bit;
   usb1rx0m            : linkage     bit;
   usb1rx0p            : linkage     bit;
   usb1tx0m            : linkage     bit;
   usb1tx0p            : linkage     bit;
   usb1drvvbus         : inout       bit;
   usimclk             : inout       bit;
   usimio              : inout       bit;
   usimrst             : inout       bit;
   vcl                 : inout       bit;
   vcntl0              : inout       bit;
   vcntl1              : inout       bit;
   vcntl2              : inout       bit;
   vcntl3              : inout       bit;
   vcntl4              : inout       bit;
   vcntl5              : inout       bit;
   vd                  : inout       bit;
   rsv020              : linkage     bit;
   xficlkn             : linkage     bit;
   xficlkp             : linkage     bit;
   xfirefres0          : linkage     bit;
   xfirefres1          : linkage     bit;
   xfimdclk            : inout       bit;
   xfimdio             : inout       bit;
   xfirxn0             : in          bit;
   xfirxn1             : in          bit;
   xfirxp0             : in          bit;
   xfirxp1             : in          bit;
   xfitxn0             : buffer      bit;
   xfitxn1             : buffer      bit;
   xfitxp0             : buffer      bit;
   xfitxp1             : buffer      bit;
   tsip0clka           : inout       bit;
   tsip0clkb           : inout       bit;
   tsip0fsa            : inout       bit;
   tsip0fsb            : inout       bit;
   tsip0tr0            : inout       bit;
   tsip0tr1            : inout       bit;
   tsip0tx0            : inout       bit;
   tsip0tx1            : inout       bit;
   usb0vp              : linkage     bit;
   usb1vp              : linkage     bit;
   usb0vph             : linkage     bit;
   usb1vph             : linkage     bit;
   usb0vptx            : linkage     bit;
   usb1vptx            : linkage     bit;
   usb0dvdd33          : linkage     bit;
   usb1dvdd33          : linkage     bit;
   vpp0                : linkage     bit;
   vpp1                : linkage     bit;
   vnwa1               : linkage     bit;
   vnwa2               : linkage     bit;
   vnwa3               : linkage     bit;
   vnwa4               : linkage     bit;
   avdda3              : linkage     bit;
   avdda1              : linkage     bit;
   avdda2              : linkage     bit;
   avdda6              : linkage     bit;
   avdda7              : linkage     bit;
   avdda8              : linkage     bit;
   avdda9              : linkage     bit;
   avdda10             : linkage     bit;
   cvddcmon            : linkage     bit;
   cvddtmon            : linkage     bit;
   vsscmon             : linkage     bit;
   vsstmon             : linkage     bit;
   vddalv              : linkage bit_vector(1 to 22);
   vddahv              : linkage bit_vector(1 to 8);
   cvdd1               : linkage bit_vector(1 to 12);
   dvdd15              : linkage bit_vector(1 to 47);
   dvdd18              : linkage bit_vector(1 to 43);
   vddusb0             : linkage bit_vector(1 to 2);
   vddusb1             : linkage bit_vector(1 to 2);
   cvdd                : linkage bit_vector(1 to 114);
   vss                 : linkage bit_vector(1 to 336));

 use STD_1149_1_2001.all;

 attribute COMPONENT_CONFORMANCE of AM5K2E0X : entity is "STD_1149_1_2001";

 attribute      PIN_MAP          of AM5K2E0X : entity is PHYSICAL_PIN_MAP;
 constant AAW : PIN_MAP_STRING :=
   
   "bootcomplete     :  AF31,"&
   "rsv003           :  AF2 ,"&
   "rsv002           :  AE2 ,"&
   "ddra00           :  D15 ,"&
   "ddra01           :  C15 ,"&
   "ddra02           :  B16 ,"&
   "ddra03           :  C16 ,"&
   "ddra04           :  D16 ,"&
   "ddra05           :  E16 ,"&
   "ddra06           :  A17 ,"&
   "ddra07           :  E17 ,"&
   "ddra08           :  A18 ,"&
   "ddra09           :  B17 ,"&
   "ddra10           :  A13 ,"&
   "ddra11           :  D18 ,"&
   "ddra12           :  E18 ,"&
   "ddra13           :  E12 ,"&
   "ddra14           :  C18 ,"&
   "ddra15           :  E19 ,"&
   "rsv023           :  A14 ,"&
   "ddrba0           :  D13 ,"&
   "ddrba1           :  C13 ,"&
   "ddrba2           :  B18 ,"&
   "ddrcas           :  B12 ,"&
   "ddrcb00          :  A23 ,"&
   "ddrcb01          :  D22 ,"&
   "ddrcb02          :  E22 ,"&
   "ddrcb03          :  E21 ,"&
   "ddrcb04          :  C22 ,"&
   "ddrcb05          :  B21 ,"&
   "ddrcb06          :  A20 ,"&
   "ddrcb07          :  A21 ,"&
   "ddrce0           :  A12 ,"&
   "ddrce1           :  C12 ,"&
   "ddrcke0          :  C20 ,"&
   "ddrcke1          :  A19 ,"&
   "ddrclkn          :  G3  ,"&
   "ddrclkoutn0      :  B14 ,"&
   "ddrclkoutn1      :  A15 ,"&
   "ddrclkoutp0      :  B15 ,"&
   "ddrclkoutp1      :  A16 ,"&
   "ddrclkp          :  G4  ,"&
   "ddrd00           :  E2  ,"&
   "ddrd01           :  D1  ,"&
   "ddrd02           :  F2  ,"&
   "ddrd03           :  E1  ,"&
   "ddrd04           :  F1  ,"&
   "ddrd05           :  D2  ,"&
   "ddrd06           :  F3  ,"&
   "ddrd07           :  B2  ,"&
   "ddrd08           :  A5  ,"&
   "ddrd09           :  A6  ,"&
   "ddrd10           :  B5  ,"&
   "ddrd11           :  E5  ,"&
   "ddrd12           :  C4  ,"&
   "ddrd13           :  D4  ,"&
   "ddrd14           :  E4  ,"&
   "ddrd15           :  B3  ,"&
   "ddrd16           :  D6  ,"&
   "ddrd17           :  E6  ,"&
   "ddrd18           :  E7  ,"&
   "ddrd19           :  B6  ,"&
   "ddrd20           :  C6  ,"&
   "ddrd21           :  C8  ,"&
   "ddrd22           :  A8  ,"&
   "ddrd23           :  B8  ,"&
   "ddrd24           :  E10 ,"&
   "ddrd25           :  B11 ,"&
   "ddrd26           :  A11 ,"&
   "ddrd27           :  C10 ,"&
   "ddrd28           :  D10 ,"&
   "ddrd29           :  B9  ,"&
   "ddrd30           :  E9  ,"&
   "ddrd31           :  A9  ,"&
   "ddrd32           :  B23 ,"&
   "ddrd33           :  E23 ,"&
   "ddrd34           :  D24 ,"&
   "ddrd35           :  C24 ,"&
   "ddrd36           :  E24 ,"&
   "ddrd37           :  E25 ,"&
   "ddrd38           :  B25 ,"&
   "ddrd39           :  A25 ,"&
   "ddrd40           :  E28 ,"&
   "ddrd41           :  D28 ,"&
   "ddrd42           :  C28 ,"&
   "ddrd43           :  E27 ,"&
   "ddrd44           :  B28 ,"&
   "ddrd45           :  A26 ,"&
   "ddrd46           :  B26 ,"&
   "ddrd47           :  C26 ,"&
   "ddrd48           :  A29 ,"&
   "ddrd49           :  A28 ,"&
   "ddrd50           :  B31 ,"&
   "ddrd51           :  E29 ,"&
   "ddrd52           :  B29 ,"&
   "ddrd53           :  C30 ,"&
   "ddrd54           :  E30 ,"&
   "ddrd55           :  D30 ,"&
   "ddrd56           :  F31 ,"&
   "ddrd57           :  F33 ,"&
   "ddrd58           :  F32 ,"&
   "ddrd59           :  E32 ,"&
   "ddrd60           :  E33 ,"&
   "ddrd61           :  C32 ,"&
   "ddrd62           :  D32 ,"&
   "ddrd63           :  B32 ,"&
   "ddrdqm0          :  A3  ,"&
   "ddrdqm1          :  E3  ,"&
   "ddrdqm2          :  D8  ,"&
   "ddrdqm3          :  E8  ,"&
   "ddrdqm4          :  E26 ,"&
   "ddrdqm5          :  D26 ,"&
   "ddrdqm6          :  E31 ,"&
   "ddrdqm7          :  A31 ,"&
   "ddrdqm8          :  B20 ,"&
   "ddrdqs0n         :  C2  ,"&
   "ddrdqs0p         :  C1  ,"&
   "ddrdqs1n         :  B4  ,"&
   "ddrdqs1p         :  A4  ,"&
   "ddrdqs2n         :  A7  ,"&
   "ddrdqs2p         :  B7  ,"&
   "ddrdqs3n         :  B10 ,"&
   "ddrdqs3p         :  A10 ,"&
   "ddrdqs4n         :  B24 ,"&
   "ddrdqs4p         :  A24 ,"&
   "ddrdqs5n         :  B27 ,"&
   "ddrdqs5p         :  A27 ,"&
   "ddrdqs6n         :  B30 ,"&
   "ddrdqs6p         :  A30 ,"&
   "ddrdqs7n         :  D33 ,"&
   "ddrdqs7p         :  C33 ,"&
   "ddrdqs8n         :  A22 ,"&
   "ddrdqs8p         :  B22 ,"&
   "rsv021           :  B19 ,"&
   "rsv022           :  E20 ,"&
   "ddrodt0          :  D12 ,"&
   "ddrodt1          :  E11 ,"&
   "rsv005           :  G1  ,"&
   "rsv004           :  G2  ,"&
   "ddrras           :  B13 ,"&
   "ddrreset         :  D20 ,"&
   "ddrrzq0          :  E15 ,"&
   "ddrrzq1          :  G12 ,"&
   "ddrrzq2          :  G18 ,"&
   "ddrvrefsstl      :  F15 ,"&
   "ddrwe            :  E13 ,"&
   "rsv000           :  H32 ,"&
   "emifa00          :  P3  ,"&
   "emifa01          :  P5  ,"&
   "emifa02          :  U6  ,"&
   "emifa03          :  V6  ,"&
   "emifa04          :  P6  ,"&
   "emifa05          :  N6  ,"&
   "emifa06          :  M3  ,"&
   "emifa07          :  N4  ,"&
   "emifa08          :  N5  ,"&
   "emifa09          :  M5  ,"&
   "emifa10          :  M4  ,"&
   "emifa11          :  L1  ,"&
   "emifa12          :  U5  ,"&
   "emifa13          :  T5  ,"&
   "emifa14          :  L3  ,"&
   "emifa15          :  T3  ,"&
   "emifa16          :  L2  ,"&
   "emifa17          :  L5  ,"&
   "emifa18          :  M6  ,"&
   "emifa19          :  K2  ,"&
   "emifa20          :  K1  ,"&
   "emifa21          :  L4  ,"&
   "emifa22          :  R3  ,"&
   "emifa23          :  L6  ,"&
   "emifbe0          :  AA2 ,"&
   "emifbe1          :  R6  ,"&
   "emifce0          :  AA1 ,"&
   "emifce1          :  Y4  ,"&
   "emifce2          :  W1  ,"&
   "emifce3          :  Y1  ,"&
   "emifd00          :  G5  ,"&
   "emifd01          :  K3  ,"&
   "emifd02          :  K4  ,"&
   "emifd03          :  J1  ,"&
   "emifd04          :  H5  ,"&
   "emifd05          :  J6  ,"&
   "emifd06          :  H6  ,"&
   "emifd07          :  H1  ,"&
   "emifd08          :  H2  ,"&
   "emifd09          :  G6  ,"&
   "emifd10          :  K5  ,"&
   "emifd11          :  H3  ,"&
   "emifd12          :  J4  ,"&
   "emifd13          :  H4  ,"&
   "emifd14          :  K6  ,"&
   "emifd15          :  J5  ,"&
   "emifoe           :  Y2  ,"&
   "emifrnw          :  Y3  ,"&
   "emifwait0        :  T6  ,"&
   "emifwait1        :  N3  ,"&
   "emifwe           :  R5  ,"&
   "emu00            :  AC5 ,"&
   "emu01            :  AA6 ,"&
   "emu02            :  AC4 ,"&
   "emu03            :  AE6 ,"&
   "emu04            :  AD6 ,"&
   "emu05            :  AD3 ,"&
   "emu06            :  AB5 ,"&
   "emu07            :  AC3 ,"&
   "emu08            :  AB4 ,"&
   "emu09            :  AH3 ,"&
   "emu10            :  AF3 ,"&
   "emu11            :  AG4 ,"&
   "emu12            :  AD2 ,"&
   "emu13            :  AC2 ,"&
   "emu14            :  AB3 ,"&
   "emu15            :  AA5 ,"&
   "emu16            :  AB2 ,"&
   "emu17            :  Y5  ,"&
   "emu18            :  AH2 ,"&
   "gpio00           :  V30 ,"&
   "gpio01           :  AA29,"&
   "gpio02           :  Y29 ,"&
   "gpio03           :  V33 ,"&
   "gpio04           :  V32 ,"&
   "gpio05           :  W30 ,"&
   "gpio06           :  W32 ,"&
   "gpio07           :  V31 ,"&
   "gpio08           :  W31 ,"&
   "gpio09           :  W33 ,"&
   "gpio10           :  AB29,"&
   "gpio11           :  Y30 ,"&
   "gpio12           :  Y32 ,"&
   "gpio13           :  AA30,"&
   "gpio14           :  Y33 ,"&
   "gpio15           :  Y31 ,"&
   "gpio16           :  AA33,"&
   "gpio17           :  AB32,"&
   "gpio18           :  AB33,"&
   "gpio19           :  AB31,"&
   "gpio20           :  AC29,"&
   "gpio21           :  AC33,"&
   "gpio22           :  AD29,"&
   "gpio23           :  AC31,"&
   "gpio24           :  AC32,"&
   "gpio25           :  AB30,"&
   "gpio26           :  AC30,"&
   "gpio27           :  AD32,"&
   "gpio28           :  AD33,"&
   "gpio29           :  AD31,"&
   "gpio30           :  AE33,"&
   "gpio31           :  AD30,"&
   "hout             :  AF30,"&
   "rsv030           :  AE30,"&
   "rsv029           :  AF33,"&
   "rsv015           :  AG8 ,"&
   "hyplnk0clkn      :  AJ8 ,"&
   "hyplnk0clkp      :  AJ7 ,"&
   "hyplnk0refres    :  AJ5 ,"&
   "hyplnk0rxflclk   :  AJ3 ,"&
   "hyplnk0rxfldat   :  AE3 ,"&
   "hyplnk0rxn0      :  AN8 ,"&
   "hyplnk0rxn1      :  AM7 ,"&
   "hyplnk0rxn2      :  AN5 ,"&
   "hyplnk0rxn3      :  AM4 ,"&
   "hyplnk0rxp0      :  AN9 ,"&
   "hyplnk0rxp1      :  AM8 ,"&
   "hyplnk0rxp2      :  AN6 ,"&
   "hyplnk0rxp3      :  AM5 ,"&
   "hyplnk0rxpmclk   :  AE1 ,"&
   "hyplnk0rxpmdat   :  AD1 ,"&
   "hyplnk0txflclk   :  AC6 ,"&
   "hyplnk0txfldat   :  AH4 ,"&
   "hyplnk0txn0      :  AL9 ,"&
   "hyplnk0txn1      :  AK8 ,"&
   "hyplnk0txn2      :  AL6 ,"&
   "hyplnk0txn3      :  AK5 ,"&
   "hyplnk0txp0      :  AL8 ,"&
   "hyplnk0txp1      :  AK7 ,"&
   "hyplnk0txp2      :  AL5 ,"&
   "hyplnk0txp3      :  AK4 ,"&
   "hyplnk0txpmclk   :  AB6 ,"&
   "hyplnk0txpmdat   :  AF5 ,"&
   "mdclk0           :  AH6 ,"&
   "mdio0            :  AH5 ,"&
   "rsv028           : AG33 ,"&
   "netcpclkn        :  AN3 ,"&
   "netcpclkp        :  AM2 ,"&
   "netcpclksel      :  AG6 ,"&
   "rsv007           :  AL2 ,"&
   "rsv006           :  AL3 ,"&
   "rsv001           :  J32 ,"&
   "rsv016           :  AJ20,"&
   "pcie0clkn        :  AJ18,"&
   "pcie0clkp        :  AJ17,"&
   "pcie0refres      :  AG14,"&
   "pcie0rxn0        :  AN17,"&
   "pcie0rxn1        :  AM16,"&
   "pcie0rxp0        :  AN18,"&
   "pcie0rxp1        :  AM17,"&
   "pcie0txn0        :  AL18,"&
   "pcie0txn1        :  AK17,"&
   "pcie0txp0        :  AL17,"&
   "pcie0txp1        :  AK16,"&
   "rsv017           :  AG12,"&
   "pcie1clkn        :  AJ15,"&
   "pcie1clkp        :  AJ14,"&
   "pcie1refres      :  AJ10,"&
   "pcie1rxn0        :  AN14,"&
   "pcie1rxn1        :  AM13,"&
   "pcie1rxp0        :  AN15,"&
   "pcie1rxp1        :  AM14,"&
   "pcie1txn0        :  AL15,"&
   "pcie1txn1        :  AK14,"&
   "pcie1txp0        :  AL14,"&
   "pcie1txp1        :  AK13,"&
   "rsv008           :  AG5 ,"&
   "rsv009           :  K8  ,"&
   "rsv010           :  J8  ,"&
   "por              :  AH33,"&
   "resetfull        :  AF32,"&
   "resetstat        :  AH29,"&
   "reset            :  AE29,"&
   "scl0             :  AG30,"&
   "scl1             :  AH30,"&
   "scl2             :  AH31,"&
   "sda0             :  AG28,"&
   "sda1             :  AJ32,"&
   "sda2             :  AG29,"&
   "rsv018           :  AJ28,"&
   "sgmii00refres    :  AJ27,"&
   "rsv019           :  AJ26,"&
   "sgmii01refres    :  AJ22,"&
   "sgmii0clkn       :  AJ25,"&
   "sgmii0clkp       :  AJ24,"&
   "sgmii0rxn0       :  AN29,"&
   "sgmii0rxn1       :  AM28,"&
   "sgmii0rxn2       :  AN26,"&
   "sgmii0rxn3       :  AM25,"&
   "sgmii0rxn4       :  AN23,"&
   "sgmii0rxn5       :  AM22,"&
   "sgmii0rxn6       :  AN20,"&
   "sgmii0rxn7       :  AM19,"&
   "sgmii0rxp0       :  AN30,"&
   "sgmii0rxp1       :  AM29,"&
   "sgmii0rxp2       :  AN27,"&
   "sgmii0rxp3       :  AM26,"&
   "sgmii0rxp4       :  AN24,"&
   "sgmii0rxp5       :  AM23,"&
   "sgmii0rxp6       :  AN21,"&
   "sgmii0rxp7       :  AM20,"&
   "sgmii0txn0       :  AL30,"&
   "sgmii0txn1       :  AK29,"&
   "sgmii0txn2       :  AL27,"&
   "sgmii0txn3       :  AK26,"&
   "sgmii0txn4       :  AL24,"&
   "sgmii0txn5       :  AK23,"&
   "sgmii0txn6       :  AL21,"&
   "sgmii0txn7       :  AK20,"&
   "sgmii0txp0       :  AL29,"&
   "sgmii0txp1       :  AK28,"&
   "sgmii0txp2       :  AL26,"&
   "sgmii0txp3       :  AK25,"&
   "sgmii0txp4       :  AL23,"&
   "sgmii0txp5       :  AK22,"&
   "sgmii0txp6       :  AL20,"&
   "sgmii0txp7       :  AK19,"&
   "spi0clk          :   M30,"&
   "spi0scs0         :   L31,"&
   "spi0scs1         :   M29,"&
   "spi0scs2         :   L29,"&
   "spi0scs3         :   L32,"&
   "spi0dout         :   N29,"&
   "spi0din          :   M31,"&
   "spi1clk          :   M33,"&
   "spi1scs0         :   P29,"&
   "spi1scs1         :   M32,"&
   "spi1scs2         :   N30,"&
   "spi1scs3         :   N33,"&
   "spi1dout         :   P32,"&
   "spi1din          :   R30,"&
   "spi2clk          :   L33,"&
   "spi2scs0         :   P31,"&
   "spi2scs1         :   R29,"&
   "spi2scs2         :   P33,"&
   "spi2scs3         :   L30,"&
   "spi2dout         :   R31,"&
   "spi2din          :   P30,"&
   "coreclkn         :   AG1,"&
   "sysclkout        :   AE4,"&
   "coreclkp         :   AF1,"&
   "tck              :  AJ33,"&
   "tdi              :  AG31,"&
   "tdo              :  AF29,"&
   "rsv011           :    W8,"&
   "rsv013           :   J30,"&
   "rsv012           :    W7,"&
   "rsv014           :   J29,"&
   "timi0            :   K33,"&
   "timi1            :   K32,"&
   "timo0            :   K31,"&
   "timo1            :   K30,"&
   "tms              :  AH32,"&
   "trst             :  AG32,"&
   "tscompout        :   AF4,"&
   "tsip0clka        :  AK31,"&
   "tsip0clkb        :  AK33,"&
   "tsip0fsa         :  AJ31,"&
   "tsip0fsb         :  AK32,"&
   "tsip0tr0         :  AM31,"&
   "tsip0tr1         :  AL33,"&
   "tsip0tx0         :  AL32,"&
   "tsip0tx1         :  AM32,"&
   "tspushevt0       :  AG3 ,"&
   "tspushevt1       :  AL1 ,"&
   "tsrefclkn        :  AK1 ,"&
   "tsrefclkp        :  AK2 ,"&
   "tsrxclkout0n     :  AJ2 ,"&
   "tsrxclkout0p     :  AJ1 ,"&
   "tsrxclkout1n     :  AH1 ,"&
   "tsrxclkout1p     :  AG2 ,"&
   "tssyncevt        :  AE5 ,"&
   "uart0cts         :  R33 ,"&
   "uart0dsr         :  W29 ,"&
   "uart0dtr         :  U33 ,"&
   "uart0rts         :  R32 ,"&
   "uart0rxd         :  T29 ,"&
   "uart0txd         :  T30 ,"&
   "uart1cts         :  T31 ,"&
   "uart1rts         :  T33 ,"&
   "uart1rxd         :  U29 ,"&
   "uart1txd         :  T32 ,"&
   "usb0dm           :  W3  ,"&
   "usb0dp           :  V3  ,"&
   "usb0drvvbus      :  AB1 ,"&
   "usb0id0          :  W4  ,"&
   "usb0resref       :  Y6  ,"&
   "usb0rx0m         :  T1  ,"&
   "usb0rx0p         :  U1  ,"&
   "usb0tx0m         :  U2  ,"&
   "usb0tx0p         :  V2  ,"&
   "usb0vbus         :  W5  ,"&
   "usb1dm           :  P4  ,"&
   "usb1dp           :  R4  ,"&
   "usb1drvvbus      : AC1  ,"&
   "usb1id0          :  W6  ,"&
   "usb1resref       :  V5  ,"&
   "usb1rx0m         :  N1  ,"&
   "usb1rx0p         :  P1  ,"&
   "usb1tx0m         :  R2  ,"&
   "usb1tx0p         :  P2  ,"&
   "usb1vbus         :  V4  ,"&
   "usbclkm          :  T4  ,"&
   "usbclkp          :  U4  ,"&
   "usimclk          : J33  ,"&
   "usimio           : H33  ,"&
   "usimrst          : K29  ,"&
   "vcl              : V29  ,"&
   "vcntl0           : H29  ,"&
   "vcntl1           : G33  ,"&
   "vcntl2           : H31  ,"&
   "vcntl3           : H30  ,"&
   "vcntl4           : G32  ,"&
   "vcntl5           : J31  ,"&
   "vd               : U30  ,"&
   "rsv020           : AH9  ,"&
   "xficlkn          : AJ12 ,"&
   "xficlkp          : AJ11 ,"&
   "xfimdclk         : AF6  ,"&
   "xfimdio          : AE7  ,"&
   "xfirefres0       : AG10 ,"&
   "xfirefres1       : AH7  ,"&
   "xfirxn0          : AN11 ,"&
   "xfirxn1          : AM10 ,"&
   "xfirxp0          : AN12 ,"&
   "xfirxp1          : AM11 ,"&
   "xfitxn0          : AL12 ,"&
   "xfitxn1          : AK11 ,"&
   "xfitxp0          : AL11 ,"&
   "xfitxp1          : AK10 ,"&
   "usb0vp           : (U8)," &
   "usb1vp           : (R8)," &
   "usb0vph          : (W10)," &
   "usb1vph          : (R10)," &
   "usb0vptx         : (V9),"&
   "usb1vptx         : (T9),"&
   "vpp0             : (K9),"&
   "vpp1             : (M9),"&
   "vnwa1            : (P9),"&
   "vnwa2            : (J24),"&
   "vnwa3            : (AD23),"&
   "vnwa4            : (AD9),"&
   "usb0dvdd33       : (Y11),"&
   "usb1dvdd33       : (P11),"&
   "avdda3           : (AD7),"&
   "avdda1           : (AF7),"&
   "avdda2           : (K7),"&
   "avdda6           : (G8),"&
   "avdda7           : (E14),"&
   "avdda8           : (G16),"&
   "avdda9           : (G22),"&
   "avdda10          : (G24),"&
   "cvddcmon         : (J10),"&
   "cvddtmon         : (L26),"&
   "vsscmon          : (J9),"&
   "vsstmon          : (K26),"&
   "vddalv           : (AE10, AE12, AE14, AE16, AE18, AE20, AE22, AE24, AF11, AF13, AF15, AF17, AF19, AF21, AF23, AF25, AF9 , AG16, AG18, AG20," &
                       "AG22, AG24)," &
   "vddahv           : (AH11, AH13, AH15, AH17, AH19, AH21, AH23, AH25)," &
   "cvdd1            : (AA12, AA14, AA24, AB23, L24 , M11 , M13 , M23 , N12 , N24 , Y13 , Y23)," &
   "dvdd15           : (A2 , A32, B1 , B33, C11, C17, C21, C25, C3 , C31, C7 , D14, D19, D23, D27, D29, D5 , D9 , F11, F13," &
                       "F17, F19, F21, F23, F25, F27, F29, F5 , F7 , F9 , G10, G14, G20, G26, G28, G30, H11, H13, H15, H17," &
                      "H19, H21, H23, H25, H27, H7 , H9)," &
   "dvdd18           : (AA28, AA31, AB27, AC28, AD27, AE26, AE28, AE31, AF27, AG26, AH27, AJ30, AM33, AN32, J28 , K27 , L28 , M27 , N28 , N31 ,"&
                       "P27 , R28 , T27 , U28 , U31 , V27 , W28 , Y27 , AA3 , AA8 , AB7 , AC8 , AD4 , AE8 , J2  , L8  , M2  , M7  , N8  , P7  ,"&
                       "T7  , V7  , Y7),"&
   "vddusb0          : (U10, V11),"&
   "vddusb1          : (R12, T11),"&
   "cvdd             : (AA10, AA16, AA18, AA20, AA22, AA26, AB11, AB13, AB15, AB17, AB19, AB21, AB25, AB9 , AC10, AC12, AC14, AC16, AC18, AC20,"&
                       "AC22, AC24, AC26, AD11, AD13, AD15, AD17, AD19, AD21, AD25, J12 , J14 , J16 , J18 , J20 , J22 , J26 , K11 , K13 , K15 ,"&
                       "K17 , K19 , K21 , K23 , K25 , L10 , L12 , L14 , L16 , L18 , L20 , L22 , M15 , M17 , M19 , M21 , M25 , N10 , N14 , N16 ,"&
                       "N18 , N20 , N22 , N26 , P13 , P15 , P17 , P19 , P21 , P23 , P25 , R14 , R16 , R18 , R20 , R22 , R24 , R26 , T13 , T15 ,"&
                       "T17 , T19 , T21 , T23 , T25 , U12 , U14 , U16 , U18 , U20 , U22 , U24 , U26 , V13 , V15 , V17 , V19 , V21 , V23 , V25 ,"&
                       "W12 , W14 , W16 , W18 , W20 , W22 , W24 , W26 , Y15 , Y17 , Y19 , Y21 , Y25 , Y9),"&
   "vss              : (A1  , A33 , AA11, AA13, AA15, AA17, AA19, AA21, AA23, AA25, AA27, AA32, AA4 , AA7 , AA9 , AB10, AB12, AB14, AB16, AB18,"&
                       "AB20, AB22, AB24, AB26, AB28, AB8 , AC11, AC13, AC15, AC17, AC19, AC21, AC23, AC25, AC27, AC7 , AC9 , AD10, AD12, AD14,"&
                       "AD16, AD18, AD20, AD22, AD24, AD26, AD28, AD5 , AD8 , AE11, AE13, AE15, AE17, AE19, AE21, AE23, AE25, AE27, AE32, AE9 ,"&
                       "AF10, AF12, AF14, AF16, AF18, AF20, AF22, AF24, AF26, AF28, AF8 , AG11, AG13, AG15, AG17, AG19, AG21, AG23, AG25, AG27,"&
                       "AG7 , AG9 , AH10, AH12, AH14, AH16, AH18, AH20, AH22, AH24, AH26, AH28, AH8 , AJ13, AJ16, AJ19, AJ21, AJ23, AJ29, AJ4 ,"&
                       "AJ6 , AJ9 , AK12, AK15, AK18, AK21, AK24, AK27, AK3 , AK30, AK6 , AK9 , AL10, AL13, AL16, AL19, AL22, AL25, AL28, AL31,"&
                       "AL4 , AL7 , AM1 , AM12, AM15, AM18, AM21, AM24, AM27, AM3 , AM30, AM6 , AM9 , AN1 , AN10, AN13, AN16, AN19, AN2 , AN22,"&
                       "AN25, AN28, AN31, AN33, AN4 , AN7 , C14 , C19 , C23 , C27 , C29 , C5  , C9  , D11 , D17 , D21 , D25 , D3  , D31 , D7  ,"&
                       "F10 , F12 , F14 , F16 , F18 , F20 , F22 , F24 , F26 , F28 , F30 , F4  , F6  , F8  , G11 , G13 , G15 , G17 , G19 , G21 ,"&
                       "G23 , G25 , G27 , G29 , G31 , G7  , G9  , H10 , H12 , H14 , H16 , H18 , H20 , H22 , H24 , H26 , H28 , H8  , J11 , J13 ,"&
                       "J15 , J17 , J19 , J21 , J23 , J25 , J27 , J3  , J7  , K10 , K12 , K14 , K16 , K18 , K20 , K22 , K24 , K28 , L11 , L13 ,"&
                       "L15 , L17 , L19 , L21 , L23 , L25 , L27 , L7  , L9  , M1  , M10 , M12 , M14 , M16 , M18 , M20 , M22 , M24 , M26 , M28 ,"&
                       "M8  , N11 , N13 , N15 , N17 , N19 , N2  , N21 , N23 , N25 , N27 , N32 , N7  , N9  , P10 , P12 , P14 , P16 , P18 , P20 ,"&
                       "P22 , P24 , P26 , P28 , P8  , R1  , R11 , R13 , R15 , R17 , R19 , R21 , R23 , R25 , R27 , R7  , R9  , T10 , T12 , T14 ,"&
                       "T16 , T18 , T2  , T20 , T22 , T24 , T26 , T28 , T8  , U11 , U13 , U15 , U17 , U19 , U21 , U23 , U25 , U27 , U3  , U32 ,"&
                       "U7  , U9  , V1  , V10 , V12 , V14 , V16 , V18 , V20 , V22 , V24 , V26 , V28 , V8  , W11 , W13 , W15 , W17 , W19 , W2  ,"&
                       "W21 , W23 , W25 , W27 , W9  , Y10 , Y12 , Y14 , Y16 , Y18 , Y20 , Y22 , Y24 , Y26 , Y28 , Y8)"; 
              
                                       
              

 attribute PORT_GROUPING of AM5K2E0X : entity is
    "Differential_Voltage  (                "&
    "(hyplnk0txp0, hyplnk0txn0),            "&
    "(hyplnk0txp1, hyplnk0txn1),            "&
    "(hyplnk0txp2, hyplnk0txn2),            "&
    "(hyplnk0txp3, hyplnk0txn3),            "&
    "(pcie0txp0, pcie0txn0),                "&
    "(pcie0txp1, pcie0txn1),                "&
    "(pcie1txp0, pcie1txn0),                "&
    "(pcie1txp1, pcie1txn1),                "&
    "(sgmii0txp0, sgmii0txn0),              "&
    "(sgmii0txp1, sgmii0txn1),              "&
    "(sgmii0txp2, sgmii0txn2),              "&
    "(sgmii0txp3, sgmii0txn3),              "&
    "(sgmii0txp4, sgmii0txn4),              "&
    "(sgmii0txp5, sgmii0txn5),              "&
    "(sgmii0txp6, sgmii0txn6),              "&
    "(sgmii0txp7, sgmii0txn7),              "&
    "(xfitxp0, xfitxn0),                    "&
    "(xfitxp1, xfitxn1),                    "&
    "(rsv002, rsv003),                      "&
    "(rsv004, rsv005),                      "&
    "(sgmii0clkp, sgmii0clkn),              "&
    "(coreclkp, coreclkn),                  "&
    "(ddrclkp, ddrclkn),                    "&
    "(netcpclkp, netcpclkn),                "&
    "(tsrefclkp, tsrefclkn),                "&
    "(tsrxclkout0p, tsrxclkout0n),          "&
    "(tsrxclkout1p, tsrxclkout1n),          "&
    "(usbclkp, usbclkm),                    "&
    "(rsv006, rsv007))                      ";

attribute TAP_SCAN_IN    of tdi    : signal is true;
attribute TAP_SCAN_MODE  of tms    : signal is true;
attribute TAP_SCAN_OUT   of tdo    : signal is true;
attribute TAP_SCAN_CLOCK of tck    : signal is (20.0e6,BOTH);
attribute TAP_SCAN_RESET of trst   : signal is true;

attribute COMPLIANCE_PATTERNS of AM5K2E0X : entity is "(por, resetfull)(11)";
attribute INSTRUCTION_LENGTH  of AM5K2E0X : entity is 6;
attribute INSTRUCTION_OPCODE  of AM5K2E0X : entity is
      "private_0       (000010),      "&
      "IDCODE          (000100),      "&
      "private_1       (000101),      "&
      "private_2       (000111),      "&
      "private_3       (001000),      "&
      "private_4       (010111),      "&
      "EXTEST          (011000),      "&
      "private_5       (011001),      "&
      "private_6       (011010),      "&
      "SAMPLE          (011011),      "&
      "PRELOAD         (011100),      "&
      "private_7       (011101),      "&
      "private_8       (011110),      "&
      "private_9       (011111),      "&
      "EXTEST_PULSE    (100100),      "&
      "EXTEST_TRAIN    (100101),      "&
      "private_a       (110001),      "&
      "BYPASS          (000000,111111)";

 attribute INSTRUCTION_CAPTURE of AM5K2E0X : entity is "000001";

 attribute INSTRUCTION_PRIVATE of AM5K2E0X : entity is
      "private_0,    " &
      "private_1,    " &
      "private_2,    " &
      "private_3,    " &
      "private_4,    " &
      "private_5,    " &
      "private_6,    " &
      "private_7,    " &
      "private_8,    " &
      "private_9,    " &
      "EXTEST_PULSE, " &
      "EXTEST_TRAIN, " &
      "private_a";

 attribute IDCODE_REGISTER     of AM5K2E0X : entity is
      "0000" &
      "1011100110100110" &
      "00000010111" &
      "1";
 attribute REGISTER_ACCESS of AM5K2E0X : entity is
      "BOUNDARY      (EXTEST),         "&
      "BOUNDARY      (SAMPLE),         "&
      "BOUNDARY      (PRELOAD),        "&
      "DEVICE_ID     (IDCODE),         "&
      "GEN_REG1[1]   (private_0),      "&
      "GEN_REG32[32] (private_1),      "&
      "GEN_REG8[8]   (private_2),      "&
      "GEN_REG32[32] (private_3),      "&
      "GEN_REG1[1]   (private_4),      "&
      "GEN_REG1[1]   (private_5),      "&
      "GEN_REG1[1]   (private_6),      "&
      "GEN_REG1[1]   (private_7),      "&
      "GEN_REG1[1]   (private_8),      "&
      "GEN_REG1[1]   (private_9),      "&
      "BOUNDARY      (EXTEST_PULSE),   "&
      "BOUNDARY      (EXTEST_TRAIN),   "&
      "GEN_REG1[1]   (private_a),      "&
      "BYPASS        (BYPASS)          ";

  attribute BOUNDARY_LENGTH of AM5K2E0X : entity is 730;

attribute BOUNDARY_REGISTER of AM5K2E0X : entity is

     "  729 (BC_4, *                 ,  internal       , X                  ),"&
     "  728 (BC_1, pcie0txp0         ,  output2        , X                  ),"&
     "  727 (BC_4, pcie0rxn0         ,  observe_only   , X                  ),"&
     "  726 (BC_4, pcie0rxp0         ,  observe_only   , X                  ),"&
     "  725 (BC_1, pcie0txp1         ,  output2        , X                  ),"&
     "  724 (BC_4, pcie0rxn1         ,  observe_only   , X                  ),"&
     "  723 (BC_4, pcie0rxp1         ,  observe_only   , X                  ),"&
     "  722 (BC_1, pcie1txp0         ,  output2        , X                  ),"&
     "  721 (BC_4, pcie1rxn0         ,  observe_only   , X                  ),"&
     "  720 (BC_4, pcie1rxp0         ,  observe_only   , X                  ),"&
     "  719 (BC_1, pcie1txp1         ,  output2        , X                  ),"&
     "  718 (BC_4, pcie1rxn1         ,  observe_only   , X                  ),"&
     "  717 (BC_4, pcie1rxp1         ,  observe_only   , X                  ),"&
     "  716 (BC_1, sgmii0txp0        ,  output2        , X                  ),"&
     "  715 (BC_4, sgmii0rxn0        ,  observe_only   , X                  ),"&
     "  714 (BC_4, sgmii0rxp0        ,  observe_only   , X                  ),"&
     "  713 (BC_1, sgmii0txp1        ,  output2        , X                  ),"&
     "  712 (BC_4, sgmii0rxn1        ,  observe_only   , X                  ),"&
     "  711 (BC_4, sgmii0rxp1        ,  observe_only   , X                  ),"&
     "  710 (BC_1, sgmii0txp2        ,  output2        , X                  ),"&
     "  709 (BC_4, sgmii0rxn2        ,  observe_only   , X                  ),"&
     "  708 (BC_4, sgmii0rxp2        ,  observe_only   , X                  ),"&
     "  707 (BC_1, sgmii0txp3        ,  output2        , X                  ),"&
     "  706 (BC_4, sgmii0rxn3        ,  observe_only   , X                  ),"&
     "  705 (BC_4, sgmii0rxp3        ,  observe_only   , X                  ),"&
     "  704 (BC_1, sgmii0txp4        ,  output2        , X                  ),"&
     "  703 (BC_4, sgmii0rxn4        ,  observe_only   , X                  ),"&
     "  702 (BC_4, sgmii0rxp4        ,  observe_only   , X                  ),"&
     "  701 (BC_1, sgmii0txp5        ,  output2        , X                  ),"&
     "  700 (BC_4, sgmii0rxn5        ,  observe_only   , X                  ),"&
     "  699 (BC_4, sgmii0rxp5        ,  observe_only   , X                  ),"&
     "  698 (BC_1, sgmii0txp6        ,  output2        , X                  ),"&
     "  697 (BC_4, sgmii0rxn6        ,  observe_only   , X                  ),"&
     "  696 (BC_4, sgmii0rxp6        ,  observe_only   , X                  ),"&
     "  695 (BC_1, sgmii0txp7        ,  output2        , X                  ),"&
     "  694 (BC_4, sgmii0rxn7        ,  observe_only   , X                  ),"&
     "  693 (BC_4, sgmii0rxp7        ,  observe_only   , X                  ),"&
     "  692 (BC_1, hyplnk0txp0       ,  output2        , X                  ),"&
     "  691 (BC_4, hyplnk0rxn0       ,  observe_only   , X                  ),"&
     "  690 (BC_4, hyplnk0rxp0       ,  observe_only   , X                  ),"&
     "  689 (BC_1, hyplnk0txp1       ,  output2        , X                  ),"&
     "  688 (BC_4, hyplnk0rxn1       ,  observe_only   , X                  ),"&
     "  687 (BC_4, hyplnk0rxp1       ,  observe_only   , X                  ),"&
     "  686 (BC_1, hyplnk0txp2       ,  output2        , X                  ),"&
     "  685 (BC_4, hyplnk0rxn2       ,  observe_only   , X                  ),"&
     "  684 (BC_4, hyplnk0rxp2       ,  observe_only   , X                  ),"&
     "  683 (BC_1, hyplnk0txp3       ,  output2        , X                  ),"&
     "  682 (BC_4, hyplnk0rxn3       ,  observe_only   , X                  ),"&
     "  681 (BC_4, hyplnk0rxp3       ,  observe_only   , X                  ),"&
     "  680 (BC_1, xfitxp0           ,  output2        , X                  ),"&
     "  679 (BC_4, xfirxn0           ,  observe_only   , X                  ),"&
     "  678 (BC_4, xfirxp0           ,  observe_only   , X                  ),"&
     "  677 (BC_1, xfitxp1           ,  output2        , X                  ),"&
     "  676 (BC_4, xfirxn1           ,  observe_only   , X                  ),"&
     "  675 (BC_4, xfirxp1           ,  observe_only   , X                  ),"&
     "  674 (BC_7, gpio00            ,  bidir          , X,  673, 1, PULL1  ),"&
     "  673 (BC_2, *                 ,  control        , 1                  ),"&
     "  672 (BC_7, gpio01            ,  bidir          , X,  671, 1, PULL0  ),"&
     "  671 (BC_2, *                 ,  control        , 1                  ),"&
     "  670 (BC_7, gpio02            ,  bidir          , X,  669, 1, PULL0  ),"&
     "  669 (BC_2, *                 ,  control        , 1                  ),"&
     "  668 (BC_7, gpio03            ,  bidir          , X,  667, 1, PULL0  ),"&
     "  667 (BC_2, *                 ,  control        , 1                  ),"&
     "  666 (BC_7, gpio04            ,  bidir          , X,  665, 1, PULL0  ),"&
     "  665 (BC_2, *                 ,  control        , 1                  ),"&
     "  664 (BC_7, gpio05            ,  bidir          , X,  663, 1, PULL0  ),"&
     "  663 (BC_2, *                 ,  control        , 1                  ),"&
     "  662 (BC_7, gpio06            ,  bidir          , X,  661, 1, PULL0  ),"&
     "  661 (BC_2, *                 ,  control        , 1                  ),"&
     "  660 (BC_7, gpio07            ,  bidir          , X,  659, 1, PULL0  ),"&
     "  659 (BC_2, *                 ,  control        , 1                  ),"&
     "  658 (BC_7, gpio08            ,  bidir          , X,  657, 1, PULL0  ),"&
     "  657 (BC_2, *                 ,  control        , 1                  ),"&
     "  656 (BC_7, gpio09            ,  bidir          , X,  655, 1, PULL0  ),"&
     "  655 (BC_2, *                 ,  control        , 1                  ),"&
     "  654 (BC_7, gpio10            ,  bidir          , X,  653, 1, PULL0  ),"&
     "  653 (BC_2, *                 ,  control        , 1                  ),"&
     "  652 (BC_7, gpio11            ,  bidir          , X,  651, 1, PULL0  ),"&
     "  651 (BC_2, *                 ,  control        , 1                  ),"&
     "  650 (BC_7, gpio12            ,  bidir          , X,  649, 1, PULL0  ),"&
     "  649 (BC_2, *                 ,  control        , 1                  ),"&
     "  648 (BC_7, gpio13            ,  bidir          , X,  647, 1, PULL0  ),"&
     "  647 (BC_2, *                 ,  control        , 1                  ),"&
     "  646 (BC_7, gpio14            ,  bidir          , X,  645, 1, PULL0  ),"&
     "  645 (BC_2, *                 ,  control        , 1                  ),"&
     "  644 (BC_7, gpio15            ,  bidir          , X,  643, 1, PULL0  ),"&
     "  643 (BC_2, *                 ,  control        , 1                  ),"&
     "  642 (BC_7, gpio16            ,  bidir          , X,  641, 1, PULL0  ),"&
     "  641 (BC_2, *                 ,  control        , 1                  ),"&
     "  640 (BC_7, gpio17            ,  bidir          , X,  639, 1, PULL0  ),"&
     "  639 (BC_2, *                 ,  control        , 1                  ),"&
     "  638 (BC_7, gpio18            ,  bidir          , X,  637, 1, PULL0  ),"&
     "  637 (BC_2, *                 ,  control        , 1                  ),"&
     "  636 (BC_7, gpio19            ,  bidir          , X,  635, 1, PULL0  ),"&
     "  635 (BC_2, *                 ,  control        , 1                  ),"&
     "  634 (BC_7, gpio20            ,  bidir          , X,  633, 1, PULL0  ),"&
     "  633 (BC_2, *                 ,  control        , 1                  ),"&
     "  632 (BC_7, gpio21            ,  bidir          , X,  631, 1, PULL0  ),"&
     "  631 (BC_2, *                 ,  control        , 1                  ),"&
     "  630 (BC_7, gpio22            ,  bidir          , X,  629, 1, PULL0  ),"&
     "  629 (BC_2, *                 ,  control        , 1                  ),"&
     "  628 (BC_7, gpio23            ,  bidir          , X,  627, 1, PULL0  ),"&
     "  627 (BC_2, *                 ,  control        , 1                  ),"&
     "  626 (BC_7, gpio24            ,  bidir          , X,  625, 1, PULL0  ),"&
     "  625 (BC_2, *                 ,  control        , 1                  ),"&
     "  624 (BC_7, gpio25            ,  bidir          , X,  623, 1, PULL0  ),"&
     "  623 (BC_2, *                 ,  control        , 1                  ),"&
     "  622 (BC_7, gpio26            ,  bidir          , X,  621, 1, PULL0  ),"&
     "  621 (BC_2, *                 ,  control        , 1                  ),"&
     "  620 (BC_7, gpio27            ,  bidir          , X,  619, 1, PULL0  ),"&
     "  619 (BC_2, *                 ,  control        , 1                  ),"&
     "  618 (BC_7, gpio28            ,  bidir          , X,  617, 1, PULL0  ),"&
     "  617 (BC_2, *                 ,  control        , 1                  ),"&
     "  616 (BC_7, gpio29            ,  bidir          , X,  615, 1, PULL0  ),"&
     "  615 (BC_2, *                 ,  control        , 1                  ),"&
     "  614 (BC_7, gpio30            ,  bidir          , X,  613, 1, PULL0  ),"&
     "  613 (BC_2, *                 ,  control        , 1                  ),"&
     "  612 (BC_7, gpio31            ,  bidir          , X,  611, 1, PULL0  ),"&
     "  611 (BC_2, *                 ,  control        , 1                  ),"&
     "  610 (BC_7, emu00             ,  bidir          , X,  609, 1, PULL1  ),"&
     "  609 (BC_2, *                 ,  control        , 1                  ),"&
     "  608 (BC_7, emu01             ,  bidir          , X,  607, 1, PULL1  ),"&
     "  607 (BC_2, *                 ,  control        , 1                  ),"&
     "  606 (BC_7, emu02             ,  bidir          , X,  605, 1, PULL1  ),"&
     "  605 (BC_2, *                 ,  control        , 1                  ),"&
     "  604 (BC_7, emu03             ,  bidir          , X,  603, 1, PULL1  ),"&
     "  603 (BC_2, *                 ,  control        , 1                  ),"&
     "  602 (BC_7, emu04             ,  bidir          , X,  601, 1, PULL1  ),"&
     "  601 (BC_2, *                 ,  control        , 1                  ),"&
     "  600 (BC_7, emu05             ,  bidir          , X,  599, 1, PULL1  ),"&
     "  599 (BC_2, *                 ,  control        , 1                  ),"&
     "  598 (BC_7, emu06             ,  bidir          , X,  597, 1, PULL1  ),"&
     "  597 (BC_2, *                 ,  control        , 1                  ),"&
     "  596 (BC_7, emu07             ,  bidir          , X,  595, 1, PULL1  ),"&
     "  595 (BC_2, *                 ,  control        , 1                  ),"&
     "  594 (BC_7, emu08             ,  bidir          , X,  593, 1, PULL1  ),"&
     "  593 (BC_2, *                 ,  control        , 1                  ),"&
     "  592 (BC_7, emu09             ,  bidir          , X,  591, 1, PULL1  ),"&
     "  591 (BC_2, *                 ,  control        , 1                  ),"&
     "  590 (BC_7, emu10             ,  bidir          , X,  589, 1, PULL1  ),"&
     "  589 (BC_2, *                 ,  control        , 1                  ),"&
     "  588 (BC_7, emu11             ,  bidir          , X,  587, 1, PULL1  ),"&
     "  587 (BC_2, *                 ,  control        , 1                  ),"&
     "  586 (BC_7, emu12             ,  bidir          , X,  585, 1, PULL1  ),"&
     "  585 (BC_2, *                 ,  control        , 1                  ),"&
     "  584 (BC_7, emu13             ,  bidir          , X,  583, 1, PULL1  ),"&
     "  583 (BC_2, *                 ,  control        , 1                  ),"&
     "  582 (BC_7, emu14             ,  bidir          , X,  581, 1, PULL1  ),"&
     "  581 (BC_2, *                 ,  control        , 1                  ),"&
     "  580 (BC_7, emu15             ,  bidir          , X,  579, 1, PULL1  ),"&
     "  579 (BC_2, *                 ,  control        , 1                  ),"&
     "  578 (BC_7, emu16             ,  bidir          , X,  577, 1, PULL1  ),"&
     "  577 (BC_2, *                 ,  control        , 1                  ),"&
     "  576 (BC_7, emu17             ,  bidir          , X,  575, 1, PULL1  ),"&
     "  575 (BC_2, *                 ,  control        , 1                  ),"&
     "  574 (BC_7, emu18             ,  bidir          , X,  573, 1, PULL1  ),"&
     "  573 (BC_2, *                 ,  control        , 1                  ),"&
     "  572 (BC_7, rsv000            ,  bidir          , X,  571, 1, PULL0  ),"&
     "  571 (BC_2, *                 ,  control        , 1                  ),"&
     "  570 (BC_7, rsv001            ,  bidir          , X,  569, 1, PULL0  ),"&
     "  569 (BC_2, *                 ,  control        , 1                  ),"&
     "  568 (BC_1, scl0              ,  output2        , 1,  568, 1, WEAK1  ),"&
     "  567 (BC_1, *                 ,  internal       , 0                  ),"&
     "  566 (BC_3, scl0              ,  input          , X                  ),"&
     "  565 (BC_1, sda0              ,  output2        , 1,  565, 1, WEAK1  ),"&
     "  564 (BC_1, *                 ,  internal       , 0                  ),"&
     "  563 (BC_3, sda0              ,  input          , X                  ),"&
     "  562 (BC_1, scl1              ,  output2        , 1,  562, 1, WEAK1  ),"&
     "  561 (BC_1, *                 ,  internal       , 0                  ),"&
     "  560 (BC_3, scl1              ,  input          , X                  ),"&
     "  559 (BC_1, sda1              ,  output2        , 1,  559, 1, WEAK1  ),"&
     "  558 (BC_1, *                 ,  internal       , 0                  ),"&
     "  557 (BC_3, sda1              ,  input          , X                  ),"&
     "  556 (BC_1, scl2              ,  output2        , 1,  556, 1, WEAK1  ),"&
     "  555 (BC_1, *                 ,  internal       , 0                  ),"&
     "  554 (BC_3, scl2              ,  input          , X                  ),"&
     "  553 (BC_1, sda2              ,  output2        , 1,  553, 1, WEAK1  ),"&
     "  552 (BC_1, *                 ,  internal       , 0                  ),"&
     "  551 (BC_3, sda2              ,  input          , X                  ),"&
     "  550 (BC_7, timi0             ,  bidir          , X,  549, 1, PULL0  ),"&
     "  549 (BC_2, *                 ,  control        , 1                  ),"&
     "  548 (BC_7, timi1             ,  bidir          , X,  547, 1, PULL0  ),"&
     "  547 (BC_2, *                 ,  control        , 1                  ),"&
     "  546 (BC_7, timo0             ,  bidir          , X,  545, 1, PULL0  ),"&
     "  545 (BC_2, *                 ,  control        , 1                  ),"&
     "  544 (BC_7, timo1             ,  bidir          , X,  543, 1, PULL0  ),"&
     "  543 (BC_2, *                 ,  control        , 1                  ),"&
     "  542 (BC_7, spi0scs0          ,  bidir          , X,  541, 1, PULL1  ),"&
     "  541 (BC_2, *                 ,  control        , 1                  ),"&
     "  540 (BC_7, spi0scs1          ,  bidir          , X,  539, 1, PULL1  ),"&
     "  539 (BC_2, *                 ,  control        , 1                  ),"&
     "  538 (BC_7, spi0scs2          ,  bidir          , X,  537, 1, PULL1  ),"&
     "  537 (BC_2, *                 ,  control        , 1                  ),"&
     "  536 (BC_7, spi0scs3          ,  bidir          , X,  535, 1, PULL1  ),"&
     "  535 (BC_2, *                 ,  control        , 1                  ),"&
     "  534 (BC_7, spi0clk           ,  bidir          , X,  533, 1, PULL0  ),"&
     "  533 (BC_2, *                 ,  control        , 1                  ),"&
     "  532 (BC_7, spi0din          ,  bidir          , X,  531, 1, PULL0  ),"&
     "  531 (BC_2, *                 ,  control        , 1                  ),"&
     "  530 (BC_7, spi0dout          ,  bidir          , X,  529, 1, PULL0  ),"&
     "  529 (BC_2, *                 ,  control        , 1                  ),"&
     "  528 (BC_7, spi1scs0          ,  bidir          , X,  527, 1, PULL1  ),"&
     "  527 (BC_2, *                 ,  control        , 1                  ),"&
     "  526 (BC_7, spi1scs1          ,  bidir          , X,  525, 1, PULL1  ),"&
     "  525 (BC_2, *                 ,  control        , 1                  ),"&
     "  524 (BC_7, spi1scs2          ,  bidir          , X,  523, 1, PULL1  ),"&
     "  523 (BC_2, *                 ,  control        , 1                  ),"&
     "  522 (BC_7, spi1scs3          ,  bidir          , X,  521, 1, PULL1  ),"&
     "  521 (BC_2, *                 ,  control        , 1                  ),"&
     "  520 (BC_7, spi1clk           ,  bidir          , X,  519, 1, PULL0  ),"&
     "  519 (BC_2, *                 ,  control        , 1                  ),"&
     "  518 (BC_7, spi1din          ,  bidir          , X,  517, 1, PULL0  ),"&
     "  517 (BC_2, *                 ,  control        , 1                  ),"&
     "  516 (BC_7, spi1dout          ,  bidir          , X,  515, 1, PULL0  ),"&
     "  515 (BC_2, *                 ,  control        , 1                  ),"&
     "  514 (BC_7, spi2scs0          ,  bidir          , X,  513, 1, PULL1  ),"&
     "  513 (BC_2, *                 ,  control        , 1                  ),"&
     "  512 (BC_7, spi2scs1          ,  bidir          , X,  511, 1, PULL1  ),"&
     "  511 (BC_2, *                 ,  control        , 1                  ),"&
     "  510 (BC_7, spi2scs2          ,  bidir          , X,  509, 1, PULL1  ),"&
     "  509 (BC_2, *                 ,  control        , 1                  ),"&
     "  508 (BC_7, spi2scs3          ,  bidir          , X,  507, 1, PULL1  ),"&
     "  507 (BC_2, *                 ,  control        , 1                  ),"&
     "  506 (BC_7, spi2clk           ,  bidir          , X,  505, 1, PULL0  ),"&
     "  505 (BC_2, *                 ,  control        , 1                  ),"&
     "  504 (BC_7, spi2din          ,  bidir          , X,  503, 1, PULL0  ),"&
     "  503 (BC_2, *                 ,  control        , 1                  ),"&
     "  502 (BC_7, spi2dout          ,  bidir          , X,  501, 1, PULL0  ),"&
     "  501 (BC_2, *                 ,  control        , 1                  ),"&
     "  500 (BC_1, coreclkp          ,  input          , X                  ),"&
     "  499 (BC_1, netcpclkp         ,  input          , X                  ),"&
     "  498 (BC_1, sgmii0clkp        ,  input          , X                  ),"&
     "  497 (BC_1, ddrclkp           ,  input          , X                  ),"&
     "  496 (BC_7, sysclkout         ,  bidir          , X,  495, 1, PULL0  ),"&
     "  495 (BC_2, *                 ,  control        , 1                  ),"&
     "  494 (BC_1, netcpclksel       ,  input          , X                  ),"&
     "  493 (BC_7, hout              ,  bidir          , X,  492, 1, PULL1  ),"&
     "  492 (BC_2, *                 ,  control        , 1                  ),"&
     "  491 (BC_7, rsv028            ,  bidir          , X,  490, 1, PULL1  ),"&
     "  490 (BC_2, *                 ,  control        , 1                  ),"&
     "  489 (BC_7, rsv029            ,  bidir          , X,  488, 1, PULL1  ),"&
     "  488 (BC_2, *                 ,  control        , 1                  ),"&
     "  487 (BC_7, rsv030            ,  bidir          , X,  486, 1, PULL1  ),"&
     "  486 (BC_2, *                 ,  control        , 1                  ),"&
     "  485 (BC_1, reset             ,  input          , X                  ),"&
     "  484 (BC_7, resetstat         ,  bidir          , X,  483, 1, PULL1  ),"&
     "  483 (BC_2, *                 ,  control        , 1                  ),"&
     "  482 (BC_7, bootcomplete      ,  bidir          , X,  481, 1, PULL0  ),"&
     "  481 (BC_2, *                 ,  control        , 1                  ),"&
     "  480 (BC_1, rsv002            ,  output2        , X                  ),"&
     "  479 (BC_1, rsv004            ,  output2        , X                  ),"&
     "  478 (BC_1, rsv006            ,  output2        , X                  ),"&
     "  477 (BC_7, rsv008            ,  bidir          , X,  476, 1, PULL0  ),"&
     "  476 (BC_2, *                 ,  control        , 1                  ),"&
     "  475 (BC_1, vcl               ,  output2        , 1,  475, 1, WEAK1  ),"&
     "  474 (BC_1, *                 ,  internal       , 0                  ),"&
     "  473 (BC_3, vcl               ,  input          , X                  ),"&
     "  472 (BC_1, vd                ,  output2        , 1,  472, 1, WEAK1  ),"&
     "  471 (BC_1, *                 ,  internal       , 0                  ),"&
     "  470 (BC_3, vd                ,  input          , X                  ),"&
     "  469 (BC_1, vcntl0            ,  output2        , 1,  469, 1, WEAK1  ),"&
     "  468 (BC_1, *                 ,  internal       , 0                  ),"&
     "  467 (BC_4, vcntl0            ,  observe_only   , X                  ),"&
     "  466 (BC_1, vcntl1            ,  output2        , 1,  466, 1, WEAK1  ),"&
     "  465 (BC_1, *                 ,  internal       , 0                  ),"&
     "  464 (BC_4, vcntl1            ,  observe_only   , X                  ),"&
     "  463 (BC_1, vcntl2            ,  output2        , 1,  463, 1, WEAK1  ),"&
     "  462 (BC_1, *                 ,  internal       , 0                  ),"&
     "  461 (BC_4, vcntl2            ,  observe_only   , X                  ),"&
     "  460 (BC_1, vcntl3            ,  output2        , 1,  460, 1, WEAK1  ),"&
     "  459 (BC_1, *                 ,  internal       , 0                  ),"&
     "  458 (BC_4, vcntl3            ,  observe_only   , X                  ),"&
     "  457 (BC_1, vcntl4            ,  output2        , 1,  457, 1, WEAK1  ),"&
     "  456 (BC_1, *                 ,  internal       , 0                  ),"&
     "  455 (BC_4, vcntl4            ,  observe_only   , X                  ),"&
     "  454 (BC_1, vcntl5            ,  output2        , 1,  454, 1, WEAK1  ),"&
     "  453 (BC_1, *                 ,  internal       , 0                  ),"&
     "  452 (BC_4, vcntl5            ,  observe_only   , X                  ),"&
     "  451 (BC_7, hyplnk0rxflclk    ,  bidir          , X,  450 , 1, PULL0 ),"&
     "  450 (BC_2, *                 ,  control        , 1                  ),"&
     "  449 (BC_7, hyplnk0rxfldat    ,  bidir          , X,  448 , 1, PULL0 ),"&
     "  448 (BC_2, *                 ,  control        , 1                  ),"&
     "  447 (BC_7, hyplnk0txflclk    ,  bidir          , X,  446 , 1, PULL0 ),"&
     "  446 (BC_2, *                 ,  control        , 1                  ),"&
     "  445 (BC_7, hyplnk0txfldat    ,  bidir          , X,  444 , 1, PULL0 ),"&
     "  444 (BC_2, *                 ,  control        , 1                  ),"&
     "  443 (BC_7, hyplnk0rxpmclk    ,  bidir          , X,  442 , 1, PULL0 ),"&
     "  442 (BC_2, *                 ,  control        , 1                  ),"&
     "  441 (BC_7, hyplnk0rxpmdat    ,  bidir          , X,  440 , 1, PULL0 ),"&
     "  440 (BC_2, *                 ,  control        , 1                  ),"&
     "  439 (BC_7, hyplnk0txpmclk    ,  bidir          , X,  438 , 1, PULL0 ),"&
     "  438 (BC_2, *                 ,  control        , 1                  ),"&
     "  437 (BC_7, hyplnk0txpmdat    ,  bidir          , X,  436 , 1, PULL0 ),"&
     "  436 (BC_2, *                 ,  control        , 1                  ),"&
     "  435 (BC_7, mdio0             ,  bidir          , X,  434 , 1, PULL1 ),"&
     "  434 (BC_2, *                 ,  control        , 1                  ),"&
     "  433 (BC_7, mdclk0            ,  bidir          , X,  432 , 1, PULL0 ),"&
     "  432 (BC_2, *                 ,  control        , 1                  ),"&
     "  431 (BC_7, uart0rxd          ,  bidir          , X,  430 , 1, PULL0 ),"&
     "  430 (BC_2, *                 ,  control        , 1                  ),"&
     "  429 (BC_7, uart0txd          ,  bidir          , X,  428 , 1, PULL0 ),"&
     "  428 (BC_2, *                 ,  control        , 1                  ),"&
     "  427 (BC_7, uart0cts          ,  bidir          , X,  426 , 1, PULL0 ),"&
     "  426 (BC_2, *                 ,  control        , 1                  ),"&
     "  425 (BC_7, uart0rts          ,  bidir          , X,  424 , 1, PULL0 ),"&
     "  424 (BC_2, *                 ,  control        , 1                  ),"&
     "  423 (BC_7, uart0dsr          ,  bidir          , X,  422 , 1, PULL0 ),"&
     "  422 (BC_2, *                 ,  control        , 1                  ),"&
     "  421 (BC_7, uart0dtr          ,  bidir          , X,  420 , 1, PULL0 ),"&
     "  420 (BC_2, *                 ,  control        , 1                  ),"&
     "  419 (BC_7, uart1rxd          ,  bidir          , X,  418 , 1, PULL0 ),"&
     "  418 (BC_2, *                 ,  control        , 1                  ),"&
     "  417 (BC_7, uart1txd          ,  bidir          , X,  416 , 1, PULL0 ),"&
     "  416 (BC_2, *                 ,  control        , 1                  ),"&
     "  415 (BC_7, uart1cts          ,  bidir          , X,  414 , 1, PULL0 ),"&
     "  414 (BC_2, *                 ,  control        , 1                  ),"&
     "  413 (BC_7, uart1rts          ,  bidir          , X,  412 , 1, PULL0 ),"&
     "  412 (BC_2, *                 ,  control        , 1                  ),"&
     "  411 (BC_7, tsip0clka         ,  bidir          , X,  410 , 1, PULL0 ),"&
     "  410 (BC_2, *                 ,  control        , 1                  ),"&
     "  409 (BC_7, tsip0clkb         ,  bidir          , X,  408 , 1, PULL0 ),"&
     "  408 (BC_2, *                 ,  control        , 1                  ),"&
     "  407 (BC_7, tsip0fsa          ,  bidir          , X,  406 , 1, PULL0 ),"&
     "  406 (BC_2, *                 ,  control        , 1                  ),"&
     "  405 (BC_7, tsip0fsb          ,  bidir          , X,  404 , 1, PULL0 ),"&
     "  404 (BC_2, *                 ,  control        , 1                  ),"&
     "  403 (BC_7, tsip0tr0          ,  bidir          , X,  402 , 1, PULL0 ),"&
     "  402 (BC_2, *                 ,  control        , 1                  ),"&
     "  401 (BC_7, tsip0tr1          ,  bidir          , X,  400 , 1, PULL0 ),"&
     "  400 (BC_2, *                 ,  control        , 1                  ),"&
     "  399 (BC_7, tsip0tx0          ,  bidir          , X,  398 , 1, PULL0 ),"&
     "  398 (BC_2, *                 ,  control        , 1                  ),"&
     "  397 (BC_7, tsip0tx1          ,  bidir          , X,  396 , 1, PULL0 ),"&
     "  396 (BC_2, *                 ,  control        , 1                  ),"&
     "  395 (BC_7, xfimdio           ,  bidir          , X,  394 , 1, PULL1 ),"&
     "  394 (BC_2, *                 ,  control        , 1                  ),"&
     "  393 (BC_7, xfimdclk          ,  bidir          , X,  392 , 1, PULL0 ),"&
     "  392 (BC_2, *                 ,  control        , 1                  ),"&
     "  391 (BC_7, emifrnw           ,  bidir          , X,  390 , 1, PULL1 ),"&
     "  390 (BC_2, *                 ,  control        , 1                  ),"&
     "  389 (BC_7, emifce0           ,  bidir          , X,  388 , 1, PULL1 ),"&
     "  388 (BC_2, *                 ,  control        , 1                  ),"&
     "  387 (BC_7, emifce1           ,  bidir          , X,  386 , 1, PULL1 ),"&
     "  386 (BC_2, *                 ,  control        , 1                  ),"&
     "  385 (BC_7, emifce2           ,  bidir          , X,  384 , 1, PULL1 ),"&
     "  384 (BC_2, *                 ,  control        , 1                  ),"&
     "  383 (BC_7, emifce3           ,  bidir          , X,  382 , 1, PULL1 ),"&
     "  382 (BC_2, *                 ,  control        , 1                  ),"&
     "  381 (BC_7, emifoe            ,  bidir          , X,  380 , 1, PULL1 ),"&
     "  380 (BC_2, *                 ,  control        , 1                  ),"&
     "  379 (BC_7, emifwe            ,  bidir          , X,  378 , 1, PULL1 ),"&
     "  378 (BC_2, *                 ,  control        , 1                  ),"&
     "  377 (BC_7, emifbe0           ,  bidir          , X,  376 , 1, PULL1 ),"&
     "  376 (BC_2, *                 ,  control        , 1                  ),"&
     "  375 (BC_7, emifbe1           ,  bidir          , X,  374 , 1, PULL1 ),"&
     "  374 (BC_2, *                 ,  control        , 1                  ),"&
     "  373 (BC_7, emifwait0         ,  bidir          , X,  372 , 1, PULL0 ),"&
     "  372 (BC_2, *                 ,  control        , 1                  ),"&
     "  371 (BC_7, emifwait1         ,  bidir          , X,  370 , 1, PULL0 ),"&
     "  370 (BC_2, *                 ,  control        , 1                  ),"&
     "  369 (BC_7, emifa00           ,  bidir          , X,  368 , 1, PULL0 ),"&
     "  368 (BC_2, *                 ,  control        , 1                  ),"&
     "  367 (BC_7, emifa01           ,  bidir          , X,  366 , 1, PULL0 ),"&
     "  366 (BC_2, *                 ,  control        , 1                  ),"&
     "  365 (BC_7, emifa02           ,  bidir          , X,  364 , 1, PULL0 ),"&
     "  364 (BC_2, *                 ,  control        , 1                  ),"&
     "  363 (BC_7, emifa03           ,  bidir          , X,  362 , 1, PULL0 ),"&
     "  362 (BC_2, *                 ,  control        , 1                  ),"&
     "  361 (BC_7, emifa04           ,  bidir          , X,  360 , 1, PULL0 ),"&
     "  360 (BC_2, *                 ,  control        , 1                  ),"&
     "  359 (BC_7, emifa05           ,  bidir          , X,  358 , 1, PULL0 ),"&
     "  358 (BC_2, *                 ,  control        , 1                  ),"&
     "  357 (BC_7, emifa06           ,  bidir          , X,  356 , 1, PULL0 ),"&
     "  356 (BC_2, *                 ,  control        , 1                  ),"&
     "  355 (BC_7, emifa07           ,  bidir          , X,  354 , 1, PULL0 ),"&
     "  354 (BC_2, *                 ,  control        , 1                  ),"&
     "  353 (BC_7, emifa08           ,  bidir          , X,  352 , 1, PULL0 ),"&
     "  352 (BC_2, *                 ,  control        , 1                  ),"&
     "  351 (BC_7, emifa09           ,  bidir          , X,  350 , 1, PULL0 ),"&
     "  350 (BC_2, *                 ,  control        , 1                  ),"&
     "  349 (BC_7, emifa10           ,  bidir          , X,  348 , 1, PULL0 ),"&
     "  348 (BC_2, *                 ,  control        , 1                  ),"&
     "  347 (BC_7, emifa11           ,  bidir          , X,  346 , 1, PULL0 ),"&
     "  346 (BC_2, *                 ,  control        , 1                  ),"&
     "  345 (BC_7, emifa12           ,  bidir          , X,  344 , 1, PULL0 ),"&
     "  344 (BC_2, *                 ,  control        , 1                  ),"&
     "  343 (BC_7, emifa13           ,  bidir          , X,  342 , 1, PULL0 ),"&
     "  342 (BC_2, *                 ,  control        , 1                  ),"&
     "  341 (BC_7, emifa14           ,  bidir          , X,  340 , 1, PULL0 ),"&
     "  340 (BC_2, *                 ,  control        , 1                  ),"&
     "  339 (BC_7, emifa15           ,  bidir          , X,  338 , 1, PULL0 ),"&
     "  338 (BC_2, *                 ,  control        , 1                  ),"&
     "  337 (BC_7, emifa16           ,  bidir          , X,  336 , 1, PULL0 ),"&
     "  336 (BC_2, *                 ,  control        , 1                  ),"&
     "  335 (BC_7, emifa17           ,  bidir          , X,  334 , 1, PULL0 ),"&
     "  334 (BC_2, *                 ,  control        , 1                  ),"&
     "  333 (BC_7, emifa18           ,  bidir          , X,  332 , 1, PULL0 ),"&
     "  332 (BC_2, *                 ,  control        , 1                  ),"&
     "  331 (BC_7, emifa19           ,  bidir          , X,  330 , 1, PULL0 ),"&
     "  330 (BC_2, *                 ,  control        , 1                  ),"&
     "  329 (BC_7, emifa20           ,  bidir          , X,  328 , 1, PULL0 ),"&
     "  328 (BC_2, *                 ,  control        , 1                  ),"&
     "  327 (BC_7, emifa21           ,  bidir          , X,  326 , 1, PULL0 ),"&
     "  326 (BC_2, *                 ,  control        , 1                  ),"&
     "  325 (BC_7, emifa22           ,  bidir          , X,  324 , 1, PULL0 ),"&
     "  324 (BC_2, *                 ,  control        , 1                  ),"&
     "  323 (BC_7, emifa23           ,  bidir          , X,  322 , 1, PULL0 ),"&
     "  322 (BC_2, *                 ,  control        , 1                  ),"&
     "  321 (BC_7, emifd00           ,  bidir          , X,  320 , 1, PULL0 ),"&
     "  320 (BC_2, *                 ,  control        , 1                  ),"&
     "  319 (BC_7, emifd01           ,  bidir          , X,  318 , 1, PULL0 ),"&
     "  318 (BC_2, *                 ,  control        , 1                  ),"&
     "  317 (BC_7, emifd02           ,  bidir          , X,  316 , 1, PULL0 ),"&
     "  316 (BC_2, *                 ,  control        , 1                  ),"&
     "  315 (BC_7, emifd03           ,  bidir          , X,  314 , 1, PULL0 ),"&
     "  314 (BC_2, *                 ,  control        , 1                  ),"&
     "  313 (BC_7, emifd04           ,  bidir          , X,  312 , 1, PULL0 ),"&
     "  312 (BC_2, *                 ,  control        , 1                  ),"&
     "  311 (BC_7, emifd05           ,  bidir          , X,  310 , 1, PULL0 ),"&
     "  310 (BC_2, *                 ,  control        , 1                  ),"&
     "  309 (BC_7, emifd06           ,  bidir          , X,  308 , 1, PULL0 ),"&
     "  308 (BC_2, *                 ,  control        , 1                  ),"&
     "  307 (BC_7, emifd07           ,  bidir          , X,  306 , 1, PULL0 ),"&
     "  306 (BC_2, *                 ,  control        , 1                  ),"&
     "  305 (BC_7, emifd08           ,  bidir          , X,  304 , 1, PULL0 ),"&
     "  304 (BC_2, *                 ,  control        , 1                  ),"&
     "  303 (BC_7, emifd09           ,  bidir          , X,  302 , 1, PULL0 ),"&
     "  302 (BC_2, *                 ,  control        , 1                  ),"&
     "  301 (BC_7, emifd10           ,  bidir          , X,  300 , 1, PULL0 ),"&
     "  300 (BC_2, *                 ,  control        , 1                  ),"&
     "  299 (BC_7, emifd11           ,  bidir          , X,  298 , 1, PULL0 ),"&
     "  298 (BC_2, *                 ,  control        , 1                  ),"&
     "  297 (BC_7, emifd12           ,  bidir          , X,  296 , 1, PULL0 ),"&
     "  296 (BC_2, *                 ,  control        , 1                  ),"&
     "  295 (BC_7, emifd13           ,  bidir          , X,  294 , 1, PULL0 ),"&
     "  294 (BC_2, *                 ,  control        , 1                  ),"&
     "  293 (BC_7, emifd14           ,  bidir          , X,  292 , 1, PULL0 ),"&
     "  292 (BC_2, *                 ,  control        , 1                  ),"&
     "  291 (BC_7, emifd15           ,  bidir          , X,  290 , 1, PULL0 ),"&
     "  290 (BC_2, *                 ,  control        , 1                  ),"&
     "  289 (BC_7, usimrst           ,  bidir          , X,  288 , 1, PULL0 ),"&
     "  288 (BC_2, *                 ,  control        , 1                  ),"&
     "  287 (BC_7, usimclk           ,  bidir          , X,  286 , 1, PULL0 ),"&
     "  286 (BC_2, *                 ,  control        , 1                  ),"&
     "  285 (BC_7, usimio            ,  bidir          , X,  284 , 1, PULL1 ),"&
     "  284 (BC_2, *                 ,  control        , 1                  ),"&
     "  283 (BC_7, tspushevt0        ,  bidir          , X,  282 , 1, PULL0 ),"&
     "  282 (BC_2, *                 ,  control        , 1                  ),"&
     "  281 (BC_7, tspushevt1        ,  bidir          , X,  280 , 1, PULL0 ),"&
     "  280 (BC_2, *                 ,  control        , 1                  ),"&
     "  279 (BC_1, tsrefclkp         ,  input          , X                  ),"&
     "  278 (BC_7, tssyncevt         ,  bidir          , X,  277 , 1, PULL0 ),"&
     "  277 (BC_2, *                 ,  control        , 1                  ),"&
     "  276 (BC_7, tscompout         ,  bidir          , X,  275 , 1, PULL0 ),"&
     "  275 (BC_2, *                 ,  control        , 1                  ),"&
     "  274 (BC_1, tsrxclkout0p      ,  output2        , X                  ),"&
     "  273 (BC_1, tsrxclkout1p      ,  output2        , X                  ),"&
     "  272 (BC_1, usbclkp           ,  input          , X                  ),"&
     "  271 (BC_7, usb0drvvbus       ,  bidir          , X,  270 , 1, PULL0 ),"&
     "  270 (BC_2, *                 ,  control        , 1                  ),"&
     "  269 (BC_7, usb1drvvbus       ,  bidir          , X,  268 , 1, PULL0 ),"&
     "  268 (BC_2, *                 ,  control        , 1                  ),"&
     "  267 (BC_7, ddrreset          ,  bidir          , X,  266 , 1, Z     ),"&
     "  266 (BC_2, *                 ,  control        , 1                  ),"&
     "  265 (BC_7, ddrclkoutp0       ,  bidir          , X,  264 , 1, Z     ),"&
     "  264 (BC_2, *                 ,  control        , 1                  ),"&
     "  263 (BC_7, ddrclkoutp1       ,  bidir          , X,  262 , 1, Z     ),"&
     "  262 (BC_2, *                 ,  control        , 1                  ),"&
     "  261 (BC_7, ddrclkoutn0       ,  bidir          , X,  260 , 1, Z     ),"&
     "  260 (BC_2, *                 ,  control        , 1                  ),"&
     "  259 (BC_7, ddrclkoutn1       ,  bidir          , X,  258 , 1, Z     ),"&
     "  258 (BC_2, *                 ,  control        , 1                  ),"&
     "  257 (BC_7, ddrcke0           ,  bidir          , X,  256 , 1, Z     ),"&
     "  256 (BC_2, *                 ,  control        , 1                  ),"&
     "  255 (BC_7, ddrcke1           ,  bidir          , X,  254 , 1, Z     ),"&
     "  254 (BC_2, *                 ,  control        , 1                  ),"&
     "  253 (BC_7, ddrodt0           ,  bidir          , X,  252 , 1, Z     ),"&
     "  252 (BC_2, *                 ,  control        , 1                  ),"&
     "  251 (BC_7, ddrodt1           ,  bidir          , X,  250 , 1, Z     ),"&
     "  250 (BC_2, *                 ,  control        , 1                  ),"&
     "  249 (BC_7, ddrce0            ,  bidir          , X,  248 , 1, Z     ),"&
     "  248 (BC_2, *                 ,  control        , 1                  ),"&
     "  247 (BC_7, ddrce1            ,  bidir          , X,  246 , 1, Z     ),"&
     "  246 (BC_2, *                 ,  control        , 1                  ),"&
     "  245 (BC_7, ddrras            ,  bidir          , X,  244 , 1, Z     ),"&
     "  244 (BC_2, *                 ,  control        , 1                  ),"&
     "  243 (BC_7, ddrcas            ,  bidir          , X,  242 , 1, Z     ),"&
     "  242 (BC_2, *                 ,  control        , 1                  ),"&
     "  241 (BC_7, ddrwe             ,  bidir          , X,  240 , 1, Z     ),"&
     "  240 (BC_2, *                 ,  control        , 1                  ),"&
     "  239 (BC_7, ddrba0            ,  bidir          , X,  238 , 1, Z     ),"&
     "  238 (BC_2, *                 ,  control        , 1                  ),"&
     "  237 (BC_7, ddrba1            ,  bidir          , X,  236 , 1, Z     ),"&
     "  236 (BC_2, *                 ,  control        , 1                  ),"&
     "  235 (BC_7, ddrba2            ,  bidir          , X,  234 , 1, Z     ),"&
     "  234 (BC_2, *                 ,  control        , 1                  ),"&
     "  233 (BC_7, ddra00            ,  bidir          , X,  232 , 1, Z     ),"&
     "  232 (BC_2, *                 ,  control        , 1                  ),"&
     "  231 (BC_7, ddra01            ,  bidir          , X,  230 , 1, Z     ),"&
     "  230 (BC_2, *                 ,  control        , 1                  ),"&
     "  229 (BC_7, ddra02            ,  bidir          , X,  228 , 1, Z     ),"&
     "  228 (BC_2, *                 ,  control        , 1                  ),"&
     "  227 (BC_7, ddra03            ,  bidir          , X,  226 , 1, Z     ),"&
     "  226 (BC_2, *                 ,  control        , 1                  ),"&
     "  225 (BC_7, ddra04            ,  bidir          , X,  224 , 1, Z     ),"&
     "  224 (BC_2, *                 ,  control        , 1                  ),"&
     "  223 (BC_7, ddra05            ,  bidir          , X,  222 , 1, Z     ),"&
     "  222 (BC_2, *                 ,  control        , 1                  ),"&
     "  221 (BC_7, ddra06            ,  bidir          , X,  220 , 1, Z     ),"&
     "  220 (BC_2, *                 ,  control        , 1                  ),"&
     "  219 (BC_7, ddra07            ,  bidir          , X,  218 , 1, Z     ),"&
     "  218 (BC_2, *                 ,  control        , 1                  ),"&
     "  217 (BC_7, ddra08            ,  bidir          , X,  216 , 1, Z     ),"&
     "  216 (BC_2, *                 ,  control        , 1                  ),"&
     "  215 (BC_7, ddra09            ,  bidir          , X,  214 , 1, Z     ),"&
     "  214 (BC_2, *                 ,  control        , 1                  ),"&
     "  213 (BC_7, ddra10            ,  bidir          , X,  212 , 1, Z     ),"&
     "  212 (BC_2, *                 ,  control        , 1                  ),"&
     "  211 (BC_7, ddra11            ,  bidir          , X,  210 , 1, Z     ),"&
     "  210 (BC_2, *                 ,  control        , 1                  ),"&
     "  209 (BC_7, ddra12            ,  bidir          , X,  208 , 1, Z     ),"&
     "  208 (BC_2, *                 ,  control        , 1                  ),"&
     "  207 (BC_7, ddra13            ,  bidir          , X,  206 , 1, Z     ),"&
     "  206 (BC_2, *                 ,  control        , 1                  ),"&
     "  205 (BC_7, ddra14            ,  bidir          , X,  204 , 1, Z     ),"&
     "  204 (BC_2, *                 ,  control        , 1                  ),"&
     "  203 (BC_7, ddra15            ,  bidir          , X,  202 , 1, Z     ),"&
     "  202 (BC_2, *                 ,  control        , 1                  ),"&
     "  201 (BC_7, ddrdqs0p          ,  bidir          , X,  200 , 1, PULL0 ),"&
     "  200 (BC_2, *                 ,  control        , 1                  ),"&
     "  199 (BC_7, ddrdqs1p          ,  bidir          , X,  198 , 1, PULL0 ),"&
     "  198 (BC_2, *                 ,  control        , 1                  ),"&
     "  197 (BC_7, ddrdqs2p          ,  bidir          , X,  196 , 1, PULL0 ),"&
     "  196 (BC_2, *                 ,  control        , 1                  ),"&
     "  195 (BC_7, ddrdqs3p          ,  bidir          , X,  194 , 1, PULL0 ),"&
     "  194 (BC_2, *                 ,  control        , 1                  ),"&
     "  193 (BC_7, ddrdqs4p          ,  bidir          , X,  192 , 1, PULL0 ),"&
     "  192 (BC_2, *                 ,  control        , 1                  ),"&
     "  191 (BC_7, ddrdqs5p          ,  bidir          , X,  190 , 1, PULL0 ),"&
     "  190 (BC_2, *                 ,  control        , 1                  ),"&
     "  189 (BC_7, ddrdqs6p          ,  bidir          , X,  188 , 1, PULL0 ),"&
     "  188 (BC_2, *                 ,  control        , 1                  ),"&
     "  187 (BC_7, ddrdqs7p          ,  bidir          , X,  186 , 1, PULL0 ),"&
     "  186 (BC_2, *                 ,  control        , 1                  ),"&
     "  185 (BC_7, ddrdqs8p          ,  bidir          , X,  184 , 1, PULL0 ),"&
     "  184 (BC_2, *                 ,  control        , 1                  ),"&
     "  183 (BC_7, ddrdqs0n          ,  bidir          , X,  182 , 1, PULL1 ),"&
     "  182 (BC_2, *                 ,  control        , 1                  ),"&
     "  181 (BC_7, ddrdqs1n          ,  bidir          , X,  180 , 1, PULL1 ),"&
     "  180 (BC_2, *                 ,  control        , 1                  ),"&
     "  179 (BC_7, ddrdqs2n          ,  bidir          , X,  178 , 1, PULL1 ),"&
     "  178 (BC_2, *                 ,  control        , 1                  ),"&
     "  177 (BC_7, ddrdqs3n          ,  bidir          , X,  176 , 1, PULL1 ),"&
     "  176 (BC_2, *                 ,  control        , 1                  ),"&
     "  175 (BC_7, ddrdqs4n          ,  bidir          , X,  174 , 1, PULL1 ),"&
     "  174 (BC_2, *                 ,  control        , 1                  ),"&
     "  173 (BC_7, ddrdqs5n          ,  bidir          , X,  172 , 1, PULL1 ),"&
     "  172 (BC_2, *                 ,  control        , 1                  ),"&
     "  171 (BC_7, ddrdqs6n          ,  bidir          , X,  170 , 1, PULL1 ),"&
     "  170 (BC_2, *                 ,  control        , 1                  ),"&
     "  169 (BC_7, ddrdqs7n          ,  bidir          , X,  168 , 1, PULL1 ),"&
     "  168 (BC_2, *                 ,  control        , 1                  ),"&
     "  167 (BC_7, ddrdqs8n          ,  bidir          , X,  166 , 1, PULL1 ),"&
     "  166 (BC_2, *                 ,  control        , 1                  ),"&
     "  165 (BC_7, ddrdqm0           ,  bidir          , X,  164 , 1, Z     ),"&
     "  164 (BC_2, *                 ,  control        , 1                  ),"&
     "  163 (BC_7, ddrdqm1           ,  bidir          , X,  162 , 1, Z     ),"&
     "  162 (BC_2, *                 ,  control        , 1                  ),"&
     "  161 (BC_7, ddrdqm2           ,  bidir          , X,  160 , 1, Z     ),"&
     "  160 (BC_2, *                 ,  control        , 1                  ),"&
     "  159 (BC_7, ddrdqm3           ,  bidir          , X,  158 , 1, Z     ),"&
     "  158 (BC_2, *                 ,  control        , 1                  ),"&
     "  157 (BC_7, ddrdqm4           ,  bidir          , X,  156 , 1, Z     ),"&
     "  156 (BC_2, *                 ,  control        , 1                  ),"&
     "  155 (BC_7, ddrdqm5           ,  bidir          , X,  154 , 1, Z     ),"&
     "  154 (BC_2, *                 ,  control        , 1                  ),"&
     "  153 (BC_7, ddrdqm6           ,  bidir          , X,  152 , 1, Z     ),"&
     "  152 (BC_2, *                 ,  control        , 1                  ),"&
     "  151 (BC_7, ddrdqm7           ,  bidir          , X,  150 , 1, Z     ),"&
     "  150 (BC_2, *                 ,  control        , 1                  ),"&
     "  149 (BC_7, ddrdqm8           ,  bidir          , X,  148 , 1, Z     ),"&
     "  148 (BC_2, *                 ,  control        , 1                  ),"&
     "  147 (BC_7, ddrd00            ,  bidir          , X,  146 , 1, Z     ),"&
     "  146 (BC_2, *                 ,  control        , 1                  ),"&
     "  145 (BC_7, ddrd01            ,  bidir          , X,  144 , 1, Z     ),"&
     "  144 (BC_2, *                 ,  control        , 1                  ),"&
     "  143 (BC_7, ddrd02            ,  bidir          , X,  142 , 1, Z     ),"&
     "  142 (BC_2, *                 ,  control        , 1                  ),"&
     "  141 (BC_7, ddrd03            ,  bidir          , X,  140 , 1, Z     ),"&
     "  140 (BC_2, *                 ,  control        , 1                  ),"&
     "  139 (BC_7, ddrd04            ,  bidir          , X,  138 , 1, Z     ),"&
     "  138 (BC_2, *                 ,  control        , 1                  ),"&
     "  137 (BC_7, ddrd05            ,  bidir          , X,  136 , 1, Z     ),"&
     "  136 (BC_2, *                 ,  control        , 1                  ),"&
     "  135 (BC_7, ddrd06            ,  bidir          , X,  134 , 1, Z     ),"&
     "  134 (BC_2, *                 ,  control        , 1                  ),"&
     "  133 (BC_7, ddrd07            ,  bidir          , X,  132 , 1, Z     ),"&
     "  132 (BC_2, *                 ,  control        , 1                  ),"&
     "  131 (BC_7, ddrd08            ,  bidir          , X,  130 , 1, Z     ),"&
     "  130 (BC_2, *                 ,  control        , 1                  ),"&
     "  129 (BC_7, ddrd09            ,  bidir          , X,  128 , 1, Z     ),"&
     "  128 (BC_2, *                 ,  control        , 1                  ),"&
     "  127 (BC_7, ddrd10            ,  bidir          , X,  126 , 1, Z     ),"&
     "  126 (BC_2, *                 ,  control        , 1                  ),"&
     "  125 (BC_7, ddrd11            ,  bidir          , X,  124 , 1, Z     ),"&
     "  124 (BC_2, *                 ,  control        , 1                  ),"&
     "  123 (BC_7, ddrd12            ,  bidir          , X,  122 , 1, Z     ),"&
     "  122 (BC_2, *                 ,  control        , 1                  ),"&
     "  121 (BC_7, ddrd13            ,  bidir          , X,  120 , 1, Z     ),"&
     "  120 (BC_2, *                 ,  control        , 1                  ),"&
     "  119 (BC_7, ddrd14            ,  bidir          , X,  118 , 1, Z     ),"&
     "  118 (BC_2, *                 ,  control        , 1                  ),"&
     "  117 (BC_7, ddrd15            ,  bidir          , X,  116 , 1, Z     ),"&
     "  116 (BC_2, *                 ,  control        , 1                  ),"&
     "  115 (BC_7, ddrd16            ,  bidir          , X,  114 , 1, Z     ),"&
     "  114 (BC_2, *                 ,  control        , 1                  ),"&
     "  113 (BC_7, ddrd17            ,  bidir          , X,  112 , 1, Z     ),"&
     "  112 (BC_2, *                 ,  control        , 1                  ),"&
     "  111 (BC_7, ddrd18            ,  bidir          , X,  110 , 1, Z     ),"&
     "  110 (BC_2, *                 ,  control        , 1                  ),"&
     "  109 (BC_7, ddrd19            ,  bidir          , X,  108 , 1, Z     ),"&
     "  108 (BC_2, *                 ,  control        , 1                  ),"&
     "  107 (BC_7, ddrd20            ,  bidir          , X,  106 , 1, Z     ),"&
     "  106 (BC_2, *                 ,  control        , 1                  ),"&
     "  105 (BC_7, ddrd21            ,  bidir          , X,  104 , 1, Z     ),"&
     "  104 (BC_2, *                 ,  control        , 1                  ),"&
     "  103 (BC_7, ddrd22            ,  bidir          , X,  102 , 1, Z     ),"&
     "  102 (BC_2, *                 ,  control        , 1                  ),"&
     "  101 (BC_7, ddrd23            ,  bidir          , X,  100 , 1, Z     ),"&
     "  100 (BC_2, *                 ,  control        , 1                  ),"&
     "   99 (BC_7, ddrd24            ,  bidir          , X,  98 , 1, Z      ),"&
     "   98 (BC_2, *                 ,  control        , 1                  ),"&
     "   97 (BC_7, ddrd25            ,  bidir          , X,  96 , 1, Z      ),"&
     "   96 (BC_2, *                 ,  control        , 1                  ),"&
     "   95 (BC_7, ddrd26            ,  bidir          , X,  94 , 1, Z      ),"&
     "   94 (BC_2, *                 ,  control        , 1                  ),"&
     "   93 (BC_7, ddrd27            ,  bidir          , X,  92 , 1, Z      ),"&
     "   92 (BC_2, *                 ,  control        , 1                  ),"&
     "   91 (BC_7, ddrd28            ,  bidir          , X,  90 , 1, Z      ),"&
     "   90 (BC_2, *                 ,  control        , 1                  ),"&
     "   89 (BC_7, ddrd29            ,  bidir          , X,  88 , 1, Z      ),"&
     "   88 (BC_2, *                 ,  control        , 1                  ),"&
     "   87 (BC_7, ddrd30            ,  bidir          , X,  86 , 1, Z      ),"&
     "   86 (BC_2, *                 ,  control        , 1                  ),"&
     "   85 (BC_7, ddrd31            ,  bidir          , X,  84 , 1, Z      ),"&
     "   84 (BC_2, *                 ,  control        , 1                  ),"&
     "   83 (BC_7, ddrd32            ,  bidir          , X,  82 , 1, Z      ),"&
     "   82 (BC_2, *                 ,  control        , 1                  ),"&
     "   81 (BC_7, ddrd33            ,  bidir          , X,  80 , 1, Z      ),"&
     "   80 (BC_2, *                 ,  control        , 1                  ),"&
     "   79 (BC_7, ddrd34            ,  bidir          , X,  78 , 1, Z      ),"&
     "   78 (BC_2, *                 ,  control        , 1                  ),"&
     "   77 (BC_7, ddrd35            ,  bidir          , X,  76 , 1, Z      ),"&
     "   76 (BC_2, *                 ,  control        , 1                  ),"&
     "   75 (BC_7, ddrd36            ,  bidir          , X,  74 , 1, Z      ),"&
     "   74 (BC_2, *                 ,  control        , 1                  ),"&
     "   73 (BC_7, ddrd37            ,  bidir          , X,  72 , 1, Z      ),"&
     "   72 (BC_2, *                 ,  control        , 1                  ),"&
     "   71 (BC_7, ddrd38            ,  bidir          , X,  70 , 1, Z      ),"&
     "   70 (BC_2, *                 ,  control        , 1                  ),"&
     "   69 (BC_7, ddrd39            ,  bidir          , X,  68 , 1, Z      ),"&
     "   68 (BC_2, *                 ,  control        , 1                  ),"&
     "   67 (BC_7, ddrd40            ,  bidir          , X,  66 , 1, Z      ),"&
     "   66 (BC_2, *                 ,  control        , 1                  ),"&
     "   65 (BC_7, ddrd41            ,  bidir          , X,  64 , 1, Z      ),"&
     "   64 (BC_2, *                 ,  control        , 1                  ),"&
     "   63 (BC_7, ddrd42            ,  bidir          , X,  62 , 1, Z      ),"&
     "   62 (BC_2, *                 ,  control        , 1                  ),"&
     "   61 (BC_7, ddrd43            ,  bidir          , X,  60 , 1, Z      ),"&
     "   60 (BC_2, *                 ,  control        , 1                  ),"&
     "   59 (BC_7, ddrd44            ,  bidir          , X,  58 , 1, Z      ),"&
     "   58 (BC_2, *                 ,  control        , 1                  ),"&
     "   57 (BC_7, ddrd45            ,  bidir          , X,  56 , 1, Z      ),"&
     "   56 (BC_2, *                 ,  control        , 1                  ),"&
     "   55 (BC_7, ddrd46            ,  bidir          , X,  54 , 1, Z      ),"&
     "   54 (BC_2, *                 ,  control        , 1                  ),"&
     "   53 (BC_7, ddrd47            ,  bidir          , X,  52 , 1, Z      ),"&
     "   52 (BC_2, *                 ,  control        , 1                  ),"&
     "   51 (BC_7, ddrd48            ,  bidir          , X,  50 , 1, Z      ),"&
     "   50 (BC_2, *                 ,  control        , 1                  ),"&
     "   49 (BC_7, ddrd49            ,  bidir          , X,  48 , 1, Z      ),"&
     "   48 (BC_2, *                 ,  control        , 1                  ),"&
     "   47 (BC_7, ddrd50            ,  bidir          , X,  46 , 1, Z      ),"&
     "   46 (BC_2, *                 ,  control        , 1                  ),"&
     "   45 (BC_7, ddrd51            ,  bidir          , X,  44 , 1, Z      ),"&
     "   44 (BC_2, *                 ,  control        , 1                  ),"&
     "   43 (BC_7, ddrd52            ,  bidir          , X,  42 , 1, Z      ),"&
     "   42 (BC_2, *                 ,  control        , 1                  ),"&
     "   41 (BC_7, ddrd53            ,  bidir          , X,  40 , 1, Z      ),"&
     "   40 (BC_2, *                 ,  control        , 1                  ),"&
     "   39 (BC_7, ddrd54            ,  bidir          , X,  38 , 1, Z      ),"&
     "   38 (BC_2, *                 ,  control        , 1                  ),"&
     "   37 (BC_7, ddrd55            ,  bidir          , X,  36 , 1, Z      ),"&
     "   36 (BC_2, *                 ,  control        , 1                  ),"&
     "   35 (BC_7, ddrd56            ,  bidir          , X,  34 , 1, Z      ),"&
     "   34 (BC_2, *                 ,  control        , 1                  ),"&
     "   33 (BC_7, ddrd57            ,  bidir          , X,  32 , 1, Z      ),"&
     "   32 (BC_2, *                 ,  control        , 1                  ),"&
     "   31 (BC_7, ddrd58            ,  bidir          , X,  30 , 1, Z      ),"&
     "   30 (BC_2, *                 ,  control        , 1                  ),"&
     "   29 (BC_7, ddrd59            ,  bidir          , X,  28 , 1, Z      ),"&
     "   28 (BC_2, *                 ,  control        , 1                  ),"&
     "   27 (BC_7, ddrd60            ,  bidir          , X,  26 , 1, Z      ),"&
     "   26 (BC_2, *                 ,  control        , 1                  ),"&
     "   25 (BC_7, ddrd61            ,  bidir          , X,  24 , 1, Z      ),"&
     "   24 (BC_2, *                 ,  control        , 1                  ),"&
     "   23 (BC_7, ddrd62            ,  bidir          , X,  22 , 1, Z      ),"&
     "   22 (BC_2, *                 ,  control        , 1                  ),"&
     "   21 (BC_7, ddrd63            ,  bidir          , X,  20 , 1, Z      ),"&
     "   20 (BC_2, *                 ,  control        , 1                  ),"&
     "   19 (BC_7, ddrcb00           ,  bidir          , X,  18 , 1, Z      ),"&
     "   18 (BC_2, *                 ,  control        , 1                  ),"&
     "   17 (BC_7, ddrcb01           ,  bidir          , X,  16 , 1, Z      ),"&
     "   16 (BC_2, *                 ,  control        , 1                  ),"&
     "   15 (BC_7, ddrcb02           ,  bidir          , X,  14 , 1, Z      ),"&
     "   14 (BC_2, *                 ,  control        , 1                  ),"&
     "   13 (BC_7, ddrcb03           ,  bidir          , X,  12 , 1, Z      ),"&
     "   12 (BC_2, *                 ,  control        , 1                  ),"&
     "   11 (BC_7, ddrcb04           ,  bidir          , X,  10 , 1, Z      ),"&
     "   10 (BC_2, *                 ,  control        , 1                  ),"&
     "    9 (BC_7, ddrcb05           ,  bidir          , X,  8 , 1, Z       ),"&
     "    8 (BC_2, *                 ,  control        , 1                  ),"&
     "    7 (BC_7, ddrcb06           ,  bidir          , X,  6 , 1, Z       ),"&
     "    6 (BC_2, *                 ,  control        , 1                  ),"&
     "    5 (BC_7, ddrcb07           ,  bidir          , X,  4 , 1, Z       ),"&
     "    4 (BC_2, *                 ,  control        , 1                  ),"&
     "    3 (BC_7, rsv021            ,  bidir          , X,  2 , 1, Z       ),"&
     "    2 (BC_2, *                 ,  control        , 1                  ),"&
     "    1 (BC_7, rsv022            ,  bidir          , X,  0 , 1, Z       ),"&
     "    0 (BC_2, *                 ,  control        , 1                  )";

 attribute DESIGN_WARNING of AM5K2E0X : entity is
     " According to simulation, BSD JTAG TAP may not work correctly unless  "&
     " device has completed RESET sequence first.                           "&
     " Forcing POR  low then release (no clock pulses required) would meet  "&
     " the requirement.                                                     "&
     "                                                                      "&
     " Note that boundary scan registers with disable result WEAK1 are      "&
     " open drain type pins, which will require external pull-ups for       "&
     " test to perform correctly.                                           "&
     "                                                                      "&
     " In order to enter bscan mode correctly, TMS must be low at the       "&
     " rising edge of TRST  and at least one cycle after TRST  is high.     ";

end AM5K2E0X;


This library contains 10683 BSDL files (for 7748 distinct entities) from 71 vendors
Last BSDL model (TOP) was added on Aug 28, 2018 18:32
info@bsdl.info