BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: XeonE7_chipset

-- ***************************************************************************
-- Intel(R) Xeon(R) Processor E7-8800/4800/2800 product families 10-Core processor's uncore
-- (chipset) Boundary Scan Descriptor Language (BSDL) Model, Version 1.0
--
-- The syntax was checked using Agilent(c) Scan Port Driver, Revision 3070 07.00p
--
-- ***************************************************************************
-- Information in this document is provided in connection with Intel products.
-- No license, express or implied, by estoppel or otherwise, to any
-- intellectual property rights is granted by this document. Except as
-- provided in Intel's Terms and Conditions of Sale for such products,
-- Intel assumes no liability whatsoever, and Intel disclaims any express or
-- implied warranty, relating to sale and/or use of Intel products including
-- liability or warranties relating to fitness for a particular purpose,
-- merchantability, or infringement of any patent, copyright or other
-- intellectual property right. Intel products are not intended for use in
-- medical, life saving, or life sustaining applications.
--
-- Intel may make changes to specifications and product descriptions at any
-- time, without notice.
--
-- The Intel(R) Xeon(R) Processor E7-8800/4800/2800 product families may contain design 
-- defects or errors known as errata which may cause the product to deviate from
-- published specifications. Current characterized errata are available on request.
--
-- Contact your local Intel sales office or your distributor to obtain the
-- latest specifications and before placing your product order.
--
-- Copyright (c) Intel Corporation 2010, 2011. Third-party brands and
-- names are the property of their respective owners.
-- ***************************************************************************
--
-- Modifications:


entity XeonE7_chipset is


  generic(PHYSICAL_PIN_MAP : string := "EGL_CHIPSET_LGA1567");

  port (
	BOOTMODE       : in      bit_vector( 1 downto 0 );        -- Control             - boot mode configuration
	CVID           : linkage bit_vector( 6 downto 0 );        -- Pwr                 - cache voltage ID for voltage regulator
	ERROR0_N       : inout   bit;                             -- Error               - uncorrected error
	ERROR1_N       : inout   bit;                             -- Error               - fatal error
	FBD0NBICLKAP0  : in      bit;                             -- Clk                 - Intel SMI channel A differential receive clock [P]
	FBD0NBICLKAN0  : in      bit;                             -- Clk                 - Intel SMI channel A differential receive clock [N]
	FBD0NBIAP      : in      bit_vector( 13 downto 0 );       -- Data                - Intel SMI channel A differential receive data [P]
	FBD0NBIAN      : in      bit_vector( 13 downto 0 );       -- Data                - Intel SMI channel A differential receive data [N]
	FBD0SBOAP      : buffer  bit_vector( 10 downto 0 );       -- Data                - Intel SMI channel A differential transmit data [P]
	FBD0SBOAN      : buffer  bit_vector( 10 downto 0 );       -- Data                - Intel SMI channel A differential transmit data [N]
	FBD0SBOCLKAP0  : buffer  bit;                             -- Clk                 - Intel SMI channel A differential transmit clock [P]
	FBD0SBOCLKAN0  : buffer  bit;                             -- Clk                 - Intel SMI channel A differential transmit clock [N]
	FBD0NBICLKBP0  : in      bit;                             -- Clk                 - Intel SMI channel B differential receive clock [P]
	FBD0NBICLKBN0  : in      bit;                             -- Clk                 - Intel SMI channel B differential receive clock [N]
	FBD0NBIBP      : in      bit_vector( 13 downto 0 );       -- Data                - Intel SMI channel B differential receive data [P]
	FBD0NBIBN      : in      bit_vector( 13 downto 0 );       -- Data                - Intel SMI channel B differential receive data [N]
	FBD0SBOBP      : buffer  bit_vector( 10 downto 0 );       -- Data                - Intel SMI channel B differential transmit data [P]
	FBD0SBOBN      : buffer  bit_vector( 10 downto 0 );       -- Data                - Intel SMI channel B differential transmit data [N]
	FBD0SBOCLKBP0  : buffer  bit;                             -- Clk                 - Intel SMI channel B differential transmit clock [P]
	FBD0SBOCLKBN0  : buffer  bit;                             -- Clk                 - Intel SMI channel B differential transmit clock [N]
	FBD1NBICLKCP0  : in      bit;                             -- Clk                 - Intel SMI channel C differential receive clock [P]
	FBD1NBICLKCN0  : in      bit;                             -- Clk                 - Intel SMI channel C differential receive clock [N]
	FBD1NBICP      : in      bit_vector( 13 downto 0 );       -- Data                - Intel SMI channel C differential receive data [P]
	FBD1NBICN      : in      bit_vector( 13 downto 0 );       -- Data                - Intel SMI channel C differential receive data [N]
	FBD1SBOCP      : buffer  bit_vector( 10 downto 0 );       -- Data                - Intel SMI channel C differential transmit data [P]
	FBD1SBOCN      : buffer  bit_vector( 10 downto 0 );       -- Data                - Intel SMI channel C differential transmit data [N]
	FBD1SBOCLKCP0  : buffer  bit;                             -- Clk                 - Intel SMI channel C differential transmit clock [P]
	FBD1SBOCLKCN0  : buffer  bit;                             -- Clk                 - Intel SMI channel C differential transmit clock [N]
	FBD1NBICLKDP0  : in      bit;                             -- Clk                 - Intel SMI channel D differential receive clock [P]
	FBD1NBICLKDN0  : in      bit;                             -- Clk                 - Intel SMI channel D differential receive clock [N]
	FBD1NBIDP      : in      bit_vector( 13 downto 0 );       -- Data                - Intel SMI channel D differential receive data [P]
	FBD1NBIDN      : in      bit_vector( 13 downto 0 );       -- Data                - Intel SMI channel D differential receive data [N]
	FBD1SBODP      : buffer  bit_vector( 10 downto 0 );       -- Data                - Intel SMI channel D differential transmit data [P]
	FBD1SBODN      : buffer  bit_vector( 10 downto 0 );       -- Data                - Intel SMI channel D differential transmit data [N]
	FBD1SBOCLKDP0  : buffer  bit;                             -- Clk                 - Intel SMI channel D differential transmit clock [P]
	FBD1SBOCLKDN0  : buffer  bit;                             -- Clk                 - Intel SMI channel D differential transmit clock [N]
	FLASHROM_CFG   : in      bit_vector( 2 downto 0 );        -- Control             - Flash ROM configuration
	FLASHROM_CLK   : out     bit;                             -- Clk                 - Flash ROM clock
	FLASHROM_CS_N  : out     bit_vector( 3 downto 0 );        -- Control             - Flash ROM chip selects
	FLASHROM_DATI  : in      bit;                             -- Data                - Flash ROM data input
	FLASHROM_DATO  : out     bit;                             -- Data                - Flash ROM data output
	FLASHROM_WP_N  : out     bit;                             --                     - Flash ROM write protect
	FORCE_PR_N     : in      bit;                             -- Pwr/Clk             - force processor power reduction
	ISENSE_DN      : linkage bit;                             -- Pwr/Clk             - Differential current sense [N]
	ISENSE_DP      : linkage bit;                             -- Pwr/Clk             - Differential current sense [P]
	KEY            : linkage bit_vector( 4 downto 0 );        --                     - 
	LTSX           : in      bit;                             -- Control             - Security extension
	MBP            : inout   bit_vector( 7 downto 0 );        -- Diagnostic          - Run-time control and debug
	NMI            : in      bit;                             -- Error               - Interrupt
	MEM_THROTTLE0_N: in      bit;                             -- Pwr/Clk             - System memory throttle indicator
	MEM_THROTTLE1_N: in      bit;                             -- Pwr/Clk             - System memory throttle indicator
	ODT            : in      bit;                             -- Control             - Enable on-die termination
	PECI           : inout   bit;                             -- Diagnostic          - Platform Environment Control Interface
	PRDY_N         : out     bit;                             -- Diagnostic          - Processor debug readiness
	PREQ_N         : in      bit;                             -- Diagnostic          - Processor debug request
	PROC_ID        : linkage bit_vector( 1 downto 0 );        -- Control             - 
	PROCHOT_N      : out     bit;                             -- Pwr                 - Occurrence of Thermal Control Circuit activation
	PSI_CACHE_N    : linkage bit;                             -- Pwr                 - Cache power status indicator
	PSI_N          : linkage bit;                             -- Pwr                 - Core power status indicator
	PWRGOOD        : in      bit;                             -- Pwr                 - Power good
	QPI0_CLKRX_DN  : in      bit;                             -- Clk                 - Intel QPI port 0 differential receive clock [N]
	QPI0_CLKRX_DP  : in      bit;                             -- Clk                 - Intel QPI port 0 differential receive clock [P]
	QPI0_CLKTX_DN  : buffer  bit;                             -- Clk                 - Intel QPI port 0 differential transmit clock [N]
	QPI0_CLKTX_DP  : buffer  bit;                             -- Clk                 - Intel QPI port 0 differential transmit clock [P]
	QPI0_DRX_DN    : in      bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 0 differential receive data [N]
	QPI0_DRX_DP    : in      bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 0 differential receive data [P]
	QPI0_DTX_DN    : buffer  bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 0 differential transmit data [N]
	QPI0_DTX_DP    : buffer  bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 0 differential transmit data [P]
	QPI1_CLKRX_DN  : in      bit;                             -- Clk                 - Intel QPI port 1 differential receive clock [N]
	QPI1_CLKRX_DP  : in      bit;                             -- Clk                 - Intel QPI port 1 differential receive clock [P]
	QPI1_CLKTX_DN  : buffer  bit;                             -- Clk                 - Intel QPI port 1 differential transmit clock [N]
	QPI1_CLKTX_DP  : buffer  bit;                             -- Clk                 - Intel QPI port 1 differential transmit clock [P]
	QPI1_DRX_DN    : in      bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 1 differential receive data [N]
	QPI1_DRX_DP    : in      bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 1 differential receive data [P]
	QPI1_DTX_DN    : buffer  bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 1 differential transmit data [N]
	QPI1_DTX_DP    : buffer  bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 1 differential transmit data [P]
	QPI2_CLKRX_DN  : in      bit;                             -- Clk                 - Intel QPI port 2 differential receive clock [N]
	QPI2_CLKRX_DP  : in      bit;                             -- Clk                 - Intel QPI port 2 differential receive clock [P]
	QPI2_CLKTX_DN  : buffer  bit;                             -- Clk                 - Intel QPI port 2 differential transmit clock [N]
	QPI2_CLKTX_DP  : buffer  bit;                             -- Clk                 - Intel QPI port 2 differential transmit clock [P]
	QPI2_DRX_DN    : in      bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 2 differential receive data [N]
	QPI2_DRX_DP    : in      bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 2 differential receive data [P]
	QPI2_DTX_DN    : buffer  bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 2 differential transmit data [N]
	QPI2_DTX_DP    : buffer  bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 2 differential transmit data [P]
	QPI3_CLKRX_DN  : in      bit;                             -- Clk                 - Intel QPI port 3 differential receive clock [N]
	QPI3_CLKRX_DP  : in      bit;                             -- Clk                 - Intel QPI port 3 differential receive clock [P]
	QPI3_CLKTX_DN  : buffer  bit;                             -- Clk                 - Intel QPI port 3 differential transmit clock [N]
	QPI3_CLKTX_DP  : buffer  bit;                             -- Clk                 - Intel QPI port 3 differential transmit clock [P]
	QPI3_DRX_DN    : in      bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 3 differential receive data [N]
	QPI3_DRX_DP    : in      bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 3 differential receive data [P]
	QPI3_DTX_DN    : buffer  bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 3 differential transmit data [N]
	QPI3_DTX_DP    : buffer  bit_vector( 19 downto 0 );       -- Data                - Intel QPI port 3 differential transmit data [P]
	RESET_N        : in      bit;                             -- Control             - Reset
	RNBIST         : in      bit;                             -- Diagnostic          - BIST enable
	RSVD           : linkage bit_vector( 75 downto 0 );       -- Reserved            -
	SKTDIS_N       : in      bit;                             -- Control             - Socket disable
	SKTID          : in      bit_vector( 2 downto 0 );        --                     - Socket ID
	SKTOCC_N       : linkage bit;                             --                     - Socket occupied
	SMBCLK         : linkage bit;                             -- Clk                 - 
	SMBDAT         : linkage bit;                             -- Data                - 
	SM_WP          : linkage bit;                             --                     - 
	SPDCLK         : out     bit;                             -- Clk                 - Serial presence detect clock
	SPDDAT         : inout   bit;                             -- Data                - Serial presence detect data
	SYSCLK_DN      : in      bit;                             -- Control             - differential system clock [N]
	SYSCLK_DP      : in      bit;                             -- Control             - differential system clock [P]
	SYSCLK_LAI     : linkage bit;                             -- Control             - reference clock for debug [P]
	SYSCLK_LAI_N   : linkage bit;                             -- Control             - reference clock for debug [N]
	TCLK           : in      bit;                             -- Diagnostic          - TAP clock
	TDI            : in      bit;                             -- Diagnostic          - TAP data in
	TDO            : out     bit;                             -- Diagnostic          - TAP data out
	TEST           : linkage bit_vector( 3 downto 0 );        -- Diagnostic          - Corner pins, can be left nocon
	THERMALERT_N   : out     bit;                             -- Pwr                 - catastrophic thermal alert
	THERMTRIP_N    : out     bit;                             -- Pwr                 - catastrophic thermal trip point
	TMS            : in      bit;                             -- Diagnostic          - TAP mode select
	TRST_N         : in      bit;                             -- Diagnostic          - TAP reset
	VCACHE         : linkage bit_vector( 87 downto 0 );       -- Pwr/Clk             - Cache voltage supply
	VCACHESENSE    : linkage bit;                             -- Pwr/Clk             - VR Sense lines (Vcache)
	VCC33          : linkage bit_vector( 2 downto 0 );        -- Pwr/Clk             - 3.3V supply to PIROM/scratch ROM/INITROM
	VCCCORE        : linkage bit_vector( 181 downto 0 );      -- Pwr/Clk             - Core voltage supply
	VCORESENSE     : linkage bit;                             -- Pwr/Clk             - sense for VCC power plane
	VID            : linkage bit_vector( 7 downto 0 );        -- Pwr                 - program core voltage regulator
	VIO_VID        : linkage bit_vector( 4 downto 1 );        -- Pwr/Clk             - Voltage ID driven to the VR
	VIOC           : linkage bit_vector( 44 downto 0 );       -- Pwr/Clk             - Power to the Intel QPI I/O interface
	VIOF           : linkage bit_vector( 48 downto 0 );       -- Pwr/Clk             - Power to the Intel SMI I/O interface
	VIOPWRGOOD     : in      bit;                             -- Pwr                 - VIO Power Good
	VREG           : linkage bit_vector( 9 downto 0 );        -- Pwr/Clk             - ~1.8V. Voltage to PLLs
	VSS            : linkage bit_vector( 470 downto 0 );      -- Pwr/Clk             - Ground plane
	VSSCACHESENSE  : linkage bit;                             -- Pwr/Clk             - VR Sense lines (Vcache)
	VSSCORESENSE   : linkage bit                              -- Pwr/Clk             - VR Sense lines (Vcore)
);

   use STD_1149_1_2001.all;

  attribute COMPONENT_CONFORMANCE of XeonE7_chipset : entity is "STD_1149_1_2001" ;

  attribute PIN_MAP of XeonE7_chipset : entity is PHYSICAL_PIN_MAP;

constant EGL_CHIPSET_LGA1567 : PIN_MAP_STRING :=
	"SYSCLK_DN            :   T38,  " &
	"SYSCLK_DP            :   U38,  " &
	"SYSCLK_LAI           :   AA39,  " &
	"SYSCLK_LAI_N         :   AA38,  " &
	"BOOTMODE             :   (BH11,BH10), " & -- BOOTMODE(1:0)
	"CVID                 :   (BL18,BM18,BL17,BM17,BJ16,BK16,BL16), " & -- CVID(7:1)
	"ERROR0_N             :   G3,  " &
	"ERROR1_N             :   G4,  " &
	"FBD0NBIAN            :   (BK8,BH6,BC8,BC6,BD5,BE6,BF6,BG5,BK9,BM8,BL10,BH8,BF8,BE8), " & -- FBD0NBIAN(13:0)
	"FBD0NBIAP            :   (BL8,BH7,BC7,BD6,BE5,BE7,BG6,BH5,BK10,BM9,BM10,BG8,BF9,BD8), " & -- FBD0NBIAP(13:0)
	"FBD0NBIBN            :   (BK2,BH2,BC3,BC4,BD2,BE3,BF1,BG1,BJ4,BK5,BM5,BL6,BK6,BG4), " & -- FBD0NBIBN(13:0)
	"FBD0NBIBP            :   (BK3,BJ2,BC2,BD4,BE2,BE4,BF2,BH1,BK4,BL5,BM6,BL7,BJ6,BF4), " & -- FBD0NBIBP(13:0)
	"FBD0NBICLKAN0        :   BJ8,  " &
	"FBD0NBICLKAP0        :   BJ9,  " &
	"FBD0NBICLKBN0        :   BH3,  " &
	"FBD0NBICLKBP0        :   BH4,  " &
	"FBD0SBOAN            :   (AW8,AR6,AP8,AN6,AP7,AT8,AU7,AV6,AW5,AY7,BA5), " & -- FBD0SBOAN(10:0)
	"FBD0SBOAP            :   (AV8,AT6,AR8,AN5,AP6,AT7,AV7,AW6,AY5,AY8,BA6), " & -- FBD0SBOAP(10:0)
	"FBD0SBOBN            :   (AM4,AR4,AP3,AM1,AN2,AR2,AV3,AV1,AW2,AY3,AW4), " & -- FBD0SBOBN(10:0)
	"FBD0SBOBP            :   (AN4,AT4,AR3,AN1,AP2,AR1,AV2,AW1,AY2,AY4,AV4), " & -- FBD0SBOBP(10:0)
	"FBD0SBOCLKAN0        :   AU5,  " &
	"FBD0SBOCLKAP0        :   AT5,  " &
	"FBD0SBOCLKBN0        :   AU3,  " &
	"FBD0SBOCLKBP0        :   AU4,  " &
	"FBD1NBICLKCN0        :   AB5,  " &
	"FBD1NBICLKCP0        :   AC5,  " &
	"FBD1NBICLKDN0        :   AB2,  " &
	"FBD1NBICLKDP0        :   AC2,  " &
	"FBD1NBICN            :   (AC6,AA6,Y8,V8,U6,Y7,W5,AA8,AD6,AE5,AF6,AE8,AD8,AC8), " & -- FBD1NBICN(13:0)
	"FBD1NBICP            :   (AC7,AB6,W8,V7,V6,Y6,Y5,AA7,AE6,AF5,AF7,AF8,AD9,AB8), " & -- FBD1NBICP(13:0)
	"FBD1NBIDN            :   (AC3,AA1,W4,U4,V3,V1,W2,Y3,AD1,AE2,AF3,AG2,AE4,AB4), " & -- FBD1NBIDN(13:0)
	"FBD1NBIDP            :   (AD3,AB1,V4,U3,V2,W1,Y2,Y4,AD2,AF2,AF4,AG3,AD4,AA4), " & -- FBD1NBIDP(13:0)
	"FBD1SBOCLKCN0        :   K6,  " &
	"FBD1SBOCLKCP0        :   J6,  " &
	"FBD1SBOCLKDN0        :   K1,  " &
	"FBD1SBOCLKDP0        :   J1,  " &
	"FBD1SBOCN            :   (R8,H5,R7,N8,J8,H7,L8,L5,M6,N6,P5), " & -- FBD1SBOCN(10:0)
	"FBD1SBOCP            :   (P8,J5,R6,N7,K8,H6,L7,M5,M7,P6,R5), " & -- FBD1SBOCP(10:0)
	"FBD1SBODN            :   (R4,H3,P4,M4,J4,H2,K2,L1,N3,N1,P2), " & -- FBD1SBODN(10:0)
	"FBD1SBODP            :   (R3,J3,N4,M3,K4,H1,K3,L2,N2,P1,R2), " & -- FBD1SBODP(10:0)
	"FLASHROM_CFG         :   (BJ15,BM15,BL15), " & -- FLASHROM_CFG(2:0)
	"FLASHROM_CLK         :   BL11,  " &
	"FLASHROM_CS_N        :   (BM14,BL14,BM13,BK13), " & -- FLASHROM_CS_N(3:0)
	"FLASHROM_DATI        :   BL12,  " &
	"FLASHROM_DATO        :   BM12,  " &
	"FLASHROM_WP_N        :   BK11,  " &
	"FORCE_PR_N           :   C4,  " &
	"ISENSE_DN            :   B5,  " &
	"ISENSE_DP            :   A5,  " &
	"KEY                  :   (BD46,BD1,BC46,BC1,BB1),  " &
	"LTSX                 :   BF10,  " &
	"MBP                  :   (E4,E1,E3,F4,E2,F1,F2,G2), " & -- MBP(7:0)
	"MEM_THROTTLE0_N      :   BC10,  " &
	"MEM_THROTTLE1_N      :   BD10,  " &
	"NMI                  :   D5,  " &
	"ODT                  :   AP10,  " &
	"PECI                 :   D43,  " &
	"PRDY_N               :   C3,  " &
	"PREQ_N               :   D3,  " &
	"PROCHOT_N            :   D2,  " &
	"PROC_ID              :   (AY9,AW9), " & -- PROC_ID(1:0)
	"PSI_CACHE_N          :   BF14,  " &
	"PSI_N                :   G7,  " &
	"PWRGOOD              :   G41,  " &
	"QPI0_CLKRX_DN        :   BF37,  " &
	"QPI0_CLKRX_DP        :   BF36,  " &
	"QPI0_CLKTX_DN        :   BL41,  " &
	"QPI0_CLKTX_DP        :   BM41,  " &
	"QPI0_DRX_DN          :   (BD34,BE33,BF32,BG33,BH33,BL32,BM33,BJ33,BG35,BE35,BD37,BE39,BF40,BC36,BD40,BC41,BC39,BA40,AY41,BB38), " & -- QPI0_DRX_DN(19:0)
	"QPI0_DRX_DP          :   (BD35,BE34,BE32,BF33,BH32,BK32,BM32,BK33,BG34,BF35,BE37,BE38,BF39,BD36,BE40,BD41,BC40,BB40,BA41,BB39), " & -- QPI0_DRX_DP(19:0)
	"QPI0_DTX_DN          :   (BH39,BJ37,BJ36,BL35,BM36,BK37,BL37,BK39,BL40,BJ41,BL43,BK42,BK45,BJ43,BH45,BH43,BF46,BF44,BF43,BG42), " & -- QPI0_DTX_DN(19:0)
	"QPI0_DTX_DP          :   (BH40,BH37,BJ35,BK35,BM35,BK36,BM37,BJ39,BL39,BJ40,BL42,BK41,BK44,BK43,BJ45,BH44,BG46,BF45,BG43,BH42), " & -- QPI0_DTX_DP(19:0)
	"QPI1_CLKRX_DN        :   AP41,  " &
	"QPI1_CLKRX_DP        :   AR41,  " &
	"QPI1_CLKTX_DN        :   AY45,  " &
	"QPI1_CLKTX_DP        :   AY46,  " &
	"QPI1_DRX_DN          :   (AR38,AT39,BA38,AV38,AY40,AW39,AV40,AU41,AU39,AR40,AP39,AM40,AL41,AL39,AJ40,AH41,AK38,AJ37,AM37,AN38), " & -- QPI1_DRX_DN(19:0)
	"QPI1_DRX_DP          :   (AR37,AT38,BA37,AV37,AY39,AW38,AW40,AV41,AU40,AT40,AP40,AN40,AM41,AL40,AK40,AJ41,AK39,AJ38,AM38,AN39), " & -- QPI1_DRX_DP(19:0)
	"QPI1_DTX_DN          :   (AV43,AW44,BA43,BE44,BC43,BD45,BC45,BB44,BA46,BA44,AV46,AV44,AU45,AR46,AR44,AP45,AM45,AN43,AR43,AT43), " & -- QPI1_DTX_DN(19:0)
	"QPI1_DTX_DP          :   (AU43,AW43,AY43,BE43,BD43,BE45,BC44,BB43,BB46,BA45,AW46,AV45,AU46,AT46,AR45,AP46,AM44,AN44,AP43,AT44), " & -- QPI1_DTX_DP(19:0)
	"QPI2_CLKRX_DN        :   AB40,  " &
	"QPI2_CLKRX_DP        :   AB39,  " &
	"QPI2_CLKTX_DN        :   AE44,  " &
	"QPI2_CLKTX_DP        :   AE45,  " &
	"QPI2_DRX_DN          :   (AA37,Y38,V37,V39,T40,U41,V40,W40,Y41,AA40,AC41,AD40,AE40,AF41,AG40,AH40,AG38,AF37,AD38,AC37), " & -- QPI2_DRX_DN(19:0)
	"QPI2_DRX_DP          :   (AB37,Y37,U37,V38,T39,T41,U40,W39,W41,Y40,AB41,AC40,AE39,AE41,AF40,AH39,AG39,AF38,AD39,AC38), " & -- QPI2_DRX_DP(19:0)
	"QPI2_DTX_DN          :   (AB43,W43,AA44,W45,Y46,AA45,AB46,AC45,AD46,AD43,AG45,AG43,AH44,AK45,AK43,AL45,AN46,AM43,AH43,AE43), " & -- QPI2_DTX_DN(19:0)
	"QPI2_DTX_DP          :   (AC43,Y43,AA43,W44,W46,Y45,AB45,AC44,AC46,AD44,AF45,AG44,AH45,AJ45,AK44,AL46,AM46,AL43,AJ43,AF43), " & -- QPI2_DTX_DP(19:0)
	"QPI3_CLKRX_DN        :   N45,  " &
	"QPI3_CLKRX_DP        :   M45,  " &
	"QPI3_CLKTX_DN        :   E44,  " &
	"QPI3_CLKTX_DP        :   D44,  " &
	"QPI3_DRX_DN          :   (R39,P40,N38,M38,L40,N40,M41,L43,L44,N43,P46,P44,T45,U46,R43,U44,U43,T42,N41,P41), " & -- QPI3_DRX_DN(19:0)
	"QPI3_DRX_DP          :   (R38,P39,N37,L38,L39,M40,L41,L42,M44,M43,N46,P45,R45,T46,R44,U45,T43,R42,N42,R41), " & -- QPI3_DRX_DP(19:0)
	"QPI3_DTX_DN          :   (E40,E39,F41,C39,D42,A41,B42,F42,B44,C45,E45,G46,G44,J45,K46,F43,J43,G43,H42,J40), " & -- QPI3_DTX_DN(19:0)
	"QPI3_DTX_DP          :   (D40,F39,F40,C40,D41,B41,C42,E42,B43,C44,E46,F46,G45,H45,J46,F44,J44,H43,J42,J41), " & -- QPI3_DTX_DP(19:0)
	"RESET_N              :   B4,  " &
	"RNBIST               :   BJ10,  " &
	"RSVD                 :   (AA10,AA2,AB3,AD37,AE38,AF10,AG10,AG37,AG5,AG6,AG7,AG9,AH10,AH3,AH38,AH4,AH5,AH7,AH8,AH9,AJ4,AJ46,AJ5,AJ6,AJ7,AJ8,AJ9,AK37,AK6,AK8,AK9,AL38,AL6,AL8,AM10,AM6,AM7,AM8,AM9,AN37,AP38,AT2,AT37,AU2,AU38,AW37,AY38,B45,B46,BC35,BC38,BC9,BD12,BD13,BD38,BD9,BF12,BF3,BG2,BG32,BG45,BH15,BH16,D4,G6,H9,J9,M39,P37,P38,P9,R9,W38,W9,Y10,Y9),  " &
	"SKTDIS_N             :   BG11,  " &
	"SKTID                :   (BH14,BJ14,BK14), " & -- SKTID(2:0)
	"SKTOCC_N             :   BJ13,  " &
	"SMBCLK               :   BJ12,  " &
	"SMBDAT               :   BH12,  " &
	"SM_WP                :   BK12,  " &
	"SPDCLK               :   BG10,  " &
	"SPDDAT               :   BG9,  " &
	"TCLK                 :   K10,  " &
	"TDI                  :   L9,  " &
	"TDO                  :   CSTDO,  " &
	"TEST                 :   (BM1,BM46,A46,A1), " & -- TEST(3:0)
	"THERMALERT_N         :   BG13,  " &
	"THERMTRIP_N          :   F5,  " &
	"TMS                  :   M9,  " &
	"TRST_N               :   M10,  " &
	"VCACHE               :   (BC15,BC17,BC18,BC20,BC21,BC23,BC24,BC26,BC27,BC29,BC30,BC32,BC33,BD15,BD17,BD18,BD20,BD21,BD23,BD24,BD26,BD27,BD29,BD30,BD32,BD33,BE15,BE17,BE18,BE20,BE21,BE23,BE24,BE26,BE27,BE29,BE30,BF15,BF17,BF18,BF20,BF27,BF29,BF30,BG15,BG17,BG18,BG20,BG27,BG29,BG30,BH17,BH18,BH20,BH27,BH29,BH30,BJ18,BJ20,BJ21,BJ23,BJ24,BJ26,BJ27,BJ29,BJ30,BK20,BK21,BK23,BK24,BK26,BK27,BK29,BK30,BL20,BL21,BL23,BL24,BL26,BL27,BL29,BL30,BM20,BM21,BM26,BM27,BM29,BM30),  " &
	"VCACHESENSE          :   BK18,  " &
	"VCC33                :   (BE10,BE11,BE12),  " &
	"VCCCORE              :   (K38,K37,K35,K34,K32,K31,K29,K28,K26,K25,K22,K21,K19,K18,K16,K15,K13,K12,J38,J37,J35,J34,J32,J31,J29,J28,J26,J25,J22,J21,J19,J18,J16,J15,J13,J12,J10,H38,H37,H35,H34,H32,H31,H29,H28,H26,H25,H22,H21,H19,H18,H16,H15,H13,H12,H10,G38,G37,G35,G34,G32,G31,G29,G28,G19,G18,G16,G15,G13,G12,G10,G9,F38,F37,F35,F34,F32,F31,F29,F28,F19,F18,F16,F15,F13,F12,F10,F9,E38,E37,E35,E34,E32,E31,E29,E28,E19,E18,E16,E15,E13,E12,E10,E9,D38,D37,D35,D34,D32,D31,D29,D28,D26,D25,D22,D21,D19,D18,D16,D15,D13,D12,D10,D9,C38,C37,C35,C34,C32,C31,C29,C28,C26,C25,C22,C21,C19,C18,C16,C15,C13,C12,C10,C9,B38,B37,B35,B34,B32,B31,B29,B28,B26,B25,B22,B21,B19,B18,B16,B15,B13,B12,B10,B9,A38,A37,A35,A34,A32,A31,A29,A28,A26,A21,A19,A18,A16,A15,A13,A12,A10,A9),  " &
	"VCORESENSE           :   F7,  " &
	"VID                  :   (A6,B7,C6,C7,D6,D7,E6,E7), " & -- VID(7:0)
	"VIOC                 :   (AA42,AC36,AC42,AD42,AF36,AF42,AG42,AJ36,AJ42,AK42,AM36,AM42,AN42,AR36,AR42,AT42,AV36,AV42,AW42,BA36,BA42,BB37,BB42,BD42,BE42,BF41,BG36,BG37,BG38,BG39,BG41,BH34,BH35,BH41,BK34,BL34,M36,P36,U36,V42,V43,V44,V45,Y36,Y42),  " &
	"VIOF                 :   (AB9,AC10,AC11,AE9,AF11,AJ10,AJ11,AL10,AM11,AN10,AN8,AP9,AR10,AR11,AT9,AU9,AV10,AV11,BA1,BA10,BA11,BA2,BA3,BA7,BA8,BB10,BB11,BB2,BB4,BB5,BB6,BB8,P10,P11,R10,R11,T1,T2,T4,T6,T7,T8,U1,U10,U11,U5,U8,U9,Y11),  " &
	"VIOPWRGOOD           :   H41,  " &
	"VIO_VID              :   (BM39,BM38,BK38,BH38), " & -- VIO_VID(4:1)
	"VREG                 :   (AJ2,AK1,AK2,AK3,AK4,AL1,AL2,AL3,AL4,AL5),  " &
	"VSS                  :   (A11,A14,A17,A2,A20,A27,A3,A30,A33,A36,A39,A4,A40,A42,A43,A44,A45,A7,A8,AA11,AA3,AA36,AA41,AA46,AA5,AA9,AB10,AB11,AB36,AB38,AB42,AB44,AB7,AC1,AC39,AC4,AC9,AD10,AD11,AD36,AD41,AD45,AD5,AD7,AE10,AE11,AE3,AE36,AE37,AE42,AE7,AF39,AF44,AF9,AG11,AG36,AG4,AG41,AG8,AH11,AH2,AH36,AH37,AH42,AH6,AJ1,AJ3,AJ39,AJ44,AK10,AK11,AK36,AK41,AK46,AK5,AK7,AL11,AL36,AL37,AL42,AL44,AL7,AL9,AM2,AM3,AM39,AM5,AN11,AN3,AN36,AN41,AN45,AN7,AN9,AP1,AP11,AP36,AP37,AP4,AP42,AP44,AP5,AR39,AR5,AR7,AR9,AT1,AT10,AT11,AT3,AT36,AT41,AT45,AU1,AU10,AU11,AU36,AU37,AU42,AU44,AU6,AU8,AV39,AV5,AV9,AW10,AW11,AW3,AW36,AW41,AW45,AW7,AY1,AY10,AY11,AY36,AY37,AY42,AY44,AY6,B1,B11,B14,B17,B2,B20,B23,B24,B27,B3,B30,B33,B36,B39,B40,B6,B8,BA39,BA4,BA9,BB3,BB36,BB41,BB45,BB7,BB9,BC11,BC12,BC13,BC14,BC16,BC19,BC22,BC25,BC28,BC31,BC34,BC37,BC42,BC5,BD11,BD14,BD16,BD19,BD22,BD25,BD28,BD3,BD31,BD39,BD44,BD7,BE1,BE13,BE14,BE16,BE19,BE22,BE25,BE28,BE31,BE36,BE41,BE46,BE9,BF11,BF13,BF16,BF19,BF28,BF31,BF34,BF38,BF42,BF5,BF7,BG12,BG14,BG16,BG19,BG28,BG3,BG31,BG40,BG44,BG7,BH13,BH19,BH28,BH31,BH36,BH46,BH9,BJ1,BJ11,BJ17,BJ19,BJ22,BJ25,BJ28,BJ3,BJ31,BJ32,BJ34,BJ38,BJ42,BJ44,BJ46,BJ5,BJ7,BK1,BK15,BK19,BK22,BK25,BK28,BK31,BK40,BK46,BK7,BL1,BL13,BL19,BL2,BL22,BL25,BL28,BL3,BL31,BL33,BL36,BL38,BL4,BL44,BL45,BL46,BL9,BM11,BM16,BM19,BM2,BM28,BM3,BM31,BM34,BM4,BM40,BM42,BM43,BM44,BM45,BM7,C1,C11,C14,C17,C2,C20,C23,C24,C27,C30,C33,C36,C41,C43,C46,C5,C8,D1,D11,D14,D17,D20,D23,D24,D27,D30,D33,D36,D39,D45,D46,D8,E11,E14,E17,E20,E27,E30,E33,E36,E41,E43,E5,E8,F11,F14,F17,F20,F27,F3,F30,F33,F36,F45,F8,G1,G11,G14,G17,G20,G27,G30,G33,G36,G39,G40,G42,G5,G8,H11,H14,H17,H20,H23,H24,H27,H30,H33,H36,H39,H4,H40,H44,H46,H8,J11,J14,J17,J2,J20,J23,J24,J27,J30,J33,J36,J39,J7,K11,K14,K17,K20,K23,K24,K27,K30,K33,K36,K39,K40,K41,K42,K43,K44,K45,K5,K7,K9,L11,L3,L36,L37,L4,L45,L46,L6,M1,M11,M2,M37,M42,M46,M8,N10,N11,N36,N39,N44,N5,N9,P3,P42,P43,P7,R1,R36,R37,R40,R46,T10,T11,T3,T36,T37,T44,T5,T9,U2,U39,U42,U7,V10,V11,V36,V41,V46,V5,V9,W10,W11,W3,W36,W37,W42,W6,W7,Y1,Y39,Y44),  " &
	"VSSCACHESENSE        :   BK17,  " &
	"VSSCORESENSE         :   F6  "
;

--
-- List cases where a single boundary scan register drives a differential pair.
--

  attribute PORT_GROUPING of XeonE7_chipset : entity is
   "Differential_Voltage (( FBD1SBOCP(10) , FBD1SBOCN(10) )," & -- Intel SMI channels
                         "( FBD1SBOCP(9)  , FBD1SBOCN(9)  )," &
                         "( FBD1SBOCP(8)  , FBD1SBOCN(8)  )," &
                         "( FBD1SBOCP(7)  , FBD1SBOCN(7)  )," &
                         "( FBD1SBOCP(6)  , FBD1SBOCN(6)  )," &
                         "( FBD1SBOCP(5)  , FBD1SBOCN(5)  )," &
                         "( FBD1SBOCP(4)  , FBD1SBOCN(4)  )," &
                         "( FBD1SBOCP(3)  , FBD1SBOCN(3)  )," &
                         "( FBD1SBOCP(2)  , FBD1SBOCN(2)  )," &
                         "( FBD1SBOCP(1)  , FBD1SBOCN(1)  )," &
                         "( FBD1SBOCP(0)  , FBD1SBOCN(0)  )," &
                         "( FBD1SBOCLKCP0 , FBD1SBOCLKCN0 )," &
                         "( FBD1SBODP(10) , FBD1SBODN(10) )," &
                         "( FBD1SBODP(9)  , FBD1SBODN(9)  )," &
                         "( FBD1SBODP(8)  , FBD1SBODN(8)  )," &
                         "( FBD1SBODP(7)  , FBD1SBODN(7)  )," &
                         "( FBD1SBODP(6)  , FBD1SBODN(6)  )," &
                         "( FBD1SBODP(5)  , FBD1SBODN(5)  )," &
                         "( FBD1SBODP(4)  , FBD1SBODN(4)  )," &
                         "( FBD1SBODP(3)  , FBD1SBODN(3)  )," &
                         "( FBD1SBODP(2)  , FBD1SBODN(2)  )," &
                         "( FBD1SBODP(1)  , FBD1SBODN(1)  )," &
                         "( FBD1SBODP(0)  , FBD1SBODN(0)  )," &
                         "( FBD1SBOCLKDP0 , FBD1SBOCLKDN0 )," &
                         "( FBD0SBOBP(10) , FBD0SBOBN(10) )," &
                         "( FBD0SBOBP(9)  , FBD0SBOBN(9)  )," &
                         "( FBD0SBOBP(8)  , FBD0SBOBN(8)  )," &
                         "( FBD0SBOBP(7)  , FBD0SBOBN(7)  )," &
                         "( FBD0SBOBP(6)  , FBD0SBOBN(6)  )," &
                         "( FBD0SBOBP(5)  , FBD0SBOBN(5)  )," &
                         "( FBD0SBOBP(4)  , FBD0SBOBN(4)  )," &
                         "( FBD0SBOBP(3)  , FBD0SBOBN(3)  )," &
                         "( FBD0SBOBP(2)  , FBD0SBOBN(2)  )," &
                         "( FBD0SBOBP(1)  , FBD0SBOBN(1)  )," &
                         "( FBD0SBOBP(0)  , FBD0SBOBN(0)  )," &
                         "( FBD0SBOCLKBP0 , FBD0SBOCLKBN0 )," &
                         "( FBD0SBOAP(10) , FBD0SBOAN(10) )," &
                         "( FBD0SBOAP(9)  , FBD0SBOAN(9)  )," &
                         "( FBD0SBOAP(8)  , FBD0SBOAN(8)  )," &
                         "( FBD0SBOAP(7)  , FBD0SBOAN(7)  )," &
                         "( FBD0SBOAP(6)  , FBD0SBOAN(6)  )," &
                         "( FBD0SBOAP(5)  , FBD0SBOAN(5)  )," &
                         "( FBD0SBOAP(4)  , FBD0SBOAN(4)  )," &
                         "( FBD0SBOAP(3)  , FBD0SBOAN(3)  )," &
                         "( FBD0SBOAP(2)  , FBD0SBOAN(2)  )," &
                         "( FBD0SBOAP(1)  , FBD0SBOAN(1)  )," &
                         "( FBD0SBOAP(0)  , FBD0SBOAN(0)  )," &
                         "( FBD0SBOCLKAP0 , FBD0SBOCLKAN0 )," &
                         "( QPI0_DTX_DP(19) , QPI0_DTX_DN(19) )," & -- Intel QPI ports
                         "( QPI0_DTX_DP(18) , QPI0_DTX_DN(18) )," &
                         "( QPI0_DTX_DP(17) , QPI0_DTX_DN(17) )," &
                         "( QPI0_DTX_DP(16) , QPI0_DTX_DN(16) )," &
                         "( QPI0_DTX_DP(15) , QPI0_DTX_DN(15) )," &
                         "( QPI0_DTX_DP(14) , QPI0_DTX_DN(14) )," &
                         "( QPI0_DTX_DP(13) , QPI0_DTX_DN(13) )," &
                         "( QPI0_DTX_DP(12) , QPI0_DTX_DN(12) )," &
                         "( QPI0_DTX_DP(11) , QPI0_DTX_DN(11) )," &
                         "( QPI0_DTX_DP(10) , QPI0_DTX_DN(10) )," &
                         "( QPI0_DTX_DP(9)  , QPI0_DTX_DN(9)  )," &
                         "( QPI0_DTX_DP(8)  , QPI0_DTX_DN(8)  )," &
                         "( QPI0_DTX_DP(7)  , QPI0_DTX_DN(7)  )," &
                         "( QPI0_DTX_DP(6)  , QPI0_DTX_DN(6)  )," &
                         "( QPI0_DTX_DP(5)  , QPI0_DTX_DN(5)  )," &
                         "( QPI0_DTX_DP(4)  , QPI0_DTX_DN(4)  )," &
                         "( QPI0_DTX_DP(3)  , QPI0_DTX_DN(3)  )," &
                         "( QPI0_DTX_DP(2)  , QPI0_DTX_DN(2)  )," &
                         "( QPI0_DTX_DP(1)  , QPI0_DTX_DN(1)  )," &
                         "( QPI0_DTX_DP(0)  , QPI0_DTX_DN(0)  )," &
                         "( QPI0_CLKTX_DP   , QPI0_CLKTX_DN   )," &
                         "( QPI1_DTX_DP(19) , QPI1_DTX_DN(19) )," &
                         "( QPI1_DTX_DP(18) , QPI1_DTX_DN(18) )," &
                         "( QPI1_DTX_DP(17) , QPI1_DTX_DN(17) )," &
                         "( QPI1_DTX_DP(16) , QPI1_DTX_DN(16) )," &
                         "( QPI1_DTX_DP(15) , QPI1_DTX_DN(15) )," &
                         "( QPI1_DTX_DP(14) , QPI1_DTX_DN(14) )," &
                         "( QPI1_DTX_DP(13) , QPI1_DTX_DN(13) )," &
                         "( QPI1_DTX_DP(12) , QPI1_DTX_DN(12) )," &
                         "( QPI1_DTX_DP(11) , QPI1_DTX_DN(11) )," &
                         "( QPI1_DTX_DP(10) , QPI1_DTX_DN(10) )," &
                         "( QPI1_DTX_DP(9)  , QPI1_DTX_DN(9)  )," &
                         "( QPI1_DTX_DP(8)  , QPI1_DTX_DN(8)  )," &
                         "( QPI1_DTX_DP(7)  , QPI1_DTX_DN(7)  )," &
                         "( QPI1_DTX_DP(6)  , QPI1_DTX_DN(6)  )," &
                         "( QPI1_DTX_DP(5)  , QPI1_DTX_DN(5)  )," &
                         "( QPI1_DTX_DP(4)  , QPI1_DTX_DN(4)  )," &
                         "( QPI1_DTX_DP(3)  , QPI1_DTX_DN(3)  )," &
                         "( QPI1_DTX_DP(2)  , QPI1_DTX_DN(2)  )," &
                         "( QPI1_DTX_DP(1)  , QPI1_DTX_DN(1)  )," &
                         "( QPI1_DTX_DP(0)  , QPI1_DTX_DN(0)  )," &
                         "( QPI1_CLKTX_DP   , QPI1_CLKTX_DN   )," &
                         "( QPI2_DTX_DP(19) , QPI2_DTX_DN(19) )," &
                         "( QPI2_DTX_DP(18) , QPI2_DTX_DN(18) )," &
                         "( QPI2_DTX_DP(17) , QPI2_DTX_DN(17) )," &
                         "( QPI2_DTX_DP(16) , QPI2_DTX_DN(16) )," &
                         "( QPI2_DTX_DP(15) , QPI2_DTX_DN(15) )," &
                         "( QPI2_DTX_DP(14) , QPI2_DTX_DN(14) )," &
                         "( QPI2_DTX_DP(13) , QPI2_DTX_DN(13) )," &
                         "( QPI2_DTX_DP(12) , QPI2_DTX_DN(12) )," &
                         "( QPI2_DTX_DP(11) , QPI2_DTX_DN(11) )," &
                         "( QPI2_DTX_DP(10) , QPI2_DTX_DN(10) )," &
                         "( QPI2_DTX_DP(9)  , QPI2_DTX_DN(9)  )," &
                         "( QPI2_DTX_DP(8)  , QPI2_DTX_DN(8)  )," &
                         "( QPI2_DTX_DP(7)  , QPI2_DTX_DN(7)  )," &
                         "( QPI2_DTX_DP(6)  , QPI2_DTX_DN(6)  )," &
                         "( QPI2_DTX_DP(5)  , QPI2_DTX_DN(5)  )," &
                         "( QPI2_DTX_DP(4)  , QPI2_DTX_DN(4)  )," &
                         "( QPI2_DTX_DP(3)  , QPI2_DTX_DN(3)  )," &
                         "( QPI2_DTX_DP(2)  , QPI2_DTX_DN(2)  )," &
                         "( QPI2_DTX_DP(1)  , QPI2_DTX_DN(1)  )," &
                         "( QPI2_DTX_DP(0)  , QPI2_DTX_DN(0)  )," &
                         "( QPI2_CLKTX_DP   , QPI2_CLKTX_DN   )," &
                         "( QPI3_DTX_DP(19) , QPI3_DTX_DN(19) )," &
                         "( QPI3_DTX_DP(18) , QPI3_DTX_DN(18) )," &
                         "( QPI3_DTX_DP(17) , QPI3_DTX_DN(17) )," &
                         "( QPI3_DTX_DP(16) , QPI3_DTX_DN(16) )," &
                         "( QPI3_DTX_DP(15) , QPI3_DTX_DN(15) )," &
                         "( QPI3_DTX_DP(14) , QPI3_DTX_DN(14) )," &
                         "( QPI3_DTX_DP(13) , QPI3_DTX_DN(13) )," &
                         "( QPI3_DTX_DP(12) , QPI3_DTX_DN(12) )," &
                         "( QPI3_DTX_DP(11) , QPI3_DTX_DN(11) )," &
                         "( QPI3_DTX_DP(10) , QPI3_DTX_DN(10) )," &
                         "( QPI3_DTX_DP(9)  , QPI3_DTX_DN(9)  )," &
                         "( QPI3_DTX_DP(8)  , QPI3_DTX_DN(8)  )," &
                         "( QPI3_DTX_DP(7)  , QPI3_DTX_DN(7)  )," &
                         "( QPI3_DTX_DP(6)  , QPI3_DTX_DN(6)  )," &
                         "( QPI3_DTX_DP(5)  , QPI3_DTX_DN(5)  )," &
                         "( QPI3_DTX_DP(4)  , QPI3_DTX_DN(4)  )," &
                         "( QPI3_DTX_DP(3)  , QPI3_DTX_DN(3)  )," &
                         "( QPI3_DTX_DP(2)  , QPI3_DTX_DN(2)  )," &
                         "( QPI3_DTX_DP(1)  , QPI3_DTX_DN(1)  )," &
                         "( QPI3_DTX_DP(0)  , QPI3_DTX_DN(0)  )," &
                         "( QPI3_CLKTX_DP   , QPI3_CLKTX_DN   ))";

--
-- Scan Port Identification
--

  attribute TAP_SCAN_IN    of TDI    : signal is true;
  attribute TAP_SCAN_MODE  of TMS    : signal is true;
  attribute TAP_SCAN_OUT   of TDO    : signal is true;
  attribute TAP_SCAN_RESET of TRST_N : signal is true;
  attribute TAP_SCAN_CLOCK of TCLK   : signal is (66.0e6, both);

  attribute Instruction_Length of XeonE7_chipset : entity is 8;

  attribute Instruction_Opcode of XeonE7_chipset : entity is

      " EXTEST   ( 00000000 ),                                       " &
      " SAMPLE   ( 00000001 ),                                       " &
      " PRELOAD  ( 00000001 ),                                       " &
      " IDCODE   ( 00000010 ),                                       " &
      " CLAMP    ( 00000100 ),                                       " &
      " HIGHZ    ( 00001000 ),                                       " &
      " BYPASS   ( 11111111 ),                                       " &
      " Reserved ( 00000011, 00000101, 00000110, 00001001, 00001010, " & 
      "            00001011, 00001100, 00001101, 00001110, 00001111, " & 
      "            00010000, 00010001, 00010010, 00010011, 00010100, " & 
      "            00010101, 00010110, 00010111, 00011000, 00011001, " & 
      "            00011010, 00011011, 00011100, 00011101, 00011110, " & 
      "            00011111, 00100000, 00100001, 00100010, 00100011, " & 
      "            00100100, 00100101, 00100110, 00100111, 00101000, " & 
      "            00101001, 00101010, 00101011, 00101100, 00101101, " & 
      "            00101110, 00101111, 00110000, 00110001, 00110010, " & 
      "            00110011, 00110100, 00110101, 00110110, 00110111, " & 
      "            00111000, 00111001, 00111010, 00111011, 00111100, " & 
      "            00111101, 00111110, 00111111, 01000000, 01000001, " & 
      "            01000010, 01000011, 01000100, 01000101, 01000110, " & 
      "            01000111, 01001000, 01001001, 01001010, 01001011, " & 
      "            01001100, 01001101, 01001110, 01001111, 01010000, " & 
      "            01010001, 01010010, 01010011, 01010100, 01010101, " & 
      "            01010110, 01010111, 01011000, 01011001, 01011010, " & 
      "            01011011, 01011100, 01011101, 01011110, 01011111, " & 
      "            01100000, 01100001, 01100010, 01100011, 01100100, " & 
      "            01100101, 01100110, 01100111, 01101000, 01101001, " & 
      "            01101010, 01101011, 01101100, 01101101, 01101110, " & 
      "            01101111, 01110000, 01110001, 01110010, 01110011, " & 
      "            01110100, 01110101, 01110110, 01110111, 01111000, " & 
      "            01111001, 01111010, 01111011, 01111100, 01111101, " & 
      "            01111110, 01111111, 10000000, 10000001, 10000010, " & 
      "            10000011, 10000100, 10000101, 10000110, 10000111, " & 
      "            10001000, 10001001, 10001010, 10001011, 10001100, " & 
      "            10001101, 10001110, 10001111, 10010000, 10010001, " & 
      "            10010010, 10010011, 10010100, 10010101, 10010110, " & 
      "            10010111, 10011000, 10011001, 10011010, 10011011, " & 
      "            10011100, 10011101, 10011110, 10011111, 10100000, " & 
      "            10100001, 10100010, 10100011, 10100100, 10100101, " & 
      "            10100110, 10100111, 10101000, 10101001, 10101010, " & 
      "            10101011, 10101100, 10101101, 10101110, 10101111, " & 
      "            10110000, 10110001, 10110010, 10110011, 10110100, " & 
      "            10110101, 10110110, 10110111, 10111000, 10111001, " & 
      "            10111010, 10111011, 10111100, 10111101, 10111110, " & 
      "            10111111, 11000000, 11000001, 11000010, 11000011, " & 
      "            11000100, 11000101, 11000110, 11000111, 11001000, " & 
      "            11001001, 11001010, 11001011, 11001100, 11001101, " & 
      "            11001110, 11001111, 11010000, 11010001, 11010010, " & 
      "            11010011, 11010100, 11010101, 11010110, 11010111, " & 
      "            11011000, 11011001, 11011010, 11011011, 11011100, " & 
      "            11011101, 11011110, 11011111, 11100000, 11100001, " & 
      "            11100010, 11100011, 11100100, 11100101, 11100110, " & 
      "            11100111, 11101000, 11101001, 11101010, 11101011, " & 
      "            11101100, 11101101, 11101110, 11101111, 11110000, " & 
      "            11110001, 11110010, 11110011, 11110100, 11110101, " & 
      "            11110110, 11110111, 11111000, 11111001, 11111010, " & 
      "            11111011, 11111100, 11111101, 11111110            )" ;
     
  attribute Instruction_Capture of XeonE7_chipset : entity is "00000001";
  attribute Instruction_Private of XeonE7_chipset : entity is "Reserved";

--
-- XeonE7_chipset A-2 IDCODE Register
--   Hex value:  0x2A243013


  attribute Idcode_Register of XeonE7_chipset : entity is
          "0010"                  &  -- XeonE7 uncore stepping ID
          "1010001001000011"      &  -- Part number
          "00000001001"           &  -- Manufacturer's identity
          "1";                       -- Required by the standard

--
-- XeonE7_chipset Data Register Access
--

  attribute Register_Access of XeonE7_chipset : entity is

            "BOUNDARY   (EXTEST, SAMPLE, PRELOAD),       " &
            "DEVICE_ID  (IDCODE),                        " &
            "BYPASS     (CLAMP, HIGHZ, BYPASS)           ";

--
--  XeonE7_chipset Boundary Scan cells
--  Cell 0 is closest to TDO
--

  attribute BOUNDARY_LENGTH of XeonE7_chipset : entity is 520;
  attribute BOUNDARY_REGISTER of XeonE7_chipset : entity is

-- <num> <cell> <port>                       <function> <safe>  <ccell>  <disval>          <rslt>
   "   0 (BC_4,  SYSCLK_DN              , observe_only , 1                                    ), " &
   "   1 (BC_4,  SYSCLK_DP              , observe_only , 1                                    ), " &
   "   2 (BC_4,  QPI3_DRX_DN(19)        , input        , X                                    ), " &
   "   3 (BC_4,  QPI3_DRX_DP(19)        , input        , X                                    ), " &
   "   4 (BC_4,  QPI3_DRX_DN(18)        , input        , X                                    ), " &
   "   5 (BC_4,  QPI3_DRX_DP(18)        , input        , X                                    ), " &
   "   6 (BC_4,  QPI3_DRX_DN(17)        , input        , X                                    ), " &
   "   7 (BC_4,  QPI3_DRX_DP(17)        , input        , X                                    ), " &
   "   8 (BC_4,  QPI3_DRX_DN(16)        , input        , X                                    ), " &
   "   9 (BC_4,  QPI3_DRX_DP(16)        , input        , X                                    ), " &
   "  10 (BC_4,  QPI3_DRX_DN(15)        , input        , X                                    ), " &
   "  11 (BC_4,  QPI3_DRX_DP(15)        , input        , X                                    ), " &
   "  12 (BC_4,  QPI3_DRX_DN(14)        , input        , X                                    ), " &
   "  13 (BC_4,  QPI3_DRX_DP(14)        , input        , X                                    ), " &
   "  14 (BC_4,  QPI3_DRX_DN(13)        , input        , X                                    ), " &
   "  15 (BC_4,  QPI3_DRX_DP(13)        , input        , X                                    ), " &
   "  16 (BC_4,  QPI3_DRX_DN(12)        , input        , X                                    ), " &
   "  17 (BC_4,  QPI3_DRX_DP(12)        , input        , X                                    ), " &
   "  18 (BC_4,  QPI3_DRX_DN(11)        , input        , X                                    ), " &
   "  19 (BC_4,  QPI3_DRX_DP(11)        , input        , X                                    ), " &
   "  20 (BC_4,  QPI3_DRX_DN(8)         , input        , X                                    ), " &
   "  21 (BC_4,  QPI3_DRX_DP(8)         , input        , X                                    ), " &
   "  22 (BC_4,  QPI3_CLKRX_DN          , input        , X                                    ), " &
   "  23 (BC_4,  QPI3_CLKRX_DP          , input        , X                                    ), " &
   "  24 (BC_4,  QPI3_DRX_DN(9)         , input        , X                                    ), " &
   "  25 (BC_4,  QPI3_DRX_DP(9)         , input        , X                                    ), " &
   "  26 (BC_4,  QPI3_DRX_DN(10)        , input        , X                                    ), " &
   "  27 (BC_4,  QPI3_DRX_DP(10)        , input        , X                                    ), " &
   "  28 (BC_4,  QPI3_DRX_DN(7)         , input        , X                                    ), " &
   "  29 (BC_4,  QPI3_DRX_DP(7)         , input        , X                                    ), " &
   "  30 (BC_4,  QPI3_DRX_DN(6)         , input        , X                                    ), " &
   "  31 (BC_4,  QPI3_DRX_DP(6)         , input        , X                                    ), " &
   "  32 (BC_4,  QPI3_DRX_DN(5)         , input        , X                                    ), " &
   "  33 (BC_4,  QPI3_DRX_DP(5)         , input        , X                                    ), " &
   "  34 (BC_4,  QPI3_DRX_DN(4)         , input        , X                                    ), " &
   "  35 (BC_4,  QPI3_DRX_DP(4)         , input        , X                                    ), " &
   "  36 (BC_4,  QPI3_DRX_DN(3)         , input        , X                                    ), " &
   "  37 (BC_4,  QPI3_DRX_DP(3)         , input        , X                                    ), " &
   "  38 (BC_4,  QPI3_DRX_DN(2)         , input        , X                                    ), " &
   "  39 (BC_4,  QPI3_DRX_DP(2)         , input        , X                                    ), " &
   "  40 (BC_4,  QPI3_DRX_DN(1)         , input        , X                                    ), " &
   "  41 (BC_4,  QPI3_DRX_DP(1)         , input        , X                                    ), " &
   "  42 (BC_4,  QPI3_DRX_DN(0)         , input        , X                                    ), " &
   "  43 (BC_4,  QPI3_DRX_DP(0)         , input        , X                                    ), " &
   "  44 (BC_1,  QPI3_DTX_DP(19)        , output2      , X                                    ), " &
   "  45 (BC_1,  QPI3_DTX_DP(18)        , output2      , X                                    ), " &
   "  46 (BC_1,  QPI3_DTX_DP(17)        , output2      , X                                    ), " &
   "  47 (BC_1,  QPI3_DTX_DP(16)        , output2      , X                                    ), " &
   "  48 (BC_1,  QPI3_DTX_DP(15)        , output2      , X                                    ), " &
   "  49 (BC_1,  QPI3_DTX_DP(14)        , output2      , X                                    ), " &
   "  50 (BC_1,  QPI3_DTX_DP(13)        , output2      , X                                    ), " &
   "  51 (BC_1,  QPI3_DTX_DP(12)        , output2      , X                                    ), " &
   "  52 (BC_1,  QPI3_DTX_DP(11)        , output2      , X                                    ), " &
   "  53 (BC_1,  QPI3_DTX_DP(8)         , output2      , X                                    ), " &
   "  54 (BC_1,  QPI3_CLKTX_DP          , output2      , X                                    ), " &
   "  55 (BC_1,  QPI3_DTX_DP(9)         , output2      , X                                    ), " &
   "  56 (BC_1,  QPI3_DTX_DP(10)        , output2      , X                                    ), " &
   "  57 (BC_1,  QPI3_DTX_DP(7)         , output2      , X                                    ), " &
   "  58 (BC_1,  QPI3_DTX_DP(6)         , output2      , X                                    ), " &
   "  59 (BC_1,  QPI3_DTX_DP(5)         , output2      , X                                    ), " &
   "  60 (BC_1,  QPI3_DTX_DP(4)         , output2      , X                                    ), " &
   "  61 (BC_1,  QPI3_DTX_DP(3)         , output2      , X                                    ), " &
   "  62 (BC_1,  QPI3_DTX_DP(2)         , output2      , X                                    ), " &
   "  63 (BC_1,  QPI3_DTX_DP(1)         , output2      , X                                    ), " &
   "  64 (BC_1,  QPI3_DTX_DP(0)         , output2      , X                                    ), " &
   "  65 (BC_4,  QPI2_DRX_DN(19)        , input        , X                                    ), " &
   "  66 (BC_4,  QPI2_DRX_DP(19)        , input        , X                                    ), " &
   "  67 (BC_4,  QPI2_DRX_DN(18)        , input        , X                                    ), " &
   "  68 (BC_4,  QPI2_DRX_DP(18)        , input        , X                                    ), " &
   "  69 (BC_4,  QPI2_DRX_DN(17)        , input        , X                                    ), " &
   "  70 (BC_4,  QPI2_DRX_DP(17)        , input        , X                                    ), " &
   "  71 (BC_4,  QPI2_DRX_DN(16)        , input        , X                                    ), " &
   "  72 (BC_4,  QPI2_DRX_DP(16)        , input        , X                                    ), " &
   "  73 (BC_4,  QPI2_DRX_DN(15)        , input        , X                                    ), " &
   "  74 (BC_4,  QPI2_DRX_DP(15)        , input        , X                                    ), " &
   "  75 (BC_4,  QPI2_DRX_DN(14)        , input        , X                                    ), " &
   "  76 (BC_4,  QPI2_DRX_DP(14)        , input        , X                                    ), " &
   "  77 (BC_4,  QPI2_DRX_DN(13)        , input        , X                                    ), " &
   "  78 (BC_4,  QPI2_DRX_DP(13)        , input        , X                                    ), " &
   "  79 (BC_4,  QPI2_DRX_DN(12)        , input        , X                                    ), " &
   "  80 (BC_4,  QPI2_DRX_DP(12)        , input        , X                                    ), " &
   "  81 (BC_4,  QPI2_DRX_DN(11)        , input        , X                                    ), " &
   "  82 (BC_4,  QPI2_DRX_DP(11)        , input        , X                                    ), " &
   "  83 (BC_4,  QPI2_DRX_DN(8)         , input        , X                                    ), " &
   "  84 (BC_4,  QPI2_DRX_DP(8)         , input        , X                                    ), " &
   "  85 (BC_4,  QPI2_CLKRX_DN          , input        , X                                    ), " &
   "  86 (BC_4,  QPI2_CLKRX_DP          , input        , X                                    ), " &
   "  87 (BC_4,  QPI2_DRX_DN(9)         , input        , X                                    ), " &
   "  88 (BC_4,  QPI2_DRX_DP(9)         , input        , X                                    ), " &
   "  89 (BC_4,  QPI2_DRX_DN(10)        , input        , X                                    ), " &
   "  90 (BC_4,  QPI2_DRX_DP(10)        , input        , X                                    ), " &
   "  91 (BC_4,  QPI2_DRX_DN(7)         , input        , X                                    ), " &
   "  92 (BC_4,  QPI2_DRX_DP(7)         , input        , X                                    ), " &
   "  93 (BC_4,  QPI2_DRX_DN(6)         , input        , X                                    ), " &
   "  94 (BC_4,  QPI2_DRX_DP(6)         , input        , X                                    ), " &
   "  95 (BC_4,  QPI2_DRX_DN(5)         , input        , X                                    ), " &
   "  96 (BC_4,  QPI2_DRX_DP(5)         , input        , X                                    ), " &
   "  97 (BC_4,  QPI2_DRX_DN(4)         , input        , X                                    ), " &
   "  98 (BC_4,  QPI2_DRX_DP(4)         , input        , X                                    ), " &
   "  99 (BC_4,  QPI2_DRX_DN(3)         , input        , X                                    ), " &
   " 100 (BC_4,  QPI2_DRX_DP(3)         , input        , X                                    ), " &
   " 101 (BC_4,  QPI2_DRX_DN(2)         , input        , X                                    ), " &
   " 102 (BC_4,  QPI2_DRX_DP(2)         , input        , X                                    ), " &
   " 103 (BC_4,  QPI2_DRX_DN(1)         , input        , X                                    ), " &
   " 104 (BC_4,  QPI2_DRX_DP(1)         , input        , X                                    ), " &
   " 105 (BC_4,  QPI2_DRX_DN(0)         , input        , X                                    ), " &
   " 106 (BC_4,  QPI2_DRX_DP(0)         , input        , X                                    ), " &
   " 107 (BC_1,  QPI2_DTX_DP(19)        , output2      , X                                    ), " &
   " 108 (BC_1,  QPI2_DTX_DP(18)        , output2      , X                                    ), " &
   " 109 (BC_1,  QPI2_DTX_DP(17)        , output2      , X                                    ), " &
   " 110 (BC_1,  QPI2_DTX_DP(16)        , output2      , X                                    ), " &
   " 111 (BC_1,  QPI2_DTX_DP(15)        , output2      , X                                    ), " &
   " 112 (BC_1,  QPI2_DTX_DP(14)        , output2      , X                                    ), " &
   " 113 (BC_1,  QPI2_DTX_DP(13)        , output2      , X                                    ), " &
   " 114 (BC_1,  QPI2_DTX_DP(12)        , output2      , X                                    ), " &
   " 115 (BC_1,  QPI2_DTX_DP(11)        , output2      , X                                    ), " &
   " 116 (BC_1,  QPI2_DTX_DP(8)         , output2      , X                                    ), " &
   " 117 (BC_1,  QPI2_CLKTX_DP          , output2      , X                                    ), " &
   " 118 (BC_1,  QPI2_DTX_DP(9)         , output2      , X                                    ), " &
   " 119 (BC_1,  QPI2_DTX_DP(10)        , output2      , X                                    ), " &
   " 120 (BC_1,  QPI2_DTX_DP(7)         , output2      , X                                    ), " &
   " 121 (BC_1,  QPI2_DTX_DP(6)         , output2      , X                                    ), " &
   " 122 (BC_1,  QPI2_DTX_DP(5)         , output2      , X                                    ), " &
   " 123 (BC_1,  QPI2_DTX_DP(4)         , output2      , X                                    ), " &
   " 124 (BC_1,  QPI2_DTX_DP(3)         , output2      , X                                    ), " &
   " 125 (BC_1,  QPI2_DTX_DP(2)         , output2      , X                                    ), " &
   " 126 (BC_1,  QPI2_DTX_DP(1)         , output2      , X                                    ), " &
   " 127 (BC_1,  QPI2_DTX_DP(0)         , output2      , X                                    ), " &
   " 128 (BC_1,  QPI1_DTX_DP(0)         , output2      , X                                    ), " &
   " 129 (BC_1,  QPI1_DTX_DP(1)         , output2      , X                                    ), " &
   " 130 (BC_1,  QPI1_DTX_DP(2)         , output2      , X                                    ), " &
   " 131 (BC_1,  QPI1_DTX_DP(3)         , output2      , X                                    ), " &
   " 132 (BC_1,  QPI1_DTX_DP(4)         , output2      , X                                    ), " &
   " 133 (BC_1,  QPI1_DTX_DP(5)         , output2      , X                                    ), " &
   " 134 (BC_1,  QPI1_DTX_DP(6)         , output2      , X                                    ), " &
   " 135 (BC_1,  QPI1_DTX_DP(7)         , output2      , X                                    ), " &
   " 136 (BC_1,  QPI1_DTX_DP(10)        , output2      , X                                    ), " &
   " 137 (BC_1,  QPI1_DTX_DP(9)         , output2      , X                                    ), " &
   " 138 (BC_1,  QPI1_CLKTX_DP          , output2      , X                                    ), " &
   " 139 (BC_1,  QPI1_DTX_DP(8)         , output2      , X                                    ), " &
   " 140 (BC_1,  QPI1_DTX_DP(11)        , output2      , X                                    ), " &
   " 141 (BC_1,  QPI1_DTX_DP(12)        , output2      , X                                    ), " &
   " 142 (BC_1,  QPI1_DTX_DP(13)        , output2      , X                                    ), " &
   " 143 (BC_1,  QPI1_DTX_DP(14)        , output2      , X                                    ), " &
   " 144 (BC_1,  QPI1_DTX_DP(15)        , output2      , X                                    ), " &
   " 145 (BC_1,  QPI1_DTX_DP(16)        , output2      , X                                    ), " &
   " 146 (BC_1,  QPI1_DTX_DP(17)        , output2      , X                                    ), " &
   " 147 (BC_1,  QPI1_DTX_DP(18)        , output2      , X                                    ), " &
   " 148 (BC_1,  QPI1_DTX_DP(19)        , output2      , X                                    ), " &
   " 149 (BC_4,  QPI1_DRX_DN(0)         , input        , X                                    ), " &
   " 150 (BC_4,  QPI1_DRX_DP(0)         , input        , X                                    ), " &
   " 151 (BC_4,  QPI1_DRX_DN(1)         , input        , X                                    ), " &
   " 152 (BC_4,  QPI1_DRX_DP(1)         , input        , X                                    ), " &
   " 153 (BC_4,  QPI1_DRX_DN(2)         , input        , X                                    ), " &
   " 154 (BC_4,  QPI1_DRX_DP(2)         , input        , X                                    ), " &
   " 155 (BC_4,  QPI1_DRX_DN(3)         , input        , X                                    ), " &
   " 156 (BC_4,  QPI1_DRX_DP(3)         , input        , X                                    ), " &
   " 157 (BC_4,  QPI1_DRX_DN(4)         , input        , X                                    ), " &
   " 158 (BC_4,  QPI1_DRX_DP(4)         , input        , X                                    ), " &
   " 159 (BC_4,  QPI1_DRX_DN(5)         , input        , X                                    ), " &
   " 160 (BC_4,  QPI1_DRX_DP(5)         , input        , X                                    ), " &
   " 161 (BC_4,  QPI1_DRX_DN(6)         , input        , X                                    ), " &
   " 162 (BC_4,  QPI1_DRX_DP(6)         , input        , X                                    ), " &
   " 163 (BC_4,  QPI1_DRX_DN(7)         , input        , X                                    ), " &
   " 164 (BC_4,  QPI1_DRX_DP(7)         , input        , X                                    ), " &
   " 165 (BC_4,  QPI1_DRX_DN(10)        , input        , X                                    ), " &
   " 166 (BC_4,  QPI1_DRX_DP(10)        , input        , X                                    ), " &
   " 167 (BC_4,  QPI1_DRX_DN(9)         , input        , X                                    ), " &
   " 168 (BC_4,  QPI1_DRX_DP(9)         , input        , X                                    ), " &
   " 169 (BC_4,  QPI1_CLKRX_DN          , input        , X                                    ), " &
   " 170 (BC_4,  QPI1_CLKRX_DP          , input        , X                                    ), " &
   " 171 (BC_4,  QPI1_DRX_DN(8)         , input        , X                                    ), " &
   " 172 (BC_4,  QPI1_DRX_DP(8)         , input        , X                                    ), " &
   " 173 (BC_4,  QPI1_DRX_DN(11)        , input        , X                                    ), " &
   " 174 (BC_4,  QPI1_DRX_DP(11)        , input        , X                                    ), " &
   " 175 (BC_4,  QPI1_DRX_DN(12)        , input        , X                                    ), " &
   " 176 (BC_4,  QPI1_DRX_DP(12)        , input        , X                                    ), " &
   " 177 (BC_4,  QPI1_DRX_DN(13)        , input        , X                                    ), " &
   " 178 (BC_4,  QPI1_DRX_DP(13)        , input        , X                                    ), " &
   " 179 (BC_4,  QPI1_DRX_DN(14)        , input        , X                                    ), " &
   " 180 (BC_4,  QPI1_DRX_DP(14)        , input        , X                                    ), " &
   " 181 (BC_4,  QPI1_DRX_DN(15)        , input        , X                                    ), " &
   " 182 (BC_4,  QPI1_DRX_DP(15)        , input        , X                                    ), " &
   " 183 (BC_4,  QPI1_DRX_DN(16)        , input        , X                                    ), " &
   " 184 (BC_4,  QPI1_DRX_DP(16)        , input        , X                                    ), " &
   " 185 (BC_4,  QPI1_DRX_DN(17)        , input        , X                                    ), " &
   " 186 (BC_4,  QPI1_DRX_DP(17)        , input        , X                                    ), " &
   " 187 (BC_4,  QPI1_DRX_DN(18)        , input        , X                                    ), " &
   " 188 (BC_4,  QPI1_DRX_DP(18)        , input        , X                                    ), " &
   " 189 (BC_4,  QPI1_DRX_DN(19)        , input        , X                                    ), " &
   " 190 (BC_4,  QPI1_DRX_DP(19)        , input        , X                                    ), " &
   " 191 (BC_1,  QPI0_DTX_DP(0)         , output2      , X                                    ), " &
   " 192 (BC_1,  QPI0_DTX_DP(1)         , output2      , X                                    ), " &
   " 193 (BC_1,  QPI0_DTX_DP(2)         , output2      , X                                    ), " &
   " 194 (BC_1,  QPI0_DTX_DP(3)         , output2      , X                                    ), " &
   " 195 (BC_1,  QPI0_DTX_DP(4)         , output2      , X                                    ), " &
   " 196 (BC_1,  QPI0_DTX_DP(5)         , output2      , X                                    ), " &
   " 197 (BC_1,  QPI0_DTX_DP(6)         , output2      , X                                    ), " &
   " 198 (BC_1,  QPI0_DTX_DP(7)         , output2      , X                                    ), " &
   " 199 (BC_1,  QPI0_DTX_DP(10)        , output2      , X                                    ), " &
   " 200 (BC_1,  QPI0_DTX_DP(9)         , output2      , X                                    ), " &
   " 201 (BC_1,  QPI0_CLKTX_DP          , output2      , X                                    ), " &
   " 202 (BC_1,  QPI0_DTX_DP(8)         , output2      , X                                    ), " &
   " 203 (BC_1,  QPI0_DTX_DP(11)        , output2      , X                                    ), " &
   " 204 (BC_1,  QPI0_DTX_DP(12)        , output2      , X                                    ), " &
   " 205 (BC_1,  QPI0_DTX_DP(13)        , output2      , X                                    ), " &
   " 206 (BC_1,  QPI0_DTX_DP(14)        , output2      , X                                    ), " &
   " 207 (BC_1,  QPI0_DTX_DP(15)        , output2      , X                                    ), " &
   " 208 (BC_1,  QPI0_DTX_DP(16)        , output2      , X                                    ), " &
   " 209 (BC_1,  QPI0_DTX_DP(17)        , output2      , X                                    ), " &
   " 210 (BC_1,  QPI0_DTX_DP(18)        , output2      , X                                    ), " &
   " 211 (BC_1,  QPI0_DTX_DP(19)        , output2      , X                                    ), " &
   " 212 (BC_4,  QPI0_DRX_DN(0)         , input        , X                                    ), " &
   " 213 (BC_4,  QPI0_DRX_DP(0)         , input        , X                                    ), " &
   " 214 (BC_4,  QPI0_DRX_DN(1)         , input        , X                                    ), " &
   " 215 (BC_4,  QPI0_DRX_DP(1)         , input        , X                                    ), " &
   " 216 (BC_4,  QPI0_DRX_DN(2)         , input        , X                                    ), " &
   " 217 (BC_4,  QPI0_DRX_DP(2)         , input        , X                                    ), " &
   " 218 (BC_4,  QPI0_DRX_DN(3)         , input        , X                                    ), " &
   " 219 (BC_4,  QPI0_DRX_DP(3)         , input        , X                                    ), " &
   " 220 (BC_4,  QPI0_DRX_DN(4)         , input        , X                                    ), " &
   " 221 (BC_4,  QPI0_DRX_DP(4)         , input        , X                                    ), " &
   " 222 (BC_4,  QPI0_DRX_DN(5)         , input        , X                                    ), " &
   " 223 (BC_4,  QPI0_DRX_DP(5)         , input        , X                                    ), " &
   " 224 (BC_4,  QPI0_DRX_DN(6)         , input        , X                                    ), " &
   " 225 (BC_4,  QPI0_DRX_DP(6)         , input        , X                                    ), " &
   " 226 (BC_4,  QPI0_DRX_DN(7)         , input        , X                                    ), " &
   " 227 (BC_4,  QPI0_DRX_DP(7)         , input        , X                                    ), " &
   " 228 (BC_4,  QPI0_DRX_DN(10)        , input        , X                                    ), " &
   " 229 (BC_4,  QPI0_DRX_DP(10)        , input        , X                                    ), " &
   " 230 (BC_4,  QPI0_DRX_DN(9)         , input        , X                                    ), " &
   " 231 (BC_4,  QPI0_DRX_DP(9)         , input        , X                                    ), " &
   " 232 (BC_4,  QPI0_CLKRX_DN          , input        , X                                    ), " &
   " 233 (BC_4,  QPI0_CLKRX_DP          , input        , X                                    ), " &
   " 234 (BC_4,  QPI0_DRX_DN(8)         , input        , X                                    ), " &
   " 235 (BC_4,  QPI0_DRX_DP(8)         , input        , X                                    ), " &
   " 236 (BC_4,  QPI0_DRX_DN(11)        , input        , X                                    ), " &
   " 237 (BC_4,  QPI0_DRX_DP(11)        , input        , X                                    ), " &
   " 238 (BC_4,  QPI0_DRX_DN(12)        , input        , X                                    ), " &
   " 239 (BC_4,  QPI0_DRX_DP(12)        , input        , X                                    ), " &
   " 240 (BC_4,  QPI0_DRX_DN(13)        , input        , X                                    ), " &
   " 241 (BC_4,  QPI0_DRX_DP(13)        , input        , X                                    ), " &
   " 242 (BC_4,  QPI0_DRX_DN(14)        , input        , X                                    ), " &
   " 243 (BC_4,  QPI0_DRX_DP(14)        , input        , X                                    ), " &
   " 244 (BC_4,  QPI0_DRX_DN(15)        , input        , X                                    ), " &
   " 245 (BC_4,  QPI0_DRX_DP(15)        , input        , X                                    ), " &
   " 246 (BC_4,  QPI0_DRX_DN(16)        , input        , X                                    ), " &
   " 247 (BC_4,  QPI0_DRX_DP(16)        , input        , X                                    ), " &
   " 248 (BC_4,  QPI0_DRX_DN(17)        , input        , X                                    ), " &
   " 249 (BC_4,  QPI0_DRX_DP(17)        , input        , X                                    ), " &
   " 250 (BC_4,  QPI0_DRX_DN(18)        , input        , X                                    ), " &
   " 251 (BC_4,  QPI0_DRX_DP(18)        , input        , X                                    ), " &
   " 252 (BC_4,  QPI0_DRX_DN(19)        , input        , X                                    ), " &
   " 253 (BC_4,  QPI0_DRX_DP(19)        , input        , X                                    ), " &
   " 254 (BC_1,  *                      , internal     , X                                    ), " &
   " 255 (BC_1,  *                      , internal     , X                                    ), " &
   " 256 (BC_4,  FLASHROM_CFG(0)        , input        , X                                    ), " &
   " 257 (BC_4,  FLASHROM_CFG(1)        , input        , X                                    ), " &
   " 258 (BC_4,  FLASHROM_CFG(2)        , input        , X                                    ), " &
   " 259 (BC_1,  FLASHROM_CLK           , output2      , 1,      259,          1,      WEAK1  ), " &
   " 260 (BC_1,  FLASHROM_CS_N(0)       , output2      , 1,      260,          1,      WEAK1  ), " &
   " 261 (BC_1,  FLASHROM_CS_N(1)       , output2      , 1,      261,          1,      WEAK1  ), " &
   " 262 (BC_1,  FLASHROM_CS_N(2)       , output2      , 1,      262,          1,      WEAK1  ), " &
   " 263 (BC_1,  FLASHROM_CS_N(3)       , output2      , 1,      263,          1,      WEAK1  ), " &
   " 264 (BC_4,  FLASHROM_DATI          , input        , X                                    ), " &
   " 265 (BC_1,  FLASHROM_DATO          , output2      , 1,      265,          1,      WEAK1  ), " &
   " 266 (BC_1,  FLASHROM_WP_N          , output2      , 1,      266,          1,      WEAK1  ), " &
   " 267 (BC_3,  MEM_THROTTLE1_N        , input        , X                                    ), " &
   " 268 (BC_3,  MEM_THROTTLE0_N        , input        , X                                    ), " &
   " 269 (BC_3,  SKTID(0)               , input        , X                                    ), " &
   " 270 (BC_3,  SKTID(1)               , input        , X                                    ), " &
   " 271 (BC_3,  SKTID(2)               , input        , X                                    ), " &
   " 272 (BC_7,  SPDDAT                 , bidir        , 1,      272,          1,      WEAK1  ), " &
   " 273 (BC_1,  SPDCLK                 , output2      , 1,      273,          1,      WEAK1  ), " &
   " 274 (BC_3,  BOOTMODE(0)            , input        , X                                    ), " &
   " 275 (BC_3,  BOOTMODE(1)            , input        , X                                    ), " &
   " 276 (BC_1,  *                      , internal     , X                                    ), " &
   " 277 (BC_1,  *                      , internal     , X                                    ), " &
   " 278 (BC_1,  *                      , internal     , X                                    ), " &
   " 279 (BC_1,  *                      , internal     , X                                    ), " &
   " 280 (BC_4,  SKTDIS_N               , input        , 1                                    ), " &
   " 281 (BC_3,  RNBIST                 , input        , X                                    ), " &
   " 282 (BC_3,  LTSX                   , input        , X                                    ), " &
   " 283 (BC_4,  FBD0NBIAN(7)           , input        , X                                    ), " &
   " 284 (BC_4,  FBD0NBIAP(7)           , input        , X                                    ), " &
   " 285 (BC_4,  FBD0NBIAN(6)           , input        , X                                    ), " &
   " 286 (BC_4,  FBD0NBIAP(6)           , input        , X                                    ), " &
   " 287 (BC_4,  FBD0NBIAN(0)           , input        , X                                    ), " &
   " 288 (BC_4,  FBD0NBIAP(0)           , input        , X                                    ), " &
   " 289 (BC_4,  FBD0NBIAN(9)           , input        , X                                    ), " &
   " 290 (BC_4,  FBD0NBIAP(9)           , input        , X                                    ), " &
   " 291 (BC_4,  FBD0NBIAN(11)          , input        , X                                    ), " &
   " 292 (BC_4,  FBD0NBIAP(11)          , input        , X                                    ), " &
   " 293 (BC_4,  FBD0NBIAN(8)           , input        , X                                    ), " &
   " 294 (BC_4,  FBD0NBIAP(8)           , input        , X                                    ), " &
   " 295 (BC_4,  FBD0NBIAN(13)          , input        , X                                    ), " &
   " 296 (BC_4,  FBD0NBIAP(13)          , input        , X                                    ), " &
   " 297 (BC_4,  FBD0NBIAN(10)          , input        , X                                    ), " &
   " 298 (BC_4,  FBD0NBIAP(10)          , input        , X                                    ), " &
   " 299 (BC_4,  FBD0NBICLKAN0          , input        , X                                    ), " &
   " 300 (BC_4,  FBD0NBICLKAP0          , input        , X                                    ), " &
   " 301 (BC_4,  FBD0NBIAN(5)           , input        , X                                    ), " &
   " 302 (BC_4,  FBD0NBIAP(5)           , input        , X                                    ), " &
   " 303 (BC_4,  FBD0NBIAN(12)          , input        , X                                    ), " &
   " 304 (BC_4,  FBD0NBIAP(12)          , input        , X                                    ), " &
   " 305 (BC_4,  FBD0NBIAN(4)           , input        , X                                    ), " &
   " 306 (BC_4,  FBD0NBIAP(4)           , input        , X                                    ), " &
   " 307 (BC_4,  FBD0NBIAN(3)           , input        , X                                    ), " &
   " 308 (BC_4,  FBD0NBIAP(3)           , input        , X                                    ), " &
   " 309 (BC_4,  FBD0NBIAN(2)           , input        , X                                    ), " &
   " 310 (BC_4,  FBD0NBIAP(2)           , input        , X                                    ), " &
   " 311 (BC_4,  FBD0NBIAN(1)           , input        , X                                    ), " &
   " 312 (BC_4,  FBD0NBIAP(1)           , input        , X                                    ), " &
   " 313 (BC_1,  FBD0SBOAP(0)           , output2      , X                                    ), " &
   " 314 (BC_1,  FBD0SBOAP(1)           , output2      , X                                    ), " &
   " 315 (BC_1,  FBD0SBOAP(2)           , output2      , X                                    ), " &
   " 316 (BC_1,  FBD0SBOAP(3)           , output2      , X                                    ), " &
   " 317 (BC_1,  FBD0SBOAP(10)          , output2      , X                                    ), " &
   " 318 (BC_1,  FBD0SBOAP(4)           , output2      , X                                    ), " &
   " 319 (BC_1,  FBD0SBOAP(5)           , output2      , X                                    ), " &
   " 320 (BC_1,  FBD0SBOAP(8)           , output2      , X                                    ), " &
   " 321 (BC_1,  FBD0SBOAP(6)           , output2      , X                                    ), " &
   " 322 (BC_1,  FBD0SBOAP(9)           , output2      , X                                    ), " &
   " 323 (BC_1,  FBD0SBOAP(7)           , output2      , X                                    ), " &
   " 324 (BC_1,  FBD0SBOCLKAP0          , output2      , X                                    ), " &
   " 325 (BC_1,  FBD0SBOBP(1)           , output2      , X                                    ), " &
   " 326 (BC_1,  FBD0SBOCLKBP0          , output2      , X                                    ), " &
   " 327 (BC_1,  FBD0SBOBP(0)           , output2      , X                                    ), " &
   " 328 (BC_1,  FBD0SBOBP(9)           , output2      , X                                    ), " &
   " 329 (BC_1,  FBD0SBOBP(10)          , output2      , X                                    ), " &
   " 330 (BC_1,  FBD0SBOBP(4)           , output2      , X                                    ), " &
   " 331 (BC_1,  FBD0SBOBP(2)           , output2      , X                                    ), " &
   " 332 (BC_1,  FBD0SBOBP(3)           , output2      , X                                    ), " &
   " 333 (BC_1,  FBD0SBOBP(8)           , output2      , X                                    ), " &
   " 334 (BC_1,  FBD0SBOBP(5)           , output2      , X                                    ), " &
   " 335 (BC_1,  FBD0SBOBP(6)           , output2      , X                                    ), " &
   " 336 (BC_1,  FBD0SBOBP(7)           , output2      , X                                    ), " &
   " 337 (BC_4,  FBD0NBIBN(1)           , input        , X                                    ), " &
   " 338 (BC_4,  FBD0NBIBP(1)           , input        , X                                    ), " &
   " 339 (BC_4,  FBD0NBIBN(2)           , input        , X                                    ), " &
   " 340 (BC_4,  FBD0NBIBP(2)           , input        , X                                    ), " &
   " 341 (BC_4,  FBD0NBIBN(3)           , input        , X                                    ), " &
   " 342 (BC_4,  FBD0NBIBP(3)           , input        , X                                    ), " &
   " 343 (BC_4,  FBD0NBIBN(4)           , input        , X                                    ), " &
   " 344 (BC_4,  FBD0NBIBP(4)           , input        , X                                    ), " &
   " 345 (BC_4,  FBD0NBIBN(12)          , input        , X                                    ), " &
   " 346 (BC_4,  FBD0NBIBP(12)          , input        , X                                    ), " &
   " 347 (BC_4,  FBD0NBIBN(5)           , input        , X                                    ), " &
   " 348 (BC_4,  FBD0NBIBP(5)           , input        , X                                    ), " &
   " 349 (BC_4,  FBD0NBICLKBN0          , input        , X                                    ), " &
   " 350 (BC_4,  FBD0NBICLKBP0          , input        , X                                    ), " &
   " 351 (BC_4,  FBD0NBIBN(10)          , input        , X                                    ), " &
   " 352 (BC_4,  FBD0NBIBP(10)          , input        , X                                    ), " &
   " 353 (BC_4,  FBD0NBIBN(13)          , input        , X                                    ), " &
   " 354 (BC_4,  FBD0NBIBP(13)          , input        , X                                    ), " &
   " 355 (BC_4,  FBD0NBIBN(8)           , input        , X                                    ), " &
   " 356 (BC_4,  FBD0NBIBP(8)           , input        , X                                    ), " &
   " 357 (BC_4,  FBD0NBIBN(11)          , input        , X                                    ), " &
   " 358 (BC_4,  FBD0NBIBP(11)          , input        , X                                    ), " &
   " 359 (BC_4,  FBD0NBIBN(9)           , input        , X                                    ), " &
   " 360 (BC_4,  FBD0NBIBP(9)           , input        , X                                    ), " &
   " 361 (BC_4,  FBD0NBIBN(0)           , input        , X                                    ), " &
   " 362 (BC_4,  FBD0NBIBP(0)           , input        , X                                    ), " &
   " 363 (BC_4,  FBD0NBIBN(6)           , input        , X                                    ), " &
   " 364 (BC_4,  FBD0NBIBP(6)           , input        , X                                    ), " &
   " 365 (BC_4,  FBD0NBIBN(7)           , input        , X                                    ), " &
   " 366 (BC_4,  FBD0NBIBP(7)           , input        , X                                    ), " &
   " 367 (BC_4,  FBD1NBIDN(7)           , input        , X                                    ), " &
   " 368 (BC_4,  FBD1NBIDP(7)           , input        , X                                    ), " &
   " 369 (BC_4,  FBD1NBIDN(6)           , input        , X                                    ), " &
   " 370 (BC_4,  FBD1NBIDP(6)           , input        , X                                    ), " &
   " 371 (BC_4,  FBD1NBIDN(0)           , input        , X                                    ), " &
   " 372 (BC_4,  FBD1NBIDP(0)           , input        , X                                    ), " &
   " 373 (BC_4,  FBD1NBIDN(9)           , input        , X                                    ), " &
   " 374 (BC_4,  FBD1NBIDP(9)           , input        , X                                    ), " &
   " 375 (BC_4,  FBD1NBIDN(11)          , input        , X                                    ), " &
   " 376 (BC_4,  FBD1NBIDP(11)          , input        , X                                    ), " &
   " 377 (BC_4,  FBD1NBIDN(8)           , input        , X                                    ), " &
   " 378 (BC_4,  FBD1NBIDP(8)           , input        , X                                    ), " &
   " 379 (BC_4,  FBD1NBIDN(13)          , input        , X                                    ), " &
   " 380 (BC_4,  FBD1NBIDP(13)          , input        , X                                    ), " &
   " 381 (BC_4,  FBD1NBIDN(10)          , input        , X                                    ), " &
   " 382 (BC_4,  FBD1NBIDP(10)          , input        , X                                    ), " &
   " 383 (BC_4,  FBD1NBICLKDN0          , input        , X                                    ), " &
   " 384 (BC_4,  FBD1NBICLKDP0          , input        , X                                    ), " &
   " 385 (BC_4,  FBD1NBIDN(5)           , input        , X                                    ), " &
   " 386 (BC_4,  FBD1NBIDP(5)           , input        , X                                    ), " &
   " 387 (BC_4,  FBD1NBIDN(12)          , input        , X                                    ), " &
   " 388 (BC_4,  FBD1NBIDP(12)          , input        , X                                    ), " &
   " 389 (BC_4,  FBD1NBIDN(4)           , input        , X                                    ), " &
   " 390 (BC_4,  FBD1NBIDP(4)           , input        , X                                    ), " &
   " 391 (BC_4,  FBD1NBIDN(3)           , input        , X                                    ), " &
   " 392 (BC_4,  FBD1NBIDP(3)           , input        , X                                    ), " &
   " 393 (BC_4,  FBD1NBIDN(2)           , input        , X                                    ), " &
   " 394 (BC_4,  FBD1NBIDP(2)           , input        , X                                    ), " &
   " 395 (BC_4,  FBD1NBIDN(1)           , input        , X                                    ), " &
   " 396 (BC_4,  FBD1NBIDP(1)           , input        , X                                    ), " &
   " 397 (BC_1,  FBD1SBODP(7)           , output2      , X                                    ), " &
   " 398 (BC_1,  FBD1SBODP(6)           , output2      , X                                    ), " &
   " 399 (BC_1,  FBD1SBODP(5)           , output2      , X                                    ), " &
   " 400 (BC_1,  FBD1SBODP(8)           , output2      , X                                    ), " &
   " 401 (BC_1,  FBD1SBODP(3)           , output2      , X                                    ), " &
   " 402 (BC_1,  FBD1SBODP(2)           , output2      , X                                    ), " &
   " 403 (BC_1,  FBD1SBODP(4)           , output2      , X                                    ), " &
   " 404 (BC_1,  FBD1SBODP(10)          , output2      , X                                    ), " &
   " 405 (BC_1,  FBD1SBODP(9)           , output2      , X                                    ), " &
   " 406 (BC_1,  FBD1SBODP(0)           , output2      , X                                    ), " &
   " 407 (BC_1,  FBD1SBOCLKDP0          , output2      , X                                    ), " &
   " 408 (BC_1,  FBD1SBODP(1)           , output2      , X                                    ), " &
   " 409 (BC_1,  FBD1SBOCLKCP0          , output2      , X                                    ), " &
   " 410 (BC_1,  FBD1SBOCP(7)           , output2      , X                                    ), " &
   " 411 (BC_1,  FBD1SBOCP(9)           , output2      , X                                    ), " &
   " 412 (BC_1,  FBD1SBOCP(6)           , output2      , X                                    ), " &
   " 413 (BC_1,  FBD1SBOCP(8)           , output2      , X                                    ), " &
   " 414 (BC_1,  FBD1SBOCP(5)           , output2      , X                                    ), " &
   " 415 (BC_1,  FBD1SBOCP(4)           , output2      , X                                    ), " &
   " 416 (BC_1,  FBD1SBOCP(10)          , output2      , X                                    ), " &
   " 417 (BC_1,  FBD1SBOCP(3)           , output2      , X                                    ), " &
   " 418 (BC_1,  FBD1SBOCP(2)           , output2      , X                                    ), " &
   " 419 (BC_1,  FBD1SBOCP(1)           , output2      , X                                    ), " &
   " 420 (BC_1,  FBD1SBOCP(0)           , output2      , X                                    ), " &
   " 421 (BC_4,  FBD1NBICN(1)           , input        , X                                    ), " &
   " 422 (BC_4,  FBD1NBICP(1)           , input        , X                                    ), " &
   " 423 (BC_4,  FBD1NBICN(2)           , input        , X                                    ), " &
   " 424 (BC_4,  FBD1NBICP(2)           , input        , X                                    ), " &
   " 425 (BC_4,  FBD1NBICN(3)           , input        , X                                    ), " &
   " 426 (BC_4,  FBD1NBICP(3)           , input        , X                                    ), " &
   " 427 (BC_4,  FBD1NBICN(4)           , input        , X                                    ), " &
   " 428 (BC_4,  FBD1NBICP(4)           , input        , X                                    ), " &
   " 429 (BC_4,  FBD1NBICN(12)          , input        , X                                    ), " &
   " 430 (BC_4,  FBD1NBICP(12)          , input        , X                                    ), " &
   " 431 (BC_4,  FBD1NBICN(5)           , input        , X                                    ), " &
   " 432 (BC_4,  FBD1NBICP(5)           , input        , X                                    ), " &
   " 433 (BC_4,  FBD1NBICLKCN0          , input        , X                                    ), " &
   " 434 (BC_4,  FBD1NBICLKCP0          , input        , X                                    ), " &
   " 435 (BC_4,  FBD1NBICN(10)          , input        , X                                    ), " &
   " 436 (BC_4,  FBD1NBICP(10)          , input        , X                                    ), " &
   " 437 (BC_4,  FBD1NBICN(13)          , input        , X                                    ), " &
   " 438 (BC_4,  FBD1NBICP(13)          , input        , X                                    ), " &
   " 439 (BC_4,  FBD1NBICN(8)           , input        , X                                    ), " &
   " 440 (BC_4,  FBD1NBICP(8)           , input        , X                                    ), " &
   " 441 (BC_4,  FBD1NBICN(11)          , input        , X                                    ), " &
   " 442 (BC_4,  FBD1NBICP(11)          , input        , X                                    ), " &
   " 443 (BC_4,  FBD1NBICN(9)           , input        , X                                    ), " &
   " 444 (BC_4,  FBD1NBICP(9)           , input        , X                                    ), " &
   " 445 (BC_4,  FBD1NBICN(0)           , input        , X                                    ), " &
   " 446 (BC_4,  FBD1NBICP(0)           , input        , X                                    ), " &
   " 447 (BC_4,  FBD1NBICN(6)           , input        , X                                    ), " &
   " 448 (BC_4,  FBD1NBICP(6)           , input        , X                                    ), " &
   " 449 (BC_4,  FBD1NBICN(7)           , input        , X                                    ), " &
   " 450 (BC_4,  FBD1NBICP(7)           , input        , X                                    ), " &
   " 451 (BC_1,  *                      , internal     , X                                    ), " &
   " 452 (BC_1,  *                      , internal     , X                                    ), " &
   " 453 (BC_1,  *                      , internal     , X                                    ), " &
   " 454 (BC_1,  *           		, internal     , X  				      ), " &
   " 455 (BC_1,  *           		, internal     , X  				      ), " &
   " 456 (BC_1,  *           		, internal     , X  				      ), " &
   " 457 (BC_1,  *           		, internal     , X  				      ), " &
   " 458 (BC_1,  *           		, internal     , X  				      ), " &
   " 459 (BC_1,  *           		, internal     , X  				      ), " &
   " 460 (BC_1,  *           		, internal     , X  				      ), " &
   " 461 (BC_1,  *           		, internal     , X  				      ), " &
   " 462 (BC_1,  *           		, internal     , X  				      ), " &
   " 463 (BC_1,  *           		, internal     , X  				      ), " &
   " 464 (BC_1,  *           		, internal     , X  				      ), " &
   " 465 (BC_1,  *           		, internal     , X  				      ), " &
   " 466 (BC_1,  *           		, internal     , X  				      ), " &
   " 467 (BC_1,  *           		, internal     , X  				      ), " &
   " 468 (BC_1,  *            		, internal     , X  				      ), " &
   " 469 (BC_1,  *            		, internal     , X  				      ), " &
   " 470 (BC_1,  *            		, internal     , X  				      ), " &
   " 471 (BC_1,  *            		, internal     , X  				      ), " &
   " 472 (BC_1,  *            		, internal     , X  				      ), " &
   " 473 (BC_1,  *            		, internal     , X  				      ), " &
   " 474 (BC_1,  *            		, internal     , X  				      ), " &
   " 475 (BC_1,  *            		, internal     , X  				      ), " &
   " 476 (BC_1,  *            		, internal     , X  				      ), " &
   " 477 (BC_1,  *            		, internal     , X  				      ), " &
   " 478 (BC_1,  *            		, internal     , X  				      ), " &
   " 479 (BC_7,  PECI                   , bidir        , 0,      479,          0,      WEAK0  ), " &
   " 480 (BC_1,  *                 	, internal     , X                                    ), " &
   " 481 (BC_1,  *                 	, internal     , X                                    ), " &
   " 482 (BC_1,  *                 	, internal     , X                                    ), " &
   " 483 (BC_1,  *                 	, internal     , X                                    ), " &
   " 484 (BC_1,  *                 	, internal     , X                                    ), " &
   " 485 (BC_1,  *                 	, internal     , X                                    ), " &
   " 486 (BC_1,  *                 	, internal     , X                                    ), " &
   " 487 (BC_1,  *                 	, internal     , X                                    ), " &
   " 488 (BC_1,  *                 	, internal     , X                                    ), " &
   " 489 (BC_1,  *            	   	, internal     , X                                    ), " &
   " 490 (BC_1,  THERMTRIP_N            , output2      , 1,      490,          1,      WEAK1  ), " &
   " 491 (BC_3,  NMI                    , input        , X                                    ), " &
   " 492 (BC_7,  ERROR1_N               , bidir        , X,      492,          1,      WEAK1  ), " &
   " 493 (BC_7,  ERROR0_N               , bidir        , X,      493,          1,      WEAK1  ), " &
   " 494 (BC_7,  MBP(7)                 , bidir        , X,      494,          1,      PULL1  ), " &
   " 495 (BC_7,  MBP(6)                 , bidir        , X,      495,          1,      PULL1  ), " &
   " 496 (BC_7,  MBP(5)                 , bidir        , X,      496,          1,      PULL1  ), " &
   " 497 (BC_7,  MBP(4)                 , bidir        , X,      497,          1,      PULL1  ), " &
   " 498 (BC_7,  MBP(3)                 , bidir        , X,      498,          1,      PULL1  ), " &
   " 499 (BC_7,  MBP(2)                 , bidir        , X,      499,          1,      PULL1  ), " &
   " 500 (BC_7,  MBP(1)                 , bidir        , X,      500,          1,      PULL1  ), " &
   " 501 (BC_7,  MBP(0)                 , bidir        , X,      501,          1,      PULL1  ), " &
   " 502 (BC_4,  ODT                    , observe_only , X                                    ), " &
   " 503 (BC_1,  PROCHOT_N              , output2      , 1,      503,          1,      WEAK1  ), " &
   " 504 (BC_1,  PRDY_N                 , output2      , 1,      504,          1,      WEAK1  ), " &
   " 505 (BC_3,  PREQ_N                 , input        , 1                                    ), " &
   " 506 (BC_1,  THERMALERT_N           , output2      , 1,      506,          1,      WEAK1  ), " &
   " 507 (BC_3,  FORCE_PR_N             , input        , 1                                    ), " &
   " 508 (BC_4,  RESET_N                , observe_only , 1                                    ), " &
   " 509 (BC_1,  *                      , internal     , X                                    ), " &
   " 510 (BC_1,  *                      , internal     , X                                    ), " &
   " 511 (BC_1,  *                	, internal     , X                                    ), " &
   " 512 (BC_1,  *                	, internal     , X                                    ), " &
   " 513 (BC_1,  *                	, internal     , X                                    ), " &
   " 514 (BC_1,  *                	, internal     , X                                    ), " &
   " 515 (BC_1,  *                	, internal     , X                                    ), " &
   " 516 (BC_1,  *                	, internal     , X                                    ), " &
   " 517 (BC_1,  *                	, internal     , X                                    ), " &
   " 518 (BC_4,  PWRGOOD                , observe_only , 0                                    ), " &
   " 519 (BC_4,  VIOPWRGOOD             , observe_only , 0                                    )  ";

attribute DESIGN_WARNING of XeonE7_chipset : entity is

" This is Intel(R) Xeon(R) Processor E7-8800/4800/2800 product families BSDL file.                              " &
"                                                                                                               " &
"  1. Normal power up sequence must be completed prior to using Boundary scan logic.                            " &
"                                                                                                               " &
"  2. PwrGood should be held stable for 34ms before beginning Boundary Scan operations.                         " &
"                                                                                                               " &
"  3. The serial chain for 1 chipset TAP and all 6 Core TAP blocks are connected in the following way:          " &
"      TDI -> XeonE7_chipset  -> XeonE7_core0   -> XeonE7_core1 ->                                              " &
"             XeonE7_core2    -> XeonE7_core3   -> XeonE7_core4 ->                                              " &
"             XeonE7_core5    -> XeonE7_core6   -> XeonE7_core7 ->                                              " &
"             XeonE7_core8    -> XeonE7_core9   -> TDO                                                          " &
"                                                                                                               " &
"  4. TCLK, TMS, TRST_N are all connected in parallel to each TAP. Each TAP has its own Instruction Register.   " &
"                                                                                                               " &
"  5. Output and bidirectional pins may experience a 1-Tclk glitch during Sample/Preload.                       " &
"                                                                                                               " &
"  6. During Extest, output pins are updated on the rising edge of TCLK.		                        " &
"    														" ;

end XeonE7_chipset;