-- **********************************************************************
--
-- FILE : zl50015ga.bsd
-- generated by Cz.P. as zl50015 on Fri 28 may 2004
-- using p.jtag.bsd rev 3.3 July 18, 2003
--
-- BSDL description for top level entity zl50015
-- Device : ZL50015 1K-Chan Switch with Stratum 4E DPLL
-- Package : 256-Ball PBGA 17x17mm
--
-- Number of BSC cells: 229
--
-- **********************************************************************
-- Modification History:
-- Initial release: Wed Jan 28 15:57:30 EST 2004
--
-- rev. 1.1 - 28 May 2004 - Cz.P.
-- - alligned names with datasheet for signals:
-- mode_4m0, mode_4m1
--
-- ********************************************************************
--
-- IMPORTANT NOTICE
--
-- This information is for modeling purposes only, and is not guaranteed.
--
-- This information is provided "as is" without warranty of any kind.
-- It may contain technical inaccuracies or typographical errors.
--
-- ZARLINK and ZL50015 are trademarks of ZARLINK Semiconductor. ZARLINK
-- products, marketed under trademarks, are protected under numerous US
-- and foreign patents and pending applications, maskwork rights, and
-- copyrights.
--
-- ZARLINK reserves the right to make changes to any products and
-- services at any time without notice. ZARLINK assumes no
-- responsibility or liability arising out of the application or use of
-- any information, product, or service described herein except as
-- expressly agreed to in writing by ZARLINK Corporation. ZARLINK
-- customers are advised to obtain the latest version of device
-- specifications before relying on any published information and before
-- placing orders for products or services.
--
-- ********************************************************************
--
-- SPECIAL NOTES
--
-- 1. All instruction opcodes other than those defined in this file
-- should be considered PRIVATE.
--
-- 2. Pins IC_OPEN1, IC_OPEN2 : {B12,C10} are test pins.
-- For normal operation keep them unconnected (open).
--
-- 3. Pins IC_GRND : {C13} is Internal Connect.
-- For normal operation to be tied to Ground (VSS).
--
-- 4. Pins IC(1:6) : {K12,G4,C11,B13,F13,G3}
-- are Internal Connects. For normal operation,
-- EITHER keep them open (unconnected),
-- OR tie them to Ground (VSS).
--
-- 5. Pins NC(1:61) are No Connects. Nothing is wired to these
-- balls; they are floating.
--
-- ********************************************************************
entity zl50015 is
generic(PHYSICAL_PIN_MAP : string := "BGA_PACKAGE");
port (
A: in bit_vector (0 to 13);
CKI: in bit;
CKO: out bit_vector (0 to 2);
CKOSIG4: out bit;
CKOUT3: linkage bit;
CKOUT5: linkage bit;
CSB: in bit;
D: inout bit_vector (0 to 15);
DSB_RDB: in bit;
DTAB_RDY: out bit;
FPI: in bit;
FPO: out bit_vector (0 to 3);
FPO_OFF: out bit_vector (0 to 2);
IC: linkage bit_vector (1 to 6);
IC_GRND: linkage bit;
IC_OPEN1: linkage bit;
IC_OPEN2: linkage bit;
IRQB: out bit;
MODE_4M0: in bit;
MODE_4M1: in bit;
MOT_INTELB: in bit;
NC: linkage bit_vector (1 to 61);
ODE: in bit;
OSC_EN: in bit;
OSCI: linkage bit;
OSCO: linkage bit;
REF: in bit_vector (0 to 3);
REF_FAIL: out bit_vector (0 to 3);
RESETB: linkage bit;
RWB_WRB: in bit;
STI: in bit_vector (0 to 15);
STIO: inout bit_vector (0 to 15);
STOHZ: out bit_vector (0 to 7);
TCK: in bit;
TDI: in bit;
TDO: out bit;
TMS: in bit;
TRSTB: in bit;
GND: linkage bit_vector (1 to 32);
VDD_19_IO: linkage bit;
VDD_32_IO: linkage bit;
VDD_APLL: linkage bit;
VDD_APLL19: linkage bit;
VDD_APLL32: linkage bit;
VDD_TDL: linkage bit;
VDDCORE: linkage bit_vector (1 to 14);
VDDIO: linkage bit_vector (1 to 14);
VSS_19_IO: linkage bit;
VSS_32_IO: linkage bit;
VSS_APLL: linkage bit;
VSS_APLL19: linkage bit;
VSS_APLL32: linkage bit;
VSS_CORE_PLL: linkage bit;
VSS_CORE_PLL19: linkage bit;
VSS_CORE_PLL32: linkage bit;
VSS_TDL: linkage bit
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of zl50015 : entity is
"STD_1149_1_1993";
attribute PIN_MAP of zl50015 : entity is PHYSICAL_PIN_MAP;
constant BGA_PACKAGE : PIN_MAP_STRING :=
"A :(K13 , " & -- A[0]
"K15 , " & -- A[1]
"K14 , " & -- A[2]
"J11 , " & -- A[3]
"J12 , " & -- A[4]
"J13 , " & -- A[5]
"J15 , " & -- A[6]
"H11 , " & -- A[7]
"J14 , " & -- A[8]
"H12 , " & -- A[9]
"H13 , " & -- A[10]
"H15 , " & -- A[11]
"G12 , " & -- A[12]
"G13 ), " & -- A[13]
"CKI : B11 , " &
"CKO :(B7 , " & -- CKO[0]
"C7 , " & -- CKO[1]
"B5 ), " & -- CKO[2]
"CKOSIG4 : D6 , " &
"CKOUT3 : J6 , " &
"CKOUT5 : H5 , " &
"CSB : R11 , " &
"D :(M4 , " & -- D[0]
"N6 , " & -- D[1]
"R6 , " & -- D[2]
"P7 , " & -- D[3]
"R7 , " & -- D[4]
"N7 , " & -- D[5]
"M8 , " & -- D[6]
"N8 , " & -- D[7]
"P8 , " & -- D[8]
"R8 , " & -- D[9]
"M9 , " & -- D[10]
"N9 , " & -- D[11]
"R9 , " & -- D[12]
"N10 , " & -- D[13]
"P9 , " & -- D[14]
"R10 ), " & -- D[15]
"DSB_RDB : R12 , " &
"DTAB_RDY : N12 , " &
"FPI : B10 , " &
"FPO :(G15 , " & -- FPO[0]
"G14 , " & -- FPO[1]
"E15 , " & -- FPO[2]
"F14 ), " & -- FPO[3]
"FPO_OFF :(H14 , " & -- FPO_OFF[0]
"D11 , " & -- FPO_OFF[1]
"F15 ), " & -- FPO_OFF[2]
"IC :(K12 , " & -- IC[1]
"G4 , " & -- IC[2]
"C11 , " & -- IC[3]
"B13 , " & -- IC[4]
"F13 , " & -- IC[5]
"G3 ), " & -- IC[6]
"IC_GRND : C13 , " &
"IC_OPEN1 : B12 , " &
"IC_OPEN2 : C10 , " &
"IRQB : P10 , " &
"MODE_4M0 : M14 , " &
"MODE_4M1 : R13 , " &
"MOT_INTELB : M13 , " &
"NC :(A8 , " & -- NC[1]
"A9 , " & -- NC[2]
"A14 , " & -- NC[3]
"A15 , " & -- NC[4]
"E10 , " & -- NC[5]
"M2 , " & -- NC[6]
"N2 , " & -- NC[7]
"P2 , " & -- NC[8]
"R2 , " & -- NC[9]
"T6 , " & -- NC[10]
"T7 , " & -- NC[11]
"T8 , " & -- NC[12]
"T9 , " & -- NC[13]
"T10 , " & -- NC[14]
"T11 , " & -- NC[15]
"T12 , " & -- NC[16]
"T13 , " & -- NC[17]
"T14 , " & -- NC[18]
"T15 , " & -- NC[19]
"P16 , " & -- NC[20]
"R16 , " & -- NC[21]
"B1 , " & -- NC[22]
"C1 , " & -- NC[23]
"A2 , " & -- NC[24]
"A3 , " & -- NC[25]
"A4 , " & -- NC[26]
"A6 , " & -- NC[27]
"A5 , " & -- NC[28]
"A7 , " & -- NC[29]
"L1 , " & -- NC[30]
"K1 , " & -- NC[31]
"H1 , " & -- NC[32]
"J1 , " & -- NC[33]
"F1 , " & -- NC[34]
"G1 , " & -- NC[35]
"D1 , " & -- NC[36]
"E1 , " & -- NC[37]
"T4 , " & -- NC[38]
"T5 , " & -- NC[39]
"T3 , " & -- NC[40]
"T2 , " & -- NC[41]
"R1 , " & -- NC[42]
"P1 , " & -- NC[43]
"M1 , " & -- NC[44]
"N1 , " & -- NC[45]
"A11 , " & -- NC[46]
"A10 , " & -- NC[47]
"A12 , " & -- NC[48]
"A13 , " & -- NC[49]
"B16 , " & -- NC[50]
"C16 , " & -- NC[51]
"E16 , " & -- NC[52]
"D16 , " & -- NC[53]
"F16 , " & -- NC[54]
"G16 , " & -- NC[55]
"J16 , " & -- NC[56]
"H16 , " & -- NC[57]
"K16 , " & -- NC[58]
"L16 , " & -- NC[59]
"M16 , " & -- NC[60]
"N16 ), " & -- NC[61]
"ODE : B15 , " &
"OSC_EN : D12 , " &
"OSCI : B14 , " &
"OSCO : C12 , " &
"REF :(E9 , " & -- REF[0]
"D8 , " & -- REF[1]
"B8 , " & -- REF[2]
"D7 ), " & -- REF[3]
"REF_FAIL :(D9 , " & -- REF_FAIL[0]
"E8 , " & -- REF_FAIL[1]
"C8 , " & -- REF_FAIL[2]
"E7 ), " & -- REF_FAIL[3]
"RESETB : G2 , " &
"RWB_WRB : N11 , " &
"STI :(B6 , " & -- STI[0]
"C6 , " & -- STI[1]
"D5 , " & -- STI[2]
"D4 , " & -- STI[3]
"B4 , " & -- STI[4]
"B3 , " & -- STI[5]
"C5 , " & -- STI[6]
"C4 , " & -- STI[7]
"E3 , " & -- STI[8]
"C2 , " & -- STI[9]
"B2 , " & -- STI[10]
"D2 , " & -- STI[11]
"F3 , " & -- STI[12]
"F4 , " & -- STI[13]
"E2 , " & -- STI[14]
"F2 ), " & -- STI[15]
"STIO :(N4 , " & -- STIO[0]
"P4 , " & -- STIO[1]
"R4 , " & -- STIO[2]
"P5 , " & -- STIO[3]
"N13 , " & -- STIO[4]
"P11 , " & -- STIO[5]
"R14 , " & -- STIO[6]
"R15 , " & -- STIO[7]
"M15 , " & -- STIO[8]
"L15 , " & -- STIO[9]
"L13 , " & -- STIO[10]
"L14 , " & -- STIO[11]
"E14 , " & -- STIO[12]
"D13 , " & -- STIO[13]
"D15 , " & -- STIO[14]
"C15 ), " & -- STIO[15]
"STOHZ :(R3 , " & -- STOHZ[0]
"P6 , " & -- STOHZ[1]
"R5 , " & -- STOHZ[2]
"N5 , " & -- STOHZ[3]
"P12 , " & -- STOHZ[4]
"N15 , " & -- STOHZ[5]
"P13 , " & -- STOHZ[6]
"P15 ), " & -- STOHZ[7]
"TCK : L4 , " &
"TDI : M3 , " &
"TDO : G5 , " &
"TMS : K3 , " &
"TRSTB : L3 , " &
"GND :(A1, A16, C3, C14, E5, E12, F8, F9, G7, G8, G9, G10," &
"H7, H8, H9, H10, J7, J8, J9, J10, K7, K8, K9, K10," &
"L8, L9, M5, M12, P3, P14, T1, T16)," &
"VDD_19_IO : J2 , " &
"VDD_32_IO : J3 , " &
"VDD_APLL : B9 , " &
"VDD_APLL19 : H4 , " &
"VDD_APLL32 : K5 , " &
"VDD_TDL : L2 , " &
"VDDCORE :(E6, E11, F6, F7, F10, F11, L6, L7, L10, L11, M6, M7," &
"M10, M11)," &
"VDDIO :(D3, D14, E4, E13, F5, F12, G6, G11, K6, K11, L5, L12," &
"N3, N14)," &
"VSS_19_IO : K2 , " &
"VSS_32_IO : J4 , " &
"VSS_APLL : D10 , " &
"VSS_APLL19 : H3 , " &
"VSS_APLL32 : K4 , " &
"VSS_CORE_PLL : C9 , " &
"VSS_CORE_PLL19 : H2 , " &
"VSS_CORE_PLL32 : J5 , " &
"VSS_TDL : H6";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6,BOTH);
attribute TAP_SCAN_RESET of TRSTB : signal is true;
--
-- NOTE: All instruction opcodes other than those defined in this file
-- should be considered PRIVATE.
--
attribute INSTRUCTION_LENGTH of zl50015 : entity is 16;
attribute INSTRUCTION_OPCODE of zl50015 : entity is
"idcode (1111111111111110)," &
"bypass (1111111111111111)," &
"sample (1111111111111000)," &
"highz (1111111111001111)," &
"clamp (1111111111101111)," &
"extest (0000000000000000)," &
"extest (1111111111101000)";
attribute INSTRUCTION_CAPTURE of zl50015 : entity is "xxxxxxxxxxxxxx01";
attribute IDCODE_REGISTER of zl50015 : entity is
"0000" & -- version
"1100001101101111" & -- part number
"00010100101" & -- manufacturer id
"1";
attribute REGISTER_ACCESS of zl50015 : entity is
"boundary (extest, sample)," &
"bypass (bypass, highz, clamp)," &
"device_id (idcode)" ;
attribute BOUNDARY_LENGTH of zl50015 : entity is 229;
attribute BOUNDARY_REGISTER of zl50015 : entity is
-- num cell port function safe ccel disval rslt
" 0 ( BC_4, *, internal, X) ," &
" 1 ( BC_4, *, internal, X) ," &
" 2 ( BC_2, STI(15), input, X) ," &
" 3 ( BC_2, STI(13), input, X) ," &
" 4 ( BC_2, STI(14), input, X) ," &
" 5 ( BC_2, STI(11), input, X) ," &
" 6 ( BC_2, STI(12), input, X) ," &
" 7 ( BC_2, STI(9), input, X) ," &
" 8 ( BC_2, STI(10), input, X) ," &
" 9 ( BC_2, STI(8), input, X) ," &
" 10 ( BC_2, *, internal, X) ," &
" 11 ( BC_2, *, internal, X) ," &
" 12 ( BC_2, *, internal, X) ," &
" 13 ( BC_2, *, internal, X) ," &
" 14 ( BC_2, *, internal, X) ," &
" 15 ( BC_2, *, internal, X) ," &
" 16 ( BC_2, *, internal, X) ," &
" 17 ( BC_2, *, internal, X) ," &
" 18 ( BC_2, STI(7), input, X) ," &
" 19 ( BC_2, STI(5), input, X) ," &
" 20 ( BC_2, STI(6), input, X) ," &
" 21 ( BC_2, STI(3), input, X) ," &
" 22 ( BC_2, STI(4), input, X) ," &
" 23 ( BC_2, STI(1), input, X) ," &
" 24 ( BC_2, STI(2), input, X) ," &
" 25 ( BC_2, STI(0), input, X) ," &
" 26 ( BC_2, CKOSIG4, output3, X, 27, 1, Z) ," &
" 27 ( BC_2, *, control, 1) ," &
" 28 ( BC_2, CKO(2), output3, X, 29, 1, Z) ," &
" 29 ( BC_2, *, control, 1) ," &
" 30 ( BC_2, CKO(1), output3, X, 31, 1, Z) ," &
" 31 ( BC_2, *, control, 1) ," &
" 32 ( BC_2, CKO(0), output3, X, 33, 1, Z) ," &
" 33 ( BC_2, *, control, 1) ," &
" 34 ( BC_2, REF(3), input, X) ," &
" 35 ( BC_2, REF_FAIL(3), output3, X, 36, 1, Z) ," &
" 36 ( BC_2, *, control, 1) ," &
" 37 ( BC_2, REF(2), input, X) ," &
" 38 ( BC_2, REF_FAIL(2), output3, X, 39, 1, Z) ," &
" 39 ( BC_2, *, control, 1) ," &
" 40 ( BC_2, REF(1), input, X) ," &
" 41 ( BC_2, REF_FAIL(1), output3, X, 42, 1, Z) ," &
" 42 ( BC_2, *, control, 1) ," &
" 43 ( BC_2, REF(0), input, X) ," &
" 44 ( BC_2, REF_FAIL(0), output3, X, 45, 1, Z) ," &
" 45 ( BC_2, *, control, 1) ," &
" 46 ( BC_2, FPI, input, X) ," &
" 47 ( BC_4, CKI, input, X) ," &
" 48 ( BC_2, *, internal, X) ," &
" 49 ( BC_2, *, internal, X) ," &
" 50 ( BC_4, *, internal, X) ," &
" 51 ( BC_2, ODE, input, X) ," &
" 52 ( BC_1, *, internal, X) ," &
" 53 ( BC_2, *, internal, 1) ," &
" 54 ( BC_1, *, internal, X) ," &
" 55 ( BC_2, *, internal, 1) ," &
" 56 ( BC_1, *, internal, X) ," &
" 57 ( BC_2, *, internal, 1) ," &
" 58 ( BC_1, *, internal, X) ," &
" 59 ( BC_2, *, internal, 1) ," &
" 60 ( BC_1, *, internal, X) ," &
" 61 ( BC_2, *, internal, 1) ," &
" 62 ( BC_1, *, internal, X) ," &
" 63 ( BC_2, *, internal, 1) ," &
" 64 ( BC_1, *, internal, X) ," &
" 65 ( BC_2, *, internal, 1) ," &
" 66 ( BC_1, *, internal, X) ," &
" 67 ( BC_2, *, internal, 1) ," &
" 68 ( BC_2, *, internal, X) ," &
" 69 ( BC_2, *, internal, 1) ," &
" 70 ( BC_2, *, internal, X) ," &
" 71 ( BC_2, *, internal, 1) ," &
" 72 ( BC_2, *, internal, X) ," &
" 73 ( BC_2, *, internal, 1) ," &
" 74 ( BC_2, *, internal, X) ," &
" 75 ( BC_2, *, internal, 1) ," &
" 76 ( BC_7, STIO(15), bidir, X, 77, 1, Z) ," &
" 77 ( BC_2, *, control, 1) ," &
" 78 ( BC_7, STIO(14), bidir, X, 79, 1, Z) ," &
" 79 ( BC_2, *, control, 1) ," &
" 80 ( BC_7, STIO(12), bidir, X, 81, 1, Z) ," &
" 81 ( BC_2, *, control, 1) ," &
" 82 ( BC_7, STIO(13), bidir, X, 83, 1, Z) ," &
" 83 ( BC_2, *, control, 1) ," &
" 84 ( BC_2, FPO(3), output3, X, 85, 1, Z) ," &
" 85 ( BC_2, *, control, 1) ," &
" 86 ( BC_2, FPO(2), output3, X, 87, 1, Z) ," &
" 87 ( BC_2, *, control, 1) ," &
" 88 ( BC_2, FPO_OFF(2), output3, X, 89, 1, Z) ," &
" 89 ( BC_2, *, control, 1) ," &
" 90 ( BC_2, OSC_EN, input, X) ," &
" 91 ( BC_2, FPO(1), output3, X, 92, 1, Z) ," &
" 92 ( BC_2, *, control, 1) ," &
" 93 ( BC_2, *, internal, X) ," &
" 94 ( BC_2, FPO_OFF(1), output3, X, 95, 1, Z) ," &
" 95 ( BC_2, *, control, 1) ," &
" 96 ( BC_2, FPO(0), output3, X, 97, 1, Z) ," &
" 97 ( BC_2, *, control, 1) ," &
" 98 ( BC_2, FPO_OFF(0), output3, X, 99, 1, Z) ," &
" 99 ( BC_2, *, control, 1) ," &
" 100 ( BC_2, A(13), input, X) ," &
" 101 ( BC_2, A(12), input, X) ," &
" 102 ( BC_2, A(11), input, X) ," &
" 103 ( BC_2, A(10), input, X) ," &
" 104 ( BC_2, A(9), input, X) ," &
" 105 ( BC_2, A(8), input, X) ," &
" 106 ( BC_2, A(7), input, X) ," &
" 107 ( BC_2, A(6), input, X) ," &
" 108 ( BC_2, A(5), input, X) ," &
" 109 ( BC_2, A(4), input, X) ," &
" 110 ( BC_2, A(3), input, X) ," &
" 111 ( BC_2, A(2), input, X) ," &
" 112 ( BC_2, A(1), input, X) ," &
" 113 ( BC_2, A(0), input, X) ," &
" 114 ( BC_4, *, internal, X) ," &
" 115 ( BC_2, *, internal, X) ," &
" 116 ( BC_2, *, internal, 1) ," &
" 117 ( BC_2, *, internal, X) ," &
" 118 ( BC_2, *, internal, 1) ," &
" 119 ( BC_2, *, internal, X) ," &
" 120 ( BC_2, *, internal, 1) ," &
" 121 ( BC_2, *, internal, X) ," &
" 122 ( BC_2, *, internal, 1) ," &
" 123 ( BC_7, STIO(11), bidir, X, 124, 1, Z) ," &
" 124 ( BC_2, *, control, 1) ," &
" 125 ( BC_7, STIO(9), bidir, X, 126, 1, Z) ," &
" 126 ( BC_2, *, control, 1) ," &
" 127 ( BC_7, STIO(10), bidir, X, 128, 1, Z) ," &
" 128 ( BC_2, *, control, 1) ," &
" 129 ( BC_7, STIO(8), bidir, X, 130, 1, Z) ," &
" 130 ( BC_2, *, control, 1) ," &
" 131 ( BC_2, STOHZ(7), output3, X, 132, 1, Z) ," &
" 132 ( BC_2, *, control, 1) ," &
" 133 ( BC_2, STOHZ(6), output3, X, 134, 1, Z) ," &
" 134 ( BC_2, *, control, 1) ," &
" 135 ( BC_2, STOHZ(4), output3, X, 136, 1, Z) ," &
" 136 ( BC_2, *, control, 1) ," &
" 137 ( BC_2, STOHZ(5), output3, X, 138, 1, Z) ," &
" 138 ( BC_2, *, control, 1) ," &
" 139 ( BC_7, STIO(7), bidir, X, 140, 1, Z) ," &
" 140 ( BC_2, *, control, 1) ," &
" 141 ( BC_7, STIO(6), bidir, X, 142, 1, Z) ," &
" 142 ( BC_2, *, control, 1) ," &
" 143 ( BC_7, STIO(5), bidir, X, 144, 1, Z) ," &
" 144 ( BC_2, *, control, 1) ," &
" 145 ( BC_7, STIO(4), bidir, X, 146, 1, Z) ," &
" 146 ( BC_2, *, control, 1) ," &
" 147 ( BC_4, MODE_4M1, input, X) ," &
" 148 ( BC_4, MODE_4M0, input, X) ," &
" 149 ( BC_2, DTAB_RDY, output3, X, 150, 1, Z) ," &
" 150 ( BC_2, *, control, 1) ," &
" 151 ( BC_2, IRQB, output3, X, 152, 1, Z) ," &
" 152 ( BC_2, *, control, 1) ," &
" 153 ( BC_4, DSB_RDB, input, X) ," &
" 154 ( BC_4, MOT_INTELB, input, X) ," &
" 155 ( BC_4, CSB, input, X) ," &
" 156 ( BC_4, RWB_WRB, input, X) ," &
" 157 ( BC_7, D(15), bidir, X, 158, 1, Z) ," &
" 158 ( BC_2, *, control, 1) ," &
" 159 ( BC_7, D(14), bidir, X, 160, 1, Z) ," &
" 160 ( BC_2, *, control, 1) ," &
" 161 ( BC_7, D(13), bidir, X, 162, 1, Z) ," &
" 162 ( BC_2, *, control, 1) ," &
" 163 ( BC_7, D(12), bidir, X, 164, 1, Z) ," &
" 164 ( BC_2, *, control, 1) ," &
" 165 ( BC_7, D(11), bidir, X, 166, 1, Z) ," &
" 166 ( BC_2, *, control, 1) ," &
" 167 ( BC_7, D(10), bidir, X, 168, 1, Z) ," &
" 168 ( BC_2, *, control, 1) ," &
" 169 ( BC_7, D(9), bidir, X, 170, 1, Z) ," &
" 170 ( BC_2, *, control, 1) ," &
" 171 ( BC_7, D(8), bidir, X, 172, 1, Z) ," &
" 172 ( BC_2, *, control, 1) ," &
" 173 ( BC_7, D(7), bidir, X, 174, 1, Z) ," &
" 174 ( BC_2, *, control, 1) ," &
" 175 ( BC_7, D(6), bidir, X, 176, 1, Z) ," &
" 176 ( BC_2, *, control, 1) ," &
" 177 ( BC_7, D(5), bidir, X, 178, 1, Z) ," &
" 178 ( BC_2, *, control, 1) ," &
" 179 ( BC_7, D(4), bidir, X, 180, 1, Z) ," &
" 180 ( BC_2, *, control, 1) ," &
" 181 ( BC_7, D(3), bidir, X, 182, 1, Z) ," &
" 182 ( BC_2, *, control, 1) ," &
" 183 ( BC_7, D(2), bidir, X, 184, 1, Z) ," &
" 184 ( BC_2, *, control, 1) ," &
" 185 ( BC_7, D(1), bidir, X, 186, 1, Z) ," &
" 186 ( BC_2, *, control, 1) ," &
" 187 ( BC_7, D(0), bidir, X, 188, 1, Z) ," &
" 188 ( BC_2, *, control, 1) ," &
" 189 ( BC_2, STOHZ(3), output3, X, 190, 1, Z) ," &
" 190 ( BC_2, *, control, 1) ," &
" 191 ( BC_2, STOHZ(2), output3, X, 192, 1, Z) ," &
" 192 ( BC_2, *, control, 1) ," &
" 193 ( BC_2, STOHZ(0), output3, X, 194, 1, Z) ," &
" 194 ( BC_2, *, control, 1) ," &
" 195 ( BC_2, STOHZ(1), output3, X, 196, 1, Z) ," &
" 196 ( BC_2, *, control, 1) ," &
" 197 ( BC_7, STIO(2), bidir, X, 198, 1, Z) ," &
" 198 ( BC_2, *, control, 1) ," &
" 199 ( BC_7, STIO(3), bidir, X, 200, 1, Z) ," &
" 200 ( BC_2, *, control, 1) ," &
" 201 ( BC_7, STIO(1), bidir, X, 202, 1, Z) ," &
" 202 ( BC_2, *, control, 1) ," &
" 203 ( BC_7, STIO(0), bidir, X, 204, 1, Z) ," &
" 204 ( BC_2, *, control, 1) ," &
" 205 ( BC_1, *, internal, X) ," &
" 206 ( BC_2, *, internal, 1) ," &
" 207 ( BC_1, *, internal, X) ," &
" 208 ( BC_2, *, internal, 1) ," &
" 209 ( BC_1, *, internal, X) ," &
" 210 ( BC_2, *, internal, 1) ," &
" 211 ( BC_1, *, internal, X) ," &
" 212 ( BC_2, *, internal, 1) ," &
" 213 ( BC_1, *, internal, X) ," &
" 214 ( BC_2, *, internal, 1) ," &
" 215 ( BC_1, *, internal, X) ," &
" 216 ( BC_2, *, internal, 1) ," &
" 217 ( BC_1, *, internal, X) ," &
" 218 ( BC_2, *, internal, 1) ," &
" 219 ( BC_1, *, internal, X) ," &
" 220 ( BC_2, *, internal, 1) ," &
" 221 ( BC_2, *, internal, X) ," &
" 222 ( BC_2, *, internal, X) ," &
" 223 ( BC_2, *, internal, X) ," &
" 224 ( BC_2, *, internal, X) ," &
" 225 ( BC_2, *, internal, X) ," &
" 226 ( BC_2, *, internal, X) ," &
" 227 ( BC_2, *, internal, X) ," &
" 228 ( BC_2, *, internal, X) ";
end zl50015;
------------- end of BSDL description for the zl50015 ----------