-- =======================================================================
-- Boundary Scan Description Language (BSDL) File
--
-- Product: PEX8111 (PLX Technology, Inc.)
-- Package: 284-Die Pads
--
-- =======================================================================
-- ****************************************************************
-- This BSDL has been validated for syntax and semantics compliance
-- to IEEE 1149.1. Please see Data Book for pin descriptions.
--
-- NOTE: Silicon version BB
--
-- =======================================================================
-- Revision Control:
--
-- Version Date Reason for Change
-- ******* ******** ***********************************
-- 1.0 12/05/05 Initial version for Silicon rev. BB
-- Modified for PEX8311 MCM.
-- 1.2 4/6/06 Changed TRST# to pad 210. Changed element 132
-- cell type to BC_3. Changed element 133 to internal,
-- and it's cell type to BC_3.
-- ======================================================================
entity PEX8111BB is
-- This section identifies the default device package selected.
generic(PHYSICAL_PIN_MAP : string := "PAD_284");
-- This section declares all the ports in the design.
port(
EERDDATA:in bit;
EXTARB:in bit;
FORWARD:in bit;
TCK:in bit;
TDI:in bit;
TMS:in bit;
TRSTn:in bit;
WAKEINn:in bit;
AD0:inout bit;
AD1:inout bit;
AD2:inout bit;
AD3:inout bit;
AD4:inout bit;
AD5:inout bit;
AD6:inout bit;
AD7:inout bit;
AD8:inout bit;
AD9:inout bit;
AD10:inout bit;
AD11:inout bit;
AD12:inout bit;
AD13:inout bit;
AD14:inout bit;
AD15:inout bit;
AD16:inout bit;
AD17:inout bit;
AD18:inout bit;
AD19:inout bit;
AD20:inout bit;
AD21:inout bit;
AD22:inout bit;
AD23:inout bit;
AD24:inout bit;
AD25:inout bit;
AD26:inout bit;
AD27:inout bit;
AD28:inout bit;
AD29:inout bit;
AD30:inout bit;
AD31:inout bit;
CBE0n:inout bit;
CBE1n:inout bit;
CBE2n:inout bit;
CBE3n:inout bit;
DEVSELn:inout bit;
FRAMEn:inout bit;
GNT0n:inout bit;
GNT1n:inout bit;
GNT2n:inout bit;
GNT3n:inout bit;
GPIO0:inout bit;
GPIO1:inout bit;
GPIO2:inout bit;
GPIO3:inout bit;
IDSEL:inout bit;
INTAn:inout bit;
INTBn:inout bit;
INTCn:inout bit;
INTDn:inout bit;
IRDYn:inout bit;
LOCKn:inout bit;
M66EN:inout bit;
BAR0ENn:inout bit;
PAR:inout bit;
PCIRSTn:inout bit;
PCLKI:inout bit;
PCLKO:inout bit;
PERRn:inout bit;
PERSTn:inout bit;
PMEINn:inout bit;
REQ0n:inout bit;
REQ1n:inout bit;
REQ2n:inout bit;
REQ3n:inout bit;
SERRn:inout bit;
STOPn:inout bit;
TRDYn:inout bit;
EECLK:buffer bit;
EECSn:buffer bit;
EEWRDATA:buffer bit;
PMEOUTn:out bit;
PWR_OK:buffer bit;
TDO:out bit;
WAKEOUTn:out bit;
BTON:linkage bit;
BUNRI:linkage bit;
PERn0:linkage bit;
PERp0:linkage bit;
PETn0:linkage bit;
PETp0:linkage bit;
REFCLKn:linkage bit;
REFCLKp:linkage bit;
SMC:linkage bit;
TEST:linkage bit;
TMC:linkage bit;
TMC1:linkage bit;
TMC2:linkage bit;
AVDD:linkage bit;
AVSS:linkage bit;
GND:linkage bit_vector(0 to 13);
VDD_P:linkage bit;
VDD_R:linkage bit;
VDD_T:linkage bit;
VDD15:linkage bit_vector(0 to 7);
VDD33:linkage bit_vector(0 to 3);
VDD5:linkage bit_vector(0 to 2);
VDDQ:linkage bit_vector(0 to 5);
VSS_C:linkage bit;
VSS_P0:linkage bit;
VSS_P1:linkage bit;
VSS_R:linkage bit;
VSS_RE:linkage bit;
VSS_T:linkage bit
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of PEX8111BB : entity is "STD_1149_1_1993";
attribute PIN_MAP of PEX8111BB : entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port.
constant PAD_284 : PIN_MAP_STRING :=
"EERDDATA:70," &
"EXTARB:219," &
"FORWARD:217," &
"TCK:144," &
"TDI:148," &
"TMS:212," &
"TRSTn:210," &
"WAKEINn:277," &
"AD0:81," &
"AD1:79," &
"AD2:83," &
"AD3:87," &
"AD4:85," &
"AD5:89," &
"AD6:91," &
"AD7:97," &
"AD8:99," &
"AD9:115," &
"AD10:113," &
"AD11:109," &
"AD12:111," &
"AD13:119," &
"AD14:125," &
"AD15:127," &
"AD16:172," &
"AD17:166," &
"AD18:170," &
"AD19:182," &
"AD20:184," &
"AD21:180," &
"AD22:188," &
"AD23:196," &
"AD24:186," &
"AD25:194," &
"AD26:204," &
"AD27:202," &
"AD28:221," &
"AD29:227," &
"AD30:243," &
"AD31:225," &
"CBE0n:101," &
"CBE1n:123," &
"CBE2n:168," &
"CBE3n:198," &
"DEVSELn:150," &
"FRAMEn:156," &
"GNT0n:241," &
"GNT1n:231," &
"GNT2n:265," &
"GNT3n:273," &
"GPIO0:11," &
"GPIO1:8," &
"GPIO2:7," &
"GPIO3:2," &
"IDSEL:200," &
"INTAn:263," &
"INTBn:257," &
"INTCn:269," &
"INTDn:267," &
"IRDYn:158," &
"LOCKn:152," &
"M66EN:271," &
"BAR0ENn:24," &
"PAR:131," &
"PCIRSTn:255," &
"PCLKI:275," &
"PCLKO:235," &
"PERRn:129," &
"PERSTn:279," &
"PMEINn:223," &
"REQ0n:237," &
"REQ1n:229," &
"REQ2n:251," &
"REQ3n:253," &
"SERRn:133," &
"STOPn:154," &
"TRDYn:160," &
"EECLK:75," &
"EECSn:60," &
"EEWRDATA:66," &
"PMEOUTn:215," &
"PWR_OK:14," &
"TDO:137," &
"WAKEOUTn:17," &
"BTON:208," &
"BUNRI:23," &
"PERn0:32," &
"PERp0:30," &
"PETn0:48," &
"PETp0:46," &
"REFCLKn:42," &
"REFCLKp:40," &
"SMC:135," &
"TEST:63," &
"TMC:20," &
"TMC1:73," &
"TMC2:141," &
"AVDD:35," &
"AVSS:39," &
"GND:(1,51,71,93,121,139,143,164,192,213," &
"239,261,281,283)," &
"VDD_P:44," &
"VDD_R:33," &
"VDD_T:47," &
"VDD15:(284,72,105,245,178,27,214,142)," &
"VDD33:(4,69,146,206)," &
"VDD5:(103,174,249)," &
"VDDQ:(95,117,162,190,233,259)," &
"VSS_C:37," &
"VSS_P0:43," &
"VSS_P1:41," &
"VSS_R:31," &
"VSS_RE:34," &
"VSS_T:45";
-- This section specifies the TAP ports.
-- For the TAP TCK port, the parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (5.0e6, BOTH);
attribute TAP_SCAN_RESET of TRSTn : signal is true;
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of PEX8111BB : entity is 5;
-- Specifies the boundary-scan instructions implemented in the
-- design and their opcodes.
attribute INSTRUCTION_OPCODE of PEX8111BB: entity is
"BYPASS(11111)," &
"EXTEST(00000)," &
"SAMPLE(00011)," &
"IDCODE(00001)," &
"JTAG_PRIVATE(00010)," &
"JTAG_PRIVATE(00100)," &
"JTAG_PRIVATE(01010)," &
"JTAG_PRIVATE(00101)," &
"JTAG_PRIVATE(01000)," &
"JTAG_PRIVATE(01001)," &
"JTAG_PRIVATE(00110)," &
"JTAG_PRIVATE(00111)";
-- Specifies the bit pattern that is loaded into the instruction
-- register when the TAP controller passes through the Capture-IR
-- state. The standard mandates that the two LSBs must be "01".
-- The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of PEX8111BB: entity is "00001";
attribute INSTRUCTION_PRIVATE of PEX8111BB: entity is
"JTAG_PRIVATE";
-- Specifies the bit pattern that is loaded into the DEVICE_ID
attribute IDCODE_REGISTER of PEX8111BB: entity is
"0001" & -- 4-bit version number
"1000000111010010" & -- 16-bit part number
"00000010000" & -- 11-bit identity of the manufacturer
"1"; -- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI
-- and TDO for each implemented instruction.
attribute REGISTER_ACCESS of PEX8111BB: entity is
"BYPASS (BYPASS)," &
"BOUNDARY (EXTEST, SAMPLE)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of PEX8111BB : entity is 150;
-- The following list specifies the characteristics of each cell
-- in the boundary scan register from TDI to TDO.
-- The following is a description of the label fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not
-- have a port name.
-- function: Is the function of the cell as defined by the
-- standard. Is one of input, output2, output3,
-- bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be
-- loaded with for safe operation when the software
-- might otherwise choose a random value.
-- ccell : The control cell number. Specifies the control
-- cell that drives the output enable for this port.
-- disval : Specifies the value that is loaded into the
-- control cell to disable the output enable for
-- the corresponding port.
-- rslt : Resulting state. Shows the state of the driver
-- when it is disabled.
attribute BOUNDARY_REGISTER of PEX8111BB : entity is
--
-- num cell port function safe [ccell disval rslt]
--
"0 ( BC_7, PERSTn, bidir, X, 1, 0, Z )," &
"1 ( BC_2, *, control, 0 )," &
"2 ( BC_4, WAKEINn, input, X )," &
"3 ( BC_7, PCLKI, bidir, X, 4, 0, Z )," &
"4 ( BC_2, *, control, 0 )," &
"5 ( BC_7, GNT3n, bidir, X, 6, 0, Z )," &
"6 ( BC_2, *, control, 0 )," &
"7 ( BC_7, M66EN, bidir, X, 8, 0, Z )," &
"8 ( BC_2, *, control, 0 )," &
"9 ( BC_7, INTCn, bidir, X, 10, 0, Z )," &
"10 ( BC_2, *, control, 0 )," &
"11 ( BC_7, INTDn, bidir, X, 12, 0, Z )," &
"12 ( BC_2, *, control, 0 )," &
"13 ( BC_7, GNT2n, bidir, X, 14, 0, Z )," &
"14 ( BC_2, *, control, 0 )," &
"15 ( BC_7, INTAn, bidir, X, 16, 0, Z )," &
"16 ( BC_2, *, control, 0 )," &
"17 ( BC_7, INTBn, bidir, X, 18, 0, Z )," &
"18 ( BC_2, *, control, 0 )," &
"19 ( BC_7, PCIRSTn, bidir, X, 20, 0, Z )," &
"20 ( BC_2, *, control, 0 )," &
"21 ( BC_7, REQ3n, bidir, X, 22, 0, Z )," &
"22 ( BC_2, *, control, 0 )," &
"23 ( BC_7, REQ2n, bidir, X, 24, 0, Z )," &
"24 ( BC_2, *, control, 0 )," &
"25 ( BC_7, AD30, bidir, X, 26, 0, Z )," &
"26 ( BC_2, *, control, 0 )," &
"27 ( BC_7, GNT0n, bidir, X, 28, 0, Z )," &
"28 ( BC_2, *, control, 0 )," &
"29 ( BC_7, REQ0n, bidir, X, 30, 0, Z )," &
"30 ( BC_2, *, control, 0 )," &
"31 ( BC_7, PCLKO, bidir, X, 32, 0, Z )," &
"32 ( BC_2, *, control, 0 )," &
"33 ( BC_7, GNT1n, bidir, X, 34, 0, Z )," &
"34 ( BC_2, *, control, 0 )," &
"35 ( BC_7, REQ1n, bidir, X, 36, 0, Z )," &
"36 ( BC_2, *, control, 0 )," &
"37 ( BC_7, AD29, bidir, X, 38, 0, Z )," &
"38 ( BC_2, *, control, 0 )," &
"39 ( BC_7, AD31, bidir, X, 40, 0, Z )," &
"40 ( BC_2, *, control, 0 )," &
"41 ( BC_7, PMEINn, bidir, X, 42, 0, Z )," &
"42 ( BC_2, *, control, 0 )," &
"43 ( BC_7, AD28, bidir, X, 44, 0, Z )," &
"44 ( BC_2, *, control, 0 )," &
"45 ( BC_4, EXTARB, input, X )," &
"46 ( BC_4, FORWARD, input, X )," &
"47 ( BC_1, PMEOUTn, output2, 1, 47, 1, Weak1 )," &
"48 ( BC_7, AD26, bidir, X, 49, 0, Z )," &
"49 ( BC_2, *, control, 0 )," &
"50 ( BC_7, AD27, bidir, X, 51, 0, Z )," &
"51 ( BC_2, *, control, 0 )," &
"52 ( BC_7, IDSEL, bidir, X, 53, 0, Z )," &
"53 ( BC_2, *, control, 0 )," &
"54 ( BC_7, CBE3n, bidir, X, 55, 0, Z )," &
"55 ( BC_2, *, control, 0 )," &
"56 ( BC_7, AD23, bidir, X, 57, 0, Z )," &
"57 ( BC_2, *, control, 0 )," &
"58 ( BC_7, AD25, bidir, X, 59, 0, Z )," &
"59 ( BC_2, *, control, 0 )," &
"60 ( BC_7, AD22, bidir, X, 61, 0, Z )," &
"61 ( BC_2, *, control, 0 )," &
"62 ( BC_7, AD24, bidir, X, 63, 0, Z )," &
"63 ( BC_2, *, control, 0 )," &
"64 ( BC_7, AD20, bidir, X, 65, 0, Z )," &
"65 ( BC_2, *, control, 0 )," &
"66 ( BC_7, AD19, bidir, X, 67, 0, Z )," &
"67 ( BC_2, *, control, 0 )," &
"68 ( BC_7, AD21, bidir, X, 69, 0, Z )," &
"69 ( BC_2, *, control, 0 )," &
"70 ( BC_7, AD16, bidir, X, 71, 0, Z )," &
"71 ( BC_2, *, control, 0 )," &
"72 ( BC_7, AD18, bidir, X, 73, 0, Z )," &
"73 ( BC_2, *, control, 0 )," &
"74 ( BC_7, CBE2n, bidir, X, 75, 0, Z )," &
"75 ( BC_2, *, control, 0 )," &
"76 ( BC_7, AD17, bidir, X, 77, 0, Z )," &
"77 ( BC_2, *, control, 0 )," &
"78 ( BC_7, TRDYn, bidir, X, 79, 0, Z )," &
"79 ( BC_2, *, control, 0 )," &
"80 ( BC_7, IRDYn, bidir, X, 81, 0, Z )," &
"81 ( BC_2, *, control, 0 )," &
"82 ( BC_7, FRAMEn, bidir, X, 83, 0, Z )," &
"83 ( BC_2, *, control, 0 )," &
"84 ( BC_7, STOPn, bidir, X, 85, 0, Z )," &
"85 ( BC_2, *, control, 0 )," &
"86 ( BC_7, LOCKn, bidir, X, 87, 0, Z )," &
"87 ( BC_2, *, control, 0 )," &
"88 ( BC_7, DEVSELn, bidir, X, 89, 0, Z )," &
"89 ( BC_2, *, control, 0 )," &
"90 ( BC_7, SERRn, bidir, X, 91, 0, Z )," &
"91 ( BC_2, *, control, 0 )," &
"92 ( BC_7, PAR, bidir, X, 93, 0, Z )," &
"93 ( BC_2, *, control, 0 )," &
"94 ( BC_7, PERRn, bidir, X, 95, 0, Z )," &
"95 ( BC_2, *, control, 0 )," &
"96 ( BC_7, AD15, bidir, X, 97, 0, Z )," &
"97 ( BC_2, *, control, 0 )," &
"98 ( BC_7, AD14, bidir, X, 99, 0, Z )," &
"99 ( BC_2, *, control, 0 )," &
"100 ( BC_7, CBE1n, bidir, X, 101, 0, Z )," &
"101 ( BC_2, *, control, 0 )," &
"102 ( BC_7, AD13, bidir, X, 103, 0, Z )," &
"103 ( BC_2, *, control, 0 )," &
"104 ( BC_7, AD9, bidir, X, 105, 0, Z )," &
"105 ( BC_2, *, control, 0 )," &
"106 ( BC_7, AD10, bidir, X, 107, 0, Z )," &
"107 ( BC_2, *, control, 0 )," &
"108 ( BC_7, AD12, bidir, X, 109, 0, Z )," &
"109 ( BC_2, *, control, 0 )," &
"110 ( BC_7, AD11, bidir, X, 111, 0, Z )," &
"111 ( BC_2, *, control, 0 )," &
"112 ( BC_7, CBE0n, bidir, X, 113, 0, Z )," &
"113 ( BC_2, *, control, 0 )," &
"114 ( BC_7, AD8, bidir, X, 115, 0, Z )," &
"115 ( BC_2, *, control, 0 )," &
"116 ( BC_7, AD7, bidir, X, 117, 0, Z )," &
"117 ( BC_2, *, control, 0 )," &
"118 ( BC_7, AD6, bidir, X, 119, 0, Z )," &
"119 ( BC_2, *, control, 0 )," &
"120 ( BC_7, AD5, bidir, X, 121, 0, Z )," &
"121 ( BC_2, *, control, 0 )," &
"122 ( BC_7, AD3, bidir, X, 123, 0, Z )," &
"123 ( BC_2, *, control, 0 )," &
"124 ( BC_7, AD4, bidir, X, 125, 0, Z )," &
"125 ( BC_2, *, control, 0 )," &
"126 ( BC_7, AD2, bidir, X, 127, 0, Z )," &
"127 ( BC_2, *, control, 0 )," &
"128 ( BC_7, AD0, bidir, X, 129, 0, Z )," &
"129 ( BC_2, *, control, 0 )," &
"130 ( BC_7, AD1, bidir, X, 131, 0, Z )," &
"131 ( BC_2, *, control, 0 )," &
"132 ( BC_3, *, internal, X)," &
"133 ( BC_3, *, internal, 0 )," &
"134 ( BC_1, EECLK, output2, X )," &
"135 ( BC_4, EERDDATA, input, X )," &
"136 ( BC_1, EEWRDATA, output2, X )," &
"137 ( BC_1, EECSn, output2, X )," &
"138 ( BC_7, BAR0ENn, bidir, X, 139, 0, Weak1 )," &
"139 ( BC_2, *, control, 0 )," &
"140 ( BC_1, WAKEOUTn, output2, 1, 140, 1, Weak1 )," &
"141 ( BC_1, PWR_OK, output2, X )," &
"142 ( BC_7, GPIO0, bidir, X, 143, 0, Weak1 )," &
"143 ( BC_2, *, control, 0 )," &
"144 ( BC_7, GPIO1, bidir, X, 145, 0, Weak1 )," &
"145 ( BC_2, *, control, 0 )," &
"146 ( BC_7, GPIO2, bidir, X, 147, 0, Weak1 )," &
"147 ( BC_2, *, control, 0 )," &
"148 ( BC_7, GPIO3, bidir, X, 149, 0, Weak1 )," &
"149 ( BC_2, *, control, 0 )";
end PEX8111BB;
