A newer version of this BSDL is available
-- ****************** (C) COPYRIGHT 2019 STMicroelectronics **************************
-- * File Name : STM32MP151_153xAA_LFBGA448.bsd *
-- * Author : STMicroelectronics www.st.com *
-- * Version : V1.0 *
-- * Date : 01-February-2019 *
-- * Description : Boundary Scan Description Language (BSDL) file for the *
-- * STM32MP151_153xAA_LFBGA448 Microcontrollers. *
-- ***********************************************************************************
-- * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS *
-- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.*
-- * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, *
-- * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE *
-- * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING *
-- * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. *
-- ***********************************************************************************
-- * This BSDL file has been syntaxed checked and validated by: *
-- * GOEPEL SyntaxChecker Version 3.1.2 *
-- ***********************************************************************************
entity STM32MP151_153xAA_LFBGA448 is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "LFBGA448_PACKAGE");
-- This section declares all the ports in the design.
port (
BOOT0 : in bit;
BOOT1 : in bit;
BOOT2 : in bit;
DDR_A0 : inout bit;
DDR_A1 : inout bit;
DDR_A2 : inout bit;
DDR_A3 : inout bit;
DDR_A4 : inout bit;
DDR_A5 : inout bit;
DDR_A6 : inout bit;
DDR_A7 : inout bit;
DDR_A8 : inout bit;
DDR_A9 : inout bit;
DDR_A10 : inout bit;
DDR_A11 : inout bit;
DDR_A12 : inout bit;
DDR_A13 : inout bit;
DDR_A14 : inout bit;
DDR_A15 : inout bit;
DDR_BA0 : inout bit;
DDR_BA1 : inout bit;
DDR_BA2 : inout bit;
DDR_CASN : inout bit;
DDR_CKE : inout bit;
DDR_CLKN : inout bit;
DDR_CLKP : inout bit;
DDR_CSN : inout bit;
DDR_DQ0 : inout bit;
DDR_DQ1 : inout bit;
DDR_DQ2 : inout bit;
DDR_DQ3 : inout bit;
DDR_DQ4 : inout bit;
DDR_DQ5 : inout bit;
DDR_DQ6 : inout bit;
DDR_DQ7 : inout bit;
DDR_DQ8 : inout bit;
DDR_DQ9 : inout bit;
DDR_DQ10 : inout bit;
DDR_DQ11 : inout bit;
DDR_DQ12 : inout bit;
DDR_DQ13 : inout bit;
DDR_DQ14 : inout bit;
DDR_DQ15 : inout bit;
DDR_DQ16 : inout bit;
DDR_DQ17 : inout bit;
DDR_DQ18 : inout bit;
DDR_DQ19 : inout bit;
DDR_DQ20 : inout bit;
DDR_DQ21 : inout bit;
DDR_DQ22 : inout bit;
DDR_DQ23 : inout bit;
DDR_DQ24 : inout bit;
DDR_DQ25 : inout bit;
DDR_DQ26 : inout bit;
DDR_DQ27 : inout bit;
DDR_DQ28 : inout bit;
DDR_DQ29 : inout bit;
DDR_DQ30 : inout bit;
DDR_DQ31 : inout bit;
DDR_DQM0 : inout bit;
DDR_DQM1 : inout bit;
DDR_DQM2 : inout bit;
DDR_DQM3 : inout bit;
DDR_DQS0N : inout bit;
DDR_DQS0P : inout bit;
DDR_DQS1N : inout bit;
DDR_DQS1P : inout bit;
DDR_DQS2N : inout bit;
DDR_DQS2P : inout bit;
DDR_DQS3N : inout bit;
DDR_DQS3P : inout bit;
DDR_DTO0 : inout bit;
DDR_DTO1 : inout bit;
DDR_ODT : inout bit;
DDR_RASN : inout bit;
DDR_RESETN : inout bit;
DDR_RET_N : linkage bit;
DDR_WEN : inout bit;
JTCK : in bit;
JTDI : in bit;
JTDO : out bit;
JTMS : in bit;
NJTRST : in bit;
NRST : in bit;
NRST_CORE : linkage bit;
PA0 : inout bit;
PA1 : inout bit;
PA2 : inout bit;
PA3 : inout bit;
PA4 : inout bit;
PA5 : inout bit;
PA6 : inout bit;
PA7 : inout bit;
PA8 : inout bit;
PA9 : inout bit;
PA10 : inout bit;
PA11 : inout bit;
PA12 : inout bit;
PA13 : inout bit;
PA14 : inout bit;
PA15 : inout bit;
PB0 : inout bit;
PB1 : inout bit;
PB2 : inout bit;
PB3 : inout bit;
PB4 : inout bit;
PB5 : inout bit;
PB6 : inout bit;
PB7 : inout bit;
PB8 : inout bit;
PB9 : inout bit;
PB10 : inout bit;
PB11 : inout bit;
PB12 : inout bit;
PB13 : inout bit;
PB14 : inout bit;
PB15 : inout bit;
PC0 : inout bit;
PC1 : inout bit;
PC2 : inout bit;
PC3 : inout bit;
PC4 : inout bit;
PC5 : inout bit;
PC6 : inout bit;
PC7 : inout bit;
PC8 : inout bit;
PC9 : inout bit;
PC10 : inout bit;
PC11 : inout bit;
PC12 : inout bit;
PC13 : inout bit;
PC14_OSC32_IN : inout bit;
PC15_OSC32_OUT : inout bit;
PD0 : inout bit;
PD1 : inout bit;
PD2 : inout bit;
PD3 : inout bit;
PD4 : inout bit;
PD5 : inout bit;
PD6 : inout bit;
PD7 : inout bit;
PD8 : inout bit;
PD9 : inout bit;
PD10 : inout bit;
PD11 : inout bit;
PD12 : inout bit;
PD13 : inout bit;
PD14 : inout bit;
PD15 : inout bit;
PDR_ON : linkage bit;
PDR_ON_CORE: linkage bit;
PE0 : inout bit;
PE1 : inout bit;
PE2 : inout bit;
PE3 : inout bit;
PE4 : inout bit;
PE5 : inout bit;
PE6 : inout bit;
PE7 : inout bit;
PE8 : inout bit;
PE9 : inout bit;
PE10 : inout bit;
PE11 : inout bit;
PE12 : inout bit;
PE13 : inout bit;
PE14 : inout bit;
PE15 : inout bit;
PF0 : inout bit;
PF1 : inout bit;
PF2 : inout bit;
PF3 : inout bit;
PF4 : inout bit;
PF5 : inout bit;
PF6 : inout bit;
PF7 : inout bit;
PF8 : inout bit;
PF9 : inout bit;
PF10 : inout bit;
PF11 : inout bit;
PF12 : inout bit;
PF13 : inout bit;
PF14 : inout bit;
PF15 : inout bit;
PG0 : inout bit;
PG1 : inout bit;
PG2 : inout bit;
PG3 : inout bit;
PG4 : inout bit;
PG5 : inout bit;
PG6 : inout bit;
PG7 : inout bit;
PG8 : inout bit;
PG9 : inout bit;
PG10 : inout bit;
PG11 : inout bit;
PG12 : inout bit;
PG13 : inout bit;
PG14 : inout bit;
PG15 : inout bit;
PH0_OSC_IN : inout bit;
PH1_OSC_OUT: inout bit;
PH2 : inout bit;
PH3 : inout bit;
PH4 : inout bit;
PH5 : inout bit;
PH6 : inout bit;
PH7 : inout bit;
PH8 : inout bit;
PH9 : inout bit;
PH10 : inout bit;
PH11 : inout bit;
PH12 : inout bit;
PH13 : inout bit;
PH14 : inout bit;
PH15 : inout bit;
PI0 : inout bit;
PI1 : inout bit;
PI2 : inout bit;
PI3 : inout bit;
PI4 : inout bit;
PI5 : inout bit;
PI6 : inout bit;
PI7 : inout bit;
PI8 : inout bit;
PI9 : inout bit;
PI10 : inout bit;
PI11 : inout bit;
PI12 : inout bit;
PI13 : inout bit;
PI14 : inout bit;
PI15 : inout bit;
PJ0 : inout bit;
PJ1 : inout bit;
PJ2 : inout bit;
PJ3 : inout bit;
PJ4 : inout bit;
PJ5 : inout bit;
PJ6 : inout bit;
PJ7 : inout bit;
PJ8 : inout bit;
PJ9 : inout bit;
PJ10 : inout bit;
PJ11 : inout bit;
PJ12 : inout bit;
PJ13 : inout bit;
PJ14 : inout bit;
PJ15 : inout bit;
PK0 : inout bit;
PK1 : inout bit;
PK2 : inout bit;
PK3 : inout bit;
PK4 : inout bit;
PK5 : inout bit;
PK6 : inout bit;
PK7 : inout bit;
PWR_LP : linkage bit;
PWR_ON : linkage bit;
PZ0 : inout bit;
PZ1 : inout bit;
PZ2 : inout bit;
PZ3 : inout bit;
PZ4 : inout bit;
PZ5 : inout bit;
PZ6 : inout bit;
PZ7 : inout bit;
VBAT : linkage bit;
VDD1V2_Unused : linkage bit_vector(0 to 1);
DNU : linkage bit_vector (0 to 5);
DDR_ZQ : linkage bit;
ANA0 : linkage bit;
ANA1 : linkage bit;
OTG_VBUS : linkage bit;
USB_DM1 : linkage bit;
USB_DM2 : linkage bit;
USB_DP1 : linkage bit;
USB_DP2 : linkage bit;
USB_RREF : linkage bit;
DDR_ATO : linkage bit;
DDR_VREF : linkage bit;
VDD3V3_USBFS: linkage bit;
VDD3V3_USBHS: linkage bit;
VDDA1V1_REG: linkage bit;
VDDA1V8_Unused : linkage bit;
VDDA1V8_REG : linkage bit;
BYPASS_REG1V8 : linkage bit;
VDDA : linkage bit;
VDD_ANA : linkage bit;
VDD_Unused : linkage bit;
VDD_OTP : linkage bit;
VDD_PLL : linkage bit;
VDD_PLL2 : linkage bit;
VREFN : linkage bit;
VREFP : linkage bit;
VDD : linkage bit_vector(0 to 9);
VDDCORE : linkage bit_vector(0 to 24);
VDDQ_DDR : linkage bit_vector(0 to 15);
VSSA : linkage bit_vector(0 to 2);
VSS : linkage bit_vector(0 to 87);
VSS_ANA : linkage bit;
VSS_PLL : linkage bit;
VSS_PLL2 : linkage bit;
VSS_USBHS: linkage bit_vector(0 to 4)
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of STM32MP151_153xAA_LFBGA448: entity is "STD_1149_1_2001";
attribute PIN_MAP of STM32MP151_153xAA_LFBGA448 : entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information is extracted from the
-- port-to-pin map file that was read in using the "read_pin_map" command.
constant LFBGA448_PACKAGE: PIN_MAP_STRING :=
"BOOT0 : N3," &
"BOOT1 : N4," &
"BOOT2 : P4," &
"DDR_A0 : K19," &
"DDR_A1 : M18," &
"DDR_A2 : J18," &
"DDR_A3 : J19," &
"DDR_A4 : T18," &
"DDR_A5 : H19," &
"DDR_A6 : U19," &
"DDR_A7 : F18," &
"DDR_A8 : U18," &
"DDR_A9 : H18," &
"DDR_A10 : N18," &
"DDR_A11 : P19," &
"DDR_A12 : N19," &
"DDR_A13 : G18," &
"DDR_A14 : P18," &
"DDR_A15 : M19," &
"DDR_BA0 : K20," &
"DDR_BA1 : R18," &
"DDR_BA2 : K18," &
"DDR_CASN : M22," &
"DDR_CKE : R19," &
"DDR_CLKN : N21," &
"DDR_CLKP : N20," &
"DDR_CSN : L18," &
"DDR_DQ0 : E21," &
"DDR_DQ1 : F21," &
"DDR_DQ2 : H21," &
"DDR_DQ3 : E20," &
"DDR_DQ4 : J21," &
"DDR_DQ5 : H20," &
"DDR_DQ6 : H22," &
"DDR_DQ7 : G19," &
"DDR_DQ8 : N22," &
"DDR_DQ9 : R21," &
"DDR_DQ10 : P21," &
"DDR_DQ11 : T20," &
"DDR_DQ12 : V20," &
"DDR_DQ13 : R20," &
"DDR_DQ14 : U21," &
"DDR_DQ15 : V21," &
"DDR_DQ16 : B21," &
"DDR_DQ17 : D21," &
"DDR_DQ18 : D22," &
"DDR_DQ19 : B20," &
"DDR_DQ20 : A20," &
"DDR_DQ21 : E22," &
"DDR_DQ22 : D20," &
"DDR_DQ23 : A21," &
"DDR_DQ24 : V22," &
"DDR_DQ25 : W20," &
"DDR_DQ26 : AB21," &
"DDR_DQ27 : AB20," &
"DDR_DQ28 : AA21," &
"DDR_DQ29 : AA20," &
"DDR_DQ30 : W22," &
"DDR_DQ31 : W21," &
"DDR_DQM0 : G20," &
"DDR_DQM1 : T21," &
"DDR_DQM2 : C22," &
"DDR_DQM3 : AA22," &
"DDR_DQS0N : G21," &
"DDR_DQS0P : G22," &
"DDR_DQS1N : R22," &
"DDR_DQS1P : T22," &
"DDR_DQS2N : B22," &
"DDR_DQS2P : C21," &
"DDR_DQS3N : Y22," &
"DDR_DQS3P : Y21," &
"DDR_DTO0 : L22," &
"DDR_DTO1 : K21," &
"DDR_ODT : L21," &
"DDR_RASN : M20," &
"DDR_RESETN : F19," &
"DDR_RET_N : 189," &
"DDR_WEN : M21," &
"DDR_ATO : AA19," &
"DDR_VREF : AB19," &
"JTCK : D17," &
"JTDI : D16," &
"JTDO : E16," &
"JTMS : E17," &
"NJTRST : E15," &
"NRST : R2," &
"NRST_CORE : R1," &
"PA0 : AA3," &
"PA1 : V4," &
"PA2 : AB2," &
"PA3 : T4," &
"PA4 : V6," &
"PA5 : U5," &
"PA6 : W9," &
"PA7 : Y9," &
"PA8 : B13," &
"PA9 : A11," &
"PA10 : Y17," &
"PA11 : Y16," &
"PA12 : W16," &
"PA13 : W3," &
"PA14 : R3," &
"PA15 : E11," &
"PB0 : AB5," &
"PB1 : AA5," &
"PB2 : V13," &
"PB3 : A12," &
"PB4 : C13," &
"PB5 : AA8," &
"PB6 : W13," &
"PB7 : F11," &
"PB8 : AB8," &
"PB9 : F12," &
"PB10 : V9," &
"PB11 : Y5," &
"PB12 : AA7," &
"PB13 : V10," &
"PB14 : A13," &
"PB15 : B12," &
"PC0 : U10," &
"PC1 : AB3," &
"PC2 : Y1," &
"PC3 : U3," &
"PC4 : AB6," &
"PC5 : AA6," &
"PC6 : E13," &
"PC7 : D13," &
"PC8 : E14," &
"PC9 : D14," &
"PC10 : F14," &
"PC11 : D15," &
"PC12 : E12," &
"PC13 : N2," &
"PC14_OSC32_IN : P1," &
"PC15_OSC32_OUT : P2," &
"PD0 : C10," &
"PD1 : B10," &
"PD2 : D12," &
"PD3 : B11," &
"PD4 : C9," &
"PD5 : A9," &
"PD6 : L3," &
"PD7 : F10," &
"PD8 : M1," &
"PD9 : M2," &
"PD10 : A8," &
"PD11 : AB9," &
"PD12 : W12," &
"PD13 : V14," &
"PD14 : M3," &
"PD15 : L1," &
"PDR_ON : V2," &
"PDR_ON_CORE: U2," &
"PE0 : C5," &
"PE1 : D7," &
"PE2 : Y2," &
"PE3 : A10," &
"PE4 : F15," &
"PE5 : C12," &
"PE6 : E9," &
"PE7 : W10," &
"PE8 : Y12," &
"PE9 : W11," &
"PE10 : W14," &
"PE11 : D5," &
"PE12 : E4," &
"PE13 : A4," &
"PE14 : B4," &
"PE15 : C4," &
"PF0 : E10," &
"PF1 : B9," &
"PF2 : F13," &
"PF3 : V3," &
"PF4 : F9," &
"PF5 : D9," &
"PF6 : AA11," &
"PF7 : AA10," &
"PF8 : AB10," &
"PF9 : AB11," &
"PF10 : V12," &
"PF11 : W8," &
"PF12 : V8," &
"PF13 : W7," &
"PF14 : V7," &
"PF15 : W6," &
"PG0 : W5," &
"PG1 : Y4," &
"PG2 : W4," &
"PG3 : U4," &
"PG4 : AB4," &
"PG5 : U8," &
"PG6 : D11," &
"PG7 : Y11," &
"PG8 : Y8," &
"PG9 : W15," &
"PG10 : AA9," &
"PG11 : U11," &
"PG12 : J4," &
"PG13 : AA1," &
"PG14 : AA2," &
"PG15 : D10," &
"PH0_OSC_IN : T1," &
"PH1_OSC_OUT: T2," &
"PH2 : AB7," &
"PH3 : Y6," &
"PH4 : A3," &
"PH5 : A2," &
"PH6 : V11," &
"PH7 : W2," &
"PH8 : D6," &
"PH9 : E6," &
"PH10 : B1," &
"PH11 : B3," &
"PH12 : F5," &
"PH13 : D3," &
"PH14 : C2," &
"PH15 : C1," &
"PI0 : D1," &
"PI1 : E2," &
"PI2 : E1," &
"PI3 : E3," &
"PI4 : J6," &
"PI5 : F2," &
"PI6 : G5," &
"PI7 : F1," &
"PI8 : N1," &
"PI9 : J5," &
"PI10 : W1," &
"PI11 : T3," &
"PI12 : H2," &
"PI13 : H1," &
"PI14 : D2," &
"PI15 : F3," &
"PJ0 : J2," &
"PJ1 : L6," &
"PJ2 : K4," &
"PJ3 : J1," &
"PJ4 : K2," &
"PJ5 : K1," &
"PJ6 : L5," &
"PJ7 : L4," &
"PJ8 : H6," &
"PJ9 : L2," &
"PJ10 : J3," &
"PJ11 : K6," &
"PJ12 : B8," &
"PJ13 : A7," &
"PJ14 : B7," &
"PJ15 : C7," &
"PK0 : D8," &
"PK1 : E7," &
"PK2 : E8," &
"PK3 : B6," &
"PK4 : A6," &
"PK5 : C6," &
"PK6 : A5," &
"PK7 : B5," &
"PWR_LP : U1," &
"PWR_ON : V1," &
"PZ0 : G2," &
"PZ1 : H5," &
"PZ2 : K5," &
"PZ3 : F4," &
"PZ4 : G1," &
"PZ5 : H4," &
"PZ6 : G3," &
"PZ7 : H3," &
"VBAT : M4," &
"DNU : (A15, B15, A17, B17, A16, B16), " &
"DDR_ZQ : K22," &
"ANA0 : R4," &
"ANA1 : T5," &
"OTG_VBUS : V15," &
"USB_DM1 : AB15," &
"USB_DM2 : AA14," &
"USB_DP1 : AA15," &
"USB_DP2 : AB14," &
"USB_RREF : AA17," &
"VDD1V2_Unused : (B18, A18)," &
"VDD3V3_USBFS : AB16," &
"VDD3V3_USBHS : AB13," &
"VDDA1V1_REG : AB17," &
"VDDA1V8_Unused : B14," &
"VDDA1V8_REG : AB12," &
"BYPASS_REG1V8 : AA12," &
"VDDCORE : (H9, H11, H13, H15, J8, J10, J12, J14, K9, K11, K13, K15, L8, L10, L12, L14, M11, M13, M15, N12, N14, P13, P15, R14, T15)," &
"VDDQ_DDR : (E18, F17, G16, H17, J16, K17, L16, M17, N16, P17, R16, T17, U16, V17, W18, Y19)," &
"VDD : (M9, N8, N10, P9, P11, R10, R12, T13, U12, U14)," &
"VDD_ANA : N5," &
"VDDA : R5," &
"VDD_Unused : A14," &
"VDD_OTP : U9," &
"VDD_PLL : M6," &
"VDD_PLL2 : D18," &
"VREFN : N6," &
"VREFP : P6," &
"VSSA : (R6, T6, U6)," &
"VSS : (A1, A19, A22, B2, B19, C3, C8, C11, C19, C20, D4, E5, E19, F6, F7, F8, F16, F20, G4, G6, G8, G10, G12, G14, G17, H7, J9, J11, J13, J17, J20, K3, K7, K10, K12, K14, L9, L11, L13, L17, L19, L20, M7, M10, M12, M14, N9, N11, N13, N17, P3, P7, P10, P12, P14, P20, R8, R17, T7, T9, T11, T19, U7, U13, U15, U17, U20, V5, V16, V18, V19, W17, W19, Y3, Y7, Y10, Y18, Y20, AA4, AA18, AB1, AB18, AB22, C14, C15, C16, C17, C18)," &
"VSS_ANA : P5," &
"VSS_PLL : M5," &
"VSS_PLL2 : D19," &
"VSS_USBHS : (Y13, Y14, Y15, AA13, AA16)" ;
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of JTCK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of JTDI : signal is true;
attribute TAP_SCAN_MODE of JTMS : signal is true;
attribute TAP_SCAN_OUT of JTDO : signal is true;
attribute TAP_SCAN_RESET of NJTRST : signal is true;
-- Specifies the compliance enable patterns for the design. It lists a set of
-- design ports and the values that they should be set to, in order to enable
-- compliance to IEEE Std 1149.1
attribute COMPLIANCE_PATTERNS of STM32MP151_153xAA_LFBGA448: entity is
"(NRST) (0)";
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of STM32MP151_153xAA_LFBGA448: entity is 5;
-- Specifies the boundary-scan instructions implemented in the design and their opcodes.
attribute INSTRUCTION_OPCODE of STM32MP151_153xAA_LFBGA448: entity is
"BYPASS (11111)," &
"EXTEST (00000)," &
"SAMPLE (00010)," &
"PRELOAD (00010)," &
"IDCODE (00001)";
-- Specifies the bit pattern that is loaded into the instruction register when the TAP controller
-- passes through the Capture-IR state. The standard mandates that the two LSBs must be "01". The
-- remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of STM32MP151_153xAA_LFBGA448: entity is "XXX01";
-- Specifies the bit pattern that is loaded into the DEVICE_ID register during the IDCODE
-- instruction when the TAP controller passes through the Capture-DR state.
attribute IDCODE_REGISTER of STM32MP151_153xAA_LFBGA448: entity is
"XXXX" & -- 4-bit version number
"0110010100000000" & -- 16-bit part number
"00000100000" & -- 11-bit identity of the manufacturer
"1"; -- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI and TDO for each implemented
-- instruction.
attribute REGISTER_ACCESS of STM32MP151_153xAA_LFBGA448: entity is
"BYPASS (BYPASS)," &
"BOUNDARY (EXTEST, SAMPLE, PRELOAD)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of STM32MP151_153xAA_LFBGA448: entity is 753;
-- Considering DAP TAP bypass FF, BOUNDARY_LENGTH is 754
-- The following list specifies the characteristics of each cell in the boundary scan register from
-- TDI to TDO. The following is a description of the label fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not have a port name.
-- function: Is the function of the cell as defined by the standard. Is one of input, output2,
-- output3, bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be loaded with for safe operation
-- when the software might otherwise choose a random value.
-- ccell : The control cell number. Specifies the control cell that drives the output enable
-- for this port.
-- disval : Specifies the value that is loaded into the control cell to disable the output
-- enable for the corresponding port.
-- rslt : Resulting state. Shows the state of the driver when it is disabled.
attribute BOUNDARY_REGISTER of STM32MP151_153xAA_LFBGA448: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"752 (BC_1, *, CONTROL, 1), " &
"751 (BC_1, PH4, OUTPUT3, X, 752, 1, Z), " &
"750 (BC_4, PH4, INPUT, X), " &
"749 (BC_1, *, CONTROL, 1), " &
"748 (BC_1, PE15, OUTPUT3, X, 749, 1, Z), " &
"747 (BC_4, PE15, INPUT, X), " &
"746 (BC_1, *, CONTROL, 1), " &
"745 (BC_1, PE14, OUTPUT3, X, 746, 1, Z), " &
"744 (BC_4, PE14, INPUT, X), " &
"743 (BC_1, *, CONTROL, 1), " &
"742 (BC_1, PH11, OUTPUT3, X, 743, 1, Z), " &
"741 (BC_4, PH11, INPUT, X), " &
"740 (BC_1, *, CONTROL, 1), " &
"739 (BC_1, PE13, OUTPUT3, X, 740, 1, Z), " &
"738 (BC_4, PE13, INPUT, X), " &
"737 (BC_1, *, CONTROL, 1), " &
"736 (BC_1, PE12, OUTPUT3, X, 737, 1, Z), " &
"735 (BC_4, PE12, INPUT, X), " &
"734 (BC_1, *, CONTROL, 1), " &
"733 (BC_1, PE11, OUTPUT3, X, 734, 1, Z), " &
"732 (BC_4, PE11, INPUT, X), " &
"731 (BC_1, *, CONTROL, 1), " &
"730 (BC_1, PH9, OUTPUT3, X, 731, 1, Z), " &
"729 (BC_4, PH9, INPUT, X), " &
"728 (BC_1, *, CONTROL, 1), " &
"727 (BC_1, PH8, OUTPUT3, X, 728, 1, Z), " &
"726 (BC_4, PH8, INPUT, X), " &
"725 (BC_1, *, CONTROL, 1), " &
"724 (BC_1, PE1, OUTPUT3, X, 725, 1, Z), " &
"723 (BC_4, PE1, INPUT, X), " &
"722 (BC_1, *, CONTROL, 1), " &
"721 (BC_1, PE0, OUTPUT3, X, 722, 1, Z), " &
"720 (BC_4, PE0, INPUT, X), " &
"719 (BC_1, *, CONTROL, 1), " &
"718 (BC_1, PK7, OUTPUT3, X, 719, 1, Z), " &
"717 (BC_4, PK7, INPUT, X), " &
"716 (BC_1, *, CONTROL, 1), " &
"715 (BC_1, PK6, OUTPUT3, X, 716, 1, Z), " &
"714 (BC_4, PK6, INPUT, X), " &
"713 (BC_1, *, CONTROL, 1), " &
"712 (BC_1, PK5, OUTPUT3, X, 713, 1, Z), " &
"711 (BC_4, PK5, INPUT, X), " &
"710 (BC_1, *, CONTROL, 1), " &
"709 (BC_1, PK4, OUTPUT3, X, 710, 1, Z), " &
"708 (BC_4, PK4, INPUT, X), " &
"707 (BC_1, *, CONTROL, 1), " &
"706 (BC_1, PK3, OUTPUT3, X, 707, 1, Z), " &
"705 (BC_4, PK3, INPUT, X), " &
"704 (BC_1, *, CONTROL, 1), " &
"703 (BC_1, PK2, OUTPUT3, X, 704, 1, Z), " &
"702 (BC_4, PK2, INPUT, X), " &
"701 (BC_1, *, CONTROL, 1), " &
"700 (BC_1, PK1, OUTPUT3, X, 701, 1, Z), " &
"699 (BC_4, PK1, INPUT, X), " &
"698 (BC_1, *, CONTROL, 1), " &
"697 (BC_1, PK0, OUTPUT3, X, 698, 1, Z), " &
"696 (BC_4, PK0, INPUT, X), " &
"695 (BC_1, *, CONTROL, 1), " &
"694 (BC_1, PJ15, OUTPUT3, X, 695, 1, Z), " &
"693 (BC_4, PJ15, INPUT, X), " &
"692 (BC_1, *, CONTROL, 1), " &
"691 (BC_1, PJ14, OUTPUT3, X, 692, 1, Z), " &
"690 (BC_4, PJ14, INPUT, X), " &
"689 (BC_1, *, CONTROL, 1), " &
"688 (BC_1, PJ13, OUTPUT3, X, 689, 1, Z), " &
"687 (BC_4, PJ13, INPUT, X), " &
"686 (BC_1, *, CONTROL, 1), " &
"685 (BC_1, PJ12, OUTPUT3, X, 686, 1, Z), " &
"684 (BC_4, PJ12, INPUT, X), " &
"683 (BC_1, *, CONTROL, 1), " &
"682 (BC_1, PD10, OUTPUT3, X, 683, 1, Z), " &
"681 (BC_4, PD10, INPUT, X), " &
"680 (BC_1, *, CONTROL, 1), " &
"679 (BC_1, PF5, OUTPUT3, X, 680, 1, Z), " &
"678 (BC_4, PF5, INPUT, X), " &
"677 (BC_1, *, CONTROL, 1), " &
"676 (BC_1, PD4, OUTPUT3, X, 677, 1, Z), " &
"675 (BC_4, PD4, INPUT, X), " &
"674 (BC_1, *, CONTROL, 1), " &
"673 (BC_1, PF4, OUTPUT3, X, 674, 1, Z), " &
"672 (BC_4, PF4, INPUT, X), " &
"671 (BC_1, *, CONTROL, 1), " &
"670 (BC_1, PF1, OUTPUT3, X, 671, 1, Z), " &
"669 (BC_4, PF1, INPUT, X), " &
"668 (BC_1, *, CONTROL, 1), " &
"667 (BC_1, PF0, OUTPUT3, X, 668, 1, Z), " &
"666 (BC_4, PF0, INPUT, X), " &
"665 (BC_1, *, CONTROL, 1), " &
"664 (BC_1, PE6, OUTPUT3, X, 665, 1, Z), " &
"663 (BC_4, PE6, INPUT, X), " &
"662 (BC_1, *, CONTROL, 1), " &
"661 (BC_1, PG15, OUTPUT3, X, 662, 1, Z), " &
"660 (BC_4, PG15, INPUT, X), " &
"659 (BC_1, *, CONTROL, 1), " &
"658 (BC_1, PD7, OUTPUT3, X, 659, 1, Z), " &
"657 (BC_4, PD7, INPUT, X), " &
"656 (BC_1, *, CONTROL, 1), " &
"655 (BC_1, PD5, OUTPUT3, X, 656, 1, Z), " &
"654 (BC_4, PD5, INPUT, X), " &
"653 (BC_1, *, CONTROL, 1), " &
"652 (BC_1, PE3, OUTPUT3, X, 653, 1, Z), " &
"651 (BC_4, PE3, INPUT, X), " &
"650 (BC_1, *, CONTROL, 1), " &
"649 (BC_1, PD0, OUTPUT3, X, 650, 1, Z), " &
"648 (BC_4, PD0, INPUT, X), " &
"647 (BC_1, *, CONTROL, 1), " &
"646 (BC_1, PD1, OUTPUT3, X, 647, 1, Z), " &
"645 (BC_4, PD1, INPUT, X), " &
"644 (BC_1, *, CONTROL, 1), " &
"643 (BC_1, PB7, OUTPUT3, X, 644, 1, Z), " &
"642 (BC_4, PB7, INPUT, X), " &
"641 (BC_1, *, CONTROL, 1), " &
"640 (BC_1, PA9, OUTPUT3, X, 641, 1, Z), " &
"639 (BC_4, PA9, INPUT, X), " &
"638 (BC_1, *, CONTROL, 1), " &
"637 (BC_1, PA15, OUTPUT3, X, 638, 1, Z), " &
"636 (BC_4, PA15, INPUT, X), " &
"635 (BC_1, *, CONTROL, 1), " &
"634 (BC_1, PB9, OUTPUT3, X, 635, 1, Z), " &
"633 (BC_4, PB9, INPUT, X), " &
"632 (BC_1, *, CONTROL, 1), " &
"631 (BC_1, PD3, OUTPUT3, X, 632, 1, Z), " &
"630 (BC_4, PD3, INPUT, X), " &
"629 (BC_1, *, CONTROL, 1), " &
"628 (BC_1, PG6, OUTPUT3, X, 629, 1, Z), " &
"627 (BC_4, PG6, INPUT, X), " &
"626 (BC_1, *, CONTROL, 1), " &
"625 (BC_1, PB3, OUTPUT3, X, 626, 1, Z), " &
"624 (BC_4, PB3, INPUT, X), " &
"623 (BC_1, *, CONTROL, 1), " &
"622 (BC_1, PE5, OUTPUT3, X, 623, 1, Z), " &
"621 (BC_4, PE5, INPUT, X), " &
"620 (BC_1, *, CONTROL, 1), " &
"619 (BC_1, PB15, OUTPUT3, X, 620, 1, Z), " &
"618 (BC_4, PB15, INPUT, X), " &
"617 (BC_1, *, CONTROL, 1), " &
"616 (BC_1, PC12, OUTPUT3, X, 617, 1, Z), " &
"615 (BC_4, PC12, INPUT, X), " &
"614 (BC_1, *, CONTROL, 1), " &
"613 (BC_1, PB14, OUTPUT3, X, 614, 1, Z), " &
"612 (BC_4, PB14, INPUT, X), " &
"611 (BC_1, *, CONTROL, 1), " &
"610 (BC_1, PA8, OUTPUT3, X, 611, 1, Z), " &
"609 (BC_4, PA8, INPUT, X), " &
"608 (BC_1, *, CONTROL, 1), " &
"607 (BC_1, PD2, OUTPUT3, X, 608, 1, Z), " &
"606 (BC_4, PD2, INPUT, X), " &
"605 (BC_1, *, CONTROL, 1), " &
"604 (BC_1, PF2, OUTPUT3, X, 605, 1, Z), " &
"603 (BC_4, PF2, INPUT, X), " &
"602 (BC_1, *, CONTROL, 1), " &
"601 (BC_1, PC6, OUTPUT3, X, 602, 1, Z), " &
"600 (BC_4, PC6, INPUT, X), " &
"599 (BC_1, *, CONTROL, 1), " &
"598 (BC_1, PC7, OUTPUT3, X, 599, 1, Z), " &
"597 (BC_4, PC7, INPUT, X), " &
"596 (BC_1, *, CONTROL, 1), " &
"595 (BC_1, PC9, OUTPUT3, X, 596, 1, Z), " &
"594 (BC_4, PC9, INPUT, X), " &
"593 (BC_1, *, CONTROL, 1), " &
"592 (BC_1, PB4, OUTPUT3, X, 593, 1, Z), " &
"591 (BC_4, PB4, INPUT, X), " &
"590 (BC_1, *, CONTROL, 1), " &
"589 (BC_1, PC10, OUTPUT3, X, 590, 1, Z), " &
"588 (BC_4, PC10, INPUT, X), " &
"587 (BC_1, *, CONTROL, 1), " &
"586 (BC_1, PC8, OUTPUT3, X, 587, 1, Z), " &
"585 (BC_4, PC8, INPUT, X), " &
"584 (BC_1, *, CONTROL, 1), " &
"583 (BC_1, PE4, OUTPUT3, X, 584, 1, Z), " &
"582 (BC_4, PE4, INPUT, X), " &
"581 (BC_1, *, CONTROL, 1), " &
"580 (BC_1, PC11, OUTPUT3, X, 581, 1, Z), " &
"579 (BC_4, PC11, INPUT, X), " &
"578 (BC_1, *, CONTROL, 1), " &
"577 (BC_1, DDR_DQ20, OUTPUT3, X, 578, 1, Z), " &
"576 (BC_4, DDR_DQ20, INPUT, X), " &
"575 (BC_1, *, CONTROL, 1), " &
"574 (BC_1, DDR_DQ19, OUTPUT3, X, 575, 1, Z), " &
"573 (BC_4, DDR_DQ19, INPUT, X), " &
"572 (BC_1, *, CONTROL, 1), " &
"571 (BC_1, DDR_DQ23, OUTPUT3, X, 572, 1, Z), " &
"570 (BC_4, DDR_DQ23, INPUT, X), " &
"569 (BC_1, *, CONTROL, 1), " &
"568 (BC_1, DDR_DQ16, OUTPUT3, X, 569, 1, Z), " &
"567 (BC_4, DDR_DQ16, INPUT, X), " &
"566 (BC_1, *, CONTROL, 1), " &
"565 (BC_1, DDR_DQM2, OUTPUT3, X, 566, 1, Z), " &
"564 (BC_4, DDR_DQM2, INPUT, X), " &
"563 (BC_1, *, CONTROL, 1), " &
"562 (BC_1, DDR_DQS2N, OUTPUT3, X, 563, 1, Z), " &
"561 (BC_4, DDR_DQS2N, INPUT, X), " &
"560 (BC_1, *, CONTROL, 1), " &
"559 (BC_1, DDR_DQS2P, OUTPUT3, X, 560, 1, Z), " &
"558 (BC_4, DDR_DQS2P, INPUT, X), " &
"557 (BC_1, *, CONTROL, 1), " &
"556 (BC_1, DDR_DQ18, OUTPUT3, X, 557, 1, Z), " &
"555 (BC_4, DDR_DQ18, INPUT, X), " &
"554 (BC_1, *, CONTROL, 1), " &
"553 (BC_1, DDR_DQ17, OUTPUT3, X, 554, 1, Z), " &
"552 (BC_4, DDR_DQ17, INPUT, X), " &
"551 (BC_1, *, CONTROL, 1), " &
"550 (BC_1, DDR_DQ22, OUTPUT3, X, 551, 1, Z), " &
"549 (BC_4, DDR_DQ22, INPUT, X), " &
"548 (BC_1, *, CONTROL, 1), " &
"547 (BC_1, DDR_DQ21, OUTPUT3, X, 548, 1, Z), " &
"546 (BC_4, DDR_DQ21, INPUT, X), " &
"545 (BC_1, *, CONTROL, 1), " &
"544 (BC_1, DDR_DQ3, OUTPUT3, X, 545, 1, Z), " &
"543 (BC_4, DDR_DQ3, INPUT, X), " &
"542 (BC_1, *, CONTROL, 1), " &
"541 (BC_1, DDR_DQ0, OUTPUT3, X, 542, 1, Z), " &
"540 (BC_4, DDR_DQ0, INPUT, X), " &
"539 (BC_1, *, CONTROL, 1), " &
"538 (BC_1, DDR_DQ1, OUTPUT3, X, 539, 1, Z), " &
"537 (BC_4, DDR_DQ1, INPUT, X), " &
"536 (BC_1, *, CONTROL, 1), " &
"535 (BC_1, DDR_DQ7, OUTPUT3, X, 536, 1, Z), " &
"534 (BC_4, DDR_DQ7, INPUT, X), " &
"533 (BC_1, *, CONTROL, 1), " &
"532 (BC_1, DDR_DQM0, OUTPUT3, X, 533, 1, Z), " &
"531 (BC_4, DDR_DQM0, INPUT, X), " &
"530 (BC_1, *, CONTROL, 1), " &
"529 (BC_1, DDR_DQS0N, OUTPUT3, X, 530, 1, Z), " &
"528 (BC_4, DDR_DQS0N, INPUT, X), " &
"527 (BC_1, *, CONTROL, 1), " &
"526 (BC_1, DDR_DQS0P, OUTPUT3, X, 527, 1, Z), " &
"525 (BC_4, DDR_DQS0P, INPUT, X), " &
"524 (BC_1, *, CONTROL, 1), " &
"523 (BC_1, DDR_DQ6, OUTPUT3, X, 524, 1, Z), " &
"522 (BC_4, DDR_DQ6, INPUT, X), " &
"521 (BC_1, *, CONTROL, 1), " &
"520 (BC_1, DDR_DQ2, OUTPUT3, X, 521, 1, Z), " &
"519 (BC_4, DDR_DQ2, INPUT, X), " &
"518 (BC_1, *, CONTROL, 1), " &
"517 (BC_1, DDR_DQ5, OUTPUT3, X, 518, 1, Z), " &
"516 (BC_4, DDR_DQ5, INPUT, X), " &
"515 (BC_1, *, CONTROL, 1), " &
"514 (BC_1, DDR_DQ4, OUTPUT3, X, 515, 1, Z), " &
"513 (BC_4, DDR_DQ4, INPUT, X), " &
"512 (BC_1, *, CONTROL, 1), " &
"511 (BC_1, DDR_A9, OUTPUT3, X, 512, 1, Z), " &
"510 (BC_4, DDR_A9, INPUT, X), " &
"509 (BC_1, *, CONTROL, 1), " &
"508 (BC_1, DDR_A7, OUTPUT3, X, 509, 1, Z), " &
"507 (BC_4, DDR_A7, INPUT, X), " &
"506 (BC_1, *, CONTROL, 1), " &
"505 (BC_1, DDR_A5, OUTPUT3, X, 506, 1, Z), " &
"504 (BC_4, DDR_A5, INPUT, X), " &
"503 (BC_1, *, CONTROL, 1), " &
"502 (BC_1, DDR_RESETN, OUTPUT3, X, 503, 1, Z), " &
"501 (BC_4, DDR_RESETN, INPUT, X), " &
"500 (BC_1, *, CONTROL, 1), " &
"499 (BC_1, DDR_A3, OUTPUT3, X, 500, 1, Z), " &
"498 (BC_4, DDR_A3, INPUT, X), " &
"497 (BC_1, *, CONTROL, 1), " &
"496 (BC_1, DDR_A2, OUTPUT3, X, 497, 1, Z), " &
"495 (BC_4, DDR_A2, INPUT, X), " &
"494 (BC_1, *, CONTROL, 1), " &
"493 (BC_1, DDR_A13, OUTPUT3, X, 494, 1, Z), " &
"492 (BC_4, DDR_A13, INPUT, X), " &
"491 (BC_1, *, CONTROL, 1), " &
"490 (BC_1, DDR_BA0, OUTPUT3, X, 491, 1, Z), " &
"489 (BC_4, DDR_BA0, INPUT, X), " &
"488 (BC_1, *, CONTROL, 1), " &
"487 (BC_1, DDR_A0, OUTPUT3, X, 488, 1, Z), " &
"486 (BC_4, DDR_A0, INPUT, X), " &
"485 (BC_1, *, CONTROL, 1), " &
"484 (BC_1, DDR_BA2, OUTPUT3, X, 485, 1, Z), " &
"483 (BC_4, DDR_BA2, INPUT, X), " &
"482 (BC_1, *, CONTROL, 1), " &
"481 (BC_1, DDR_ODT, OUTPUT3, X, 482, 1, Z), " &
"480 (BC_4, DDR_ODT, INPUT, X), " &
"479 (BC_1, *, CONTROL, 1), " &
"478 (BC_1, DDR_CSN, OUTPUT3, X, 479, 1, Z), " &
"477 (BC_4, DDR_CSN, INPUT, X), " &
"476 (BC_1, *, CONTROL, 1), " &
"475 (BC_1, DDR_A15, OUTPUT3, X, 476, 1, Z), " &
"474 (BC_4, DDR_A15, INPUT, X), " &
"473 (BC_1, *, CONTROL, 1), " &
"472 (BC_1, DDR_DTO1, OUTPUT3, X, 473, 1, Z), " &
"471 (BC_4, DDR_DTO1, INPUT, X), " &
"470 (BC_1, *, CONTROL, 1), " &
"469 (BC_1, DDR_DTO0, OUTPUT3, X, 470, 1, Z), " &
"468 (BC_4, DDR_DTO0, INPUT, X), " &
"467 (BC_1, *, CONTROL, 1), " &
"466 (BC_1, DDR_CLKN, OUTPUT3, X, 467, 1, Z), " &
"465 (BC_4, DDR_CLKN, INPUT, X), " &
"464 (BC_1, *, CONTROL, 1), " &
"463 (BC_1, DDR_CLKP, OUTPUT3, X, 464, 1, Z), " &
"462 (BC_4, DDR_CLKP, INPUT, X), " &
"461 (BC_1, *, CONTROL, 1), " &
"460 (BC_1, DDR_RASN, OUTPUT3, X, 461, 1, Z), " &
"459 (BC_4, DDR_RASN, INPUT, X), " &
"458 (BC_1, *, CONTROL, 1), " &
"457 (BC_1, DDR_WEN, OUTPUT3, X, 458, 1, Z), " &
"456 (BC_4, DDR_WEN, INPUT, X), " &
"455 (BC_1, *, CONTROL, 1), " &
"454 (BC_1, DDR_CASN, OUTPUT3, X, 455, 1, Z), " &
"453 (BC_4, DDR_CASN, INPUT, X), " &
"452 (BC_1, *, CONTROL, 1), " &
"451 (BC_1, DDR_A1, OUTPUT3, X, 452, 1, Z), " &
"450 (BC_4, DDR_A1, INPUT, X), " &
"449 (BC_1, *, CONTROL, 1), " &
"448 (BC_1, DDR_A12, OUTPUT3, X, 449, 1, Z), " &
"447 (BC_4, DDR_A12, INPUT, X), " &
"446 (BC_1, *, CONTROL, 1), " &
"445 (BC_1, DDR_A10, OUTPUT3, X, 446, 1, Z), " &
"444 (BC_4, DDR_A10, INPUT, X), " &
"443 (BC_1, *, CONTROL, 1), " &
"442 (BC_1, DDR_A11, OUTPUT3, X, 443, 1, Z), " &
"441 (BC_4, DDR_A11, INPUT, X), " &
"440 (BC_1, *, CONTROL, 1), " &
"439 (BC_1, DDR_A14, OUTPUT3, X, 440, 1, Z), " &
"438 (BC_4, DDR_A14, INPUT, X), " &
"437 (BC_1, *, CONTROL, 1), " &
"436 (BC_1, DDR_BA1, OUTPUT3, X, 437, 1, Z), " &
"435 (BC_4, DDR_BA1, INPUT, X), " &
"434 (BC_1, *, CONTROL, 1), " &
"433 (BC_1, DDR_CKE, OUTPUT3, X, 434, 1, Z), " &
"432 (BC_4, DDR_CKE, INPUT, X), " &
"431 (BC_1, *, CONTROL, 1), " &
"430 (BC_1, DDR_A4, OUTPUT3, X, 431, 1, Z), " &
"429 (BC_4, DDR_A4, INPUT, X), " &
"428 (BC_1, *, CONTROL, 1), " &
"427 (BC_1, DDR_A8, OUTPUT3, X, 428, 1, Z), " &
"426 (BC_4, DDR_A8, INPUT, X), " &
"425 (BC_1, *, CONTROL, 1), " &
"424 (BC_1, DDR_A6, OUTPUT3, X, 425, 1, Z), " &
"423 (BC_4, DDR_A6, INPUT, X), " &
"422 (BC_1, *, CONTROL, 1), " &
"421 (BC_1, DDR_DQ8, OUTPUT3, X, 422, 1, Z), " &
"420 (BC_4, DDR_DQ8, INPUT, X), " &
"419 (BC_1, *, CONTROL, 1), " &
"418 (BC_1, DDR_DQ10, OUTPUT3, X, 419, 1, Z), " &
"417 (BC_4, DDR_DQ10, INPUT, X), " &
"416 (BC_1, *, CONTROL, 1), " &
"415 (BC_1, DDR_DQ9, OUTPUT3, X, 416, 1, Z), " &
"414 (BC_4, DDR_DQ9, INPUT, X), " &
"413 (BC_1, *, CONTROL, 1), " &
"412 (BC_1, DDR_DQ13, OUTPUT3, X, 413, 1, Z), " &
"411 (BC_4, DDR_DQ13, INPUT, X), " &
"410 (BC_1, *, CONTROL, 1), " &
"409 (BC_1, DDR_DQM1, OUTPUT3, X, 410, 1, Z), " &
"408 (BC_4, DDR_DQM1, INPUT, X), " &
"407 (BC_1, *, CONTROL, 1), " &
"406 (BC_1, DDR_DQS1N, OUTPUT3, X, 407, 1, Z), " &
"405 (BC_4, DDR_DQS1N, INPUT, X), " &
"404 (BC_1, *, CONTROL, 1), " &
"403 (BC_1, DDR_DQS1P, OUTPUT3, X, 404, 1, Z), " &
"402 (BC_4, DDR_DQS1P, INPUT, X), " &
"401 (BC_1, *, CONTROL, 1), " &
"400 (BC_1, DDR_DQ11, OUTPUT3, X, 401, 1, Z), " &
"399 (BC_4, DDR_DQ11, INPUT, X), " &
"398 (BC_1, *, CONTROL, 1), " &
"397 (BC_1, DDR_DQ14, OUTPUT3, X, 398, 1, Z), " &
"396 (BC_4, DDR_DQ14, INPUT, X), " &
"395 (BC_1, *, CONTROL, 1), " &
"394 (BC_1, DDR_DQ15, OUTPUT3, X, 395, 1, Z), " &
"393 (BC_4, DDR_DQ15, INPUT, X), " &
"392 (BC_1, *, CONTROL, 1), " &
"391 (BC_1, DDR_DQ12, OUTPUT3, X, 392, 1, Z), " &
"390 (BC_4, DDR_DQ12, INPUT, X), " &
"389 (BC_1, *, CONTROL, 1), " &
"388 (BC_1, DDR_DQ24, OUTPUT3, X, 389, 1, Z), " &
"387 (BC_4, DDR_DQ24, INPUT, X), " &
"386 (BC_1, *, CONTROL, 1), " &
"385 (BC_1, DDR_DQ30, OUTPUT3, X, 386, 1, Z), " &
"384 (BC_4, DDR_DQ30, INPUT, X), " &
"383 (BC_1, *, CONTROL, 1), " &
"382 (BC_1, DDR_DQ31, OUTPUT3, X, 383, 1, Z), " &
"381 (BC_4, DDR_DQ31, INPUT, X), " &
"380 (BC_1, *, CONTROL, 1), " &
"379 (BC_1, DDR_DQM3, OUTPUT3, X, 380, 1, Z), " &
"378 (BC_4, DDR_DQM3, INPUT, X), " &
"377 (BC_1, *, CONTROL, 1), " &
"376 (BC_1, DDR_DQS3N, OUTPUT3, X, 377, 1, Z), " &
"375 (BC_4, DDR_DQS3N, INPUT, X), " &
"374 (BC_1, *, CONTROL, 1), " &
"373 (BC_1, DDR_DQS3P, OUTPUT3, X, 374, 1, Z), " &
"372 (BC_4, DDR_DQS3P, INPUT, X), " &
"371 (BC_1, *, CONTROL, 1), " &
"370 (BC_1, DDR_DQ25, OUTPUT3, X, 371, 1, Z), " &
"369 (BC_4, DDR_DQ25, INPUT, X), " &
"368 (BC_1, *, CONTROL, 1), " &
"367 (BC_1, DDR_DQ29, OUTPUT3, X, 368, 1, Z), " &
"366 (BC_4, DDR_DQ29, INPUT, X), " &
"365 (BC_1, *, CONTROL, 1), " &
"364 (BC_1, DDR_DQ28, OUTPUT3, X, 365, 1, Z), " &
"363 (BC_4, DDR_DQ28, INPUT, X), " &
"362 (BC_1, *, CONTROL, 1), " &
"361 (BC_1, DDR_DQ26, OUTPUT3, X, 362, 1, Z), " &
"360 (BC_4, DDR_DQ26, INPUT, X), " &
"359 (BC_1, *, CONTROL, 1), " &
"358 (BC_1, DDR_DQ27, OUTPUT3, X, 359, 1, Z), " &
"357 (BC_4, DDR_DQ27, INPUT, X), " &
"356 (BC_1, *, CONTROL, 1), " &
"355 (BC_1, PA10, OUTPUT3, X, 356, 1, Z), " &
"354 (BC_4, PA10, INPUT, X), " &
"353 (BC_1, *, CONTROL, 1), " &
"352 (BC_1, PA11, OUTPUT3, X, 353, 1, Z), " &
"351 (BC_4, PA11, INPUT, X), " &
"350 (BC_1, *, CONTROL, 1), " &
"349 (BC_1, PA12, OUTPUT3, X, 350, 1, Z), " &
"348 (BC_4, PA12, INPUT, X), " &
"347 (BC_1, *, CONTROL, 1), " &
"346 (BC_1, PG9, OUTPUT3, X, 347, 1, Z), " &
"345 (BC_4, PG9, INPUT, X), " &
"344 (BC_1, *, CONTROL, 1), " &
"343 (BC_1, PD13, OUTPUT3, X, 344, 1, Z), " &
"342 (BC_4, PD13, INPUT, X), " &
"341 (BC_1, *, CONTROL, 1), " &
"340 (BC_1, PB2, OUTPUT3, X, 341, 1, Z), " &
"339 (BC_4, PB2, INPUT, X), " &
"338 (BC_1, *, CONTROL, 1), " &
"337 (BC_1, PE10, OUTPUT3, X, 338, 1, Z), " &
"336 (BC_4, PE10, INPUT, X), " &
"335 (BC_1, *, CONTROL, 1), " &
"334 (BC_1, PE8, OUTPUT3, X, 335, 1, Z), " &
"333 (BC_4, PE8, INPUT, X), " &
"332 (BC_1, *, CONTROL, 1), " &
"331 (BC_1, PB6, OUTPUT3, X, 332, 1, Z), " &
"330 (BC_4, PB6, INPUT, X), " &
"329 (BC_1, *, CONTROL, 1), " &
"328 (BC_1, PG7, OUTPUT3, X, 329, 1, Z), " &
"327 (BC_4, PG7, INPUT, X), " &
"326 (BC_1, *, CONTROL, 1), " &
"325 (BC_1, PF9, OUTPUT3, X, 326, 1, Z), " &
"324 (BC_4, PF9, INPUT, X), " &
"323 (BC_1, *, CONTROL, 1), " &
"322 (BC_1, PD12, OUTPUT3, X, 323, 1, Z), " &
"321 (BC_4, PD12, INPUT, X), " &
"320 (BC_1, *, CONTROL, 1), " &
"319 (BC_1, PF6, OUTPUT3, X, 320, 1, Z), " &
"318 (BC_4, PF6, INPUT, X), " &
"317 (BC_1, *, CONTROL, 1), " &
"316 (BC_1, PF10, OUTPUT3, X, 317, 1, Z), " &
"315 (BC_4, PF10, INPUT, X), " &
"314 (BC_1, *, CONTROL, 1), " &
"313 (BC_1, PF8, OUTPUT3, X, 314, 1, Z), " &
"312 (BC_4, PF8, INPUT, X), " &
"311 (BC_1, *, CONTROL, 1), " &
"310 (BC_1, PF7, OUTPUT3, X, 311, 1, Z), " &
"309 (BC_4, PF7, INPUT, X), " &
"308 (BC_1, *, CONTROL, 1), " &
"307 (BC_1, PD11, OUTPUT3, X, 308, 1, Z), " &
"306 (BC_4, PD11, INPUT, X), " &
"305 (BC_1, *, CONTROL, 1), " &
"304 (BC_1, PE7, OUTPUT3, X, 305, 1, Z), " &
"303 (BC_4, PE7, INPUT, X), " &
"302 (BC_1, *, CONTROL, 1), " &
"301 (BC_1, PE9, OUTPUT3, X, 302, 1, Z), " &
"300 (BC_4, PE9, INPUT, X), " &
"299 (BC_1, *, CONTROL, 1), " &
"298 (BC_1, PG10, OUTPUT3, X, 299, 1, Z), " &
"297 (BC_4, PG10, INPUT, X), " &
"296 (BC_1, *, CONTROL, 1), " &
"295 (BC_1, PG8, OUTPUT3, X, 296, 1, Z), " &
"294 (BC_4, PG8, INPUT, X), " &
"293 (BC_1, *, CONTROL, 1), " &
"292 (BC_1, PB8, OUTPUT3, X, 293, 1, Z), " &
"291 (BC_4, PB8, INPUT, X), " &
"290 (BC_1, *, CONTROL, 1), " &
"289 (BC_1, PH6, OUTPUT3, X, 290, 1, Z), " &
"288 (BC_4, PH6, INPUT, X), " &
"287 (BC_1, *, CONTROL, 1), " &
"286 (BC_1, PG11, OUTPUT3, X, 287, 1, Z), " &
"285 (BC_4, PG11, INPUT, X), " &
"284 (BC_1, *, CONTROL, 1), " &
"283 (BC_1, PB5, OUTPUT3, X, 284, 1, Z), " &
"282 (BC_4, PB5, INPUT, X), " &
"281 (BC_1, *, CONTROL, 1), " &
"280 (BC_1, PB13, OUTPUT3, X, 281, 1, Z), " &
"279 (BC_4, PB13, INPUT, X), " &
"278 (BC_1, *, CONTROL, 1), " &
"277 (BC_1, PB12, OUTPUT3, X, 278, 1, Z), " &
"276 (BC_4, PB12, INPUT, X), " &
"275 (BC_1, *, CONTROL, 1), " &
"274 (BC_1, PB10, OUTPUT3, X, 275, 1, Z), " &
"273 (BC_4, PB10, INPUT, X), " &
"272 (BC_1, *, CONTROL, 1), " &
"271 (BC_1, PC0, OUTPUT3, X, 272, 1, Z), " &
"270 (BC_4, PC0, INPUT, X), " &
"269 (BC_1, *, CONTROL, 1), " &
"268 (BC_1, PA6, OUTPUT3, X, 269, 1, Z), " &
"267 (BC_4, PA6, INPUT, X), " &
"266 (BC_1, *, CONTROL, 1), " &
"265 (BC_1, PA7, OUTPUT3, X, 266, 1, Z), " &
"264 (BC_4, PA7, INPUT, X), " &
"263 (BC_1, *, CONTROL, 1), " &
"262 (BC_1, PF11, OUTPUT3, X, 263, 1, Z), " &
"261 (BC_4, PF11, INPUT, X), " &
"260 (BC_1, *, CONTROL, 1), " &
"259 (BC_1, PF12, OUTPUT3, X, 260, 1, Z), " &
"258 (BC_4, PF12, INPUT, X), " &
"257 (BC_1, *, CONTROL, 1), " &
"256 (BC_1, PC4, OUTPUT3, X, 257, 1, Z), " &
"255 (BC_4, PC4, INPUT, X), " &
"254 (BC_1, *, CONTROL, 1), " &
"253 (BC_1, PC5, OUTPUT3, X, 254, 1, Z), " &
"252 (BC_4, PC5, INPUT, X), " &
"251 (BC_1, *, CONTROL, 1), " &
"250 (BC_1, PH2, OUTPUT3, X, 251, 1, Z), " &
"249 (BC_4, PH2, INPUT, X), " &
"248 (BC_1, *, CONTROL, 1), " &
"247 (BC_1, PF13, OUTPUT3, X, 248, 1, Z), " &
"246 (BC_4, PF13, INPUT, X), " &
"245 (BC_1, *, CONTROL, 1), " &
"244 (BC_1, PF14, OUTPUT3, X, 245, 1, Z), " &
"243 (BC_4, PF14, INPUT, X), " &
"242 (BC_1, *, CONTROL, 1), " &
"241 (BC_1, PB1, OUTPUT3, X, 242, 1, Z), " &
"240 (BC_4, PB1, INPUT, X), " &
"239 (BC_1, *, CONTROL, 1), " &
"238 (BC_1, PF15, OUTPUT3, X, 239, 1, Z), " &
"237 (BC_4, PF15, INPUT, X), " &
"236 (BC_1, *, CONTROL, 1), " &
"235 (BC_1, PB0, OUTPUT3, X, 236, 1, Z), " &
"234 (BC_4, PB0, INPUT, X), " &
"233 (BC_1, *, CONTROL, 1), " &
"232 (BC_1, PH3, OUTPUT3, X, 233, 1, Z), " &
"231 (BC_4, PH3, INPUT, X), " &
"230 (BC_1, *, CONTROL, 1), " &
"229 (BC_1, PG5, OUTPUT3, X, 230, 1, Z), " &
"228 (BC_4, PG5, INPUT, X), " &
"227 (BC_1, *, CONTROL, 1), " &
"226 (BC_1, PC1, OUTPUT3, X, 227, 1, Z), " &
"225 (BC_4, PC1, INPUT, X), " &
"224 (BC_1, *, CONTROL, 1), " &
"223 (BC_1, PA2, OUTPUT3, X, 224, 1, Z), " &
"222 (BC_4, PA2, INPUT, X), " &
"221 (BC_1, *, CONTROL, 1), " &
"220 (BC_1, PG4, OUTPUT3, X, 221, 1, Z), " &
"219 (BC_4, PG4, INPUT, X), " &
"218 (BC_1, *, CONTROL, 1), " &
"217 (BC_1, PB11, OUTPUT3, X, 218, 1, Z), " &
"216 (BC_4, PB11, INPUT, X), " &
"215 (BC_1, *, CONTROL, 1), " &
"214 (BC_1, PG0, OUTPUT3, X, 215, 1, Z), " &
"213 (BC_4, PG0, INPUT, X), " &
"212 (BC_1, *, CONTROL, 1), " &
"211 (BC_1, PA4, OUTPUT3, X, 212, 1, Z), " &
"210 (BC_4, PA4, INPUT, X), " &
"209 (BC_1, *, CONTROL, 1), " &
"208 (BC_1, PA5, OUTPUT3, X, 209, 1, Z), " &
"207 (BC_4, PA5, INPUT, X), " &
"206 (BC_1, *, CONTROL, 1), " &
"205 (BC_1, PA1, OUTPUT3, X, 206, 1, Z), " &
"204 (BC_4, PA1, INPUT, X), " &
"203 (BC_1, *, CONTROL, 1), " &
"202 (BC_1, PA0, OUTPUT3, X, 203, 1, Z), " &
"201 (BC_4, PA0, INPUT, X), " &
"200 (BC_1, *, CONTROL, 1), " &
"199 (BC_1, PG13, OUTPUT3, X, 200, 1, Z), " &
"198 (BC_4, PG13, INPUT, X), " &
"197 (BC_1, *, CONTROL, 1), " &
"196 (BC_1, PG1, OUTPUT3, X, 197, 1, Z), " &
"195 (BC_4, PG1, INPUT, X), " &
"194 (BC_1, *, CONTROL, 1), " &
"193 (BC_1, PG14, OUTPUT3, X, 194, 1, Z), " &
"192 (BC_4, PG14, INPUT, X), " &
"191 (BC_1, *, CONTROL, 1), " &
"190 (BC_1, PG2, OUTPUT3, X, 191, 1, Z), " &
"189 (BC_4, PG2, INPUT, X), " &
"188 (BC_1, *, CONTROL, 1), " &
"187 (BC_1, PC2, OUTPUT3, X, 188, 1, Z), " &
"186 (BC_4, PC2, INPUT, X), " &
"185 (BC_1, *, CONTROL, 1), " &
"184 (BC_1, PA3, OUTPUT3, X, 185, 1, Z), " &
"183 (BC_4, PA3, INPUT, X), " &
"182 (BC_1, *, CONTROL, 1), " &
"181 (BC_1, PE2, OUTPUT3, X, 182, 1, Z), " &
"180 (BC_4, PE2, INPUT, X), " &
"179 (BC_1, *, CONTROL, 1), " &
"178 (BC_1, PG3, OUTPUT3, X, 179, 1, Z), " &
"177 (BC_4, PG3, INPUT, X), " &
"176 (BC_1, *, CONTROL, 1), " &
"175 (BC_1, PC3, OUTPUT3, X, 176, 1, Z), " &
"174 (BC_4, PC3, INPUT, X), " &
"173 (BC_1, *, CONTROL, 1), " &
"172 (BC_1, PF3, OUTPUT3, X, 173, 1, Z), " &
"171 (BC_4, PF3, INPUT, X), " &
"170 (BC_1, *, CONTROL, 1), " &
"169 (BC_1, PH7, OUTPUT3, X, 170, 1, Z), " &
"168 (BC_4, PH7, INPUT, X), " &
"167 (BC_1, *, CONTROL, 1), " &
"166 (BC_1, PI10, OUTPUT3, X, 167, 1, Z), " &
"165 (BC_4, PI10, INPUT, X), " &
"164 (BC_1, *, CONTROL, 1), " &
"163 (BC_1, PI11, OUTPUT3, X, 164, 1, Z), " &
"162 (BC_4, PI11, INPUT, X), " &
"161 (BC_1, *, CONTROL, 1), " &
"160 (BC_1, PA14, OUTPUT3, X, 161, 1, Z), " &
"159 (BC_4, PA14, INPUT, X), " &
"158 (BC_1, *, CONTROL, 1), " &
"157 (BC_1, PA13, OUTPUT3, X, 158, 1, Z), " &
"156 (BC_4, PA13, INPUT, X), " &
"155 (BC_1, *, CONTROL, 1), " &
"154 (BC_1, PH1_OSC_OUT, OUTPUT3, X, 155, 1, Z), " &
"153 (BC_4, PH1_OSC_OUT, INPUT, X), " &
"152 (BC_1, *, CONTROL, 1), " &
"151 (BC_1, PH0_OSC_IN, OUTPUT3, X, 152, 1, Z), " &
"150 (BC_4, PH0_OSC_IN, INPUT, X), " &
"149 (BC_4, BOOT2, INPUT, X), " &
"148 (BC_4, BOOT1, INPUT, X), " &
"147 (BC_4, BOOT0, INPUT, X), " &
"146 (BC_1, *, CONTROL, 1), " &
"145 (BC_1, PC14_OSC32_IN, OUTPUT3, X, 146, 1, Z), " &
"144 (BC_4, PC14_OSC32_IN, INPUT, X), " &
"143 (BC_1, *, CONTROL, 1), " &
"142 (BC_1, PC15_OSC32_OUT, OUTPUT3, X, 143, 1, Z), " &
"141 (BC_4, PC15_OSC32_OUT, INPUT, X), " &
"140 (BC_1, *, CONTROL, 1), " &
"139 (BC_1, PC13, OUTPUT3, X, 140, 1, Z), " &
"138 (BC_4, PC13, INPUT, X), " &
"137 (BC_1, *, CONTROL, 1), " &
"136 (BC_1, PI8, OUTPUT3, X, 137, 1, Z), " &
"135 (BC_4, PI8, INPUT, X), " &
"134 (BC_1, *, CONTROL, 1), " &
"133 (BC_1, PD9, OUTPUT3, X, 134, 1, Z), " &
"132 (BC_4, PD9, INPUT, X), " &
"131 (BC_1, *, CONTROL, 1), " &
"130 (BC_1, PD8, OUTPUT3, X, 131, 1, Z), " &
"129 (BC_4, PD8, INPUT, X), " &
"128 (BC_1, *, CONTROL, 1), " &
"127 (BC_1, PD15, OUTPUT3, X, 128, 1, Z), " &
"126 (BC_4, PD15, INPUT, X), " &
"125 (BC_1, *, CONTROL, 1), " &
"124 (BC_1, PD14, OUTPUT3, X, 125, 1, Z), " &
"123 (BC_4, PD14, INPUT, X), " &
"122 (BC_1, *, CONTROL, 1), " &
"121 (BC_1, PJ9, OUTPUT3, X, 122, 1, Z), " &
"120 (BC_4, PJ9, INPUT, X), " &
"119 (BC_1, *, CONTROL, 1), " &
"118 (BC_1, PD6, OUTPUT3, X, 119, 1, Z), " &
"117 (BC_4, PD6, INPUT, X), " &
"116 (BC_1, *, CONTROL, 1), " &
"115 (BC_1, PJ7, OUTPUT3, X, 116, 1, Z), " &
"114 (BC_4, PJ7, INPUT, X), " &
"113 (BC_1, *, CONTROL, 1), " &
"112 (BC_1, PJ6, OUTPUT3, X, 113, 1, Z), " &
"111 (BC_4, PJ6, INPUT, X), " &
"110 (BC_1, *, CONTROL, 1), " &
"109 (BC_1, PJ5, OUTPUT3, X, 110, 1, Z), " &
"108 (BC_4, PJ5, INPUT, X), " &
"107 (BC_1, *, CONTROL, 1), " &
"106 (BC_1, PJ4, OUTPUT3, X, 107, 1, Z), " &
"105 (BC_4, PJ4, INPUT, X), " &
"104 (BC_1, *, CONTROL, 1), " &
"103 (BC_1, PJ3, OUTPUT3, X, 104, 1, Z), " &
"102 (BC_4, PJ3, INPUT, X), " &
"101 (BC_1, *, CONTROL, 1), " &
"100 (BC_1, PJ2, OUTPUT3, X, 101, 1, Z), " &
"99 (BC_4, PJ2, INPUT, X), " &
"98 (BC_1, *, CONTROL, 1), " &
"97 (BC_1, PJ1, OUTPUT3, X, 98, 1, Z), " &
"96 (BC_4, PJ1, INPUT, X), " &
"95 (BC_1, *, CONTROL, 1), " &
"94 (BC_1, PJ0, OUTPUT3, X, 95, 1, Z), " &
"93 (BC_4, PJ0, INPUT, X), " &
"92 (BC_1, *, CONTROL, 1), " &
"91 (BC_1, PJ11, OUTPUT3, X, 92, 1, Z), " &
"90 (BC_4, PJ11, INPUT, X), " &
"89 (BC_1, *, CONTROL, 1), " &
"88 (BC_1, PJ10, OUTPUT3, X, 89, 1, Z), " &
"87 (BC_4, PJ10, INPUT, X), " &
"86 (BC_1, *, CONTROL, 1), " &
"85 (BC_1, PI13, OUTPUT3, X, 86, 1, Z), " &
"84 (BC_4, PI13, INPUT, X), " &
"83 (BC_1, *, CONTROL, 1), " &
"82 (BC_1, PI12, OUTPUT3, X, 83, 1, Z), " &
"81 (BC_4, PI12, INPUT, X), " &
"80 (BC_1, *, CONTROL, 1), " &
"79 (BC_1, PZ7, OUTPUT3, X, 80, 1, Z), " &
"78 (BC_4, PZ7, INPUT, X), " &
"77 (BC_1, *, CONTROL, 1), " &
"76 (BC_1, PZ6, OUTPUT3, X, 77, 1, Z), " &
"75 (BC_4, PZ6, INPUT, X), " &
"74 (BC_1, *, CONTROL, 1), " &
"73 (BC_1, PZ5, OUTPUT3, X, 74, 1, Z), " &
"72 (BC_4, PZ5, INPUT, X), " &
"71 (BC_1, *, CONTROL, 1), " &
"70 (BC_1, PG12, OUTPUT3, X, 71, 1, Z), " &
"69 (BC_4, PG12, INPUT, X), " &
"68 (BC_1, *, CONTROL, 1), " &
"67 (BC_1, PZ4, OUTPUT3, X, 68, 1, Z), " &
"66 (BC_4, PZ4, INPUT, X), " &
"65 (BC_1, *, CONTROL, 1), " &
"64 (BC_1, PZ2, OUTPUT3, X, 65, 1, Z), " &
"63 (BC_4, PZ2, INPUT, X), " &
"62 (BC_1, *, CONTROL, 1), " &
"61 (BC_1, PZ0, OUTPUT3, X, 62, 1, Z), " &
"60 (BC_4, PZ0, INPUT, X), " &
"59 (BC_1, *, CONTROL, 1), " &
"58 (BC_1, PI9, OUTPUT3, X, 59, 1, Z), " &
"57 (BC_4, PI9, INPUT, X), " &
"56 (BC_1, *, CONTROL, 1), " &
"55 (BC_1, PZ3, OUTPUT3, X, 56, 1, Z), " &
"54 (BC_4, PZ3, INPUT, X), " &
"53 (BC_1, *, CONTROL, 1), " &
"52 (BC_1, PZ1, OUTPUT3, X, 53, 1, Z), " &
"51 (BC_4, PZ1, INPUT, X), " &
"50 (BC_1, *, CONTROL, 1), " &
"49 (BC_1, PI7, OUTPUT3, X, 50, 1, Z), " &
"48 (BC_4, PI7, INPUT, X), " &
"47 (BC_1, *, CONTROL, 1), " &
"46 (BC_1, PI6, OUTPUT3, X, 47, 1, Z), " &
"45 (BC_4, PI6, INPUT, X), " &
"44 (BC_1, *, CONTROL, 1), " &
"43 (BC_1, PI5, OUTPUT3, X, 44, 1, Z), " &
"42 (BC_4, PI5, INPUT, X), " &
"41 (BC_1, *, CONTROL, 1), " &
"40 (BC_1, PI4, OUTPUT3, X, 41, 1, Z), " &
"39 (BC_4, PI4, INPUT, X), " &
"38 (BC_1, *, CONTROL, 1), " &
"37 (BC_1, PI3, OUTPUT3, X, 38, 1, Z), " &
"36 (BC_4, PI3, INPUT, X), " &
"35 (BC_1, *, CONTROL, 1), " &
"34 (BC_1, PI2, OUTPUT3, X, 35, 1, Z), " &
"33 (BC_4, PI2, INPUT, X), " &
"32 (BC_1, *, CONTROL, 1), " &
"31 (BC_1, PI1, OUTPUT3, X, 32, 1, Z), " &
"30 (BC_4, PI1, INPUT, X), " &
"29 (BC_1, *, CONTROL, 1), " &
"28 (BC_1, PI0, OUTPUT3, X, 29, 1, Z), " &
"27 (BC_4, PI0, INPUT, X), " &
"26 (BC_1, *, CONTROL, 1), " &
"25 (BC_1, PI15, OUTPUT3, X, 26, 1, Z), " &
"24 (BC_4, PI15, INPUT, X), " &
"23 (BC_1, *, CONTROL, 1), " &
"22 (BC_1, PI14, OUTPUT3, X, 23, 1, Z), " &
"21 (BC_4, PI14, INPUT, X), " &
"20 (BC_1, *, CONTROL, 1), " &
"19 (BC_1, PJ8, OUTPUT3, X, 20, 1, Z), " &
"18 (BC_4, PJ8, INPUT, X), " &
"17 (BC_1, *, CONTROL, 1), " &
"16 (BC_1, PH15, OUTPUT3, X, 17, 1, Z), " &
"15 (BC_4, PH15, INPUT, X), " &
"14 (BC_1, *, CONTROL, 1), " &
"13 (BC_1, PH14, OUTPUT3, X, 14, 1, Z), " &
"12 (BC_4, PH14, INPUT, X), " &
"11 (BC_1, *, CONTROL, 1), " &
"10 (BC_1, PH13, OUTPUT3, X, 11, 1, Z), " &
"9 (BC_4, PH13, INPUT, X), " &
"8 (BC_1, *, CONTROL, 1), " &
"7 (BC_1, PH12, OUTPUT3, X, 8, 1, Z), " &
"6 (BC_4, PH12, INPUT, X), " &
"5 (BC_1, *, CONTROL, 1), " &
"4 (BC_1, PH10, OUTPUT3, X, 5, 1, Z), " &
"3 (BC_4, PH10, INPUT, X), " &
"2 (BC_1, *, CONTROL, 1), " &
"1 (BC_1, PH5, OUTPUT3, X, 2, 1, Z), " &
"0 (BC_4, PH5, INPUT, X) " ;
attribute DESIGN_WARNING of STM32MP151_153xAA_LFBGA448: entity is
"Device configuration can effect boundary scan behavior. " &
"Keep the NRST pin low to ensure default boundary scan operation " &
"as described in this file." ;
end STM32MP151_153xAA_LFBGA448;
-- ******************* (C) COPYRIGHT 2019 STMicroelectronics *****END OF FILE********