-- ****************** (C) COPYRIGHT 2019 STMicroelectronics **************************
-- * File Name : STM32MP151_153xAD_TFBGA257.bsd *
-- * Author : STMicroelectronics www.st.com *
-- * Version : V1.0 *
-- * Date : 01-February-2019 *
-- * Description : Boundary Scan Description Language (BSDL) file for the *
-- * STM32MP151_153xAD_TFBGA257 Microcontrollers. *
-- ***********************************************************************************
-- * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS *
-- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.*
-- * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, *
-- * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE *
-- * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING *
-- * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. *
-- ***********************************************************************************
-- * This BSDL file has been syntaxed checked and validated by: *
-- * GOEPEL SyntaxChecker Version 3.1.2 *
-- ***********************************************************************************
entity STM32MP151_153xAD_TFBGA257 is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "TFBGA257_PACKAGE");
-- This section declares all the ports in the design.
port (
BOOT0 : in bit;
BOOT1 : in bit;
BOOT2 : in bit;
DDR_A0 : inout bit;
DDR_A1 : inout bit;
DDR_A2 : inout bit;
DDR_A3 : inout bit;
DDR_A4 : inout bit;
-- DDR_A5 : inout bit;
-- DDR_A6 : inout bit;
-- DDR_A7 : inout bit;
DDR_A8 : inout bit;
DDR_A9 : inout bit;
DDR_A10 : inout bit;
DDR_A11 : inout bit;
DDR_A12 : inout bit;
DDR_A13 : inout bit;
DDR_A14 : inout bit;
-- DDR_A15 : inout bit;
DDR_BA0 : inout bit;
DDR_BA1 : inout bit;
DDR_BA2 : inout bit;
DDR_CASN : inout bit;
DDR_CKE : inout bit;
DDR_CLKN : inout bit;
DDR_CLKP : inout bit;
DDR_CSN : inout bit;
DDR_DQ0 : inout bit;
DDR_DQ1 : inout bit;
DDR_DQ2 : inout bit;
DDR_DQ3 : inout bit;
DDR_DQ4 : inout bit;
DDR_DQ5 : inout bit;
DDR_DQ6 : inout bit;
DDR_DQ7 : inout bit;
DDR_DQ8 : inout bit;
DDR_DQ9 : inout bit;
DDR_DQ10 : inout bit;
DDR_DQ11 : inout bit;
DDR_DQ12 : inout bit;
DDR_DQ13 : inout bit;
DDR_DQ14 : inout bit;
DDR_DQ15 : inout bit;
DDR_DQM0 : inout bit;
DDR_DQM1 : inout bit;
DDR_DQM3 : inout bit;
DDR_DQS0N : inout bit;
DDR_DQS0P : inout bit;
DDR_DQS1N : inout bit;
DDR_DQS1P : inout bit;
-- DDR_DTO0 : inout bit;
-- DDR_DTO1 : inout bit;
DDR_ODT : inout bit;
-- DDR_RASN : inout bit;
DDR_RESETN : inout bit;
DDR_RET_N : linkage bit;
DDR_WEN : inout bit;
JTCK : in bit;
JTDI : in bit;
JTDO : out bit;
JTMS : in bit;
NJTRST : in bit;
NRST : in bit;
NRST_CORE : linkage bit;
PA0 : inout bit;
PA1 : inout bit;
PA2 : inout bit;
PA3 : inout bit;
-- PA4 : inout bit;
-- PA5 : inout bit;
PA6 : inout bit;
PA7 : inout bit;
PA8 : inout bit;
PA9 : inout bit;
PA10 : inout bit;
PA11 : inout bit;
PA12 : inout bit;
PA13 : inout bit;
PA14 : inout bit;
PA15 : inout bit;
PB0 : inout bit;
PB1 : inout bit;
PB2 : inout bit;
PB3 : inout bit;
PB4 : inout bit;
PB5 : inout bit;
PB6 : inout bit;
PB7 : inout bit;
PB8 : inout bit;
PB9 : inout bit;
PB10 : inout bit;
PB11 : inout bit;
PB12 : inout bit;
-- PB13 : inout bit;
-- PB14 : inout bit;
PB15 : inout bit;
PC0 : inout bit;
PC1 : inout bit;
PC2 : inout bit;
PC3 : inout bit;
PC4 : inout bit;
PC5 : inout bit;
PC6 : inout bit;
PC7 : inout bit;
PC8 : inout bit;
PC9 : inout bit;
PC10 : inout bit;
PC11 : inout bit;
-- PC12 : inout bit;
PC13 : inout bit;
PC14_OSC32_IN : inout bit;
PC15_OSC32_OUT : inout bit;
PD0 : inout bit;
PD1 : inout bit;
-- PD2 : inout bit;
PD3 : inout bit;
PD4 : inout bit;
PD5 : inout bit;
-- PD6 : inout bit;
PD7 : inout bit;
PD8 : inout bit;
-- PD9 : inout bit;
-- PD10 : inout bit;
PD11 : inout bit;
PD12 : inout bit;
PD13 : inout bit;
-- PD14 : inout bit;
-- PD15 : inout bit;
PDR_ON : linkage bit;
PDR_ON_CORE: linkage bit;
PE0 : inout bit;
-- PE1 : inout bit;
PE2 : inout bit;
-- PE3 : inout bit;
PE4 : inout bit;
PE5 : inout bit;
PE6 : inout bit;
PE7 : inout bit;
PE8 : inout bit;
-- PE9 : inout bit;
PE10 : inout bit;
PE11 : inout bit;
PE12 : inout bit;
PE13 : inout bit;
-- PE14 : inout bit;
-- PE15 : inout bit;
PF6 : inout bit;
PF7 : inout bit;
PF8 : inout bit;
PF9 : inout bit;
-- PF10 : inout bit;
PF11 : inout bit;
PG6 : inout bit;
PG7 : inout bit;
PG8 : inout bit;
PG9 : inout bit;
PG10 : inout bit;
PG11 : inout bit;
PG12 : inout bit;
PG13 : inout bit;
PG14 : inout bit;
PG15 : inout bit;
PH0_OSC_IN : inout bit;
PH1_OSC_OUT: inout bit;
PWR_LP : linkage bit;
PWR_ON : linkage bit;
VBAT : linkage bit;
VDD1V2_Unused : linkage bit_vector (0 to 1);
DNU : linkage bit_vector (0 to 5);
DDR_ZQ : linkage bit;
ANA0 : linkage bit;
ANA1 : linkage bit;
OTG_VBUS : linkage bit;
USB_DM1 : linkage bit;
USB_DM2 : linkage bit;
USB_DP1 : linkage bit;
USB_DP2 : linkage bit;
USB_RREF : linkage bit;
DDR_ATO : linkage bit;
DDR_VREF : linkage bit;
VDD3V3_USB : linkage bit;
VDDA1V1_REG: linkage bit;
VDDA1V8_Unused: linkage bit;
VDDA1V8_REG: linkage bit;
BYPASS_REG1V8 : linkage bit;
VDDA : linkage bit_vector(0 to 1);
VDD_Unused : linkage bit;
VDD_OTP : linkage bit;
VREFN : linkage bit;
VREFP : linkage bit;
VDD : linkage bit_vector(0 to 3);
VDDCORE : linkage bit_vector(0 to 14);
VDDQ_DDR : linkage bit_vector(0 to 3);
VSSA : linkage bit;
VSS : linkage bit_vector(0 to 17);
-- VSS : linkage bit_vector(0 to 39);
VSS_USBHS: linkage bit_vector(0 to 3)
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of STM32MP151_153xAD_TFBGA257: entity is "STD_1149_1_2001";
attribute PIN_MAP of STM32MP151_153xAD_TFBGA257 : entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information is extracted from the
-- port-to-pin map file that was read in using the "read_pin_map" command.
constant TFBGA257_PACKAGE: PIN_MAP_STRING :=
"BOOT0 : H3," &
"BOOT1 : K3," &
"BOOT2 : H1," &
"DDR_A0 : G18," &
"DDR_A1 : M19," &
"DDR_A2 : F17," &
"DDR_A3 : F19," &
"DDR_A4 : R17," &
-- "DDR_A5 : 1C9," &
-- "DDR_A6 : 1G9," &
-- "DDR_A7 : 1A9," &
"DDR_A8 : T17," &
"DDR_A9 : E18," &
"DDR_A10 : M17," &
"DDR_A11 : N19," &
"DDR_A12 : M18," &
"DDR_A13 : E17," &
"DDR_A14 : N18," &
-- "DDR_A15 : 1H6," &
"DDR_BA0 : G19," &
"DDR_BA1 : P18," &
"DDR_BA2 : H17," &
"DDR_CASN : J19," &
"DDR_CKE : P17," &
"DDR_CLKN : K18," &
"DDR_CLKP : L17," &
"DDR_CSN : J17," &
"DDR_DQ0 : A17," &
"DDR_DQ1 : A18," &
"DDR_DQ2 : C18," &
"DDR_DQ3 : B16," &
"DDR_DQ4 : D18," &
"DDR_DQ5 : D19," &
"DDR_DQ6 : C19," &
"DDR_DQ7 : B17," &
"DDR_DQ8 : R18," &
"DDR_DQ9 : U19," &
"DDR_DQ10 : T19," &
"DDR_DQ11 : W18," &
"DDR_DQ12 : W17," &
"DDR_DQ13 : T18," &
"DDR_DQ14 : U17," &
"DDR_DQ15 : V17," &
"DDR_DQM0 : C17," &
"DDR_DQM1 : V18," &
"DDR_DQM3 : AA22," &
"DDR_DQS0N : B18," &
"DDR_DQS0P : B19," &
"DDR_DQS1N : U18," &
"DDR_DQS1P : V19," &
-- "DDR_DTO0 : 1D8," &
-- "DDR_DTO1 : 1C8," &
"DDR_ODT : H18," &
-- "DDR_RASN : 1E9," &
"DDR_RESETN : C16," &
"DDR_RET_N : 189," &
"DDR_WEN : J18," &
-- "DDR_ATO : 1F8," &
"DDR_VREF : W16," &
"JTCK : A16," &
"JTDI : B15," &
"JTDO : A15," &
"JTMS : C15," &
"NJTRST : B14," &
"NRST : E2," &
"NRST_CORE : J3," &
"PA0 : N3," &
"PA1 : T1," &
"PA2 : T3," &
"PA3 : N2," &
-- "PA4 : 1J1," &
-- "PA5 : 1H1," &
"PA6 : W3," &
"PA7 : W2," &
"PA8 : B8," &
"PA9 : C6," &
"PA10 : U16," &
"PA11 : U15," &
"PA12 : V15," &
"PA13 : L2," &
"PA14 : L1," &
"PA15 : B4," &
"PB0 : U2," &
"PB1 : U1," &
"PB2 : V13," &
"PB3 : C7," &
"PB4 : B6," &
"PB5 : V5," &
"PB6 : W11," &
"PB7 : A3," &
"PB8 : V4," &
"PB9 : C9," &
"PB10 : U5," &
"PB11 : U3," &
"PB12 : V3," &
-- "PB13 : 1J2," &
-- "PB14 : 1A4," &
"PB15 : C8," &
"PC0 : U4," &
"PC1 : T2," &
"PC2 : P2," &
"PC3 : P3," &
"PC4 : V2," &
"PC5 : V1," &
"PC6 : A4," &
"PC7 : C10," &
"PC8 : A9," &
"PC9 : B9," &
"PC10 : B10," &
"PC11 : C11," &
-- "PC12 : 1B4," &
"PC13 : G3," &
"PC14_OSC32_IN : G2," &
"PC15_OSC32_OUT : F2," &
"PD0 : C5," &
"PD1 : A2," &
-- "PD2 : 1A5," &
"PD3 : A7," &
"PD4 : C3," &
"PD5 : C4," &
-- "PD6 : 1B1," &
"PD7 : B3," &
"PD8 : E1," &
-- "PD9 : 1C1," &
-- "PD10 : 1A2," &
"PD11 : U8," &
"PD12 : U14," &
"PD13 : U13," &
-- "PD14 : 1E1," &
-- "PD15 : 1C2," &
"PDR_ON : L3," &
"PDR_ON_CORE: K2," &
"PE0 : C2," &
-- "PE1 : 1A1," &
"PE2 : P1," &
-- "PE3 : 1A3," &
"PE4 : A10," &
"PE5 : B7," &
"PE6 : B2," &
"PE7 : V7," &
"PE8 : U12," &
-- "PE9 : 1J4," &
"PE10 : V12," &
"PE11 : D2," &
"PE12 : C1," &
"PE13 : E3," &
-- "PE14 : 1B2," &
-- "PE15 : D3," &
"PF6 : U10," &
"PF7 : W7," &
"PF8 : V8," &
"PF9 : V9," &
-- "PF10 : 1J7," &
"PF11 : W4," &
"PG6 : B5," &
"PG7 : V11," &
"PG8 : V6," &
"PG9 : W8," &
"PG10 : U7," &
"PG11 : U6," &
"PG12 : D1," &
"PG13 : R3," &
"PG14 : R2," &
"PG15 : B1," &
"PH0_OSC_IN : H2," &
"PH1_OSC_OUT: J2," &
"PWR_LP : K1," &
"PWR_ON : M2," &
-- "VBAT : 1D1," &
"DNU : (C12, B11, B13, A13, B12, A12), " &
-- "DDR_ZQ : 1A8," &
"OTG_VBUS : V16," &
"USB_DM1 : W14," &
"USB_DM2 : W10," &
"USB_DP1 : V14," &
"USB_DP2 : V10," &
-- "USB_RREF : 1J8," &
-- "VDD1V2_Unused : (1A7, 1B7)," &
-- "VDD3V3_USB : 1H7," &
-- "VDDA1V1_REG : 1J6," &
-- "VDDA1V8_Unused : 1B6," &
-- "VDDA1V8_REG : 1H5," &
"BYPASS_REG1V8 : U11," &
-- "VDDCORE : (1B3, 1D3, 1C4, 1E4, 1B5, 1D5, 1F5, 1C6, 1E6, 1G6, 1D7, 1F7, 1E8, 1G8)," &
-- "VDDQ_DDR : (1B9, 1D9, 1F9, 1H9)," &
-- "VDD : (1E2, 1F3, 1G3, 1G4)," &
-- "VDDA : (1F1, 1F2)," &
"VDD_Unused : C13," &
-- "VDD_OTP : 1J3," &
-- "VSSA : 1G1," &
"VSS : (A1, G1, N1, W1, F3, W5, A6, U9, W13, C14, D17, G17, K10, N17, F18, A19, R19, W19)," &
-- "VSS : (A1, G1, N1, W1, F3, W5, A6, 1D2, 1G2, 1H2, 1C3, 1E3, 1H3, 1D4, 1F4, 1H4, U9, 1C5, 1E5, 1G5, 1J5, 1A6, 1D6, 1F6, 1C7, 1E7, 1G7, W13, 1B8, 1H8, C14, 1J9, D17, G17, K10, N17, F18, A19, R19, W19)," &
"VREFP : M3 " ;
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of JTCK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of JTDI : signal is true;
attribute TAP_SCAN_MODE of JTMS : signal is true;
attribute TAP_SCAN_OUT of JTDO : signal is true;
attribute TAP_SCAN_RESET of NJTRST : signal is true;
-- Specifies the compliance enable patterns for the design. It lists a set of
-- design ports and the values that they should be set to, in order to enable
-- compliance to IEEE Std 1149.1
attribute COMPLIANCE_PATTERNS of STM32MP151_153xAD_TFBGA257: entity is
"(NRST) (0)";
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of STM32MP151_153xAD_TFBGA257: entity is 5;
-- Specifies the boundary-scan instructions implemented in the design and their opcodes.
attribute INSTRUCTION_OPCODE of STM32MP151_153xAD_TFBGA257: entity is
"BYPASS (11111)," &
"EXTEST (00000)," &
"SAMPLE (00010)," &
"PRELOAD (00010)," &
"IDCODE (00001)";
-- Specifies the bit pattern that is loaded into the instruction register when the TAP controller
-- passes through the Capture-IR state. The standard mandates that the two LSBs must be "01". The
-- remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of STM32MP151_153xAD_TFBGA257: entity is "XXX01";
-- Specifies the bit pattern that is loaded into the DEVICE_ID register during the IDCODE
-- instruction when the TAP controller passes through the Capture-DR state.
attribute IDCODE_REGISTER of STM32MP151_153xAD_TFBGA257: entity is
"XXXX" & -- 4-bit version number
"0110010100000000" & -- 16-bit part number
"00000100000" & -- 11-bit identity of the manufacturer
"1"; -- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI and TDO for each implemented
-- instruction.
attribute REGISTER_ACCESS of STM32MP151_153xAD_TFBGA257: entity is
"BYPASS (BYPASS)," &
"BOUNDARY (EXTEST, SAMPLE, PRELOAD)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of STM32MP151_153xAD_TFBGA257: entity is 753;
-- Considering DAP TAP bypass FF, BOUNDARY_LENGTH is 754
-- The following list specifies the characteristics of each cell in the boundary scan register from
-- TDI to TDO. The following is a description of the label fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not have a port name.
-- function: Is the function of the cell as defined by the standard. Is one of input, output2,
-- output3, bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be loaded with for safe operation
-- when the software might otherwise choose a random value.
-- ccell : The control cell number. Specifies the control cell that drives the output enable
-- for this port.
-- disval : Specifies the value that is loaded into the control cell to disable the output
-- enable for the corresponding port.
-- rslt : Resulting state. Shows the state of the driver when it is disabled.
attribute BOUNDARY_REGISTER of STM32MP151_153xAD_TFBGA257: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"752 (BC_1, *, internal, 0 )," &
"751 (BC_1, *, internal, 0 )," &
"750 (BC_1, *, internal, 0 )," &
"749 (BC_1, *, internal, 0 )," &
"748 (BC_1, *, internal, 0 )," &
"747 (BC_1, *, internal, 0 )," &
"746 (BC_1, *, internal, 0 )," &
"745 (BC_1, *, internal, 0 )," &
"744 (BC_1, *, internal, 0 )," &
"743 (BC_1, *, internal, 0 )," &
"742 (BC_1, *, internal, 0 )," &
"741 (BC_1, *, internal, 0 )," &
"740 (BC_1, *, CONTROL, 1), " &
"739 (BC_1, PE13, OUTPUT3, X, 740, 1, Z), " &
"738 (BC_4, PE13, INPUT, X), " &
"737 (BC_1, *, CONTROL, 1), " &
"736 (BC_1, PE12, OUTPUT3, X, 737, 1, Z), " &
"735 (BC_4, PE12, INPUT, X), " &
"734 (BC_1, *, CONTROL, 1), " &
"733 (BC_1, PE11, OUTPUT3, X, 734, 1, Z), " &
"732 (BC_4, PE11, INPUT, X), " &
"731 (BC_1, *, internal, 0 )," &
"730 (BC_1, *, internal, 0 )," &
"729 (BC_1, *, internal, 0 )," &
"728 (BC_1, *, internal, 0 )," &
"727 (BC_1, *, internal, 0 )," &
"726 (BC_1, *, internal, 0 )," &
"725 (BC_1, *, internal, 0 )," &
"724 (BC_1, *, internal, 0 )," &
"723 (BC_1, *, internal, 0 )," &
"722 (BC_1, *, CONTROL, 1), " &
"721 (BC_1, PE0, OUTPUT3, X, 722, 1, Z), " &
"720 (BC_4, PE0, INPUT, X), " &
"719 (BC_1, *, internal, 0 )," &
"718 (BC_1, *, internal, 0 )," &
"717 (BC_1, *, internal, 0 )," &
"716 (BC_1, *, internal, 0 )," &
"715 (BC_1, *, internal, 0 )," &
"714 (BC_1, *, internal, 0 )," &
"713 (BC_1, *, internal, 0 )," &
"712 (BC_1, *, internal, 0 )," &
"711 (BC_1, *, internal, 0 )," &
"710 (BC_1, *, internal, 0 )," &
"709 (BC_1, *, internal, 0 )," &
"708 (BC_1, *, internal, 0 )," &
"707 (BC_1, *, internal, 0 )," &
"706 (BC_1, *, internal, 0 )," &
"705 (BC_1, *, internal, 0 )," &
"704 (BC_1, *, internal, 0 )," &
"703 (BC_1, *, internal, 0 )," &
"702 (BC_1, *, internal, 0 )," &
"701 (BC_1, *, internal, 0 )," &
"700 (BC_1, *, internal, 0 )," &
"699 (BC_1, *, internal, 0 )," &
"698 (BC_1, *, internal, 0 )," &
"697 (BC_1, *, internal, 0 )," &
"696 (BC_1, *, internal, 0 )," &
"695 (BC_1, *, internal, 0 )," &
"694 (BC_1, *, internal, 0 )," &
"693 (BC_1, *, internal, 0 )," &
"692 (BC_1, *, internal, 0 )," &
"691 (BC_1, *, internal, 0 )," &
"690 (BC_1, *, internal, 0 )," &
"689 (BC_1, *, internal, 0 )," &
"688 (BC_1, *, internal, 0 )," &
"687 (BC_1, *, internal, 0 )," &
"686 (BC_1, *, internal, 0 )," &
"685 (BC_1, *, internal, 0 )," &
"684 (BC_1, *, internal, 0 )," &
"683 (BC_1, *, internal, 0 )," &
"682 (BC_1, *, internal, 0 )," &
"681 (BC_1, *, internal, 0 )," &
"680 (BC_1, *, internal, 0 )," &
"679 (BC_1, *, internal, 0 )," &
"678 (BC_1, *, internal, 0 )," &
"677 (BC_1, *, CONTROL, 1), " &
"676 (BC_1, PD4, OUTPUT3, X, 677, 1, Z), " &
"675 (BC_4, PD4, INPUT, X), " &
"674 (BC_1, *, internal, 0 )," &
"673 (BC_1, *, internal, 0 )," &
"672 (BC_1, *, internal, 0 )," &
"671 (BC_1, *, internal, 0 )," &
"670 (BC_1, *, internal, 0 )," &
"669 (BC_1, *, internal, 0 )," &
"668 (BC_1, *, internal, 0 )," &
"667 (BC_1, *, internal, 0 )," &
"666 (BC_1, *, internal, 0 )," &
"665 (BC_1, *, CONTROL, 1), " &
"664 (BC_1, PE6, OUTPUT3, X, 665, 1, Z), " &
"663 (BC_4, PE6, INPUT, X), " &
"662 (BC_1, *, CONTROL, 1), " &
"661 (BC_1, PG15, OUTPUT3, X, 662, 1, Z), " &
"660 (BC_4, PG15, INPUT, X), " &
"659 (BC_1, *, CONTROL, 1), " &
"658 (BC_1, PD7, OUTPUT3, X, 659, 1, Z), " &
"657 (BC_4, PD7, INPUT, X), " &
"656 (BC_1, *, CONTROL, 1), " &
"655 (BC_1, PD5, OUTPUT3, X, 656, 1, Z), " &
"654 (BC_4, PD5, INPUT, X), " &
"653 (BC_1, *, internal, 0 )," &
"652 (BC_1, *, internal, 0 )," &
"651 (BC_1, *, internal, 0 )," &
"650 (BC_1, *, CONTROL, 1), " &
"649 (BC_1, PD0, OUTPUT3, X, 650, 1, Z), " &
"648 (BC_4, PD0, INPUT, X), " &
"647 (BC_1, *, CONTROL, 1), " &
"646 (BC_1, PD1, OUTPUT3, X, 647, 1, Z), " &
"645 (BC_4, PD1, INPUT, X), " &
"644 (BC_1, *, CONTROL, 1), " &
"643 (BC_1, PB7, OUTPUT3, X, 644, 1, Z), " &
"642 (BC_4, PB7, INPUT, X), " &
"641 (BC_1, *, CONTROL, 1), " &
"640 (BC_1, PA9, OUTPUT3, X, 641, 1, Z), " &
"639 (BC_4, PA9, INPUT, X), " &
"638 (BC_1, *, CONTROL, 1), " &
"637 (BC_1, PA15, OUTPUT3, X, 638, 1, Z), " &
"636 (BC_4, PA15, INPUT, X), " &
"635 (BC_1, *, CONTROL, 1), " &
"634 (BC_1, PB9, OUTPUT3, X, 635, 1, Z), " &
"633 (BC_4, PB9, INPUT, X), " &
"632 (BC_1, *, CONTROL, 1), " &
"631 (BC_1, PD3, OUTPUT3, X, 632, 1, Z), " &
"630 (BC_4, PD3, INPUT, X), " &
"629 (BC_1, *, CONTROL, 1), " &
"628 (BC_1, PG6, OUTPUT3, X, 629, 1, Z), " &
"627 (BC_4, PG6, INPUT, X), " &
"626 (BC_1, *, CONTROL, 1), " &
"625 (BC_1, PB3, OUTPUT3, X, 626, 1, Z), " &
"624 (BC_4, PB3, INPUT, X), " &
"623 (BC_1, *, CONTROL, 1), " &
"622 (BC_1, PE5, OUTPUT3, X, 623, 1, Z), " &
"621 (BC_4, PE5, INPUT, X), " &
"620 (BC_1, *, CONTROL, 1), " &
"619 (BC_1, PB15, OUTPUT3, X, 620, 1, Z), " &
"618 (BC_4, PB15, INPUT, X), " &
"617 (BC_1, *, internal, 0 )," &
"616 (BC_1, *, internal, 0 )," &
"615 (BC_1, *, internal, 0 )," &
"614 (BC_1, *, internal, 0 )," &
"613 (BC_1, *, internal, 0 )," &
"612 (BC_1, *, internal, 0 )," &
"611 (BC_1, *, CONTROL, 1), " &
"610 (BC_1, PA8, OUTPUT3, X, 611, 1, Z), " &
"609 (BC_4, PA8, INPUT, X), " &
"608 (BC_1, *, internal, 0 )," &
"607 (BC_1, *, internal, 0 )," &
"606 (BC_1, *, internal, 0 )," &
"605 (BC_1, *, internal, 0 )," &
"604 (BC_1, *, internal, 0 )," &
"603 (BC_1, *, internal, 0 )," &
"602 (BC_1, *, CONTROL, 1), " &
"601 (BC_1, PC6, OUTPUT3, X, 602, 1, Z), " &
"600 (BC_4, PC6, INPUT, X), " &
"599 (BC_1, *, CONTROL, 1), " &
"598 (BC_1, PC7, OUTPUT3, X, 599, 1, Z), " &
"597 (BC_4, PC7, INPUT, X), " &
"596 (BC_1, *, CONTROL, 1), " &
"595 (BC_1, PC9, OUTPUT3, X, 596, 1, Z), " &
"594 (BC_4, PC9, INPUT, X), " &
"593 (BC_1, *, CONTROL, 1), " &
"592 (BC_1, PB4, OUTPUT3, X, 593, 1, Z), " &
"591 (BC_4, PB4, INPUT, X), " &
"590 (BC_1, *, CONTROL, 1), " &
"589 (BC_1, PC10, OUTPUT3, X, 590, 1, Z), " &
"588 (BC_4, PC10, INPUT, X), " &
"587 (BC_1, *, CONTROL, 1), " &
"586 (BC_1, PC8, OUTPUT3, X, 587, 1, Z), " &
"585 (BC_4, PC8, INPUT, X), " &
"584 (BC_1, *, CONTROL, 1), " &
"583 (BC_1, PE4, OUTPUT3, X, 584, 1, Z), " &
"582 (BC_4, PE4, INPUT, X), " &
"581 (BC_1, *, CONTROL, 1), " &
"580 (BC_1, PC11, OUTPUT3, X, 581, 1, Z), " &
"579 (BC_4, PC11, INPUT, X), " &
"578 (BC_1, *, internal, 0 )," &
"577 (BC_1, *, internal, 0 )," &
"576 (BC_1, *, internal, 0 )," &
"575 (BC_1, *, internal, 0 )," &
"574 (BC_1, *, internal, 0 )," &
"573 (BC_1, *, internal, 0 )," &
"572 (BC_1, *, internal, 0 )," &
"571 (BC_1, *, internal, 0 )," &
"570 (BC_1, *, internal, 0 )," &
"569 (BC_1, *, internal, 0 )," &
"568 (BC_1, *, internal, 0 )," &
"567 (BC_1, *, internal, 0 )," &
"566 (BC_1, *, internal, 0 )," &
"565 (BC_1, *, internal, 0 )," &
"564 (BC_1, *, internal, 0 )," &
"563 (BC_1, *, internal, 0 )," &
"562 (BC_1, *, internal, 0 )," &
"561 (BC_1, *, internal, 0 )," &
"560 (BC_1, *, internal, 0 )," &
"559 (BC_1, *, internal, 0 )," &
"558 (BC_1, *, internal, 0 )," &
"557 (BC_1, *, internal, 0 )," &
"556 (BC_1, *, internal, 0 )," &
"555 (BC_1, *, internal, 0 )," &
"554 (BC_1, *, internal, 0 )," &
"553 (BC_1, *, internal, 0 )," &
"552 (BC_1, *, internal, 0 )," &
"551 (BC_1, *, internal, 0 )," &
"550 (BC_1, *, internal, 0 )," &
"549 (BC_1, *, internal, 0 )," &
"548 (BC_1, *, internal, 0 )," &
"547 (BC_1, *, internal, 0 )," &
"546 (BC_1, *, internal, 0 )," &
"545 (BC_1, *, CONTROL, 1), " &
"544 (BC_1, DDR_DQ3, OUTPUT3, X, 545, 1, Z), " &
"543 (BC_4, DDR_DQ3, INPUT, X), " &
"542 (BC_1, *, CONTROL, 1), " &
"541 (BC_1, DDR_DQ0, OUTPUT3, X, 542, 1, Z), " &
"540 (BC_4, DDR_DQ0, INPUT, X), " &
"539 (BC_1, *, CONTROL, 1), " &
"538 (BC_1, DDR_DQ1, OUTPUT3, X, 539, 1, Z), " &
"537 (BC_4, DDR_DQ1, INPUT, X), " &
"536 (BC_1, *, CONTROL, 1), " &
"535 (BC_1, DDR_DQ7, OUTPUT3, X, 536, 1, Z), " &
"534 (BC_4, DDR_DQ7, INPUT, X), " &
"533 (BC_1, *, CONTROL, 1), " &
"532 (BC_1, DDR_DQM0, OUTPUT3, X, 533, 1, Z), " &
"531 (BC_4, DDR_DQM0, INPUT, X), " &
"530 (BC_1, *, CONTROL, 1), " &
"529 (BC_1, DDR_DQS0N, OUTPUT3, X, 530, 1, Z), " &
"528 (BC_4, DDR_DQS0N, INPUT, X), " &
"527 (BC_1, *, CONTROL, 1), " &
"526 (BC_1, DDR_DQS0P, OUTPUT3, X, 527, 1, Z), " &
"525 (BC_4, DDR_DQS0P, INPUT, X), " &
"524 (BC_1, *, CONTROL, 1), " &
"523 (BC_1, DDR_DQ6, OUTPUT3, X, 524, 1, Z), " &
"522 (BC_4, DDR_DQ6, INPUT, X), " &
"521 (BC_1, *, CONTROL, 1), " &
"520 (BC_1, DDR_DQ2, OUTPUT3, X, 521, 1, Z), " &
"519 (BC_4, DDR_DQ2, INPUT, X), " &
"518 (BC_1, *, CONTROL, 1), " &
"517 (BC_1, DDR_DQ5, OUTPUT3, X, 518, 1, Z), " &
"516 (BC_4, DDR_DQ5, INPUT, X), " &
"515 (BC_1, *, CONTROL, 1), " &
"514 (BC_1, DDR_DQ4, OUTPUT3, X, 515, 1, Z), " &
"513 (BC_4, DDR_DQ4, INPUT, X), " &
"512 (BC_1, *, CONTROL, 1), " &
"511 (BC_1, DDR_A9, OUTPUT3, X, 512, 1, Z), " &
"510 (BC_4, DDR_A9, INPUT, X), " &
"509 (BC_1, *, internal, 0 )," &
"508 (BC_1, *, internal, 0 )," &
"507 (BC_1, *, internal, 0 )," &
"506 (BC_1, *, internal, 0 )," &
"505 (BC_1, *, internal, 0 )," &
"504 (BC_1, *, internal, 0 )," &
"503 (BC_1, *, CONTROL, 1), " &
"502 (BC_1, DDR_RESETN, OUTPUT3, X, 503, 1, Z), " &
"501 (BC_4, DDR_RESETN, INPUT, X), " &
"500 (BC_1, *, CONTROL, 1), " &
"499 (BC_1, DDR_A3, OUTPUT3, X, 500, 1, Z), " &
"498 (BC_4, DDR_A3, INPUT, X), " &
"497 (BC_1, *, CONTROL, 1), " &
"496 (BC_1, DDR_A2, OUTPUT3, X, 497, 1, Z), " &
"495 (BC_4, DDR_A2, INPUT, X), " &
"494 (BC_1, *, CONTROL, 1), " &
"493 (BC_1, DDR_A13, OUTPUT3, X, 494, 1, Z), " &
"492 (BC_4, DDR_A13, INPUT, X), " &
"491 (BC_1, *, CONTROL, 1), " &
"490 (BC_1, DDR_BA0, OUTPUT3, X, 491, 1, Z), " &
"489 (BC_4, DDR_BA0, INPUT, X), " &
"488 (BC_1, *, CONTROL, 1), " &
"487 (BC_1, DDR_A0, OUTPUT3, X, 488, 1, Z), " &
"486 (BC_4, DDR_A0, INPUT, X), " &
"485 (BC_1, *, CONTROL, 1), " &
"484 (BC_1, DDR_BA2, OUTPUT3, X, 485, 1, Z), " &
"483 (BC_4, DDR_BA2, INPUT, X), " &
"482 (BC_1, *, CONTROL, 1), " &
"481 (BC_1, DDR_ODT, OUTPUT3, X, 482, 1, Z), " &
"480 (BC_4, DDR_ODT, INPUT, X), " &
"479 (BC_1, *, CONTROL, 1), " &
"478 (BC_1, DDR_CSN, OUTPUT3, X, 479, 1, Z), " &
"477 (BC_4, DDR_CSN, INPUT, X), " &
"476 (BC_1, *, internal, 0 )," &
"475 (BC_1, *, internal, 0 )," &
"474 (BC_1, *, internal, 0 )," &
"473 (BC_1, *, internal, 0 )," &
"472 (BC_1, *, internal, 0 )," &
"471 (BC_1, *, internal, 0 )," &
"470 (BC_1, *, internal, 0 )," &
"469 (BC_1, *, internal, 0 )," &
"468 (BC_1, *, internal, 0 )," &
"467 (BC_1, *, CONTROL, 1), " &
"466 (BC_1, DDR_CLKN, OUTPUT3, X, 467, 1, Z), " &
"465 (BC_4, DDR_CLKN, INPUT, X), " &
"464 (BC_1, *, CONTROL, 1), " &
"463 (BC_1, DDR_CLKP, OUTPUT3, X, 464, 1, Z), " &
"462 (BC_4, DDR_CLKP, INPUT, X), " &
"461 (BC_1, *, internal, 0 )," &
"460 (BC_1, *, internal, 0 )," &
"459 (BC_1, *, internal, 0 )," &
"458 (BC_1, *, CONTROL, 1), " &
"457 (BC_1, DDR_WEN, OUTPUT3, X, 458, 1, Z), " &
"456 (BC_4, DDR_WEN, INPUT, X), " &
"455 (BC_1, *, CONTROL, 1), " &
"454 (BC_1, DDR_CASN, OUTPUT3, X, 455, 1, Z), " &
"453 (BC_4, DDR_CASN, INPUT, X), " &
"452 (BC_1, *, CONTROL, 1), " &
"451 (BC_1, DDR_A1, OUTPUT3, X, 452, 1, Z), " &
"450 (BC_4, DDR_A1, INPUT, X), " &
"449 (BC_1, *, CONTROL, 1), " &
"448 (BC_1, DDR_A12, OUTPUT3, X, 449, 1, Z), " &
"447 (BC_4, DDR_A12, INPUT, X), " &
"446 (BC_1, *, CONTROL, 1), " &
"445 (BC_1, DDR_A10, OUTPUT3, X, 446, 1, Z), " &
"444 (BC_4, DDR_A10, INPUT, X), " &
"443 (BC_1, *, CONTROL, 1), " &
"442 (BC_1, DDR_A11, OUTPUT3, X, 443, 1, Z), " &
"441 (BC_4, DDR_A11, INPUT, X), " &
"440 (BC_1, *, CONTROL, 1), " &
"439 (BC_1, DDR_A14, OUTPUT3, X, 440, 1, Z), " &
"438 (BC_4, DDR_A14, INPUT, X), " &
"437 (BC_1, *, CONTROL, 1), " &
"436 (BC_1, DDR_BA1, OUTPUT3, X, 437, 1, Z), " &
"435 (BC_4, DDR_BA1, INPUT, X), " &
"434 (BC_1, *, CONTROL, 1), " &
"433 (BC_1, DDR_CKE, OUTPUT3, X, 434, 1, Z), " &
"432 (BC_4, DDR_CKE, INPUT, X), " &
"431 (BC_1, *, CONTROL, 1), " &
"430 (BC_1, DDR_A4, OUTPUT3, X, 431, 1, Z), " &
"429 (BC_4, DDR_A4, INPUT, X), " &
"428 (BC_1, *, CONTROL, 1), " &
"427 (BC_1, DDR_A8, OUTPUT3, X, 428, 1, Z), " &
"426 (BC_4, DDR_A8, INPUT, X), " &
"425 (BC_1, *, internal, 0 )," &
"424 (BC_1, *, internal, 0 )," &
"423 (BC_1, *, internal, 0 )," &
"422 (BC_1, *, CONTROL, 1), " &
"421 (BC_1, DDR_DQ8, OUTPUT3, X, 422, 1, Z), " &
"420 (BC_4, DDR_DQ8, INPUT, X), " &
"419 (BC_1, *, CONTROL, 1), " &
"418 (BC_1, DDR_DQ10, OUTPUT3, X, 419, 1, Z), " &
"417 (BC_4, DDR_DQ10, INPUT, X), " &
"416 (BC_1, *, CONTROL, 1), " &
"415 (BC_1, DDR_DQ9, OUTPUT3, X, 416, 1, Z), " &
"414 (BC_4, DDR_DQ9, INPUT, X), " &
"413 (BC_1, *, CONTROL, 1), " &
"412 (BC_1, DDR_DQ13, OUTPUT3, X, 413, 1, Z), " &
"411 (BC_4, DDR_DQ13, INPUT, X), " &
"410 (BC_1, *, CONTROL, 1), " &
"409 (BC_1, DDR_DQM1, OUTPUT3, X, 410, 1, Z), " &
"408 (BC_4, DDR_DQM1, INPUT, X), " &
"407 (BC_1, *, CONTROL, 1), " &
"406 (BC_1, DDR_DQS1N, OUTPUT3, X, 407, 1, Z), " &
"405 (BC_4, DDR_DQS1N, INPUT, X), " &
"404 (BC_1, *, CONTROL, 1), " &
"403 (BC_1, DDR_DQS1P, OUTPUT3, X, 404, 1, Z), " &
"402 (BC_4, DDR_DQS1P, INPUT, X), " &
"401 (BC_1, *, CONTROL, 1), " &
"400 (BC_1, DDR_DQ11, OUTPUT3, X, 401, 1, Z), " &
"399 (BC_4, DDR_DQ11, INPUT, X), " &
"398 (BC_1, *, CONTROL, 1), " &
"397 (BC_1, DDR_DQ14, OUTPUT3, X, 398, 1, Z), " &
"396 (BC_4, DDR_DQ14, INPUT, X), " &
"395 (BC_1, *, CONTROL, 1), " &
"394 (BC_1, DDR_DQ15, OUTPUT3, X, 395, 1, Z), " &
"393 (BC_4, DDR_DQ15, INPUT, X), " &
"392 (BC_1, *, CONTROL, 1), " &
"391 (BC_1, DDR_DQ12, OUTPUT3, X, 392, 1, Z), " &
"390 (BC_4, DDR_DQ12, INPUT, X), " &
"389 (BC_1, *, internal, 0 )," &
"388 (BC_1, *, internal, 0 )," &
"387 (BC_1, *, internal, 0 )," &
"386 (BC_1, *, internal, 0 )," &
"385 (BC_1, *, internal, 0 )," &
"384 (BC_1, *, internal, 0 )," &
"383 (BC_1, *, internal, 0 )," &
"382 (BC_1, *, internal, 0 )," &
"381 (BC_1, *, internal, 0 )," &
"380 (BC_1, *, CONTROL, 1), " &
"379 (BC_1, DDR_DQM3, OUTPUT3, X, 380, 1, Z), " &
"378 (BC_4, DDR_DQM3, INPUT, X), " &
"377 (BC_1, *, internal, 0 )," &
"376 (BC_1, *, internal, 0 )," &
"375 (BC_1, *, internal, 0 )," &
"374 (BC_1, *, internal, 0 )," &
"373 (BC_1, *, internal, 0 )," &
"372 (BC_1, *, internal, 0 )," &
"371 (BC_1, *, internal, 0 )," &
"370 (BC_1, *, internal, 0 )," &
"369 (BC_1, *, internal, 0 )," &
"368 (BC_1, *, internal, 0 )," &
"367 (BC_1, *, internal, 0 )," &
"366 (BC_1, *, internal, 0 )," &
"365 (BC_1, *, internal, 0 )," &
"364 (BC_1, *, internal, 0 )," &
"363 (BC_1, *, internal, 0 )," &
"362 (BC_1, *, internal, 0 )," &
"361 (BC_1, *, internal, 0 )," &
"360 (BC_1, *, internal, 0 )," &
"359 (BC_1, *, internal, 0 )," &
"358 (BC_1, *, internal, 0 )," &
"357 (BC_1, *, internal, 0 )," &
"356 (BC_1, *, CONTROL, 1), " &
"355 (BC_1, PA10, OUTPUT3, X, 356, 1, Z), " &
"354 (BC_4, PA10, INPUT, X), " &
"353 (BC_1, *, CONTROL, 1), " &
"352 (BC_1, PA11, OUTPUT3, X, 353, 1, Z), " &
"351 (BC_4, PA11, INPUT, X), " &
"350 (BC_1, *, CONTROL, 1), " &
"349 (BC_1, PA12, OUTPUT3, X, 350, 1, Z), " &
"348 (BC_4, PA12, INPUT, X), " &
"347 (BC_1, *, CONTROL, 1), " &
"346 (BC_1, PG9, OUTPUT3, X, 347, 1, Z), " &
"345 (BC_4, PG9, INPUT, X), " &
"344 (BC_1, *, CONTROL, 1), " &
"343 (BC_1, PD13, OUTPUT3, X, 344, 1, Z), " &
"342 (BC_4, PD13, INPUT, X), " &
"341 (BC_1, *, CONTROL, 1), " &
"340 (BC_1, PB2, OUTPUT3, X, 341, 1, Z), " &
"339 (BC_4, PB2, INPUT, X), " &
"338 (BC_1, *, CONTROL, 1), " &
"337 (BC_1, PE10, OUTPUT3, X, 338, 1, Z), " &
"336 (BC_4, PE10, INPUT, X), " &
"335 (BC_1, *, CONTROL, 1), " &
"334 (BC_1, PE8, OUTPUT3, X, 335, 1, Z), " &
"333 (BC_4, PE8, INPUT, X), " &
"332 (BC_1, *, CONTROL, 1), " &
"331 (BC_1, PB6, OUTPUT3, X, 332, 1, Z), " &
"330 (BC_4, PB6, INPUT, X), " &
"329 (BC_1, *, CONTROL, 1), " &
"328 (BC_1, PG7, OUTPUT3, X, 329, 1, Z), " &
"327 (BC_4, PG7, INPUT, X), " &
"326 (BC_1, *, CONTROL, 1), " &
"325 (BC_1, PF9, OUTPUT3, X, 326, 1, Z), " &
"324 (BC_4, PF9, INPUT, X), " &
"323 (BC_1, *, CONTROL, 1), " &
"322 (BC_1, PD12, OUTPUT3, X, 323, 1, Z), " &
"321 (BC_4, PD12, INPUT, X), " &
"320 (BC_1, *, CONTROL, 1), " &
"319 (BC_1, PF6, OUTPUT3, X, 320, 1, Z), " &
"318 (BC_4, PF6, INPUT, X), " &
"317 (BC_1, *, internal, 0 )," &
"316 (BC_1, *, internal, 0 )," &
"315 (BC_1, *, internal, 0 )," &
"314 (BC_1, *, CONTROL, 1), " &
"313 (BC_1, PF8, OUTPUT3, X, 314, 1, Z), " &
"312 (BC_4, PF8, INPUT, X), " &
"311 (BC_1, *, CONTROL, 1), " &
"310 (BC_1, PF7, OUTPUT3, X, 311, 1, Z), " &
"309 (BC_4, PF7, INPUT, X), " &
"308 (BC_1, *, CONTROL, 1), " &
"307 (BC_1, PD11, OUTPUT3, X, 308, 1, Z), " &
"306 (BC_4, PD11, INPUT, X), " &
"305 (BC_1, *, CONTROL, 1), " &
"304 (BC_1, PE7, OUTPUT3, X, 305, 1, Z), " &
"303 (BC_4, PE7, INPUT, X), " &
"302 (BC_1, *, internal, 0 )," &
"301 (BC_1, *, internal, 0 )," &
"300 (BC_1, *, internal, 0 )," &
"299 (BC_1, *, CONTROL, 1), " &
"298 (BC_1, PG10, OUTPUT3, X, 299, 1, Z), " &
"297 (BC_4, PG10, INPUT, X), " &
"296 (BC_1, *, CONTROL, 1), " &
"295 (BC_1, PG8, OUTPUT3, X, 296, 1, Z), " &
"294 (BC_4, PG8, INPUT, X), " &
"293 (BC_1, *, CONTROL, 1), " &
"292 (BC_1, PB8, OUTPUT3, X, 293, 1, Z), " &
"291 (BC_4, PB8, INPUT, X), " &
"290 (BC_1, *, internal, 0 )," &
"289 (BC_1, *, internal, 0 )," &
"288 (BC_1, *, internal, 0 )," &
"287 (BC_1, *, CONTROL, 1), " &
"286 (BC_1, PG11, OUTPUT3, X, 287, 1, Z), " &
"285 (BC_4, PG11, INPUT, X), " &
"284 (BC_1, *, CONTROL, 1), " &
"283 (BC_1, PB5, OUTPUT3, X, 284, 1, Z), " &
"282 (BC_4, PB5, INPUT, X), " &
"281 (BC_1, *, internal, 0 )," &
"280 (BC_1, *, internal, 0 )," &
"279 (BC_1, *, internal, 0 )," &
"278 (BC_1, *, CONTROL, 1), " &
"277 (BC_1, PB12, OUTPUT3, X, 278, 1, Z), " &
"276 (BC_4, PB12, INPUT, X), " &
"275 (BC_1, *, CONTROL, 1), " &
"274 (BC_1, PB10, OUTPUT3, X, 275, 1, Z), " &
"273 (BC_4, PB10, INPUT, X), " &
"272 (BC_1, *, CONTROL, 1), " &
"271 (BC_1, PC0, OUTPUT3, X, 272, 1, Z), " &
"270 (BC_4, PC0, INPUT, X), " &
"269 (BC_1, *, CONTROL, 1), " &
"268 (BC_1, PA6, OUTPUT3, X, 269, 1, Z), " &
"267 (BC_4, PA6, INPUT, X), " &
"266 (BC_1, *, CONTROL, 1), " &
"265 (BC_1, PA7, OUTPUT3, X, 266, 1, Z), " &
"264 (BC_4, PA7, INPUT, X), " &
"263 (BC_1, *, CONTROL, 1), " &
"262 (BC_1, PF11, OUTPUT3, X, 263, 1, Z), " &
"261 (BC_4, PF11, INPUT, X), " &
"260 (BC_1, *, internal, 0 )," &
"259 (BC_1, *, internal, 0 )," &
"258 (BC_1, *, internal, 0 )," &
"257 (BC_1, *, CONTROL, 1), " &
"256 (BC_1, PC4, OUTPUT3, X, 257, 1, Z), " &
"255 (BC_4, PC4, INPUT, X), " &
"254 (BC_1, *, CONTROL, 1), " &
"253 (BC_1, PC5, OUTPUT3, X, 254, 1, Z), " &
"252 (BC_4, PC5, INPUT, X), " &
"251 (BC_1, *, internal, 0 )," &
"250 (BC_1, *, internal, 0 )," &
"249 (BC_1, *, internal, 0 )," &
"248 (BC_1, *, internal, 0 )," &
"247 (BC_1, *, internal, 0 )," &
"246 (BC_1, *, internal, 0 )," &
"245 (BC_1, *, internal, 0 )," &
"244 (BC_1, *, internal, 0 )," &
"243 (BC_1, *, internal, 0 )," &
"242 (BC_1, *, CONTROL, 1), " &
"241 (BC_1, PB1, OUTPUT3, X, 242, 1, Z), " &
"240 (BC_4, PB1, INPUT, X), " &
"239 (BC_1, *, internal, 0 )," &
"238 (BC_1, *, internal, 0 )," &
"237 (BC_1, *, internal, 0 )," &
"236 (BC_1, *, CONTROL, 1), " &
"235 (BC_1, PB0, OUTPUT3, X, 236, 1, Z), " &
"234 (BC_4, PB0, INPUT, X), " &
"233 (BC_1, *, internal, 0 )," &
"232 (BC_1, *, internal, 0 )," &
"231 (BC_1, *, internal, 0 )," &
"230 (BC_1, *, internal, 0 )," &
"229 (BC_1, *, internal, 0 )," &
"228 (BC_1, *, internal, 0 )," &
"227 (BC_1, *, CONTROL, 1), " &
"226 (BC_1, PC1, OUTPUT3, X, 227, 1, Z), " &
"225 (BC_4, PC1, INPUT, X), " &
"224 (BC_1, *, CONTROL, 1), " &
"223 (BC_1, PA2, OUTPUT3, X, 224, 1, Z), " &
"222 (BC_4, PA2, INPUT, X), " &
"221 (BC_1, *, internal, 0 )," &
"220 (BC_1, *, internal, 0 )," &
"219 (BC_1, *, internal, 0 )," &
"218 (BC_1, *, CONTROL, 1), " &
"217 (BC_1, PB11, OUTPUT3, X, 218, 1, Z), " &
"216 (BC_4, PB11, INPUT, X), " &
"215 (BC_1, *, internal, 0 )," &
"214 (BC_1, *, internal, 0 )," &
"213 (BC_1, *, internal, 0 )," &
"212 (BC_1, *, internal, 0 )," &
"211 (BC_1, *, internal, 0 )," &
"210 (BC_1, *, internal, 0 )," &
"209 (BC_1, *, internal, 0 )," &
"208 (BC_1, *, internal, 0 )," &
"207 (BC_1, *, internal, 0 )," &
"206 (BC_1, *, CONTROL, 1), " &
"205 (BC_1, PA1, OUTPUT3, X, 206, 1, Z), " &
"204 (BC_4, PA1, INPUT, X), " &
"203 (BC_1, *, CONTROL, 1), " &
"202 (BC_1, PA0, OUTPUT3, X, 203, 1, Z), " &
"201 (BC_4, PA0, INPUT, X), " &
"200 (BC_1, *, CONTROL, 1), " &
"199 (BC_1, PG13, OUTPUT3, X, 200, 1, Z), " &
"198 (BC_4, PG13, INPUT, X), " &
"197 (BC_1, *, internal, 0 )," &
"196 (BC_1, *, internal, 0 )," &
"195 (BC_1, *, internal, 0 )," &
"194 (BC_1, *, CONTROL, 1), " &
"193 (BC_1, PG14, OUTPUT3, X, 194, 1, Z), " &
"192 (BC_4, PG14, INPUT, X), " &
"191 (BC_1, *, internal, 0 )," &
"190 (BC_1, *, internal, 0 )," &
"189 (BC_1, *, internal, 0 )," &
"188 (BC_1, *, CONTROL, 1), " &
"187 (BC_1, PC2, OUTPUT3, X, 188, 1, Z), " &
"186 (BC_4, PC2, INPUT, X), " &
"185 (BC_1, *, CONTROL, 1), " &
"184 (BC_1, PA3, OUTPUT3, X, 185, 1, Z), " &
"183 (BC_4, PA3, INPUT, X), " &
"182 (BC_1, *, CONTROL, 1), " &
"181 (BC_1, PE2, OUTPUT3, X, 182, 1, Z), " &
"180 (BC_4, PE2, INPUT, X), " &
"179 (BC_1, *, internal, 0 )," &
"178 (BC_1, *, internal, 0 )," &
"177 (BC_1, *, internal, 0 )," &
"176 (BC_1, *, CONTROL, 1), " &
"175 (BC_1, PC3, OUTPUT3, X, 176, 1, Z), " &
"174 (BC_4, PC3, INPUT, X), " &
"173 (BC_1, *, internal, 0 )," &
"172 (BC_1, *, internal, 0 )," &
"171 (BC_1, *, internal, 0 )," &
"170 (BC_1, *, internal, 0 )," &
"169 (BC_1, *, internal, 0 )," &
"168 (BC_1, *, internal, 0 )," &
"167 (BC_1, *, internal, 0 )," &
"166 (BC_1, *, internal, 0 )," &
"165 (BC_1, *, internal, 0 )," &
"164 (BC_1, *, internal, 0 )," &
"163 (BC_1, *, internal, 0 )," &
"162 (BC_1, *, internal, 0 )," &
"161 (BC_1, *, CONTROL, 1), " &
"160 (BC_1, PA14, OUTPUT3, X, 161, 1, Z), " &
"159 (BC_4, PA14, INPUT, X), " &
"158 (BC_1, *, CONTROL, 1), " &
"157 (BC_1, PA13, OUTPUT3, X, 158, 1, Z), " &
"156 (BC_4, PA13, INPUT, X), " &
"155 (BC_1, *, CONTROL, 1), " &
"154 (BC_1, PH1_OSC_OUT, OUTPUT3, X, 155, 1, Z), " &
"153 (BC_4, PH1_OSC_OUT, INPUT, X), " &
"152 (BC_1, *, CONTROL, 1), " &
"151 (BC_1, PH0_OSC_IN, OUTPUT3, X, 152, 1, Z), " &
"150 (BC_4, PH0_OSC_IN, INPUT, X), " &
"149 (BC_4, BOOT2, INPUT, X), " &
"148 (BC_4, BOOT1, INPUT, X), " &
"147 (BC_4, BOOT0, INPUT, X), " &
"146 (BC_1, *, CONTROL, 1), " &
"145 (BC_1, PC14_OSC32_IN, OUTPUT3, X, 146, 1, Z), " &
"144 (BC_4, PC14_OSC32_IN, INPUT, X), " &
"143 (BC_1, *, CONTROL, 1), " &
"142 (BC_1, PC15_OSC32_OUT, OUTPUT3, X, 143, 1, Z), " &
"141 (BC_4, PC15_OSC32_OUT, INPUT, X), " &
"140 (BC_1, *, CONTROL, 1), " &
"139 (BC_1, PC13, OUTPUT3, X, 140, 1, Z), " &
"138 (BC_4, PC13, INPUT, X), " &
"137 (BC_1, *, internal, 0 )," &
"136 (BC_1, *, internal, 0 )," &
"135 (BC_1, *, internal, 0 )," &
"134 (BC_1, *, internal, 0 )," &
"133 (BC_1, *, internal, 0 )," &
"132 (BC_1, *, internal, 0 )," &
"131 (BC_1, *, CONTROL, 1), " &
"130 (BC_1, PD8, OUTPUT3, X, 131, 1, Z), " &
"129 (BC_4, PD8, INPUT, X), " &
"128 (BC_1, *, internal, 0 )," &
"127 (BC_1, *, internal, 0 )," &
"126 (BC_1, *, internal, 0 )," &
"125 (BC_1, *, internal, 0 )," &
"124 (BC_1, *, internal, 0 )," &
"123 (BC_1, *, internal, 0 )," &
"122 (BC_1, *, internal, 0 )," &
"121 (BC_1, *, internal, 0 )," &
"120 (BC_1, *, internal, 0 )," &
"119 (BC_1, *, internal, 0 )," &
"118 (BC_1, *, internal, 0 )," &
"117 (BC_1, *, internal, 0 )," &
"116 (BC_1, *, internal, 0 )," &
"115 (BC_1, *, internal, 0 )," &
"114 (BC_1, *, internal, 0 )," &
"113 (BC_1, *, internal, 0 )," &
"112 (BC_1, *, internal, 0 )," &
"111 (BC_1, *, internal, 0 )," &
"110 (BC_1, *, internal, 0 )," &
"109 (BC_1, *, internal, 0 )," &
"108 (BC_1, *, internal, 0 )," &
"107 (BC_1, *, internal, 0 )," &
"106 (BC_1, *, internal, 0 )," &
"105 (BC_1, *, internal, 0 )," &
"104 (BC_1, *, internal, 0 )," &
"103 (BC_1, *, internal, 0 )," &
"102 (BC_1, *, internal, 0 )," &
"101 (BC_1, *, internal, 0 )," &
"100 (BC_1, *, internal, 0 )," &
"99 (BC_1, *, internal, 0 )," &
"98 (BC_1, *, internal, 0 )," &
"97 (BC_1, *, internal, 0 )," &
"96 (BC_1, *, internal, 0 )," &
"95 (BC_1, *, internal, 0 )," &
"94 (BC_1, *, internal, 0 )," &
"93 (BC_1, *, internal, 0 )," &
"92 (BC_1, *, internal, 0 )," &
"91 (BC_1, *, internal, 0 )," &
"90 (BC_1, *, internal, 0 )," &
"89 (BC_1, *, internal, 0 )," &
"88 (BC_1, *, internal, 0 )," &
"87 (BC_1, *, internal, 0 )," &
"86 (BC_1, *, internal, 0 )," &
"85 (BC_1, *, internal, 0 )," &
"84 (BC_1, *, internal, 0 )," &
"83 (BC_1, *, internal, 0 )," &
"82 (BC_1, *, internal, 0 )," &
"81 (BC_1, *, internal, 0 )," &
"80 (BC_1, *, internal, 0 )," &
"79 (BC_1, *, internal, 0 )," &
"78 (BC_1, *, internal, 0 )," &
"77 (BC_1, *, internal, 0 )," &
"76 (BC_1, *, internal, 0 )," &
"75 (BC_1, *, internal, 0 )," &
"74 (BC_1, *, internal, 0 )," &
"73 (BC_1, *, internal, 0 )," &
"72 (BC_1, *, internal, 0 )," &
"71 (BC_1, *, CONTROL, 1), " &
"70 (BC_1, PG12, OUTPUT3, X, 71, 1, Z), " &
"69 (BC_4, PG12, INPUT, X), " &
"68 (BC_1, *, internal, 0 )," &
"67 (BC_1, *, internal, 0 )," &
"66 (BC_1, *, internal, 0 )," &
"65 (BC_1, *, internal, 0 )," &
"64 (BC_1, *, internal, 0 )," &
"63 (BC_1, *, internal, 0 )," &
"62 (BC_1, *, internal, 0 )," &
"61 (BC_1, *, internal, 0 )," &
"60 (BC_1, *, internal, 0 )," &
"59 (BC_1, *, internal, 0 )," &
"58 (BC_1, *, internal, 0 )," &
"57 (BC_1, *, internal, 0 )," &
"56 (BC_1, *, internal, 0 )," &
"55 (BC_1, *, internal, 0 )," &
"54 (BC_1, *, internal, 0 )," &
"53 (BC_1, *, internal, 0 )," &
"52 (BC_1, *, internal, 0 )," &
"51 (BC_1, *, internal, 0 )," &
"50 (BC_1, *, internal, 0 )," &
"49 (BC_1, *, internal, 0 )," &
"48 (BC_1, *, internal, 0 )," &
"47 (BC_1, *, internal, 0 )," &
"46 (BC_1, *, internal, 0 )," &
"45 (BC_1, *, internal, 0 )," &
"44 (BC_1, *, internal, 0 )," &
"43 (BC_1, *, internal, 0 )," &
"42 (BC_1, *, internal, 0 )," &
"41 (BC_1, *, internal, 0 )," &
"40 (BC_1, *, internal, 0 )," &
"39 (BC_1, *, internal, 0 )," &
"38 (BC_1, *, internal, 0 )," &
"37 (BC_1, *, internal, 0 )," &
"36 (BC_1, *, internal, 0 )," &
"35 (BC_1, *, internal, 0 )," &
"34 (BC_1, *, internal, 0 )," &
"33 (BC_1, *, internal, 0 )," &
"32 (BC_1, *, internal, 0 )," &
"31 (BC_1, *, internal, 0 )," &
"30 (BC_1, *, internal, 0 )," &
"29 (BC_1, *, internal, 0 )," &
"28 (BC_1, *, internal, 0 )," &
"27 (BC_1, *, internal, 0 )," &
"26 (BC_1, *, internal, 0 )," &
"25 (BC_1, *, internal, 0 )," &
"24 (BC_1, *, internal, 0 )," &
"23 (BC_1, *, internal, 0 )," &
"22 (BC_1, *, internal, 0 )," &
"21 (BC_1, *, internal, 0 )," &
"20 (BC_1, *, internal, 0 )," &
"19 (BC_1, *, internal, 0 )," &
"18 (BC_1, *, internal, 0 )," &
"17 (BC_1, *, internal, 0 )," &
"16 (BC_1, *, internal, 0 )," &
"15 (BC_1, *, internal, 0 )," &
"14 (BC_1, *, internal, 0 )," &
"13 (BC_1, *, internal, 0 )," &
"12 (BC_1, *, internal, 0 )," &
"11 (BC_1, *, internal, 0 )," &
"10 (BC_1, *, internal, 0 )," &
"9 (BC_1, *, internal, 0 )," &
"8 (BC_1, *, internal, 0 )," &
"7 (BC_1, *, internal, 0 )," &
"6 (BC_1, *, internal, 0 )," &
"5 (BC_1, *, internal, 0 )," &
"4 (BC_1, *, internal, 0 )," &
"3 (BC_1, *, internal, 0 )," &
"2 (BC_1, *, internal, 0 )," &
"1 (BC_1, *, internal, 0 )," &
"0 (BC_1, *, internal, 0 ) " ;
attribute DESIGN_WARNING of STM32MP151_153xAD_TFBGA257: entity is
"Device configuration can effect boundary scan behavior. " &
"Keep the NRST pin low to ensure default boundary scan operation " &
"as described in this file." ;
end STM32MP151_153xAD_TFBGA257;
-- ******************* (C) COPYRIGHT 2019 STMicroelectronics *****END OF FILE********