BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: XCR3128A_TQ128

--$ XILINX$RCSfile: xcr3128a_tq128.bsd,v $
--$ XILINX$Revision: 1.1 $
--
-- BSDL file for device XCR3128A, package TQ128
-- Xilinx, Inc. $State: ADVANCED $ $Date: 2000-07-27 10:01:28-07 $
-- Generated by Phillip Young
--
-- IMPORTANT NOTE  WARNING !!   
-- ****************************************************************
--     Boundary registers as called out by this file do not exist!  
--     They must be described for  BSDL Compliance.  Extest and 
--     Preload commands do not exist nor function.  If either of 
--     those commands are selected, the bypass register will be 
--     used.
--
-- For technical support, contact Xilinx at
-- 
--             http://support.xilinx.com
-- 
-- or as follow:
--	North America	1-800-255-7778		hotline@xilinx.com
--	United Kingdom	(44) 1932 820821	ukhelp@xilinx.com
--	France		(33) 1 3463 0100	frhelp@xilinx.com
--	Germany		(49) 89 991 54930	dlhelp@xilinx.com
--	Japan		(81) 3-3297-9163	jhotline@xilinx.com
--
entity XCR3128A_TQ128 is

generic (PHYSICAL_PIN_MAP : string := "xcr3128a");

port (din      : linkage      bit_vector (0 to 3);   -- Tim pin type IN
      TDI      : in      bit; 			-- Tim pin type TDI
      TMS      : in      bit; 			-- Tim pin type TMS
      TCK      : in      bit; 			-- Tim pin type TCK
      TDO      : out     bit; 			-- Tim pin type TDO
      ioA      : linkage   bit_vector (0 to 11);  -- Tim pin type IOO
      ioB      : linkage   bit_vector (0 to 10);  -- Tim pin type IOO
      ioC      : linkage   bit_vector (0 to 10);  -- Tim pin type IOO
      ioD      : linkage   bit_vector (0 to 11);  -- Tim pin type IOO
      ioE      : linkage   bit_vector (0 to 11);  -- Tim pin type IOO
      ioF      : linkage   bit_vector (0 to 10);  -- Tim pin type IOO
      ioG      : linkage   bit_vector (0 to 10);  -- Tim pin type IOO
      ioH      : linkage   bit_vector (0 to 11);  -- Tim pin type IOO
      Vcc      : linkage bit_vector (1 to 8);
      Gnd      : linkage bit_vector (1 to 8);
      nc       : linkage bit_vector (1 to 12)
      );

use STD_1149_1_1994.ALL;

attribute COMPONENT_CONFORMANCE of XCR3128A_TQ128 : entity is 
     "std_1149_1_1993";

attribute PIN_MAP             of XCR3128A_TQ128 : entity is PHYSICAL_PIN_MAP;

constant xcr3128a : PIN_MAP_STRING :=
     "din      : (114, 116, 115, 117)," &
     "TDI      :    8," &
     "TMS      :   21," &
     "TCK      :   82," &
     "TDO      :   95," &
     "ioA      : (  3,   2,   1, 128, 127, 126, 125, 124, 122, 121, 120, 119)," &
     "ioB      : ( 20,  19,  18,  17,  15,  14,  13,  12,  11,  10,   9),     " &
     "ioC      : ( 36,  32,  31,  30,  29,  28,  27,  26,  24,  23,  22),     " &
     "ioD      : ( 50,  49,  48,  47,  45,  44,  43,  42,  41,  40,  39,  38)," &
     "ioE      : ( 53,  54,  55,  56,  58,  59,  60,  61,  62,  63,  64,  65)," &
     "ioF      : ( 67,  71,  72,  73,  74,  75,  76,  77,  79,  80,  81),     " &
     "ioG      : ( 83,  84,  85,  86,  88,  89,  90,  91,  92,  93,  94),     " &
     "ioH      : (100, 101, 102, 103, 104, 105, 106, 107, 109, 110, 111, 112)," &
     "Vcc      : (  7,  25,  46,  52,  66,  87, 108, 118),		      " &
     "Gnd      : ( 16,  37,  51,  57,  78,  96, 113, 123),		      " &
     "nc       : (  4,   5,   6,  33,  34,  35,  68,  69,  70,  97,  98,  99) ";

attribute TAP_SCAN_CLOCK      of TCK : signal is (10.0e6, both);
attribute TAP_SCAN_IN         of TDI : signal is true;
attribute TAP_SCAN_MODE       of TMS : signal is true;
attribute TAP_SCAN_OUT        of TDO : signal is true;

-- Instruction Register Definitions

attribute INSTRUCTION_LENGTH  of XCR3128A_TQ128 : entity is 4;
attribute INSTRUCTION_OPCODE  of XCR3128A_TQ128 : entity is 
     "EXTEST         (0000)," &
     "IDCODE         (0001)," &
     "SAMPLE         (0010)," &
     "BYPASS         (1111)," &
     "ENABLEOTF      (1000)," &
     "ENABLE         (1001)," &
     "ERASE          (1010)," &
     "PROGRAM        (1011)," &
     "VERIFY         (1100)," &
     "INIT           (1101)";

attribute INSTRUCTION_CAPTURE of XCR3128A_TQ128 : entity is "0001";

attribute IDCODE_REGISTER     of XCR3128A_TQ128 : entity is 
     "XXXX" &                 -- Version
     "000"  &		      -- Architecture
     "010"  &		      -- Technology
     "001001" 	   & 	      -- Part number
     "1"	   &	      -- Voltage 
     "010"	   &	      -- Package    
     "00000010101" &          -- Manufacturer
     "1";                     -- mandatory

attribute REGISTER_ACCESS     of XCR3128A_TQ128 : entity is 

     "DEVICE_ID         (IDCODE)," &
     "BOUNDARY       (SAMPLE)," &
     "BYPASS         (BYPASS)," &
     "DATAREG[5]  (ENABLEOTF)," &
     "DATAREG[5]     (ENABLE)," &
     "DATAREG[5]      (ERASE)," &
     "DATAREG[5]    (PROGRAM)," &
     "DATAREG[5]     (VERIFY)," &
     "BYPASS           (INIT)";




attribute BOUNDARY_LENGTH     of XCR3128A_TQ128 : entity is 1;

attribute BOUNDARY_REGISTER   of XCR3128A_TQ128 : entity is 
--
--   num  cell  port  function  safe     [ccell     disval    rslt]
--
     "0  (BC_1,  *,   INTERNAL,  X)";


end XCR3128A_TQ128;