-- *********************************************************************
-- * *
-- * ispLSI2128VL 100 pin TQFP BSDL Model *
-- * copyright 1996-1999, Lattice Semiconductor Corporation *
-- * IEEE 1149.1b-1994 *
-- * Standard Test Access Port and Boundary-Scan Architecture *
-- * VHDL Description File *
-- * *
-- * Date: Jul 15 1999 *
-- * File Version: v2.0-00 *
-- * *
-- * This BSDL file has been syntaxed checked with: *
-- * - Teradyne VICTORY *
-- * - Assett Intertech *
-- * *
-- *********************************************************************
-- * *
-- * E2CMOS, GAL, ispGAL, pDS, pLSI, Silicon Forest and UltraMOS are *
-- * registered trademarks of Lattice Semiconductor Corporation *
-- * *
-- * Generic Array Logic, ISP, ispCODE, ispDOWNLOAD, ispGDS, ispLSI *
-- * ispSTREAM, Latch-Lock, pDS+ and RFT are trademarks of Lattice *
-- * Semiconductor Corporation. *
-- * *
-- *********************************************************************
-- * *
-- * IMPORTANT *
-- * *
-- * The following is a BSDL file that tests all of the I/O pins *
-- * as bidirectional pins. The functionality of the BSCAN register *
-- * for this device is independent of the pattern programmed *
-- * into the device. An addtional programming step is not *
-- * required to configure the I/O pins prior to BSCAN test. *
-- * *
-- *********************************************************************
-- The Overall Structute of the Entity Description
entity ispLSI2128VL is
-- Generic Parameter Statement
generic (PHYSICAL_PIN_MAP : string := "TQFP_100");
-- Logical Port Description Statement
port ( TDI: in bit; -- JTAG input pin
TMS: in bit; -- JTAG input pin
TCK: in bit; -- JTAG input pin
TDO: out bit; -- JTAG output pin
ispEN: linkage bit; -- ispEN pin
RESET: in bit; -- Active low RESET pin
GOE: in bit_vector (0 to 1); -- Global Output Enable
Clk: in bit_vector (0 to 2); -- Clock input pins
DIn: in bit_vector (0 to 3); -- Ded input pins
NoC: linkage bit_vector (0 to 12); -- No connect pins
BIp: inout bit_vector (0 to 63); -- Bi-Directional pins
VCC: linkage bit_vector (0 to 3); -- VCC pins
GND: linkage bit_vector (0 to 3) -- GND pins
);
-- Version Control
use STD_1149_1_1994.all; -- 1149.1-1994 attributes
-- Component Conformance Statement
attribute COMPONENT_CONFORMANCE of ispLSI2128VL : entity is
"STD_1149_1_1993";
-- Device Pacakge Pin Mapping
attribute PIN_MAP of ispLSI2128VL : entity is PHYSICAL_PIN_MAP;
constant TQFP_100: PIN_MAP_STRING:=
"TDI:16," & -- JTAG (TDI) input pin
"TMS:37," & -- JTAG (TMS) input pin
"TCK:59," & -- JTAG (TCK) input pin
"TDO:87," & -- JTAG (TDO) output pin
"RESET:11," & -- RESET input pin
"ispEN:15," & -- ispEN control pin
"GOE:( 62, 13), " & -- Global OE pins
"Clk:( 10, 65, 60), " & -- Clock pins
"DIn:( 66, 88, 38, 9), " & -- Dedicated Input pins
"NoC:( 4, 21, 25, 31, 44, 50, 54, " & -- No Connect pins
" 64, 71, 75, 81, 94, 100), " & -- No Connect pins
"BIp:( 17, 18, 19, 20, 22, 23, 24, " & -- I/O pins
" 26, 27, 28, 29, 30, 32, 33, " & -- I/O pins
" 34, 35, 40, 41, 42, 43, 45, " & -- I/O pins
" 46, 47, 48, 49, 51, 52, 53, " & -- I/O pins
" 55, 56, 57, 58, 67, 68, 69, " & -- I/O pins
" 70, 72, 73, 74, 76, 77, 78, " & -- I/O pins
" 79, 80, 82, 83, 84, 85, 90, " & -- I/O pins
" 91, 92, 93, 95, 96, 97, 98, " & -- I/O pins
" 99, 1, 2, 3, 5, 6, 7, " & -- I/O pins
" 8), " & -- I/O pins
"VCC:( 12, 36, 63, 89), " & -- VCC pins
"GND:( 14, 39, 61, 86) " ; -- GND pins
-- Scan Port Identification
attribute TAP_SCAN_CLOCK of TCK : Signal is (5.0e6, BOTH);
attribute TAP_SCAN_IN of TDI : Signal is True;
attribute TAP_SCAN_OUT of TDO : Signal is True;
attribute TAP_SCAN_MODE of TMS : Signal is True;
-- Instruction Register Description
attribute INSTRUCTION_LENGTH of ispLSI2128VL : entity is 5;
attribute INSTRUCTION_OPCODE of ispLSI2128VL : entity is
"BYPASS (11111), " &
"SAMPLE (11100), " &
"EXTEST (00000), " &
"IDCODE (10110), " &
"USERCODE (10111), " &
"HIGHZ (11000), " &
"ADDSHFT (00001), " &
"DATASHFT (00010), " &
"UBE (10000), " &
"PRGM (00111), " &
"VFY (10010), " &
"PRGMSC (01001), " &
"PRIVATE (00011,00100,00101,00110,01000,01010, " &
"01011,01100,01110,01111,10001,10011, " &
"10100,10101,11001,11010,11011,11101, " &
"11110)" ;
attribute INSTRUCTION_CAPTURE of ispLSI2128VL : entity is "11001";
attribute INSTRUCTION_PRIVATE of ispLSI2128VL : entity is "PRIVATE";
-- IDCODE Defintion
attribute IDCODE_REGISTER of ispLSI2128VL: entity is
"0001" & -- version
"0000001100001000" & -- part number (0308)
"00000100001" & -- manufacturer's identity
"1" ; -- required by 1149.1
-- USERCODE Defintion
attribute USERCODE_REGISTER of ispLSI2128VL: entity is
"11111111111111111111111111111111";
-- Register Access Description
attribute REGISTER_ACCESS of ispLSI2128VL : entity is
"BOUNDARY (SAMPLE, EXTEST), " &
"BYPASS (BYPASS, HIGHZ), " &
"ADDREG[134] (ADDSHFT), " &
"DATAREG[320] (DATASHFT), " &
"UBEREG[1] (UBE), " &
"PRGREG[134] (PRGM), " &
"VFYREG[320] (VFY), " &
"SECREG[1] (PRGMSC) " ;
-- **********************************************************************
-- Boundary Scan Register Description, Cell 0 is the closest to TDO
-- **********************************************************************
attribute BOUNDARY_LENGTH of ispLSI2128VL : entity is 206;
attribute BOUNDARY_REGISTER of ispLSI2128VL : entity is
-- num cell port function safe [ccell disval rslt]
"0205 (BC_1, *, internal, x)," &
"0204 (BC_1, *, internal, x)," &
"0203 (BC_1, *, internal, x)," &
"0202 (BC_1, *, internal, x)," &
"0201 (BC_1, DIn(0), input, x)," &
"0200 (BC_1, DIn(1), input, x)," &
"0199 (BC_1, DIn(2), input, x)," &
"0198 (BC_1, DIn(3), input, x)," &
"0197 (BC_1, RESET, input, x)," &
"0196 (BC_1, Clk(0), input, x)," &
"0195 (BC_1, Clk(1), input, x)," &
"0194 (BC_1, Clk(2), input, x)," &
"0193 (BC_1, GOE(0), input, x)," &
"0192 (BC_1, GOE(1), input, x)," &
"0191 (BC_1, *, control, 0)," &
"0190 (BC_1, BIp(30), output3, x, 191, 0, z)," &
"0189 (BC_1, BIp(30), input, x)," &
"0188 (BC_1, *, control, 0)," &
"0187 (BC_1, BIp(31), output3, x, 188, 0, z)," &
"0186 (BC_1, BIp(31), input, x)," &
"0185 (BC_1, *, control, 0)," &
"0184 (BC_1, BIp(28), output3, x, 185, 0, z)," &
"0183 (BC_1, BIp(28), input, x)," &
"0182 (BC_1, *, control, 0)," &
"0181 (BC_1, BIp(29), output3, x, 182, 0, z)," &
"0180 (BC_1, BIp(29), input, x)," &
"0179 (BC_1, *, control, 0)," &
"0178 (BC_1, BIp(26), output3, x, 179, 0, z)," &
"0177 (BC_1, BIp(26), input, x)," &
"0176 (BC_1, *, control, 0)," &
"0175 (BC_1, BIp(27), output3, x, 176, 0, z)," &
"0174 (BC_1, BIp(27), input, x)," &
"0173 (BC_1, *, control, 0)," &
"0172 (BC_1, BIp(24), output3, x, 173, 0, z)," &
"0171 (BC_1, BIp(24), input, x)," &
"0170 (BC_1, *, control, 0)," &
"0169 (BC_1, BIp(25), output3, x, 170, 0, z)," &
"0168 (BC_1, BIp(25), input, x)," &
"0167 (BC_1, *, control, 0)," &
"0166 (BC_1, BIp(22), output3, x, 167, 0, z)," &
"0165 (BC_1, BIp(22), input, x)," &
"0164 (BC_1, *, control, 0)," &
"0163 (BC_1, BIp(23), output3, x, 164, 0, z)," &
"0162 (BC_1, BIp(23), input, x)," &
"0161 (BC_1, *, control, 0)," &
"0160 (BC_1, BIp(20), output3, x, 161, 0, z)," &
"0159 (BC_1, BIp(20), input, x)," &
"0158 (BC_1, *, control, 0)," &
"0157 (BC_1, BIp(21), output3, x, 158, 0, z)," &
"0156 (BC_1, BIp(21), input, x)," &
"0155 (BC_1, *, control, 0)," &
"0154 (BC_1, BIp(18), output3, x, 155, 0, z)," &
"0153 (BC_1, BIp(18), input, x)," &
"0152 (BC_1, *, control, 0)," &
"0151 (BC_1, BIp(19), output3, x, 152, 0, z)," &
"0150 (BC_1, BIp(19), input, x)," &
"0149 (BC_1, *, control, 0)," &
"0148 (BC_1, BIp(16), output3, x, 149, 0, z)," &
"0147 (BC_1, BIp(16), input, x)," &
"0146 (BC_1, *, control, 0)," &
"0145 (BC_1, BIp(17), output3, x, 146, 0, z)," &
"0144 (BC_1, BIp(17), input, x)," &
"0143 (BC_1, *, control, 0)," &
"0142 (BC_1, BIp(14), output3, x, 143, 0, z)," &
"0141 (BC_1, BIp(14), input, x)," &
"0140 (BC_1, *, control, 0)," &
"0139 (BC_1, BIp(15), output3, x, 140, 0, z)," &
"0138 (BC_1, BIp(15), input, x)," &
"0137 (BC_1, *, control, 0)," &
"0136 (BC_1, BIp(12), output3, x, 137, 0, z)," &
"0135 (BC_1, BIp(12), input, x)," &
"0134 (BC_1, *, control, 0)," &
"0133 (BC_1, BIp(13), output3, x, 134, 0, z)," &
"0132 (BC_1, BIp(13), input, x)," &
"0131 (BC_1, *, control, 0)," &
"0130 (BC_1, BIp(10), output3, x, 131, 0, z)," &
"0129 (BC_1, BIp(10), input, x)," &
"0128 (BC_1, *, control, 0)," &
"0127 (BC_1, BIp(11), output3, x, 128, 0, z)," &
"0126 (BC_1, BIp(11), input, x)," &
"0125 (BC_1, *, control, 0)," &
"0124 (BC_1, BIp(8), output3, x, 125, 0, z)," &
"0123 (BC_1, BIp(8), input, x)," &
"0122 (BC_1, *, control, 0)," &
"0121 (BC_1, BIp(9), output3, x, 122, 0, z)," &
"0120 (BC_1, BIp(9), input, x)," &
"0119 (BC_1, *, control, 0)," &
"0118 (BC_1, BIp(6), output3, x, 119, 0, z)," &
"0117 (BC_1, BIp(6), input, x)," &
"0116 (BC_1, *, control, 0)," &
"0115 (BC_1, BIp(7), output3, x, 116, 0, z)," &
"0114 (BC_1, BIp(7), input, x)," &
"0113 (BC_1, *, control, 0)," &
"0112 (BC_1, BIp(4), output3, x, 113, 0, z)," &
"0111 (BC_1, BIp(4), input, x)," &
"0110 (BC_1, *, control, 0)," &
"0109 (BC_1, BIp(5), output3, x, 110, 0, z)," &
"0108 (BC_1, BIp(5), input, x)," &
"0107 (BC_1, *, control, 0)," &
"0106 (BC_1, BIp(2), output3, x, 107, 0, z)," &
"0105 (BC_1, BIp(2), input, x)," &
"0104 (BC_1, *, control, 0)," &
"0103 (BC_1, BIp(3), output3, x, 104, 0, z)," &
"0102 (BC_1, BIp(3), input, x)," &
"0101 (BC_1, *, control, 0)," &
"0100 (BC_1, BIp(0), output3, x, 101, 0, z)," &
"0099 (BC_1, BIp(0), input, x)," &
"0098 (BC_1, *, control, 0)," &
"0097 (BC_1, BIp(1), output3, x, 98, 0, z)," &
"0096 (BC_1, BIp(1), input, x)," &
"0095 (BC_1, *, control, 0)," &
"0094 (BC_1, BIp(32), output3, x, 95, 0, z)," &
"0093 (BC_1, BIp(32), input, x)," &
"0092 (BC_1, *, control, 0)," &
"0091 (BC_1, BIp(33), output3, x, 92, 0, z)," &
"0090 (BC_1, BIp(33), input, x)," &
"0089 (BC_1, *, control, 0)," &
"0088 (BC_1, BIp(34), output3, x, 89, 0, z)," &
"0087 (BC_1, BIp(34), input, x)," &
"0086 (BC_1, *, control, 0)," &
"0085 (BC_1, BIp(35), output3, x, 86, 0, z)," &
"0084 (BC_1, BIp(35), input, x)," &
"0083 (BC_1, *, control, 0)," &
"0082 (BC_1, BIp(36), output3, x, 83, 0, z)," &
"0081 (BC_1, BIp(36), input, x)," &
"0080 (BC_1, *, control, 0)," &
"0079 (BC_1, BIp(37), output3, x, 80, 0, z)," &
"0078 (BC_1, BIp(37), input, x)," &
"0077 (BC_1, *, control, 0)," &
"0076 (BC_1, BIp(38), output3, x, 77, 0, z)," &
"0075 (BC_1, BIp(38), input, x)," &
"0074 (BC_1, *, control, 0)," &
"0073 (BC_1, BIp(39), output3, x, 74, 0, z)," &
"0072 (BC_1, BIp(39), input, x)," &
"0071 (BC_1, *, control, 0)," &
"0070 (BC_1, BIp(40), output3, x, 71, 0, z)," &
"0069 (BC_1, BIp(40), input, x)," &
"0068 (BC_1, *, control, 0)," &
"0067 (BC_1, BIp(41), output3, x, 68, 0, z)," &
"0066 (BC_1, BIp(41), input, x)," &
"0065 (BC_1, *, control, 0)," &
"0064 (BC_1, BIp(42), output3, x, 65, 0, z)," &
"0063 (BC_1, BIp(42), input, x)," &
"0062 (BC_1, *, control, 0)," &
"0061 (BC_1, BIp(43), output3, x, 62, 0, z)," &
"0060 (BC_1, BIp(43), input, x)," &
"0059 (BC_1, *, control, 0)," &
"0058 (BC_1, BIp(44), output3, x, 59, 0, z)," &
"0057 (BC_1, BIp(44), input, x)," &
"0056 (BC_1, *, control, 0)," &
"0055 (BC_1, BIp(45), output3, x, 56, 0, z)," &
"0054 (BC_1, BIp(45), input, x)," &
"0053 (BC_1, *, control, 0)," &
"0052 (BC_1, BIp(46), output3, x, 53, 0, z)," &
"0051 (BC_1, BIp(46), input, x)," &
"0050 (BC_1, *, control, 0)," &
"0049 (BC_1, BIp(47), output3, x, 50, 0, z)," &
"0048 (BC_1, BIp(47), input, x)," &
"0047 (BC_1, *, control, 0)," &
"0046 (BC_1, BIp(48), output3, x, 47, 0, z)," &
"0045 (BC_1, BIp(48), input, x)," &
"0044 (BC_1, *, control, 0)," &
"0043 (BC_1, BIp(49), output3, x, 44, 0, z)," &
"0042 (BC_1, BIp(49), input, x)," &
"0041 (BC_1, *, control, 0)," &
"0040 (BC_1, BIp(50), output3, x, 41, 0, z)," &
"0039 (BC_1, BIp(50), input, x)," &
"0038 (BC_1, *, control, 0)," &
"0037 (BC_1, BIp(51), output3, x, 38, 0, z)," &
"0036 (BC_1, BIp(51), input, x)," &
"0035 (BC_1, *, control, 0)," &
"0034 (BC_1, BIp(52), output3, x, 35, 0, z)," &
"0033 (BC_1, BIp(52), input, x)," &
"0032 (BC_1, *, control, 0)," &
"0031 (BC_1, BIp(53), output3, x, 32, 0, z)," &
"0030 (BC_1, BIp(53), input, x)," &
"0029 (BC_1, *, control, 0)," &
"0028 (BC_1, BIp(54), output3, x, 29, 0, z)," &
"0027 (BC_1, BIp(54), input, x)," &
"0026 (BC_1, *, control, 0)," &
"0025 (BC_1, BIp(55), output3, x, 26, 0, z)," &
"0024 (BC_1, BIp(55), input, x)," &
"0023 (BC_1, *, control, 0)," &
"0022 (BC_1, BIp(56), output3, x, 23, 0, z)," &
"0021 (BC_1, BIp(56), input, x)," &
"0020 (BC_1, *, control, 0)," &
"0019 (BC_1, BIp(57), output3, x, 20, 0, z)," &
"0018 (BC_1, BIp(57), input, x)," &
"0017 (BC_1, *, control, 0)," &
"0016 (BC_1, BIp(58), output3, x, 17, 0, z)," &
"0015 (BC_1, BIp(58), input, x)," &
"0014 (BC_1, *, control, 0)," &
"0013 (BC_1, BIp(59), output3, x, 14, 0, z)," &
"0012 (BC_1, BIp(59), input, x)," &
"0011 (BC_1, *, control, 0)," &
"0010 (BC_1, BIp(60), output3, x, 11, 0, z)," &
"0009 (BC_1, BIp(60), input, x)," &
"0008 (BC_1, *, control, 0)," &
"0007 (BC_1, BIp(61), output3, x, 8, 0, z)," &
"0006 (BC_1, BIp(61), input, x)," &
"0005 (BC_1, *, control, 0)," &
"0004 (BC_1, BIp(62), output3, x, 5, 0, z)," &
"0003 (BC_1, BIp(62), input, x)," &
"0002 (BC_1, *, control, 0)," &
"0001 (BC_1, BIp(63), output3, x, 2, 0, z)," &
"0000 (BC_1, BIp(63), input, x)";
end ispLSI2128VL;