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ChipVORX ISP IP for Ultra Fast Flash Programming
BSDL File: MT9040_TOP Download View details  


-- **********************************************************************
--
--  FILE :  /projects/rt19/c342_prodev/master/srevD/prevA/mt9040.bsdl
--  generated by  c342 on Wed May 23 10:59:46 EDT 2002
--  using p.jtag.bsd rev 1.0 May 3,2001
--
-- BSDL description for top level entity MT9040_top
-- Device : MT9040        Package : SSOP48
-- 
-- Number of BSC cells: 31
-- 
-- **********************************************************************
--                        IMPORTANT NOTICE
-- 
--  ZARLINK and MT9040 are trademarks of ZARLINK Semiconductor. ZARLINK
--  products, marketed under trademarks, are protected under numerous US
--  and foreign patents and pending applications,  maskwork rights,  and
--  copyrights.
--
--  ZARLINK reserves the right to make changes to any products and 
--  services at any time without notice.  ZARLINK assumes no
--  responsibility or liability arising out of the application or use of
--  any information, product, or service described herein except as
--  expressly agreed to in writing by ZARLINK Corporation. ZARLINK 
--  customers are advised to obtain the latest version of device 
--  specifications before relying on any published information and before
--  placing orders for products or services.
--  *********************************************************************

--  ********************************************************************
--  Modification History:
--       rev 1.1:   Thu May  23 10:19:46 EDT 2002, fixed internal cells
--  ********************************************************************

--  ********************************************************************
--
--  SPECIAL NOTES
--
--  1. Note that pins 3 (NC1), 4 (NC2), 5 (NC3), 29 (NC4), 32 (NC5) and
--     43 (NC6) should be left open (no connect)
--
--  2. pins 33 (IC1) and 34 (IC2) to be tied to GND for normal operation
--     of the device.
--  
--  ********************************************************************



entity MT9040_top is

  generic(PHYSICAL_PIN_MAP : string := "SSOP48_PACKAGE");

port (
		 C2: out bit;
		 C4: out bit;
		 C6: out bit;
		 C8: out bit;
		 C15: out bit;
		 C16: out bit;
		 C19: out bit;
      		 F0OB: out bit;
      		 F16OB: out bit;
      		 F8O: out bit;
      		 FLOCK: in bit;
     		 FRQSEL1: in bit;
      		 FRQSEL2: in bit;
      		 NC5: linkage bit;
      		 NC4: linkage bit;
      		 IDDQ: linkage bit;
      		 LOCK: out bit;
     		 IC2: in bit;
      		 IC1: in bit;
     		 MODSEL1: in bit;
      		 MODSEL2: in bit;
      		 OSCI: linkage bit;
      		 OSCO: linkage bit;
      		 NC6: linkage bit;
      		 PRIREF: in bit;
      		 REFSEL: in bit;
      		 RSP: out bit;
      		 RSTB: in bit;
      		 NC2: linkage bit;
      		 NC3: linkage bit;
      		 SMCI: in bit;
      		 TCK: in bit;
      		 NC1: linkage bit;
      		 TDI: in bit;
      		 TDO: out bit;
      		 TEST: linkage bit;
      		 TM: in bit;
      		 TMS: in bit;
        TRSTB: in bit;
      		 TSP: out bit;
      		 GND: linkage bit_vector (1 to 4);
      		 VDD: linkage bit_vector (1 to 4)
);

 

  use STD_1149_1_1994.all;

  attribute COMPONENT_CONFORMANCE of MT9040_top : entity is
        "STD_1149_1_1993";

  attribute PIN_MAP of MT9040_top : entity is PHYSICAL_PIN_MAP;
  constant SSOP48_PACKAGE : PIN_MAP_STRING :=
		 "C2:19," &
		 "C4:20," &
		 "C6:27," &
		 "C8:25," &
		 "C15:16," &
		 "C16:26," &
		 "C19:21," &
		 "F0OB:12," &
		 "F16OB:11," &
		 "F8O:15," &
		 "FLOCK:22," &
		 "FRQSEL1:41," &
		 "FRQSEL2:40," &
		 "NC5:32," &
		 "NC4:29," &
		 "IDDQ:42," &
		 "LOCK:18," &
		 "IC2:34," &
		 "IC1:33," &
		 "MODSEL1:37," &
		 "MODSEL2:36," &
		 "OSCI:9," &
		 "OSCO:8," &
		 "NC6:43," &
		 "PRIREF:6," &
		 "REFSEL:38," &
		 "RSP:13," &
		 "RSTB:2," &
		 "NC2:4," &
		 "NC3:5," &
		 "SMCI:30," &
		 "TCK:47," &
		 "NC1:3," &
		 "TDI:45," &
		 "TDO:44," &
		 "TEST:39," &
		 "TM:24," &
		 "TMS:48," &
        "TRSTB:46," &
		 "TSP:14," &
		 "GND:(1,10,23,31)," &
		 "VDD:(7,17,28,35)";
 
  attribute TAP_SCAN_IN of tdi : signal is true;
  attribute TAP_SCAN_MODE of tms : signal is true;
  attribute TAP_SCAN_OUT of tdo : signal is true;
  attribute TAP_SCAN_CLOCK of tck : signal is (2.0e6,BOTH);
  attribute TAP_SCAN_RESET of TRSTB : signal is true;

  attribute INSTRUCTION_LENGTH of MT9040_top : entity is 3;
  attribute INSTRUCTION_OPCODE of MT9040_top : entity is
    "idcode  (001)," &
    "bypass  (111)," &
    "sample  (010)," &
    "extest  (000)"; 

  attribute INSTRUCTION_CAPTURE of MT9040_top : entity is "001";

  attribute IDCODE_REGISTER of MT9040_top : entity is
        "0000" & 		 		 -- version
        "1001000001000000" &    -- part number
        "00010100101" &		 		 -- manufacturer id
        "1";

  attribute REGISTER_ACCESS of MT9040_top : entity is
    "boundary (extest, sample)," &
    "bypass (bypass)," &
    "device_id (idcode)" ;

 
  attribute BOUNDARY_LENGTH of MT9040_top : entity is 31;
 
  attribute BOUNDARY_REGISTER of MT9040_top : entity is
--  		 num 		 cell  		 port   		 		 function 		 safe 		 ccel 		 disval 		 rslt
		 " 0		 ( BC_1,		 *,		 		 internal,		 X)," &
		 " 1		 ( BC_4,		 FRQSEL1,		 input,  		 X)," &
		 " 2		 ( BC_4,		 FRQSEL2,		 input,  		 X)," &
		 " 3		 ( BC_4,		 REFSEL,		 		 input,  		 X)," &
		 " 4		 ( BC_4,		 MODSEL1,		 input,  		 X)," &
		 " 5		 ( BC_4,		 MODSEL2,		 input,  		 X)," &
		 " 6		 ( BC_4,		 IC2,		 		 input,  		 X)," &
		 " 7		 ( BC_4,		 IC1,		 		 input,  		 X)," &
		 " 8		 ( BC_1,		 *,		 		 internal,		 X)," &
		 " 9		 ( BC_4,		 SMCI,		 		 input,  		 X)," &
		 " 10		 ( BC_1,		 *,		 		 internal,		 X)," &
		 " 11		 ( BC_1,		 C6,		 		 output2,		 X)," &
		 " 12		 ( BC_1,		 C16,		 		 output2,		 X)," &
		 " 13		 ( BC_1,		 C8,		 		 output2,		 X)," &
		 " 14		 ( BC_4,		 TM,		 		 input,  		 X)," &
		 " 15		 ( BC_4,		 FLOCK,		 		 input,  		 X)," &
		 " 16		 ( BC_1,		 C19,		 		 output2,		 X)," &
		 " 17		 ( BC_1,		 C4,		 		 output2,		 X)," &
		 " 18		 ( BC_1,		 C2,		 		 output2,		 X)," &
		 " 19		 ( BC_1,		 LOCK,		 		 output2,		 X)," &
		 " 20		 ( BC_1,		 C15,		 		 output2,		 X)," &
		 " 21		 ( BC_1,		 F8O,		 		 output2,		 X)," &
		 " 22		 ( BC_1,		 TSP,		 		 output2,		 X)," &
		 " 23		 ( BC_1,		 RSP,		 		 output2,		 X)," &
		 " 24		 ( BC_1,		 F0OB,		 		 output2,		 X)," &
		 " 25		 ( BC_1,		 F16OB,		 		 output2,		 X)," &
		 " 26		 ( BC_4,		 PRIREF,		 		 input,  		 X)," &
		 " 27		 ( BC_4,		 *,		 		 internal,  		 X)," &
		 " 28		 ( BC_1,		 *,		 		 internal,		 X)," &
		 " 29		 ( BC_4,		 *,		 		 internal,  		 X)," &
		 " 30		 ( BC_4,		 RSTB,		 		 input,  		 X)";

end MT9040_top;



------------- end of BSDL description for the MT9040_top ----------

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